JP2024143604A - Bridgeless power factor correction converter and control method - Google Patents

Abstract

A bridgeless power factor correction converter is provided that prevents imbalance in input current control due to the polarity of the input voltage.
[Solution] The bridgeless power factor correction converter includes a power conversion unit, an input voltage detection unit, an output voltage detection unit, a current detection unit, and a control unit. The power conversion unit has a bridge circuit and converts an AC power source into a DC power source. The input voltage detection unit detects the input voltage. The output voltage detection unit detects the output voltage of the power conversion unit. The current detection unit detects the input current. The control unit has a control current generator and controls the on/off of a switching element of the bridge circuit. The control current generator detects the input current at the timing of a second amplitude peak when the input voltage is positive, and outputs the input current detected at the timing of a third amplitude peak, and detects the input current at the timing of a first amplitude peak when the input voltage is negative, and outputs the input current detected at the timing of a third amplitude peak.
[Selection] Figure 13

Description

The present invention relates to a bridgeless power factor correction converter and a control method for a bridgeless power factor correction converter.

Conventionally, power factor correction converters (PFC converters) are used in power conversion devices (converters) that convert AC power to DC power to improve the power factor and suppress harmonic currents. Here, in general power factor correction converters, after rectifying the AC voltage with a diode bridge, a boost converter (step-up type converter) is often used to boost the voltage and improve the power factor.

However, when a diode bridge for rectification is provided in this way, the loss of the diode bridge itself hinders the efficiency of the power factor correction converter. Therefore, a bridgeless power factor correction converter that does not have a bridge has been proposed (for example, Patent Document 1). This type of bridgeless power factor correction converter has a series circuit of two diodes and a series circuit of two switching elements such as FETs (field effect transistors). Note that the switching elements are, for example, MOSFETs (metal oxide semiconductor field effect transistors), and the switching elements are controlled to be on and off by PWM (pulse width modulation) control.

In order to improve the power factor and suppress harmonic currents, input current control (hereinafter also referred to as input current control) is required. In input current control, the input current is generally fed back, and the fundamental wave (power supply frequency component) of the input current must be detected. When a switching element is turned on and off, noise components caused by the switching carrier are superimposed on the input current. For this reason, unless the detection timing is set appropriately, it becomes difficult to accurately detect the fundamental wave. A method of detecting the fundamental wave is to set a detection point at the point where the current waveform superimposed with noise components caused by the switching carrier and the current waveform of the fundamental wave overlap, that is, at the timing of the peaks and valleys of the switching carrier.

In general, unlike normal boost choppers, in bridgeless power factor correction converters, the increase or decrease in input current differs depending on the polarity of the input voltage. For example, in a bridgeless power factor correction converter using a totem-pole half bridge as described in Patent Document 1, when the polarity of the input voltage is positive, the input current increases when the lower arm switching element is on (reactor charging mode), and decreases when the upper arm switching element is on (reactor discharging mode). When the polarity of the input voltage is negative, the opposite is true.

JP 2012-70490 A

Basically, when detecting the input current, there is a detection delay caused by the detection circuit, noise filter, etc. This results in an error between the current detection value at the peak or valley of the switching carrier and the actual current value (called the actual current value), in other words, a deviation from the fundamental wave.

In particular, in the bridgeless power factor correction converter described in Patent Document 1, the charge/discharge state of the reactor differs depending on whether the reactor is in charge mode or discharge mode at the peak or valley of the switching carrier due to the difference in the polarity of the input voltage. Also, the slope of the current change when the reactor is in charge mode is greater than the slope of the current change when the reactor is in discharge mode. For this reason, if the same detection timing is set for positive and negative input voltages and current detection is performed, the effect of the detection delay differs depending on the polarity of the input voltage, and the amplitude of the detected input current differs. Input current control is performed on the premise that the amplitude of the input current detected at the same detection timing is equal during one cycle of the input current, even if the polarity of the input voltage differs. Therefore, if such a detection current is used, the amplitude of the input current fed back differs when the input voltage is positive and when it is negative, causing an imbalance in the input current control.

The present invention was made with a focus on the previously unsolved problems, and aims to provide a bridgeless power factor correction converter and a control method thereof that can prevent imbalance in input current control due to the polarity of the input voltage.

In order to achieve the above object, according to one aspect of the present invention, there is provided a power conversion unit having a bridge circuit in which two diodes and two switching elements are bridge-connected, or a bridge circuit in which four switching elements are bridge-connected, a reactor, and a smoothing capacitor, and converting an AC power source into a DC power source, an input voltage detection unit detecting an input voltage which is the voltage of the AC power source, an output voltage detection unit detecting an output voltage of the power conversion unit, a current detection unit detecting an input current flowing through the reactor, and a control unit controlling the on/off of the switching elements of the bridge circuit by PWM control using a triangular wave as a switching carrier based on the detection results by the input voltage detection unit, the detection results by the output voltage detection unit, and the detection results by the current detection unit. The control unit includes a control current generator that generates a control current for generating a PWM pulse used for PWM control based on the input current detected by the current detection unit and the switching carrier, and the control current generator detects the input current at the timing of the second amplitude peak and outputs the input current detected at the timing of the third amplitude peak when the input voltage is positive, when the amplitude peaks in one cycle of the switching carrier are in phase order of a first amplitude peak, a second amplitude peak, and a third amplitude peak, and detects the input current at the timing of the first amplitude peak and outputs the input current detected at the timing of the third amplitude peak when the input voltage is negative.

According to another aspect of the present invention, there is provided a control method for a bridgeless power factor correction converter according to any one of claims 1 to 6, comprising: a control current generator detecting a switching carrier to be applied; a control current generator determining the polarity of the input voltage detected by the input voltage detection unit; and, when the polarity of the input voltage is determined to be positive, the control current generator detecting an input current at the timing of the second amplitude peak when the amplitude peaks in one cycle of the switching carrier are, in phase order, a first amplitude peak, a second amplitude peak, and a third amplitude peak; and, when the polarity of the input voltage is determined to be negative, the control current generator detecting an input current at the timing of the first amplitude peak; and, when the polarity of the input voltage is determined to be negative, the control current generator outputting the detected input current at the timing of the third amplitude peak as the control current.

According to one aspect of the present invention, it is possible to obtain a bridgeless power factor correction converter and a control method thereof that can prevent imbalance in input current control due to the polarity of the input voltage.

1 is a diagram showing a circuit configuration of a bridgeless power factor correction converter (TPBL converter) according to a first embodiment. FIG. 2 is a diagram showing an equivalent circuit of an input section of the TPBL converter shown in FIG. This is a vector diagram at unity power factor. FIG. 1 is a diagram for explaining self-guidance. FIG. 2 is a simplified circuit diagram of a TPBL converter. FIG. 13 is a diagram showing a voltage waveform when the TPBL converter does not perform a switching operation. FIG. 1 is a diagram showing a path when a reactor is charged in a TPBL converter. FIG. 2 is a diagram showing a path during reactor discharge in a TPBL converter. FIG. 2 is a control block diagram of a control unit shown in FIG. 1 . 4 is a characteristic diagram showing the relative relationship between a PWM pulse output from a control unit, an input current, and a switching carrier. FIG. FIG. 4 is a characteristic diagram for explaining how the charge/discharge state of a reactor differs depending on the input voltage polarity. FIG. 10 is a diagram showing a specific configuration of a control current generator shown in FIG. 9 . FIG. 13 is a diagram showing a specific configuration of the average input current calculator shown in FIG. 12 . FIG. 11 is a characteristic diagram showing the relative relationship between a PWM pulse, an input current, and a switching carrier, for explaining the operation of a control current generator. FIG. 11 is a characteristic diagram showing the relative relationship between a PWM pulse, an input current, a switching carrier, and a current phase, for explaining the operation of a control current generator. 10 is a flowchart showing a control procedure for generating a control current by a control current generator according to a second embodiment.

Next, an embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic.
Furthermore, the embodiments shown below are examples of devices and methods for embodying the technical idea of the present invention, and the technical idea of the present invention does not specify the structure, arrangement, etc. of the components as described below. The technical idea of the present invention can be modified in various ways within the technical scope defined by the claims. In the embodiments shown below, a circuit including a switching element is shown as an example, but the present invention is not limited to this example.

First Embodiment
Fig. 1 is a diagram showing a circuit configuration of a bridgeless power factor correction converter according to a first embodiment. The circuit shown in the figure is a totem-pole bridgeless power factor correction converter (TPBL converter) 10. The term "totem-pole type" is a common name based on the fact that multiple switching elements appear to be stacked vertically in a circuit diagram. Here, the TPBL converter 10 has an advantage in that each switching element is connected to an AC power supply via a reactor, and therefore the influence of switching noise is absorbed by the reactor and is not easily transmitted to the AC power supply side.

The TPBL converter 10 includes a power conversion unit 11, an input voltage detection circuit 12 corresponding to an input voltage detection unit, an output voltage detection circuit 13 corresponding to an output voltage detection unit, an input current detection circuit 14 corresponding to a current detection unit, and a control unit 15. The power conversion unit 11 rectifies and boosts an input voltage V _AC which is the voltage of an AC power source 1, improves the power factor of an input current I _AC , and outputs a DC output voltage V _DC to a load 2.

The power conversion unit 11 includes a bridge circuit 111, a reactor L1, and a smoothing capacitor C1. The bridge circuit 111 is bridge-connected to a first series circuit in which a first diode D1 and a second diode D2 are connected in series, and a second series circuit in which a first switching element S1 and a second switching element S2 are connected in series. In the bridge circuit 11, the connection point between the first diode D1 and the second diode D2 is connected to the negative side (-) of the AC power supply 1, and the connection point between the first switching element S1 and the second switching element S2 is connected to the positive side (+) of the AC power supply 1.

1 illustrates a case where the first switching element S1 and the second switching element S2 are MOSFETs, where the first switching element S1 includes a first body diode DS1, and the second switching element S2 includes a second body diode DS2. One end of the reactor L1 is connected to the positive side of the AC power source 1, and the other end of the reactor L1 is connected to the connection point between the first switching element S1 and the second switching element S2, that is, the drain of the first switching element S1 and the source of the second switching element S2. The first switching element S1 constitutes the lower arm, and the second switching element S2 constitutes the upper arm. The first diode D1 and the second diode D2 are connected to the cathode of the first diode D1 and the anode of the second diode D2, and this connection point is connected to the negative side of the AC power source 1. The source of the first switching element S1 is connected to the cathode of the first diode D1, and the drain of the second switching element S2 is connected to the cathode of the second diode D2.

In addition, a smoothing capacitor C1 is provided in parallel with the load 2 after the bridge circuit 111. The smoothing capacitor C1 smoothes the voltage rectified by the bridge circuit 111 and outputs a DC output voltage.

The input voltage detection circuit 12 detects the input voltage V _AC, which is the voltage of the AC power supply 1. The output voltage detection circuit 13 detects the output voltage V _DC of the power conversion unit 11. The input current detection circuit 14 is disposed between the reactor L1 and the connection point between the first switching element S1 and the second switching element S2, and detects the input current I _AC flowing through the reactor L1.

The control unit 15 controls the on/off of the first switching element S1 and the second switching element S2 using PWM control, the details of which will be described later, based on the detection results of the input voltage detection circuit 12, the detection results of the output voltage detection circuit 13, and the detection results of the input current detection circuit 14.

<Operation of TPBL Converter>
(Input current control)
A three-level control method is used to control the input current I _AC . Fig. 2 shows an equivalent circuit of the input section of the TPBL converter 10. Fig. 3 shows a vector diagram at a power factor of 1. The input section corresponds to the AC power source 1, the reactor L1, and the bridge circuit 111.

The voltage drop ΔV of the reactor L (the voltage across the reactor L1) leads the power supply current I _AC of the AC power supply 1 by π/2 and is shown as jωLIs. To make the output voltage V _DC of the power conversion unit 11 follow the command value of the DC voltage and to make the power factor "1", this can be achieved by providing the input voltage _VINV of the bridge circuit 111 as shown in the following formula. This input voltage _VINV is the voltage between the connection point between the first switching element S1 and the second switching element S2 and the connection point between the first diode D1 and the second diode D2, as shown in the following formula 1.

The control unit 15 calculates an input current command value from the deviation between the command value and the detected value of the DC voltage, and obtains a voltage drop ΔV in the reactor L1 from the deviation between the input current command value and the detected value. Since the voltage drop ΔV in the reactor L1 is steadily equal to jωLIs, the following equation is established.
V _INV = V _AC -ΔV
Therefore, by adjusting ΔV, current control is performed to achieve a power factor of "1".

(Reactor charging and discharging)
The reactor L1 can store energy by converting electrical energy into magnetic energy. As shown in Fig. 4, the reactor L1 generates an electromotive force (back electromotive force) V that opposes changes in current due to electromagnetic induction. This is called self-induction. If the current flowing through the reactor L1 is i and the inductance of the reactor L1 is L, the back electromotive force V is given by the following equation 2.

The TPBL converter 10 can be simply depicted as shown in Fig. 5. The input voltage is indicated as V _AC , the input voltage of the bridge circuit 111 as V _INV , and the output voltage supplied to the load as V _DC . Fig. 6 shows a voltage waveform when the TPBL converter 10 does not perform a switching operation. In Fig. 6, the vertical axis indicates voltage (V) and the horizontal axis indicates time (s). The input voltage V _AC (AC voltage) is indicated by a solid line, and the output voltage V _DC (DC voltage) supplied to the load is indicated by a dotted line.

When the TPBL converter 10 does not perform a switching operation (passive), the back electromotive force of the reactor L1 is hardly generated because the current change is small. In other words, V _AC and V _INV are equivalent. Therefore, the current flows on the secondary side only when V _AC exceeds V _DC .

(When reactor is charging)
7 shows the path during reactor charging. For example, when the first switching element S1 is on, the AC power supply 1 is short-circuited via the reactor L1, and the input current _IAC increases. Therefore, an electromotive force (counter-electromotive force) V that does not increase the input current _IAC is generated by self-induction of the reactor L1. Then, the power represented by the product of the input current _IAC and the counter-electromotive force V is stored as energy in the reactor L1 (reactor charging).

Specifically, when the polarity of the input voltage is positive, the first switching element S1 is on, and the second switching element S2 is off, the input current _IAC flows through the reactor L1, the first switching element S1, and the first diode D1, returning to the AC power supply 1. On the other hand, when the polarity of the input voltage is negative, the second switching element S2 is on, and the first switching element S1 is off, the input current _IAC flows through the second diode D2, the second switching element S2, and the reactor L1, returning to the AC power supply 1.

(When reactor is discharging)
8 shows the path when the reactor is discharged. For example, when the first switching element S1 is off, the AC power supply 1 is connected to the load 2 via the reactor L1, so that the input current _IAC is reduced compared to when the short circuit occurs. Therefore, an electromotive force (counter-electromotive force) V that does not reduce the input current _IAC is generated by self-induction of the reactor L1. Then, the energy stored in the reactor L1 is released and the reactor L1 is discharged (reactor discharge). At this time, the voltage on the input side of the reactor L1 is higher than the output voltage _VDC of the power conversion unit 11 by the counter-electromotive force V, so that a current can flow to the load 2 side.

Specifically, when the polarity of the input voltage is positive, the second switching element S2 is on, and the first switching element S1 is off, the input current _IAC flows through the reactor L1, the second switching element S2, the load 2, and the first diode D1, and returns to the AC power supply 1. On the other hand, when the polarity of the input voltage is negative, the first switching element S1 is on, and the second switching element S2 is off, the input current _IAC flows through the second diode D2, the load 2, the first switching element S1, and the reactor L1, and returns to the AC power supply 1.

Ｖ_ｉｎはＶ_ＡＣを全波整流した電圧を示しており、常に極性は正となる。上記の式より、Ｖ_ＤＣは常に正の値となるため、放電時に比べ充電時のほうが、傾きが大きくなることが分かる。 (Input current slope)
The slope of the input current _IAC differs during charging and discharging. If _di1 is the amount of current change per unit time during charging and _di2 is the amount of current change per unit time during discharging, the relationship between current and voltage can be expressed by the following equation 3.

_Vin represents the voltage obtained by full-wave rectifying V _AC , and its polarity is always positive. From the above formula, it can be seen that since V _DC is always a positive value, the slope is greater during charging than during discharging.

(Input current detection)
For example, in an air conditioner control system, current detection is generally performed discretely. For this reason, when performing current detection using a microcomputer or the like, it is necessary to set a current detection point at a desired timing.
9 is a control block diagram of the control unit 15 shown in FIG 1. The control unit 15 includes a voltage control unit 151, a pulse generation control unit 152, a control current generator 153, a zero cross detector 154, a phase estimator 155, a switching carrier generator 156, and an input voltage polarity determiner 157. The voltage control unit 151 generates a current amplitude command value _{Iac*_amp} based on the voltage command value Vdc ^* and the output voltage _VDC output from the output voltage detection circuit 13.

The pulse generation control unit 152 turns on one of the first switching element S1 and the second switching element S2 and turns off the other based on the current amplitude command value I _{ac*_amp} output from the voltage control unit 151, the input voltage V _AC output from the input voltage detection circuit 12, and the control current I _{ac_cont} output from the control current generator 153, to generate PWM pulses for repeatedly operating by alternately switching between a reactor discharging mode in which the reactor L1 is in a discharging state and a reactor charging mode in which the reactor L1 is in a charging state, and outputs the PWM pulses to the first switching element S1 and the second switching element S2.

The zero-cross detector 154 monitors the state of the input voltage V _AC output from the input voltage detection circuit 12, detects zero-cross points where the voltage polarity switches from negative to positive or from positive to negative, and outputs a zero-cross signal. The phase estimator 155 estimates the phase of the input voltage V _AC from the zero-cross signal output from the zero-cross detector 154, and outputs a sine wave sin θ (hereinafter also referred to as a unit sine wave) with an amplitude of 1 that corresponds to the estimated phase of the input voltage V _AC to the pulse generation control unit 152.

The switching carrier generator 156 generates a triangular wave switching carrier in which first amplitude vertices (peaks) and second amplitude vertices (valleys) alternately occur, and outputs the switching carrier to the control current generator 153 and the pulse generation control unit 152. The control current generator 153 generates a control current I ac_cont for generating a PWM pulse used in PWM control, based on the input current I _AC detected by the input current detection circuit 14 and the switching carrier output from the switching carrier _generator 156. The input voltage polarity determiner 157 determines the polarity of the input voltage V _AC output from the input voltage detection circuit 12, generates an input voltage polarity signal indicating H (high) when the polarity is positive and L (low) when the polarity is negative, and outputs the input voltage polarity signal to the control current generator 153 and the pulse generation control unit 152, respectively.

The pulse generation control unit 152 includes a current command value generator 1521, a duty generator 1522, and a PWM pulse generator 1523. The current command value generator 1521 generates a current command value I _{ac* based on the current amplitude command value I ac*_amp} output from the voltage control unit 151 and the unit sine wave sin θ output from the phase estimator 155. That is, the current command value I _{ac* is} generated by multiplying the current amplitude command value I _{ac*_amp} by the unit sine wave sin θ and taking the absolute value of the multiplication result. The duty generator 1522 generates a modulation signal (indicated as Duty in FIG. 9) that provides an on-duty for generating a PWM pulse based on the difference between the current command value I _ac* and the control current I _{ac_cont} . The PWM pulse generator 1523 generates a PWM pulse based on the input voltage _VAC output from the input voltage detection circuit 12, the on-duty, and the switching carrier.

Fig. 10 is a characteristic diagram showing the relative relationship between the PWM pulse output from the control unit 15, the input current _IAC, and the switching carrier. In Fig. 10, the vertical axis shows amplitude, and the horizontal axis shows time. Fig. 10(a) shows the PWM pulse output from the PWM pulse generator 1523, Fig. 10(b) shows the input current _IAC detected by the input current detection circuit 14, and Fig. 10(c) shows the switching carrier output from the switching carrier generator 156. The period shown by dots in Fig. 10(a) represents the on-duty period during which the first switching element S1 (lower arm) and the second switching element S2 (upper arm) are turned on.

That is, as shown in FIG. 10(a), the PWM pulse generator 1523 outputs a PWM pulse (lower arm SW pulse) that turns on the first switching element S1 and turns off the second switching element S2, and outputs a PWM pulse (upper arm SW pulse) that turns off the first switching element S1 and turns on the second switching element S2. The PWM pulse generator 1523 also adds an appropriate dead time Td between the PWM pulse (upper arm SW pulse) and the PWM pulse (lower arm SW pulse) to control the first switching element S1 and the second switching element S2 so that they are not turned on at the same time.

When high-frequency switching is performed as in the TPBL converter 10, a carrier component as shown in Fig. 10(b) is superimposed on the input current _IAC . In input current control by feedback control, control is performed on the fundamental wave of the power supply voltage frequency, so the fundamental wave component must be detected for current detection. When a PWM pulse based on the middle of the switching carrier as shown in Fig. 10(c) is output, the actual current due to carrier superposition and the fundamental wave component overlap and match at the peaks and valleys of the switching carrier. Therefore, as a method of extracting the fundamental wave, detection points are set at the peaks and valleys of the switching carrier.

If control is possible even with a slow control response, one method is to attenuate the carrier component from the detection value over a certain period of time using a filter and extract the fundamental wave, but in bridgeless converter control, the current changes are sudden and a fast control response is required, so it is difficult to choose to extract the fundamental wave using a filter.

In Fig. 11, the vertical axis indicates amplitude, and the horizontal axis indicates time. Fig. 11(a) is a characteristic diagram showing the relative relationship between the PWM pulse, the input current _IAC, and the switching carrier when the input voltage polarity is positive, and Fig. 11(b) is a characteristic diagram showing the relative relationship between the PWM pulse, the input current _IAC, and the switching carrier when the input voltage polarity is negative. Furthermore, in Figs. 11(a) and (b), (1) indicates the PWM pulse output from the PWM pulse generator 1523, (2) indicates the input current _IAC detected by the input current detection circuit 14, and (3) indicates the switching carrier output from the switching carrier generator 156.

In the TPBL converter 10, the charge/discharge state of the reactor L1 differs at the peak or valley of the switching carrier due to the difference in the input voltage polarity as shown in Fig. 11. That is, in the case of Fig. 11(a) where the input voltage polarity is positive, when the PWM pulse changes from lower arm on to upper arm on to lower arm on, the charge/discharge state of the reactor L1 changes from charge to discharge to charge. On the other hand, in the case of Fig. 11(b) where the input voltage polarity is negative, when the PWM pulse changes from lower arm on to upper arm on to lower arm on, the charge/discharge state of the reactor L1 changes from discharge to charge to discharge. According to the differential equation of the input current _IAC shown in Equation 3, the slope of the current is gentler when the reactor is discharging than when the reactor is charging.

In the input current detection, a detection delay occurs due to a current sensor, a noise cut filter, etc. In this case, in the TPBL converter 10, as shown in Fig. 11, if the slope of the input current _IAC differs due to differences in the charging and discharging states, the deviation from the fundamental wave, which is the difference between the actual current value (shown by a solid line in Fig. 11) and the detected current value (shown by a dotted line in Fig. 11), differs depending on whether the input voltage polarity is positive or negative. When the input voltage polarity is positive, the difference between the actual current value and the detected current value at the timing of the switching carrier crest, that is, during reactor charging, is Z1. On the other hand, when the input voltage polarity is negative, the difference between the actual current value and the detected current value at the timing of the switching carrier crest, that is, during reactor discharging, is Z2, which is larger than Z1. As such, a difference occurs in the value of the deviation between when the reactor is charging and when the reactor is discharging, so if current detection is performed at the same timing when the reactor is charging and when the reactor is discharging, the effect of the detection delay will differ depending on the input voltage polarity, resulting in an imbalance in the input current control.

<Solution according to the first embodiment>
In the first embodiment of the present invention, when the amplitude vertices in one cycle of the switching carrier are, in order of phase, the first valley (first amplitude vertex), the first peak (second amplitude vertex), and the second valley (third amplitude vertex), in the control current generator 153, when the input voltage is positive, the input current I _AC is detected at the timing of the first peak, and the input current I _AC detected at the timing of the second valley is output as the control current I _{ac_cont} . On the other hand, when the input voltage is negative, the input current I _AC is detected at the timing of the first valley, and the input current I _AC detected at the timing of the second valley is output as the control current I _{ac_cont} .

Figure 12 shows a specific configuration of the control current generator 153. The control current generator 153 includes an input current detector 161, a switching carrier timing detector 162, and a control current output device 163. The switching carrier timing detector 162 detects the switching carrier output from the switching carrier generator 156, generates a switching carrier timing signal indicating the timing of the peaks and valleys of the switching carrier, and outputs the switching carrier timing signal to the input current detector 161 and the control current output device 163, respectively.

The input current detector 161 detects the input current I _AC at each of the successive peaks and valleys of the switching carrier based on the switching carrier timing signal output from the switching carrier timing detector 162, and outputs each of the detected current values as a detected current to the control current output device 163.

13 shows a specific configuration of the control current output unit 163. The control current output unit 163 includes a selection unit 171, an output unit 172, a first counter (counter 1) 173, and a second counter (counter 2) 174. The selection unit 171 selects an input current value based on a trigger signal from the first counter 173, and outputs the selected current value to the output unit 172. The output unit 172 outputs the input current value as a control current I _{ac_cont} based on a trigger signal from the second counter 174.

The first counter 173 and the second counter 174 count the count value N successively as N=1, 2, 3, 4, 5, ... based on the input of the clock. Based on the switching carrier timing signal and the input voltage polarity signal output from the switching carrier timing detector 162 (using the switching carrier timing signal as a clock), the first counter 173 counts the valley of the first switching carrier as N=1, counts the first crest of the subsequent switching carrier as N=2, and outputs a trigger signal to the selection unit 171 when the count value becomes "2" when the polarity of the input voltage V _AC is positive, counts the second valley of the subsequent switching carrier as N=3, and resets to "1" when the count value becomes "3". On the other hand, when the polarity of the input voltage V _AC is negative, outputs a trigger signal to the selection unit 171 when the count value becomes "1", and resets to "1" when the count value becomes "3". Based on the switching carrier timing signal output from the switching carrier timing detector 162, the second counter 174 counts the first valley of the initial switching carrier as N=1, counts the first crest of the subsequent switching carrier as N=2, and counts the second valley of the subsequent switching carrier as N=3, and when the count value reaches "3", outputs a trigger signal to the output unit 172 and resets the count value to "1".

Fig. 14 is a characteristic diagram showing the relative relationship between the PWM pulse, the input current _IAC, and the switching carrier for explaining the operation of the control current generator 153. In Fig. 14, the vertical axis indicates amplitude, and the horizontal axis indicates time. Fig. 14(a) is a characteristic diagram showing the relative relationship between the PWM pulse, the input current _IAC , and the switching carrier when the input voltage polarity is positive, and Fig. 14(b) is a characteristic diagram showing the relative relationship between the PWM pulse, the input current _IAC, and the switching carrier when the input voltage polarity is negative. Furthermore, in Figs. 14(a) and (b), (1) indicates the PWM pulse output from the PWM pulse generator 1523, (2) indicates the input current _IAC detected by the input current detection circuit 14, and (3) indicates the switching carrier output from the switching carrier generator 156.

When the input voltage polarity is positive, the selection unit 171 selects a current value P1 (shown by a square in FIG. 14(a)) during reactor discharge detected at the timing of the peak of the switching carrier, and outputs the current value P1 to the output unit 172. When the input voltage polarity is negative, the selection unit 171 selects a current value P2 (shown by a square in FIG. 14(b)) during reactor discharge detected at the timing of the first valley of the switching carrier, and outputs the current value P2 to the output unit 172.

When the polarity of the input voltage _VAC is positive, the output unit 172 holds a current value P1 until a trigger signal output from the second counter 174 is input, and outputs the current value P1 as the control current _{Iac_cont} at the point in time when the trigger signal is input. Moreover, when the polarity of the input voltage _VAC is negative, the output unit 172 holds a current value P2 until a trigger signal output from the second counter 174 is input, and outputs the current value P2 as the control current _{Iac_cont} at the point in time when the trigger signal is input.

When the input voltage polarity is positive, the difference between the current value P1 and the actual current value, that is, the value of the deviation from the fundamental wave, is Z3. On the other hand, when the input voltage polarity is negative, the difference between the current value P2 and the actual current value, that is, the value of the deviation from the fundamental wave, is Z4, which is almost the same as Z3. Here, when comparing the magnitudes of the deviations Z1 and Z2 from the fundamental wave shown in FIG. 11 described above with the deviations Z3 and Z4 from the fundamental wave according to the first embodiment, Z1 ≒ Z3 ≒ Z4 < Z2. Therefore, the deviation between the actual current value and the current value P1 and the current value P2, which are the detected current values, is small, and the current value P1 and the current value P2 are equivalent to the fundamental wave of the input current I _AC . This enables accurate input current control regardless of the polarity of the input voltage V _AC .

Fig. 15 is a characteristic diagram (schematic diagram) showing the relative relationship between the PWM pulse, the input current _IAC , the switching carrier, and the current phase to explain the operation of the control current generator 153. In Fig. 15, the vertical axis indicates amplitude, and the horizontal axis indicates time. Fig. 15(a) shows the input current _IAC output by the selection unit 171, Fig. 15(b) shows the switching carrier output from the switching carrier generator 156, and Fig. 15(c) shows the current phase of the input current _IAC output from the output unit 172 as the control current _{Iac_cont} .

Here, a specific description will be given assuming that the frequency of the input voltage V _AC is 50 Hz and the frequency of the switching carrier (triangular wave) is 4 kHz. At this time, there are 40 switching carriers (triangular waves) in a half cycle of the input voltage V _AC . For example, when the polarity of the input voltage V _AC is positive, the output unit 172 holds the current value x1 output from the selection unit 171 at the timing of the crest (second amplitude apex) of the switching carrier corresponding to a current phase of 6.75 deg between time t1, which is the timing of the valley (first amplitude apex) of the switching carrier corresponding to a current phase of 4.50 deg, and time t2, which is the timing of the next valley (third amplitude apex) of the switching carrier corresponding to a current phase of 9.00 deg, and outputs the current value x1 at the timing of the valley (third amplitude apex) of the switching carrier at time t2, which is the current phase of 9.00 deg. In addition, the output unit 172 holds the current value x2 output from the selection unit 171 at the timing of the peak (second amplitude vertex) of the switching carrier corresponding to a current phase of 11.25 deg, between time t2, which is the timing of the valley (first amplitude vertex) of the switching carrier corresponding to a current phase of 9.00 deg, and time t3, which is the timing of the next valley (third amplitude vertex) of the switching carrier corresponding to a current phase of 13.50 deg, and outputs the current value x2 at time t3, which is the timing of the valley (third amplitude vertex) of the switching carrier corresponding to a current phase of 13.50 deg.

On the other hand, when the polarity of the input voltage V _AC is negative, the output unit 172 holds the current value x1' output from the selection unit 171 at time t1' which is the timing of the valley (first amplitude vertex) of the switching carrier corresponding to a current phase of 4.50 deg. In this case, the output unit 172 does not output the current value x1' at time tm1 (indicated by a dotted line in FIG. 15C ) which is the timing of the crest (second amplitude vertex) of the switching carrier corresponding to a current phase of 6.75 deg between time t1' which is the timing of the valley (first amplitude vertex) of the switching carrier corresponding to a current phase of 4.50 deg and time t2' which is the timing of the next valley (third amplitude vertex) of the switching carrier corresponding to a current phase of 9.00 deg, but outputs the current value x1' at time t2' which is the timing of the valley (third amplitude vertex) of the switching carrier corresponding to a current phase of 9.00 deg which is delayed by a half cycle of the switching carrier from time tm1. Furthermore, the output unit 172 holds the current value x2' output from the selection unit 171 at time t2' which is the timing of the valley (first amplitude vertex) of the switching carrier corresponding to the current phase 9.00 deg. In this case, the output unit 172 does not output the current value x2' at time tm2 which is the timing of the crest (second amplitude vertex) of the switching carrier corresponding to the current phase 11.25 deg between time t2' which is the timing of the valley (first amplitude vertex) of the switching carrier corresponding to the current phase 9.00 deg and time t3' which is the timing of the next valley (third amplitude vertex) of the switching carrier corresponding to the current phase 13.50 deg, but outputs the current value x2' at time t3' which is the timing of the valley (third amplitude vertex) of the switching carrier corresponding to the current phase 13.50 deg which is delayed by a half cycle of the switching carrier from time tm2.

That is, when the polarity of the input voltage _VAC is negative, the control current output unit 163 delays the current phase of the input current _IAC detected by the input current detector 161 by a half period of the switching carrier. Therefore, the control current output unit 163 can regard the input current _IAC detected when the polarity of the input voltage _VAC is negative as a current detected at the same timing as the input current _IAC detected when the polarity of the input voltage _VAC is positive.

<Effects of the First Embodiment>
As described above, according to the first embodiment, the control current generator 153 can detect the fundamental wave of the input current I _AC at a point where the fundamental wave of the input current I _AC and the current waveform on which the noise component caused by the switching carrier is superimposed become equal without using a filter or the like, which makes a noise filter unnecessary and shortens the detection delay time caused by a noise filter or the like. In addition, regardless of the polarity of the input voltage V _AC , a detection point is set so that the input current I _AC is detected when the reactor L1 is discharged, and the timing at which the input current I _AC detected when the input voltage V _AC is positive is output as the control current I _{ac_cont} is the same as the timing at which the input current I _AC detected when the input voltage V _AC is positive is output as the control current I _{ac_cont} , thereby making it possible to make the amount of deviation from the fundamental wave equal regardless of the polarity of the input voltage V _AC . This makes it possible to prevent imbalance in the input current control.

According to the first embodiment, in the control current generator 153, when the polarity of the input voltage V _AC is positive, the detection point during reactor discharge is the crest of the switching carrier, and when the polarity of the input voltage V _AC is negative, the detection point during reactor discharge is the trough of the switching carrier. Therefore, when the polarity of the input voltage V _AC is negative, the current phase of the detected input current I _AC is delayed by half a cycle of the switching carrier to match the control timing with when the polarity of the input voltage V _AC is positive. This makes it possible to prevent imbalance in the input current control. Note that, in the control current generator 153, even if the amplitude peaks in one cycle of the switching carrier are the first crest (first amplitude peak), the first trough (second amplitude peak), and the second crest (third amplitude peak) in the order of phase, the input current I _AC can be detected in the same manner as above to perform accurate input current control regardless of the polarity of the input voltage V _AC .

Second Embodiment
In the second embodiment, the control current generator 153 can be realized by software. In this case, the control current generator 153 includes a first counter 173 and a second counter 174.

FIG. 16 is a flowchart showing a procedure for controlling generation of the control current I _{ac_cont} by the control current generator 153 .
When the power supply of the TPBL converter 10 is turned on and a triangular wave switching carrier is generated from the switching carrier generator 156, the control current generator 153 detects the triangular wave switching carrier output from the switching carrier generator 156 and the input voltage V _AC (step ST16a), the first counter 173 and the second counter 174 start counting (step ST16b), and determine the polarity of the input voltage V _AC (step ST16c). Note that the first counter 173 and the second counter 174 count the first valley of the first switching carrier as N=1, the first peak of the subsequent switching carrier as N=2, and the second valley of the subsequent switching carrier as N=3. In addition, the peak of the first switching carrier may be counted as the first peak (first amplitude peak) with N=1, the first valley (second amplitude peak) of the subsequent switching carrier may be counted as N=2, and the peak of the subsequent switching carrier may be counted as the second peak (third amplitude peak) with N=3.

If the polarity of the input voltage V _AC is determined to be positive (step ST16c: Yes), the control current generator 153 determines the count value of the first counter 173 (step ST16d), and if the count value is determined to be "2", that is, the first peak of the switching carrier (step ST16d: Yes), it detects the input current I _AC (step ST16e). Then, when the count value of the first counter 173 becomes "3", the count value is reset to "1" (step ST16f), and the count value of the second counter 174 is determined (step ST16g).

If the count value is determined to be "3" (step ST16g: Yes), the control current generator 153 outputs the detected input current I _AC as the control current I _{ac_cont} (step ST16h), resets the count value of the second counter 174 to "1" (step ST16i), and returns to the processing of step ST16c above.

On the other hand, when the polarity of the input voltage _VAC is determined to be negative in step ST16c (step ST16c: No), the control current generator 153 determines the count value of the first counter 173 (step ST16j), and when the count value is determined to be "1", that is, the first valley of the switching carrier (step ST16j: Yes), the control current generator 153 detects the input current _IAC (step ST16k). Then, when the count value of the first counter 173 becomes "3", the control current generator 153 resets the count value of the first counter 173 to "1" (step ST16l), and determines the count value of the second counter 174 (step ST16g).

If the count value is determined to be "3" (step ST16g: Yes), the control current generator 153 outputs the detected input current _IAC as the control current _{Iac_cont} (step ST16h), resets the count value of the second counter 174 to "1" (step ST16i), and returns to the process of step ST16c. Note that in step ST16g, the control current generator 153 holds the output of the detected input current _IAC until the second counter 174 reaches the count value "3" (step ST16g: No).

<Effects of the Second Embodiment>
As described above, the second embodiment also provides the same effects as the first embodiment.

<Other embodiments>
As described above, the present invention has been described by the first and second embodiments, but the descriptions and drawings forming part of this disclosure should not be understood as limiting the present invention. If the gist of the technical contents disclosed in the above first and second embodiments is understood, it will be clear to those skilled in the art that various alternative embodiments, examples and operation techniques can be included in the present invention. In addition, the configurations disclosed in the first and second embodiments can be appropriately combined within a range that does not cause contradictions. For example, the configurations disclosed in multiple different embodiments may be combined, and the configurations disclosed in multiple different modified examples of the same embodiment may be combined.

In the above first embodiment, the TPBL converter 10 has been described as an example, but other than the TPBL converter 10, the bridge circuit of the bridgeless power factor correction converter may be, for example, a bridge circuit in which two diodes and two switching elements are bridge-connected, or a bridge circuit in which four switching elements are bridge-connected.

REFERENCE SIGNS LIST 1 AC power supply 2 Load 10 TPBL converter 11 Power conversion unit 12 Input voltage detection circuit 13 Output voltage detection circuit 14 Input current detection circuit 15 Control unit 111 Bridge circuit 151 Voltage control unit 152 Pulse generation control unit 153 Control current generator 154 Zero cross detector 155 Phase estimator 156 Switching carrier generator 157 Input voltage polarity determiner 161 Input current detector 162 Switching carrier timing detector 163 Control current output unit 171 Selection unit 172 Output unit 173 First counter (counter 1)
174 Second counter (Counter 2)
1521: current command value generator 1522: duty generator 1523: PWM pulse generator L1: reactor C1: smoothing capacitor S1: first switching element S2: second switching element D1: first diode D2: second diode DS1: first body diode DS2: second body diode

Claims (7)

a power conversion unit that includes a bridge circuit in which two diodes and two switching elements are bridge-connected, or a bridge circuit in which four switching elements are bridge-connected, a reactor, and a smoothing capacitor, and that converts an AC power source into a DC power source;
an input voltage detection unit that detects an input voltage that is a voltage of the AC power supply;
an output voltage detection unit that detects an output voltage of the power conversion unit;
a current detection unit that detects an input current flowing through the reactor;
a control unit that controls on/off of switching elements of the bridge circuit by PWM control using a triangular wave as a switching carrier, based on a detection result by the input voltage detection unit, a detection result by the output voltage detection unit, and a detection result by the current detection unit,
The control unit is
a control current generator that generates a control current for generating a PWM pulse used in the PWM control, based on the input current detected by the current detection unit and the switching carrier;
The control current generator
When the amplitude peaks in one cycle of the switching carrier are, in phase order, a first amplitude peak, a second amplitude peak, and a third amplitude peak,
When the input voltage has a positive polarity, the input current is detected at a timing of the second amplitude peak, and the detected input current is output at a timing of the third amplitude peak;
a bridgeless power factor correction converter configured to detect an input current at a timing of the first amplitude peak when the input voltage has negative polarity, and to output the detected input current at a timing of the third amplitude peak. The control unit is
a voltage control unit that generates a current amplitude command value based on a voltage command value and the output voltage output from the output voltage detection unit;
a pulse generation control unit that generates a PWM pulse for repeatedly operating the power conversion unit by alternately switching between a reactor discharge mode in which the reactor is in a discharging state and a reactor charge mode in which the reactor is in a charging state, based on the current amplitude command value output from the voltage control unit, the input voltage output from the input voltage detection unit, and the control current output from the control current generator, and outputs the PWM pulse to a switching element of the bridge circuit;
2. The bridgeless power factor correction converter of claim 1, comprising: The control current generator
3. The bridgeless power factor correction converter according to claim 2, further comprising: a polarity of the input voltage detected by the input voltage detection unit; and when the polarity of the input voltage is negative, a current phase of the input current detected by the current detection unit is delayed by a half cycle of the switching carrier. The pulse generation control unit includes:
a first calculation unit that generates a current command value based on the current amplitude command value and a phase of the input voltage;
a second calculation unit that generates an on-duty for generating a PWM pulse for operating a switching element of the bridge circuit based on a difference between the current command value and a control current output from the control current generator;
3. The bridgeless power factor correction converter according to claim 2, further comprising: a third calculation unit that generates the PWM pulse based on the input voltage output from the input voltage detection unit and the on-duty output from the second calculation unit. The bridgeless power factor correction converter according to claim 1, wherein the bridge circuit includes a first series circuit in which a first diode and a second diode are connected in series, and a second series circuit in which a first switching element constituting a lower arm and a second switching element constituting an upper arm are connected in series, the second series circuit being connected in parallel to the first series circuit. The control unit is
a voltage control unit that generates a current amplitude command value based on a voltage command value and the output voltage output from the output voltage detection unit;
a pulse generation control unit that generates a PWM pulse for alternately switching and repeatedly operating between a reactor discharge mode in which the reactor is in a discharging state and a reactor charge mode in which the reactor is in a charging state by turning on one of the first switching element and the second switching element and turning off the other based on the current amplitude command value output from the voltage control unit, the input voltage output from the input voltage detection unit, and the control current output from the control current generator, and outputs the PWM pulse to the first switching element and the second switching element;
6. The bridgeless power factor correction converter of claim 5, further comprising: A control method for a bridgeless power factor correction converter according to any one of claims 1 to 6, comprising the steps of:
A control current generator detects a switching carrier applied;
The control current generator determines the polarity of the input voltage detected by an input voltage detection unit;
when the polarity of the input voltage is determined to be positive, and the control current generator sets amplitude peaks in one cycle of the switching carrier to a first amplitude peak, a second amplitude peak, and a third amplitude peak in phase order, detecting the input current at the timing of the second amplitude peak;
when the polarity of the input voltage is determined to be negative, the control current generator detects an input current at a timing of the first amplitude peak;
the control current generator outputs the detected input current as the control current at the timing of the third amplitude peak;
A control method for a bridgeless power factor correction converter comprising:

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