JP2023041023A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device which has excellent heat radiation and in which an installation state can be simply confirmed.SOLUTION: A substrate 10 of a semiconductor device 1A includes: a substrate principal plane 101 and a substrate rear face 102 facing opposite sides in a thickness direction Z; and substrate side faces 103 and 104 facing a direction crossing the thickness direction Z. A semiconductor element 60 is arranged at a substrate principal plane 101 side. A heat radiating conduction section 30 is arranged at a position having a distance k from at least a part of the semiconductor element 60 when viewed from the thickness direction Z, and is exposed from the substrate rear face 102. A sealing resin 70 seals the semiconductor element 60 while covering the substrate principal plane 101. A wiring section 40 is connected to the heat radiating conduction section 30, extends from the heat radiating conduction section 30 to the substrate side faces 103 and 104 in a state exposed from the substrate rear face 102, and is exposed from the substrate side faces 103 and 104.SELECTED DRAWING: Figure 4

Description

The present disclosure relates to semiconductor devices.

2. Description of the Related Art With the recent miniaturization of electronic equipment, miniaturization of semiconductor devices used in the electronic equipment is progressing. Therefore, a so-called Fan-Out type semiconductor device has been proposed (see Patent Document 1, for example). This semiconductor device comprises: a semiconductor element having a plurality of electrodes; an insulating layer covering the back surface of the semiconductor element where the electrodes are formed; an insulating layer formed on the insulating layer and electrically connected to the electrodes; and a plurality of wirings located outside the semiconductor element.

JP 2019-57577 A

By the way, in a semiconductor device, terminals connected to a plurality of wirings are exposed from the back surface of an insulating layer. Therefore, when the semiconductor device is mounted on a wiring board by soldering, it is difficult to see the solder from the outside of the semiconductor device. . Therefore, there is room for improvement in terms of visually recognizing the mounting state of the semiconductor device on the wiring board from the state of bonding between the semiconductor device and the wiring board by soldering.

A semiconductor device according to one aspect of the present disclosure is electrically insulating, having a main surface and a back surface of a substrate that face opposite sides in a thickness direction, and at least one side surface of the substrate that faces in a direction intersecting the thickness direction. a semiconductor element arranged on the main surface side of the substrate; and a heat dissipation conductive portion provided at a position overlapping at least a part of the semiconductor element when viewed from the thickness direction and exposed from the back surface of the substrate. a sealing resin for sealing the semiconductor element while covering the main surface of the substrate; and at least one wiring portion exposed from the side surface of the substrate.

According to one embodiment of the present disclosure, it is possible to provide a semiconductor device that has good heat dissipation and allows easy confirmation of the mounting state.

FIG. 1 is a perspective view of a semiconductor device according to one embodiment, viewed from above. FIG. 2 is a perspective view of the semiconductor device of one embodiment viewed from the bottom side. FIG. 3 is a schematic top view showing the semiconductor device of one embodiment. FIG. 4 is a schematic bottom view showing the semiconductor device of one embodiment. FIG. 5 is a schematic side view showing the semiconductor device of one embodiment. FIG. 6 is a schematic side view showing the semiconductor device of one embodiment. 7 is a cross-sectional view taken along line 7-7 of FIG. 4. FIG. 8 is a cross-sectional view taken along line 8-8 of FIG. 4. FIG. 9 is a cross-sectional view taken along line 9-9 of FIG. 4. FIG. FIG. 10A is a cross-sectional view schematically showing a state in which the semiconductor device of one embodiment is mounted on a wiring board; FIG. 10B is a cross-sectional view schematically showing a state in which the semiconductor device of one embodiment is mounted on a wiring board; FIG. 11A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 11B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 12A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 12B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 13A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 13B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 14A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 14B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 15A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 15B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 16A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 16B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 17A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 17B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 18A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 18B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 19A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 19B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 20A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 20B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 21A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 21B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 22A is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 22B is a schematic cross-sectional view showing the manufacturing process of the semiconductor device. FIG. 23 is a schematic bottom view showing a semiconductor device of a modification. FIG. 24 is a schematic bottom view showing a semiconductor device of a modification. FIG. 25 is a schematic cross-sectional view showing a semiconductor device of a modification. FIG. 26 is a schematic cross-sectional view showing a modified semiconductor device.

Embodiments and modifications will be described below with reference to the drawings. The embodiments and modifications shown below are examples of configurations and methods for embodying technical ideas, and the materials, shapes, structures, layouts, dimensions, etc. of each component are limited to the following: not something to do. Various modifications can be added to each of the following embodiments and modifications. Moreover, the following embodiments and modifications can be implemented in combination with each other within a technically consistent range.

In this specification, "a state in which member A is connected to member B" refers to a case in which member A and member B are physically directly connected, and a case in which member A and member B are electrically connected. Including the case of being indirectly connected through other members that do not affect the connection state.

Similarly, "the state in which member C is provided between member A and member B" refers to the case where member A and member C or member B and member C are directly connected, and the case where member A and member C, or member B and member C are indirectly connected via another member that does not affect the electrical connection state.

(one embodiment)
A semiconductor device 1A according to one embodiment will be described with reference to FIGS. 1 to 9. FIG.
1 and 2 are perspective views showing the appearance of the semiconductor device 1A. FIG. 1 is a perspective view of the semiconductor device 1A viewed from above, and FIG. 2 is a view of the semiconductor device 1A viewed from the bottom. It is a perspective view. FIG. 3 is a top view of the semiconductor device 1A. FIG. 4 is a bottom view of the semiconductor device 1A. 5 is a side view of the semiconductor device 1A, and FIG. 6 is a side view of the semiconductor device 1A viewed from a direction different from that of FIG. 7 is a cross-sectional view taken along line 7-7 of FIG. 4. FIG. 8 is a cross-sectional view taken along line 8-8 of FIG. 4. FIG. 9 is a cross-sectional view taken along line 9-9 of FIG. 4. FIG.

A semiconductor device 1A shown in these figures is a device that is surface-mounted on circuit boards of various electronic devices. Here, for convenience of explanation, the thickness direction of the semiconductor device 1A is referred to as the thickness direction Z. As shown in FIG. A direction along one side of the semiconductor device 1A perpendicular to the thickness direction Z (horizontal direction in the top view) is called a first direction X. As shown in FIG. A direction perpendicular to both the thickness direction Z and the first direction X of the semiconductor device 1A (vertical direction in the top view) is called a second direction Y. As shown in FIG.

[Schematic configuration of semiconductor device]
As shown in FIGS. 1 and 2, the semiconductor device 1A has a rectangular plate shape. The semiconductor device 1A has a substrate 10, a sealing resin 70, a first external conductive film 81, and a second external conductive film . As shown in FIGS. 7 and 8, the semiconductor device 1A has a terminal section 20, a heat dissipation conductive section 30, a wiring section 40, a joining member 50, and a semiconductor element 60. As shown in FIGS. The joint member 50 includes a first joint member 51 and a second joint member 52 . The semiconductor element 60 is connected to the terminal portion 20 by the first joint member 51 and is connected to the heat dissipation conductive portion 30 by the second joint member 52 .

[substrate]
As shown in FIG. 7, the substrate 10 is a supporting member that forms the base of the semiconductor element 60. As shown in FIG. A semiconductor element 60 is mounted on the substrate 10 . As shown in FIGS. 3 and 4, the substrate 10 has a rectangular shape in which the length of the side in the first direction X and the length of the side in the second direction Y are equal when viewed from the thickness direction Z. As shown in FIG. Note that the shape of the substrate 10 and the length of each side may be changed as appropriate.

As shown in FIGS. 1 to 9, the substrate 10 has a substrate main surface 101, a substrate back surface 102, and substrate side surfaces 103-106. The substrate main surface 101 and the substrate back surface 102 face opposite sides in the thickness direction Z. As shown in FIG. The substrate main surface 101 is flat. The substrate back surface 102 is flat. The substrate side surfaces 103 to 106 intersect the substrate main surface 101 and the substrate back surface 102, and are perpendicular to each other in this embodiment. The substrate side surfaces 103 and 104 face opposite to each other in the first direction X. As shown in FIG. The substrate side surfaces 105 and 106 face opposite to each other in the second direction Y. As shown in FIG. The substrate side surfaces 103-106 are flat.

Substrate 10 is made of, for example, an electrically insulating material. As this material, for example, a synthetic resin containing epoxy resin or the like as a main component can be used. The synthetic resin according to this embodiment is an epoxy resin containing a filler. The filler consists, for example, of _SiO2 . The material forming substrate 10 is colored black, for example. Cutting traces are formed on the main surface 101, the back surface 102, and the side surfaces 103 to 106 of the substrate 10, which are the front surfaces of the substrate 10. FIG. The filler contained in the material of the substrate 10 is exposed on the substrate main surface 101, the substrate back surface 102, and the substrate side surfaces 103 to 106, which are the surfaces of the substrate 10. FIG.

As shown in FIG. 7, the substrate 10 has a plurality of first through holes 11 penetrating through the substrate 10 from the substrate main surface 101 to the substrate back surface 102 in the thickness direction Z. As shown in FIG. As shown in FIG. 4, in this embodiment, the substrate 10 has two first through holes 11 on each side in the first direction X. As shown in FIG. The side having the first through hole 11 is the side extending in the second direction Y. As shown in FIG. Each first through hole 11 extends to the side surfaces 103 and 104 of the substrate. That is, each first through hole 11 is open on the side surfaces 103 and 104 of the substrate.

As shown in FIGS. 4 and 9, the substrate 10 has one second through hole 12 penetrating through the substrate 10 from the substrate main surface 101 to the substrate back surface 102 in the thickness direction Z. As shown in FIGS. A second through hole 12 is formed in the center of the substrate 10 . Also, the second through hole 12 is formed at a position overlapping the semiconductor element 60 when viewed in the thickness direction Z. As shown in FIG. As shown in FIG. 4, the second through-hole 12 has, for example, a rectangular shape when viewed from the thickness direction Z. As shown in FIG. The substrate 10 has an inner surface 123 forming the second through hole 12 . When viewed from the thickness direction Z, each inner side surface 123 is inclined with respect to each substrate side surface 103 to 106 of the substrate 10 . The substrate side surfaces 103 to 106 face either the first direction X or the second direction Y. As shown in FIG. Therefore, each inner side surface 123 is inclined with respect to the first direction X. As shown in FIG. In this embodiment, the inclination angle of the inner side surface 123 with respect to the substrate side surfaces 103 to 106 is 45 degrees.

As shown in FIG. 4 , the substrate 10 has a third through hole 13 extending in the first direction X from the second through hole 12 . The third through hole 13 penetrates the substrate 10 in the thickness direction Z from the substrate main surface 101 to the substrate back surface 102 . In this embodiment, the substrate 10 has one third through hole 13 on each side in the first direction X. As shown in FIG. The side where the third through hole 13 is formed is the side extending in the second direction Y. As shown in FIG. The third through hole 13 extends from the second through hole 12 to the side surfaces 103 and 104 of the substrate. That is, the third through hole 13 is open on the side surfaces 103 and 104 of the substrate. Further, as shown in FIG. 4, the third through-hole 13 is formed between the two first through-holes 11 opened on the side surfaces 103 and 104 of the substrate. The third through hole 13 has, for example, a rectangular shape when viewed from the thickness direction Z. As shown in FIG.

[Terminal part]
As shown in FIGS. 3, 4, and 7, the semiconductor device 1A of this embodiment has a plurality of terminal portions 20. FIG. Terminal portion 20 is formed to extend from a portion overlapping semiconductor element 60 in thickness direction Z to substrate side surfaces 103 and 104 of substrate 10 .

As shown in FIG. 7 , the terminal portion 20 has a first through electrode 21 , a first main surface wiring 22 , a columnar wiring 23 and a first wiring electrode 24 .
The first through electrode 21 is arranged in the first through hole 11 . As shown in FIGS. 4 and 7 , the first through electrode 21 has an upper surface 211 , a lower surface 212 and side surfaces 213 , 214 and 215 . The upper surface 211 and the lower surface 212 face opposite sides in the thickness direction Z. Sides 213 , 214 , 215 intersect top surface 211 and bottom surface 212 .

The lower surface 212 of the first through electrode 21 is flush with the substrate rear surface 102 of the substrate 10 . This lower surface 212 is an exposed surface exposed from the substrate rear surface 102 of the substrate 10 . Note that the lower surface 212 of the first through electrode 21 may not be flush with the substrate rear surface 102 of the substrate 10 . A side surface 213 of the first through electrode 21 is in contact with the inner side surface 113 of the first through hole 11 . The side surfaces 214 of the first through electrodes 21 are exposed from the substrate side surfaces 103 and 104 of the substrate 10 . The first through electrode 21 has a shape in which the length in the second direction Y is shorter than the length in the first direction X, which is the direction exposed to the side surface 103 of the substrate, when viewed from the thickness direction Z. .

As shown in FIG. 4, the side surface 215 of the first through electrode 21 is inclined with respect to the first direction X. As shown in FIG. In this embodiment, the inclination angle of the side surface 215 with respect to the first direction X is 45 degrees. Note that the inclination angle of the side surface 215 can be changed as appropriate.

The first through electrode 21 is made of an electrically conductive material. First through electrode 21 is made of, for example, a plated metal. For example, Cu (copper), a Cu alloy, or the like can be used as the material of the first through electrode 21 .

As shown in FIG. 7 , the first main surface wiring 22 extends from the upper surface 211 of the first through electrode 21 to the substrate main surface 101 of the substrate 10 . Specifically, the first main surface wiring 22 extends to the substrate main surface 101 overlapping the semiconductor element 60 when viewed in the thickness direction Z. As shown in FIG. The first main surface wiring 22 has a connection wiring 22A connected to the upper surface 211 of the first through electrode 21 and an on-substrate wiring 22B in contact with the substrate main surface 101 of the substrate 10 .

The first main surface wiring 22 is made of an electrically conductive material and electrically connected to the first through electrode 21 . The first main surface wiring 22 has an upper surface 221 , a lower surface 222 and side surfaces 223 and 224 . The upper surface 221 and the lower surface 222 face opposite sides in the thickness direction Z. The side surfaces 223 and 224 face a direction orthogonal to the thickness direction Z. The upper surface 221 of the first main surface wiring 22 faces the same direction as the substrate main surface 101 of the substrate 10 . The lower surface 222 of the first main surface wiring 22 faces the same direction as the substrate back surface 102 of the substrate 10 . A portion of the lower surface 222 is in contact with the substrate main surface 101 of the substrate 10 and the other portion of the lower surface 222 is connected to the upper surface 211 of the first through electrode 21 . The multiple side surfaces 223 are in contact with the sealing resin 70 . In FIG. 7 , a side surface 224 facing the first direction X is an exposed side surface exposed from the resin side surfaces 703 and 704 of the sealing resin 70 . The thickness of the first main surface wiring 22 is, for example, 5 μm or more and 30 μm or less.

First main surface wiring 22 includes, for example, a metal layer and a conductive layer. The metal layer and the conductive layer are laminated on the main surface 101 of the substrate 10 in this order. The metal layers include, for example, a first layer containing Ti (titanium) as a main component and being in contact with the main surface 101 of the substrate 10 and the upper surface 211 of the first through electrode 21, and a second layer containing Cu as a main component and being in contact with the first layer. It consists of two layers. The metal layer is formed as a seed layer that forms a conductive layer. The conductive layer is mainly composed of Cu, for example.

As shown in FIG. 7, the columnar wiring 23 extends in the thickness direction Z from the top surface 221 of the first main surface wiring 22 . More specifically, the columnar wiring 23 extends from the upper surface 221 of the first main surface wiring 22 to the side opposite to the first through electrode 21 in the thickness direction Z. As shown in FIG. The shape of the columnar wiring 23 viewed from the thickness direction Z is, for example, a rectangular shape. That is, the columnar wiring 23 of this embodiment is a prism. Note that the shape of the columnar wiring 23 is not limited to this, and may be a cylinder, a polygonal column, or the like.

The columnar wiring 23 has an upper surface 231 , a lower surface 232 and side surfaces 233 and 234 . The upper surface 231 and the lower surface 232 face opposite sides in the thickness direction Z. The side surfaces 233 and 234 face a direction orthogonal to the thickness direction Z. In this embodiment, the upper surface 231 of the columnar wiring 23 is flat, for example. Note that the shape of the upper surface 231 can be arbitrarily changed. A lower surface 232 of the columnar wiring 23 is a surface that contacts the upper surface 221 of the first main surface wiring 22 . This lower surface 232 is flat, for example. In this embodiment, the multiple side surfaces 233 are in contact with the sealing resin 70 . In FIG. 7 , a side surface 234 facing the first direction X is an exposed side surface exposed from the sealing resin 70 .

In the thickness direction Z, the terminal portion 20 is composed of first through electrodes 21 , first main surface wirings 22 , and columnar wirings 23 . The height of the terminal portion 20 in the thickness direction Z is defined by the length from the bottom surface 212 of the first through electrode 21 to the top surface 231 of the columnar wiring 23 . The height of terminal portion 20 is, for example, 100 μm or more and 200 μm or less.

As shown in FIG. 7, the first wiring electrode 24 is formed on the upper surface 221 of the first main surface wiring 22 . The first main surface wiring 22 has a connection wiring 22A connected to the first through electrode 21 and an on-board wiring 22B in contact with the substrate main surface 101 . The first wiring electrode 24 is formed on the upper surface 221 of the on-substrate wiring 22B. The first wiring electrode 24 is formed in a region overlapping with the semiconductor element 60 in the thickness direction Z. As shown in FIG. Also, the first wiring electrode 24 is formed in a portion of the first main surface wiring 22 that overlaps the substrate main surface 101 of the substrate 10 in the thickness direction Z. As shown in FIG. The first wiring electrode 24 is formed, for example, in a circular shape when viewed from the thickness direction Z. As shown in FIG. Note that the shape of the first wiring electrode 24 viewed from the thickness direction Z can be appropriately changed to a rectangular shape, a polygonal shape, or the like. The first wiring electrode 24 is made of Ni (nickel), for example.

[Heat dissipation conductive part]
As shown in FIGS. 4 and 8, the semiconductor device 1A of this embodiment has a heat dissipation conductive portion 30. As shown in FIGS. The heat dissipation conductive part 30 of this embodiment is arranged so as to overlap the semiconductor element 60 in the thickness direction Z. As shown in FIG.

The heat dissipation conductive portion 30 is arranged in the second through hole 12 overlapping the semiconductor element 60 when viewed from the thickness direction Z. As shown in FIG. That is, the heat dissipation conductive portion 30 penetrates the substrate 10 . The heat dissipation conductive part 30 is used for heat dissipation of the semiconductor element 60, for example. The heat dissipation conductive portion 30 releases heat generated from the semiconductor element 60 to the substrate rear surface 102 side of the substrate 10 .

As shown in FIG. 4 , the heat dissipation conductive portion 30 is arranged so as to overlap the central portion of the semiconductor element 60 . The substrate 10 has a second through hole 12 overlapping the central portion of the semiconductor element 60 . The arrangement position of the heat radiation conductive part 30 can be changed as appropriate. For example, second through-hole 12 and heat-dissipating conductive portion 30 are preferably arranged so that second through-hole 12 , that is, heat-dissipating conductive portion 30 , overlaps a region of semiconductor element 60 that includes a portion that becomes the hottest. For example, in the semiconductor element 60, a large amount of heat is generated in the portion where the power transistor is formed. It is preferable to dispose the second through-hole 12 and the heat dissipation conductive portion 30 so as to overlap with the region including the element portion that generates a large amount of heat in the semiconductor element 60 in this way.

As shown in FIGS. 8 and 9 , the heat dissipation conductive portion 30 has second through electrodes 31 , second main surface wirings 32 , and second wiring electrodes 34 .
The second through electrode 31 is arranged in the second through hole 12 . The second through electrode 31 has an upper surface 311 , a lower surface 312 and a plurality of side surfaces 313 . The upper surface 311 and the lower surface 312 face opposite sides in the thickness direction Z. The side surface 313 faces a direction intersecting the thickness direction Z and intersects the upper surface 311 and the lower surface 312 .

As shown in FIG. 4, the side surface 313 of the second through electrode 31 when viewed from the thickness direction Z is inclined with respect to both the first direction X and the second direction Y. As shown in FIG. In the semiconductor device 1A of this embodiment, the inclination angle of each side surface 313 with respect to both the first direction X and the second direction Y is 45 degrees. Note that the inclination angle of each side surface 313 can be changed as appropriate. Also, each side surface 313 can have a different angle of inclination. A side surface 313 of the second through electrode 31 faces a side surface 215 of the terminal portion 20 . In this embodiment, the side surface 313 of the second through electrode 31 is parallel to the side surface 215 of the terminal portion 20 .

As shown in FIG. 9 , the lower surface 312 of the second through electrode 31 is flush with the substrate rear surface 102 of the substrate 10 . This lower surface 312 is an exposed surface exposed from the substrate rear surface 102 of the substrate 10 . Note that the lower surface 312 of the second through electrode 31 may not be flush with the substrate rear surface 102 of the substrate 10 . Also, the side surface 313 of the second through electrode 31 is in contact with the inner side surface 123 of the second through hole 12 . The second through electrode 31 is made of a material having electrical conductivity. The second through electrode 31 is made of, for example, plated metal. The second through electrode 31 is made of the same material as the first through electrode 21, for example. For example, Cu, Cu alloy, or the like can be used as the material of the second through electrode 31 .

The second main surface wiring 32 is connected to the upper surface 311 of the second through electrode 31 . The second main-surface wiring 32 has a rectangular shape when viewed from the thickness direction Z. As shown in FIG. The second main surface wiring 32 has an upper surface 321 and a lower surface 322 . The upper surface 321 and the lower surface 322 face opposite sides in the thickness direction Z. The upper surface 321 of the second main surface wiring 32 faces the same direction as the upper surface 311 of the second through electrode 31 . A lower surface 322 of the second main-surface wiring 32 faces the upper surface 311 of the second through electrode 31 and contacts the upper surface 311 .

The thickness of the second main-surface wiring 32 is the same as the thickness of the first main-surface wiring 22 . As shown in FIG. 9, the second main surface wiring 32 is formed larger than the second through electrode 31 when viewed from the thickness direction Z. As shown in FIG. The second main-surface wiring 32 has a connection wiring 32A connected to the upper surface 311 of the second through electrode 31 and an extension portion 32B extending outside the side surface 313 of the second through electrode 31 . The extending portion 32B is a portion that does not overlap the second through electrode 31 in the thickness direction Z. As shown in FIG. In this embodiment, the extending portion 32B is annular. A lower surface 322 of the extending portion 32B is in contact with the main surface 101 of the substrate.

For example, the second main surface wiring 32 has a metal layer and a conductive layer. The metal layer and the conductive layer are stacked in this order on the upper surface 311 of the second through electrode 31 . The metal layer consists of a first layer in contact with the upper surface 311 of the second through electrode 31 and a second layer in contact with the first layer. The first layer is, for example, a layer containing Ti as a main component, and the second layer is a layer containing, for example, Cu as a main component. The metal layer is formed as a seed layer that forms a conductive layer. The conductive layer is mainly composed of Cu, for example. The configuration of the second main surface wiring 32 is the same as the configuration of the first main surface wiring 22 . The second main-surface wiring 32 is formed simultaneously with the first main-surface wiring 22 .

As shown in FIG. 8, the second wiring electrode 34 is formed on the upper surface 321 of the second main surface wiring 32 . The semiconductor device 1A of this embodiment has one second wiring electrode 34 . In addition, the number of the second wiring electrodes 34 can be two or more. The second wiring electrode 34 is formed in a region overlapping with the semiconductor element 60 in the thickness direction Z. As shown in FIG. The second wiring electrode 34 is formed on the upper surface 321 of the second main surface wiring 32 overlapping the second through electrode 31 in the thickness direction Z. As shown in FIG. That is, the second wiring electrode 34 is formed on the upper surface 321 of the connection wiring 32A connected to the upper surface 311 of the second through electrode 31 among the second main surface wirings 32 . The second wiring electrode 34 is formed, for example, in a circular shape when viewed from the thickness direction Z. As shown in FIG. Note that the shape of the second wiring electrode 34 viewed from the thickness direction Z can be appropriately changed to a rectangular shape, a polygonal shape, or the like. For example, the second wiring electrodes 34 are formed in the same process as the first wiring electrodes 24 shown in FIG. The second wiring electrode 34 is made of Ni, for example.

[Wiring part]
As shown in FIGS. 3, 4, and 8, the semiconductor device 1A of this embodiment has two wiring portions 40. FIG.

As shown in FIG. 4 , the wiring portion 40 extends from the heat dissipation conductive portion 30 toward the side surfaces 103 and 104 of the substrate. The wiring portion 40 is electrically connected to the heat dissipation conductive portion 30 . As shown in FIG. 8, the wiring part 40 is formed so as to be exposed from the substrate back surface 102 and the substrate side surfaces 103 and 104 of the substrate 10 .

The wiring portion 40 has third through electrodes 41 , third main surface wirings 42 , and columnar wirings 43 .
The third through electrode 41 is arranged in the third through hole 13 . In this embodiment, the third through electrode 41 extends from the second through electrode 31 of the heat dissipation conductive portion 30 to the substrate side surfaces 103 and 104 of the substrate 10 .

The third through electrode 41 has an upper surface 411 , a lower surface 412 and side surfaces 413 and 414 . The upper surface 411 and the lower surface 412 face opposite sides in the thickness direction Z. Sides 413 and 414 intersect top surface 411 and bottom surface 412 .

A lower surface 412 of the third through electrode 41 is flush with the substrate rear surface 102 of the substrate 10 . This lower surface 412 is an exposed surface exposed from the substrate rear surface 102 of the substrate 10 . Note that the lower surface 412 of the third through electrode 41 may not be flush with the substrate rear surface 102 of the substrate 10 . A first end of the third through electrode 41 inside the semiconductor device 1A is electrically connected to the second through electrode 31 . A second end portion of the third through electrode 41 outside the semiconductor device 1A is exposed from the substrate side surfaces 103 and 104 of the substrate 10 . That is, the side surfaces 414 of the third through electrodes 41 are exposed from the substrate side surfaces 103 and 104 of the substrate 10 .

The third through electrode 41 is made of a material having electrical conductivity. Third through electrode 41 is made of, for example, a plated metal. The third through electrode 41 is made of the same material as the first through electrode 21 and the second through electrode 31, for example. As a material of the third through electrode 41, for example, Cu, Cu alloy, or the like can be used.

The third main surface wiring 42 is formed on the upper surface 411 of the third through electrode 41 . The third main-surface wiring 42 extends from the third main-surface wiring 42 of the heat dissipation conductive portion 30 to the substrate side surfaces 103 and 104 of the substrate 10 .

The third main-surface wiring 42 is made of an electrically conductive material and electrically connected to the third through electrode 41 . The third main-surface wiring 42 has an upper surface 421 , a lower surface 422 and side surfaces 423 and 424 . The upper surface 421 and the lower surface 422 face opposite sides in the thickness direction Z. The side surfaces 423 and 424 face a direction orthogonal to the thickness direction Z. The upper surface 421 of the third main surface wiring 42 faces the same direction as the substrate main surface 101 of the substrate 10 . The lower surface 422 of the third main surface wiring 42 faces the same direction as the substrate back surface 102 of the substrate 10 . In FIG. 8 , a side surface 424 facing the first direction X is an exposed side surface exposed from the resin side surfaces 703 and 704 of the sealing resin 70 . The thickness of the third main-surface wiring 42 is, for example, 5 μm or more and 30 μm or less.

Third main-surface wiring 42 includes, for example, a metal layer and a conductive layer. The metal layer and the conductive layer are stacked in this order on the upper surface 411 of the third through electrode 41 . The metal layer includes, for example, a first layer containing Ti as a main component and in contact with the upper surface 411 of the third through electrode 41 and a second layer containing Cu as a main component and in contact with the first layer. The metal layer is formed as a seed layer that forms a conductive layer. The conductive layer is mainly composed of Cu, for example.

As shown in FIG. 8 , the columnar wiring 43 extends in the thickness direction Z from the upper surface 421 of the third main surface wiring 42 . More specifically, the columnar wiring 43 extends from the upper surface 421 of the third main surface wiring 42 to the side opposite to the third through electrode 41 in the thickness direction Z. As shown in FIG. The shape of the columnar wiring 43 viewed from the thickness direction Z is, for example, a rectangular shape. That is, the columnar wiring 43 of this embodiment is a prism. Note that the shape of the columnar wiring 43 is not limited to this, and may be a cylinder, a polygonal column, or the like.

The columnar wiring 43 has an upper surface 431 , a lower surface 432 and side surfaces 433 and 434 . The upper surface 431 and the lower surface 432 face opposite sides in the thickness direction Z. The side surfaces 433 and 434 face a direction orthogonal to the thickness direction Z. In this embodiment, the upper surface 431 of the columnar wiring 43 is flat, for example. Note that the shape of the upper surface 431 can be changed arbitrarily. A lower surface 432 of the columnar wiring 43 is a surface in contact with the upper surface 421 of the third main surface wiring 42 . This lower surface 432 is flat, for example. In this embodiment, the multiple side surfaces 433 are in contact with the sealing resin 70 . In FIG. 8 , a side surface 434 facing the first direction X is an exposed side surface exposed from the sealing resin 70 .

In the thickness direction Z, the wiring portion 40 is composed of third through electrodes 41 , third main-surface wirings 42 , and columnar wirings 43 . The height of the wiring portion 40 in the thickness direction Z is defined by the length from the bottom surface 412 of the third through electrode 41 to the top surface 431 of the columnar wiring 43 . The height of the wiring portion 40 is, for example, 100 μm or more and 200 μm or less. In this embodiment, the height of the wiring portion 40 is equal to the height of the terminal portion 20 . In this embodiment, the height of the wiring portion 40 and the height of the terminal portion 20 are intended to be substantially equal including errors in measurement and manufacturing. In addition, the height of the wiring part 40 and the height of the terminal part 20 may be different.

As shown in FIG. 4 , the width W2 of the second through electrode 31 is wider than the width W1 of the terminal portion 20 . In the present embodiment, the width W2 of the second through electrode 31 is, for example, the width of the second through electrode 31 in the second direction Y perpendicular to the first direction X in which the third through electrode 41 extends when viewed from the thickness direction Z. 31 is the length of the largest part. The width W1 of the terminal portion 20 refers to the width of the first through electrode 21, which is a member exposed from the substrate rear surface 102 of the substrate 10, similarly to the second through electrode 31. As shown in FIG. The width of the first through electrode 21 is the width in the second direction Y orthogonal to the first direction X in which the first through electrode 21 extends when viewed from the thickness direction Z. The semiconductor device 1A of this embodiment has four terminal portions 20 (first through electrodes 21). Widths W1 of the four first through electrodes 21 are equal to each other. Moreover, in the present embodiment, the width W1 of the first through electrode 21 of the terminal portion 20 is wider than the width W3 of the third through electrode 41 .

The width W2 of the second through electrode 31 is wider than the width W3 of the third through electrode 41 . The width W3 of the third through electrode 41 is the width W3 of the third through electrode 41 in the second direction Y perpendicular to the first direction X in which the third through electrode 41 extends when viewed from the thickness direction Z. In this embodiment, the width W3 of the third through electrode 41 extending from the second through electrode 31 toward the substrate side surface 103 and the third through electrode 41 extending from the second through electrode 31 toward the substrate side surface 104 are equal to each other. . In this embodiment, the width W3 of the third through electrode 41 is narrower than the width W2 of the terminal portion 20 .

[Semiconductor device]
As shown in FIGS. 3 and 4, the semiconductor element 60 has a rectangular shape when viewed from the thickness direction Z. As shown in FIG. As shown in FIGS. 3, 4, 7, and 8, the semiconductor element 60 has an element main surface 601 and an element back surface 602 which face opposite sides in the thickness direction Z, and which face a direction orthogonal to the thickness direction Z. It has a plurality of element side surfaces 603-606. The element side surfaces 603 to 606 intersect the element main surface 601 and the element back surface 602 . The element main surface 601 faces the substrate main surface 101 of the substrate 10 . The device back surface 602 faces the same direction as the substrate main surface 101 of the substrate 10 .

Semiconductor element 60 is, for example, an integrated circuit (IC) such as an LSI (Large Scale Integration). Also, the semiconductor element 60 may be a voltage control element such as an LDO (Low Drop Out), an amplifying element such as an operational amplifier, or a discrete semiconductor element such as a diode or various sensors. For example, in the case of LSI, the element main surface 601 is a surface on which structural members for the functions of the semiconductor element 60 are formed. Note that the semiconductor element 60 is not limited to an element having a plurality of constituent members formed thereon, an element having a single constituent member such as a chip capacitor or a chip inductor, or a constituent member having a base material other than a semiconductor. It can be a formed element. In this embodiment, the semiconductor element 60 is an LSI.

As shown in FIG. 4, the semiconductor element 60 has first connection pads 61 and second connection pads 62 for mounting on the element main surface 601 side. The first connection pads 61 are arranged at corners of the semiconductor element 60 . The second connection pads 62 are arranged inside the plurality of first connection pads 61 . In this embodiment, the second connection pads 62 are arranged in the center of the semiconductor element 60 . The plurality of first connection pads 61 are terminals for inputting and outputting signals related to the operation of the semiconductor element 60 . The second connection pads 62 are terminals (wiring) that do not affect the electrical characteristics of the semiconductor element 60, for example. This terminal is, for example, a ground terminal. A pad or the like insulated from the first connection pad 61 may be used as the second connection pad 62 .

As shown in FIGS. 7 and 8, the semiconductor element 60 is arranged with the element main surface 601 facing the substrate main surface 101 of the substrate 10 . As shown in FIG. 7, the first connection pads 61 of the semiconductor element 60 are arranged to face the first wiring electrodes 24 on the upper surface 221 of the first main surface wiring 22 . The first connection pad 61 is connected to the first wiring electrode 24 by the first joint member 51 . As shown in FIG. 8, the second connection pads 62 of the semiconductor element 60 are arranged to face the second wiring electrodes 34 on the upper surface 321 of the second main surface wiring 32 . The second connection pad 62 is connected to the second wiring electrode 34 by the second joint member 52 . In this manner, the semiconductor element 60 is flip-chip mounted with the element main surface 601 facing the substrate main surface 101 of the substrate 10 . Therefore, the element main surface 601 can be said to be an element mounting surface for mounting the semiconductor element 60 thereon.

As shown in FIG. 7, the first connection pad 61 has a first electrode pad 611 , a first rewiring layer 612 and a first element electrode 613 . The first rewiring layer 612 corresponds to an element wiring portion. The first electrode pads 611 are exposed through openings in the insulating layer covering the element main surface 601 of the semiconductor element 60 . The first electrode pad 611 is made of Al (aluminum), for example. The insulating layer is made of SiN (silicon nitride), for example. The first rewiring layer 612 covers the surface of the first electrode pad 611 and extends to the insulating layer. The first rewiring layer 612 is made of Cu, Cu alloy, or the like, for example. The first rewiring layer 612 is covered with a protective film (not shown). The protective film has an opening that exposes a portion of the first rewiring layer 612 as a connection terminal. The first element electrode 613 is connected to the first rewiring layer 612 exposed from the protective film. The first rewiring layer 612 is an example of an element wiring portion. The first element electrode 613 has, for example, a conductive layer and a barrier layer. The conductive layer is made of, for example, Cu or a Cu alloy. The conductive layer may include a seed layer. The seed layer is composed of Ti/Cu, for example. The barrier layer is composed of Ni, an alloy containing Ni, or multiple metal layers containing Ni. As the barrier layer, for example, Ni, Pd (palladium), Au (gold), an alloy containing two or more of these metals, or the like can be used. The protective film is made of polyimide resin, for example. The first electrode pad 611 and the first element electrode 613 do not overlap in the thickness direction Z. That is, the first electrode pad 611 and the first element electrode 613 are shifted in the direction intersecting the thickness direction Z. As shown in FIG.

As shown in FIG. 8, the second connection pads 62 are configured similarly to the first connection pads 61 . Specifically, the second connection pad 62 has a second electrode pad 621 , a second rewiring layer 622 and a second element electrode 623 . The second rewiring layer 622 corresponds to an element wiring portion. The second electrode pads 621 are exposed through openings in the insulating layer covering the element main surface 601 of the semiconductor element 60 . The second electrode pad 621 is made of Al, for example. The insulating layer is made of SiN, for example. The second rewiring layer 622 covers the surface of the second electrode pad 621 and extends to the insulating layer. The second rewiring layer 622 is made of Cu, Cu alloy, or the like, for example. The second rewiring layer 622 is covered with a protective film (not shown). The protective film has an opening that exposes a portion of the second rewiring layer 622 as a connection terminal. The second element electrode 623 is connected to the second rewiring layer 622 exposed from the protective film. The second rewiring layer 622 is an example of an element wiring portion. The second device electrode 623 has, for example, a conductive layer and a barrier layer. The conductive layer is made of, for example, Cu or a Cu alloy. The conductive layer may include a seed layer. The seed layer is composed of Ti/Cu, for example. The barrier layer is composed of Ni, an alloy containing Ni, or multiple metal layers containing Ni. As the barrier layer, for example, Ni, Pd, Au, an alloy containing two or more of these metals, or the like can be used. The second electrode pad 621 and the second element electrode 623 do not overlap in the thickness direction Z. That is, the second electrode pad 621 and the second element electrode 623 are shifted in the direction intersecting the thickness direction Z. As shown in FIG.

As shown in FIG. 4, the first electrode pads 611 and the first element electrodes 613 are formed in a circular shape when viewed from the thickness direction Z, for example. The second electrode pad 621 and the second element electrode 623 are formed, for example, in a circular shape when viewed from the thickness direction Z. As shown in FIG. In addition, in FIG. 4, the first element electrode 613 and the first wiring electrode 24 are overlapped and shown in the same size. In addition, in FIG. 4, the second element electrode 623 and the second wiring electrode 34 are overlapped and shown in the same size.

As shown in FIG. 7 , the first joint member 51 joins the semiconductor element 60 to the terminal portion 20 . The first joining member 51 joins the first wiring electrode 24 of the terminal portion 20 and the first element electrode 613 of the semiconductor element 60 . The first bonding member 51 has a substantially trapezoidal shape in a cross section along the thickness direction Z, that is, a cross section perpendicular to the main surface 101 of the substrate. The first joint member 51 is made of Sn (tin) and an alloy containing Sn. This alloy is, for example, a Sn--Ag (silver) system alloy, a Sn--Sb (antimony) system alloy, or the like.

As shown in FIG. 8 , the second joint member 52 joins the semiconductor element 60 to the heat dissipation conductive portion 30 . The second joint member 52 joins the second wiring electrode 34 of the heat dissipation conductive portion 30 and the second element electrode 623 of the semiconductor element 60 . The second bonding member 52 is formed in a substantially rectangular shape (parallelogram shape) in a cross section perpendicular to the substrate main surface 101 . The second joint member 52 is made of Sn and an alloy containing Sn. This alloy is, for example, a Sn--Ag system alloy, a Sn--Sb system alloy, or the like.

[Encapsulation resin]
As shown in FIGS. 7 and 8 , the sealing resin 70 is formed so as to be in contact with the main surface 101 of the substrate 10 and cover the semiconductor element 60 . As shown in FIG. 7 , the sealing resin 70 is filled between the substrate 10 and the semiconductor element 60 . The sealing resin 70 covers the semiconductor element 60 and the terminal section 20 . As shown in FIG. 8 , the sealing resin 70 is filled between the heat dissipation conductive portion 30 and the semiconductor element 60 . Thereby, the sealing resin 70 covers the main surface 101 of the substrate 10 , the wiring portion 40 and the heat dissipation conductive portion 30 . The sealing resin 70 also covers the element main surface 601 , the element side surfaces 603 to 606 (see FIG. 3), and the element back surface 602 of the semiconductor element 60 . Furthermore, the sealing resin 70 covers the first joint member 51 that joins the semiconductor element 60 and the terminal portion 20 and the second joint member 52 that joins the semiconductor element 60 and the heat dissipation conductive portion 30 .

The sealing resin 70 overlaps the substrate 10 when viewed from the thickness direction Z. As shown in FIG. The sealing resin 70 has a resin upper surface 701 facing in the same direction as the substrate main surface 101 of the substrate 10, and resin side surfaces 703 to 706 (see FIGS. 3 and 4) facing in the same direction as the substrate side surfaces 103 to 106. . A resin upper surface 701 of the sealing resin 70 constitutes the upper surface of the semiconductor device 1A. A substrate back surface 102 of the substrate 10 constitutes the bottom surface of the semiconductor device 1A. The resin side surfaces 703 to 706 and the substrate side surfaces 103 to 106 constitute the side surfaces of the semiconductor device 1A.

As shown in FIGS. 1 to 6, the sealing resin 70 has a first resin portion 70A on the substrate 10 side in the thickness direction Z and a second resin portion 70B on the resin top surface 701 side. are doing. The first resin portion 70A has the same size as the substrate 10 when viewed from the thickness direction Z. As shown in FIG. In addition, when viewed from the thickness direction Z, the second resin portion 70B is formed larger than the first resin portion 70A. In this manner, the sealing resin 70 has a step 71 recessed inside the sealing resin 70 due to the difference in size between the first resin portion 70A and the second resin portion 70B. As shown in FIGS. 3 and 4, the step 71 is provided over the entire circumferential direction of the sealing resin 70 .

The sealing resin 70 is made of, for example, an electrically insulating resin. As this resin, for example, a synthetic resin containing an epoxy resin as a main component can be used. That is, the resin forming the substrate 10 may contain the same material as the sealing resin 70 . Further, the sealing resin 70 is colored black, for example. The material and shape of the sealing resin 70 are not limited. In other words, the resin forming the substrate 10 may be made of a material different from the sealing resin 70 .

[External conductive film]
As shown in FIG. 7, the first external conductive film 81 has a first conductive film 81A and a second conductive film 81B. The first conductive film 81A covers the bottom surface 212 of the first through electrode 21 . The second conductive film 81B covers the side surface 214 of the first through electrode 21, the side surface 224 of the first main surface wiring 22, and the side surface 234 of the columnar wiring 23. As shown in FIG. A first external conductive film 81 having a first conductive film 81A and a second conductive film 81B serves as an external connection terminal of the semiconductor device 1A. The first external conductive film 81 is composed of, for example, a plurality of metal layers stacked together. Examples of metal layers include Ni layers and Au layers. Although the material of the first external conductive film 81 is not limited, it may be formed by laminating a Ni layer, a Pd layer, and an Au layer, or may be Sn.

As shown in FIG. 8, the second external conductive film 82 has a first conductive film 82A and a second conductive film 82B. The first conductive film 82</b>A covers the lower surface 312 of the second through electrode 31 exposed from the substrate 10 and the lower surface 412 of the third through electrode 41 exposed from the substrate 10 . The second conductive film 82B covers the side surface 414 of the third through electrode 41, the side surface 424 of the third main surface wiring 42, and the side surface 434 of the columnar wiring 43. As shown in FIG. The first conductive film 82A covering the lower surface 312 of the second through electrode 31 serves as a terminal for releasing heat generated in the semiconductor device 1A to the outside. The second external conductive film 82 is made of the same material as the first external conductive film 81, for example. The second external conductive film 82 is composed of, for example, a plurality of metal layers stacked together. Examples of metal layers include Ni layers and Au layers. Although the material of the second external conductive film 82 is not limited, it may be formed by laminating a Ni layer, a Pd layer, and an Au layer, or may be Sn.

(action)
Next, the operation of the semiconductor device 1A of this embodiment will be described.
As shown in FIGS. 4 and 8, the semiconductor device 1A overlaps at least a portion of the semiconductor element 60 when viewed in the thickness direction Z, penetrates the substrate 10 from the substrate main surface 101 to the substrate back surface 102, and extends through the substrate 10. It has a heat dissipating conductive portion 30 having a higher thermal conductivity than the Therefore, the semiconductor device 1A can dissipate the heat generated in the semiconductor element 60 toward the substrate rear surface 102 side of the substrate 10 to the outside of the semiconductor device 1A.

The heat dissipation conductive portion 30 has one second through electrode 31 penetrating through the substrate 10 . The second through electrode 31 is a rectangular flat plate when viewed from the thickness direction Z. As shown in FIG. Therefore, the heat dissipation conductive portion 30 of the present embodiment has a small heat capacity and can easily dissipate the heat of the semiconductor element 60 .

The second through electrode 31 of the heat-dissipating conductive portion 30 is a rectangular flat plate when viewed from the thickness direction Z. As shown in FIG. The second through electrode 31 transfers heat in a first direction X and a second direction Y perpendicular to the thickness direction Z. As shown in FIG. Therefore, the heat dissipation conductive part 30 directs heat locally generated on the main surface 601 of the semiconductor element 60, such as a power transistor, in the first direction X and the second direction Y perpendicular to the thickness direction Z. By diffusing the heat, the heat can be dissipated more efficiently.

The heat dissipation conductive part 30 is connected to the second connection pads 62 of the semiconductor element 60 . The second connection pads 62 are terminals that do not electrically affect the semiconductor element 60, such as ground terminals. Therefore, the heat of the semiconductor element 60 can be dissipated without affecting the electrical characteristics of the semiconductor element 60 .

10A and 10B schematically show a state in which the semiconductor device 1A of one embodiment is mounted on the circuit board P10. FIG. 10A shows a cross section taken along line 7-7 of FIG. 7, that is, FIG. 4, of the semiconductor device 1A of one embodiment. FIG. 10B shows a cross section taken along line 8-8 of FIG. 8, that is, FIG. 4, of the semiconductor device 1A of one embodiment.

As shown in FIGS. 10A and 10B, the semiconductor device 1A is mounted on a circuit board P10. As shown in FIG. 10A, the first external conductive film 81 covering the terminal portion 20 of the semiconductor device 1A is connected to the pattern P11 of the circuit board P10 by solder SD1. Solder SD1 has a fillet SD1A between pattern P11 and first external conductive film 81 . The fillet SD1A of the solder SD1 increases the bonding area between the solder SD1 and the first external conductive film 81 to further increase the connection strength. Fillet SD1A of solder SD1 facilitates confirmation of the mounting state between first external conductive film 81 and pattern P11, that is, the mounting state of terminal portion 20 of semiconductor device 1A from the outside.

Similarly, as shown in FIG. 10B, the second external conductive film 82 covering the heat dissipation conductive portion 30 and the wiring portion 40 of the semiconductor device 1A is connected to the pattern P12 of the circuit board P10 by solder SD2. The heat of the semiconductor element 60 is transferred to the pattern P12 of the circuit board P10 via the heat dissipation conductive portion 30, the second external conductive film 82, and the solder SD2. Thereby, the heat of the semiconductor element 60 is radiated to the circuit board P10. The solder SD2 has a fillet SD2A between the pattern P12 and the second external conductive film . The fillet SD2A of the solder SD2 facilitates confirmation of the mounting state between the second external conductive film 82 and the pattern P12, that is, the mounting state of the heat dissipation conductive portion 30 of the semiconductor device 1A from the outside.

[Manufacturing process of semiconductor device]
An example of a method for manufacturing a semiconductor device 1A according to an embodiment of the present disclosure will be described with reference to FIGS. 11A and 11B to FIGS. 22A and 22B. Each drawing to be referred to shows a range forming one semiconductor device 1A. 11A to 22A show cross sections corresponding to FIG. 7 during the manufacturing process. 11B to 22B show cross sections corresponding to FIG. 8 during the manufacturing process. Also, the definition of each direction shown in each figure is the same as the definition of the direction shown in FIGS.

As shown in FIGS. 11A and 11B, the manufacturing method of the semiconductor device 1A has a step of preparing a support substrate 900. FIG. Support substrate 900 is made of, for example, a Si single crystal material. The support substrate 900 has a main surface 900s and a lower surface 900r facing opposite sides in the thickness direction Z. As shown in FIG. A substrate made of a synthetic resin material such as epoxy resin may be used as the support substrate 900 .

Moreover, as shown in FIGS. 11A and 11B, the manufacturing method of the semiconductor device 1A has a step of forming terminal pillars 901A and 901B. As shown in FIG. 11A, terminal pillars 901A are formed on the main surface 900s of the support substrate 900. As shown in FIG. Further, as shown in FIG. 11B, terminal pillars 901B are formed on the main surface 900s of the support substrate 900. As shown in FIG. Terminal pillars 901A and 901B are made of, for example, Cu or an alloy containing Cu as a main component. Terminal pillars 901A and 901B are formed by electroplating, for example. The terminal pillar 901A serves as the first through electrode 21 in the semiconductor device 1A described above, and the terminal pillar 901B serves as the second through electrode 31 and the third through electrode 41 in the semiconductor device 1A described above. be. The terminal pillar 901A is formed thicker than the first through electrode 21 shown in FIG. The terminal pillar 901B is formed thicker than the thickness of the second through electrode 31 and the third through electrode 41 shown in FIG.

Terminal pillars 901A and 901B are formed through, for example, a step of forming a seed layer, a step of forming a mask for the seed layer by photolithography, and a step of forming a plating layer in contact with the seed layer. A seed layer is formed on the main surface 900s of the support substrate 900 by, for example, a sputtering method. Next, the seed layer is covered with, for example, a photosensitive resist layer, and the resist layer is exposed and developed to form a mask having openings. Next, the terminal pillars 901A and 901B are formed by depositing plating metal on the surface of the seed layer exposed from the mask by electroplating using the seed layer as a conductive path. After forming terminal pillars 901A and 901B, the mask is removed. Note that the terminal pillars 901A and 901B may be formed of a Cu columnar material.

As shown in FIGS. 12A and 12B, the method of manufacturing the semiconductor device 1A has a step of forming a base material 902. As shown in FIGS. The base material 902 is formed so as to be in contact with the main surface 900s of the support substrate 900 and cover the upper surfaces and side surfaces of the terminal pillars 901A and 901B. As the material of the base material 902, the material constituting the substrate 10 shown in FIGS. 1 to 9 can be used. In this embodiment, as the material of the base material 902, a synthetic resin containing epoxy resin or the like as a main component can be used.

As shown in FIGS. 13A and 13B, the method of manufacturing the semiconductor device 1A has a step of removing a part of the base material 902 and the terminal pillars 901A and 901B by grinding. Substrate 902 is left thicker than the thickness of substrate 10 shown in FIGS. By this grinding, the upper surface 211 of the first through electrode 21, the upper surface 311 of the second through electrode 31, and the upper surface 411 of the third through electrode 41 are exposed on the substrate principal surface 902s of the substrate 902. FIG. Then, burrs on the terminal pillars 901A and 901B generated by grinding are removed from the base main surface 902s of the base 902 by etching, for example, wet etching.

As shown in FIGS. 14A and 14B, the method of manufacturing the semiconductor device 1A includes steps of forming the first main-surface wiring 22, the second main-surface wiring 32, and the third main-surface wiring . The step of forming the first main-surface wiring 22, the second main-surface wiring 32, and the third main-surface wiring 42 includes a step of forming a seed layer and a step of forming a conductive layer. The seed layer and conductive layer constitute the metal layer and conductive layer of the first main-surface wiring 22 , the second main-surface wiring 32 , and the third main-surface wiring 42 .

First, a seed layer is formed by sputtering, for example. The seed layer includes, for example, a first layer containing Ti as a main component and a second layer containing Cu as a main component. The seed layer is formed to cover the main surface 902 s of the substrate 902 and the upper surfaces 211 , 311 , 411 of the through electrodes 21 , 31 , 41 . Next, a mask having openings is formed, for example, by photolithography using a resist layer having photosensitivity. Next, a conductive layer is formed by depositing plating metal on the surface of the seed layer exposed through the openings of the mask, for example, by electroplating using the seed layer as a conductive path. The seed layer is removed at appropriate times.

As shown in FIGS. 15A and 15B, the manufacturing method of the semiconductor device 1A has steps of forming the columnar wirings 23 and 43. FIG. First, a mask having openings is formed by photolithography using a resist layer having photosensitivity, for example. Next, a plating metal is deposited on the surfaces of the main surface wirings 22, 32, 42 exposed from the openings of the mask by electroplating using the main surface wirings 22, 32, 42 as conductive paths, thereby forming the columnar wirings 23, 43. do. After forming the columnar wirings 23 and 43, the mask is removed. Note that the columnar wirings 23 and 43 may be formed of a Cu columnar material.

Moreover, the method of manufacturing the semiconductor device 1A has a step of forming the joints 903 and 904 . A joint portion 903 shown in FIG. 15A includes the wiring electrode 24 and the joint member 51 shown in FIG. A joint portion 904 shown in FIG. 15B includes the wiring electrode 34 and the joint member 52 shown in FIG.

First, a mask having openings is formed by photolithography using a resist layer having photosensitivity, for example. Next, a plating metal is deposited on the surfaces of the main-surface wirings 22, 32, 42 exposed through the openings of the mask, for example, by electroplating to form metal layers that will become the wiring electrodes 24, 34. Next, as shown in FIG. A solder layer is then formed on top of the metal layer. The solder layer becomes the joining members 51, 52 or a part thereof. The solder layer is formed by electroplating, for example. After forming junctions 903 and 904, the mask is removed.

The method for manufacturing the semiconductor device 1A may include a step of performing flow processing. A flow process planarizes the surface of the solder layer.
As shown in FIGS. 16A and 16B, the manufacturing method of the semiconductor device 1A has a step of mounting the semiconductor element 60. FIG. This process includes a process of flip-chip mounting the semiconductor element 60 and a reflow process. The semiconductor element 60 is arranged with the element main surface 601 facing the base material 902 . The semiconductor element 60 is flip-chip mounted by applying flux to the first element electrode 613 and the second element electrode 623 using, for example, a flip chip bonder. Next, the first joint member 51 and the second joint member 52 are formed by reflow processing.

As shown in FIGS. 17A and 17B, the method of manufacturing the semiconductor device 1A has a step of forming a resin layer 905. As shown in FIGS. The resin layer 905 is formed so as to cover the substrate main surface 902 s of the substrate 902 and the semiconductor element 60 . The resin layer 905 is a member that becomes the sealing resin 70 shown in FIGS. The resin layer 905 is a synthetic resin mainly composed of epoxy resin, for example. Resin layer 905 is formed, for example, by compression molding. The resin layer 905 is filled between the element main surface 601 of the semiconductor element 60 and the substrate main surface 902 s of the substrate 902 .

As shown in FIGS. 18A, 18B, 19A, and 19B, the method of manufacturing the semiconductor device 1A includes a step of removing the support substrate 900. FIG.
As shown in FIGS. 18A and 18B, a dicing tape 910 is attached to the lower surface 905r of the resin layer 905. As shown in FIGS. Note that FIGS. 18A and 18B are shown upside down with respect to FIGS. 17A and 17B. Then, for example, the support substrate 900 is removed by grinding, and parts of the base material 902, the first terminal pillar 901A, and the second terminal pillar 901B are ground. At this time, the substrate 902, the first terminal pillars 901A, and the second terminal pillars 901B are ground from the supporting substrate 900 side to the dashed lines shown in FIGS. 18A and 18B. Note that the base material 902, the first terminal pillars 901A, and the second terminal pillars 901B may be ground after the support substrate 900 is removed. As a result, as shown in FIGS. 19A and 19B, the substrate 10, the first through electrode 21, the second through electrode 31, and the third through electrode 41 penetrating through the substrate 10 are formed. As shown in FIG. 19B , the heat dissipation conductive portion 30 is configured by the second through electrode 31 and the second main surface wiring 32 .

As shown in FIGS. 20A and 20B, the method of manufacturing the semiconductor device 1A includes a step of cutting the base material 902 and partially cutting (half-cutting) the resin layer 905 in the thickness direction Z. As shown in FIGS. In cutting the base material 902 and half-cutting the resin layer 905, for example, a dicing blade is used along the cutting lines (broken lines) shown in FIGS. cut towards. By half-cutting the resin layer 905 in this way, a separation groove 905t is formed in the resin layer 905 . Then, the first main surface wiring 22 is cut by cutting the base material 902 with a dicing blade and half-cutting the resin layer 905 . As a result, as shown in FIG. 20A, the substrate 10, the first main surface wiring 22, and the columnar wiring 23 are formed. More specifically, the side surface 214 of the first penetrating electrode 21, the side surface 224 of the first main surface wiring 22, and the side surface 234 of the columnar wiring 23 are formed. The side surface 214 of the first through electrode 21, the side surface 224 of the first main surface wiring 22, and the side surface 234 of the columnar wiring 23 are exposed to the separation groove 905t. The terminal portion 20 is configured by the first through electrode 21, the first main surface wiring 22, and the columnar wiring 23 thus formed. Further, as shown in FIG. 20B, third main surface wirings 42 and columnar wirings 43 are formed. More specifically, the side surface 414 of the third through electrode 41, the side surface 424 of the third main-surface wiring 42, and the side surface 434 of the columnar wiring 43 are formed. The side surface 414 of the third through-electrode 41, the side surface 424 of the third main-surface wiring 42, and the side surface 434 of the columnar wiring 43 are exposed to the separation groove 905t. The wiring portion 40 is configured by the third through electrode 41, the third main surface wiring 42, and the columnar wiring 43 thus formed.

As shown in FIGS. 21A and 21B, the method of manufacturing the semiconductor device 1A includes steps of forming a first outer conductive film 81 and a second outer conductive film 82. As shown in FIGS. As shown in FIG. 21A, the first external conductive film 81 includes a first conductive film 81A covering the lower surface 212 of the first through electrode 21, and the first through electrode 21, the first main surface wiring 22, and the columnar wiring 23, respectively. and a second conductive film 81B covering the side surfaces 214, 224, 234. The second conductive film 81B is formed in the separation trench 905t. As shown in FIG. 21B, the second outer conductive film 82 has a first conductive film 82A and a second conductive film 82B. The first conductive film 82A covers the bottom surface 312 of the second through electrode 31 and the bottom surface 412 of the third through electrode 41 . The second conductive film 82B covers the side surfaces 414, 424, 434 of the third through electrode 41, the third main-surface wiring 42, and the columnar wiring 43, respectively. The second conductive film 82B is formed in the separation trench 905t.

The first outer conductive film 81 and the second outer conductive film 82 are each made of plated metal. For example, plating metals such as Ni, Pd and Au are deposited in this order by electroless plating to form the first outer conductive film 81 and the second outer conductive film 82 . The structure and forming method of each of the first external conductive film 81 and the second external conductive film 82 are not limited.

As shown in FIGS. 22A and 22B, the method of manufacturing the semiconductor device 1A includes a step of singulating the semiconductor device 1A. The resin layer 905 is cut to divide into individual pieces each having the semiconductor element 60 as one unit. When dividing, the resin layer 905 is cut along the cutting line (broken line) from the separation groove 905t to the lower surface 905r of the resin layer 905 by a dicing blade narrower than the dicing blade that half-cuts the resin layer 905, for example. The individual piece is the semiconductor device 1A including the substrate 10 and the sealing resin 70 . In other words, the step 71 of the resin layer 905 is formed by cutting down to the lower surface 905 r of the resin layer 905 with a dicing blade narrower than the dicing blade that half-cuts the resin layer 905 . Thereby, the sealing resin 70 is formed. More specifically, as the sealing resin 70, a first resin portion 70A and a second resin portion 70B are formed. The semiconductor device 1A is manufactured through the above steps.

(effect)
As described above, according to this embodiment, the following effects are obtained.
(1) The semiconductor device 1A overlaps at least a portion of the semiconductor element 60 when viewed in the thickness direction Z, penetrates the substrate 10 from the substrate main surface 101 to the substrate back surface 102, and has a higher thermal conductivity than the substrate 10. It has a heat dissipation conductive part 30 . Therefore, the semiconductor device 1A can dissipate the heat generated in the semiconductor element 60 toward the substrate rear surface 102 side of the substrate 10 to the outside of the semiconductor device 1A.

(2) The second through electrode 31 of the heat-dissipating conductive portion 30 is a rectangular flat plate when viewed from the thickness direction Z. As shown in FIG. The second through electrode 31 transfers heat in a first direction X and a second direction Y perpendicular to the thickness direction Z. As shown in FIG. Therefore, the heat dissipation conductive part 30 directs heat locally generated on the main surface 601 of the semiconductor element 60, such as a power transistor, in the first direction X and the second direction Y perpendicular to the thickness direction Z. By diffusing the heat, the heat can be dissipated more efficiently.

(3) The heat dissipation conductive portion 30 is connected to the second connection pads 62 of the semiconductor element 60 . The second connection pads 62 are terminals that do not electrically affect the semiconductor element 60, such as ground terminals. Therefore, the heat of the semiconductor element 60 can be dissipated without affecting the electrical characteristics of the semiconductor element 60 .

(4) The semiconductor device 1A has two wiring portions 40 . The wiring portion 40 extends from the heat dissipation conductive portion 30 toward the side surfaces 103 and 104 of the substrate. The wiring portion 40 is exposed from the side surfaces 103 and 104 of the substrate. The semiconductor device 1A has a second external conductive film 82 covering the surfaces exposed from the substrate rear surface 102 and the substrate side surfaces 103 and 104 of the heat dissipation conductive portion 30 and the wiring portion 40 . The second external conductive film 82 is connected to the pattern P12 of the circuit board P10 by solder SD2. The solder SD2 has a fillet SD2A between the pattern P12 and the second external conductive film . The mounting state between the second external conductive film 82 and the pattern P12 can be easily confirmed by the fillet SD2A of the solder SD2. Therefore, the wiring part 40 can make it possible to easily check the mounting state of the semiconductor device 1A.

(5) Each through electrode 21, 31, 41 is made of a plated metal. Each through electrode 21, 31, 41 is formed at the same time. Therefore, the through electrodes 21, 31, 41 can be efficiently formed in the manufacturing process of the semiconductor device 1A.

(6) The first outer conductive film 81 and the second outer conductive film 82 are made of plated metal. Each external conductive film 81, 82 is formed at the same time. Therefore, the external conductive films 81 and 82 can be efficiently formed in the manufacturing process of the semiconductor device 1A.

(Change example)
For example, the above embodiment can be modified as follows. The above-described embodiment and each modification below can be combined with each other as long as there is no technical contradiction. In addition, in the following modified example, the same reference numerals as in the above embodiment are attached to the parts common to the above embodiment, and the explanation thereof is omitted.

- The number of the wiring parts 40 may be changed suitably.
As shown in FIG. 23, the semiconductor device 1B has one wiring portion 40. As shown in FIG. The wiring portion 40 extends in the first direction X toward the substrate side surface 104 of the substrate side surfaces 103 and 104 facing in opposite directions. In addition, it may be formed so as to extend toward the substrate side surface 103 of the substrate side surfaces 103 and 104 .

A semiconductor device 1</b>C shown in FIG. 24 has two wiring portions 40 . The wiring portion 40 is formed to extend toward the side surfaces 105 and 106 of the substrate. These substrate side surfaces 105 and 106 face opposite directions in the second direction Y. As shown in FIG. Moreover, the terminal portion 20 is not exposed on these substrate side surfaces 105 and 106 . That is, the wiring portion 40 is formed so as to extend toward the substrate side surfaces 105 and 106 where the terminal portion 20 is not exposed. As in the semiconductor device 1B shown in FIG. 23, a wiring portion 40 extending toward one of the substrate side surfaces 105 and 106 may be provided.

Note that the semiconductor device may be configured to have wiring portions 40 extending toward the side surfaces 103 to 106 of the substrate. In addition, the semiconductor device includes a wiring portion 40 extending on at least one of the substrate side surfaces 103 and 104 where the terminal portion 20 is exposed and a wiring portion 40 extending on at least one of the substrate side surfaces 105 and 106 where the terminal portion 20 is not exposed. It is good also as a structure provided.

- The configuration of the semiconductor element 60 may be changed as appropriate.
In the semiconductor device 1D shown in FIGS. 25 and 26, the semiconductor element 60 is arranged such that the first electrode pads 611 and the first element electrodes 613 of the first connection pads 61 overlap in the thickness direction Z. As shown in FIG. In this case, the first redistribution layer 612 may be omitted. The semiconductor element 60 is arranged such that the second electrode pads 621 and the second element electrodes 623 of the second connection pads 62 overlap in the thickness direction Z, similarly to the first connection pads 61 . In this case, the second redistribution layer 622 may be omitted. A semiconductor device 1D using such a semiconductor element 60 can also obtain the same effect as the above-described embodiment. Either one of the first connection pads 61 and the second connection pads 62 may be arranged so as not to overlap in the thickness direction Z, as in the above embodiment.

- The number and arrangement of the terminal portions 20 may be changed as appropriate. In the above embodiment, the terminal portions 20 are arranged so as to be exposed on the side surfaces 103 and 104 of the substrate, but the terminal portions 20 may be arranged so as to be exposed on the side surfaces 103 to 106 of the substrate. Also, the terminal section 20 may be arranged so as to be exposed on three substrate side surfaces among the substrate side surfaces 103 to 106 .

(Appendix)
Technical ideas that can be grasped from the present disclosure are described below. It should be noted that, for the purpose of understanding and not for the purpose of limitation, components described in the appendix are labeled with corresponding components in the embodiments. The reference numerals are provided as examples to aid understanding, and the components described in each appendix should not be limited to the components indicated by the reference numerals.

(Appendix 1)
a substrate main surface (101) and a substrate back surface (102) facing opposite to each other in the thickness direction (Z), and at least one substrate side surface (103 to 106) facing in a direction intersecting the thickness direction (Z); an electrically insulating substrate (10) having
a semiconductor element (60) arranged on the side of the main surface (101) of the substrate;
a heat dissipation conductive part (30, 31) provided at a position overlapping at least a part of the semiconductor element (60) when viewed from the thickness direction (Z) and exposed from the back surface (102) of the substrate;
a sealing resin (70) for sealing the semiconductor element (60) while covering the main surface (101) of the substrate;
connected to the heat dissipation conductive parts (30, 31) and extending from the heat dissipation conductive parts (30, 31) to the side surfaces (103, 104) of the substrate in a state of being exposed from the back surface (102) of the substrate; ) at least one wiring portion (40, 41) exposed from the
A semiconductor device with

(Appendix 2)
The semiconductor device according to appendix 1, comprising a plurality of the wiring portions (40, 41).
(Appendix 3)
The substrate (10) has a pair of substrate side surfaces (103, 104) facing in opposite directions,
The semiconductor device according to appendix 2, wherein the wiring portions (40, 41) are formed to extend toward the pair of substrate side surfaces (103, 104), respectively.

(Appendix 4)
The substrate (10) has a plurality of substrate side surfaces (103-106),
The semiconductor device according to appendix 2, wherein the wiring portions (40, 41) are formed so as to extend toward one of the substrate side surfaces (103 to 106) toward the substrate side surface (104).

(Appendix 5)
4. According to any one of appendices 1 to 4, wherein the heat dissipation conductive parts (30, 31) are arranged inside portions of the wiring parts (40, 41) exposed from the substrate rear surface (102). semiconductor equipment.

(Appendix 6)
1 according to any one of appendices 1 to 5, wherein the heat dissipation conductive part (30, 31) is arranged in a central portion of the semiconductor element (60), the sealing resin (70), or the substrate (10) 1. The semiconductor device according to 1.

(Appendix 7)
7. The semiconductor device according to any one of appendices 1 to 6, wherein the heat dissipation conductive portions (30, 31) are connected to wiring (62) that does not affect electrical characteristics of the semiconductor element (60).

(Appendix 8)
terminal portions (20, 21) connected to the semiconductor element (60) and exposed to the substrate rear surface (102) and the substrate side surfaces (103, 104);
The wiring portions (40, 41) extend toward the substrate side surfaces (103, 104) where the terminal portions (20, 21) are exposed,
The semiconductor device according to any one of appendices 1 to 7.

(Appendix 9)
9. The semiconductor device according to appendix 8, wherein the width (W2) of the heat radiation conductive portions (30, 31) is wider than the width (W1) of the terminal portions (20, 21).

(Appendix 10)
The semiconductor device according to appendix 8 or appendix 9, further comprising a first external conductive film (81) covering exposed surfaces of the terminal portions (20, 21).

(Appendix 11)
11. The semiconductor device according to appendix 10, further comprising a second external conductive film (82) covering exposed surfaces of the heat dissipation conductive portions (30, 31) and the wiring portions (40, 41).

(Appendix 12)
12. The semiconductor device according to appendix 11, wherein the first outer conductive film (81) and the second outer conductive film (82) are made of the same material.

(Appendix 13)
13. The semiconductor device according to any one of appendices 1 to 12, wherein the substrate (10) is made of an insulating resin.

(Appendix 14)
14. The semiconductor device according to appendix 13, wherein the resin forming the substrate (10) contains the same material as the sealing resin (70).

(Appendix 15)
14. The semiconductor device according to appendix 13, wherein the resin forming the substrate (10) is made of a material different from that of the sealing resin (70).

(Appendix 16)
16. The semiconductor device according to any one of appendices 1 to 15, wherein the sealing resin (70) is filled between the substrate (10) and the semiconductor element (60).

(Appendix 17)
17. The semiconductor device according to any one of appendices 1 to 16, wherein the semiconductor element (60) has electrode pads (62, 621) connected to the heat dissipation conductive portions (30, 31).

(Appendix 18)
The semiconductor element (60) includes an element wiring portion (622) connected to the electrode pad (621) and the element wiring portion at a position not overlapping the electrode pad (621) in the thickness direction (Z). a device electrode (623) connected to (622);
The electrode pad (621) is connected to the heat radiation conductive part (30, 31) through the element wiring part (622) and the element electrode (623),
17. The semiconductor device according to appendix 17.

(Appendix 19)
The semiconductor element (60) has an element electrode (623) connected to the electrode pad (621),
The electrode pad (621) is connected to the heat dissipation conductive part (30, 31) through the element electrode (623),
17. The semiconductor device according to appendix 17.

The above description is merely exemplary. Those skilled in the art can recognize that many more possible combinations and permutations are possible in addition to the components and methods (manufacturing processes) listed for the purpose of describing the technology of this disclosure. This disclosure is intended to cover all alternatives, variations and modifications that fall within the scope of this disclosure, including the claims.

1A to 1D Semiconductor Device 10 Substrate 101 Main Surface of Substrate 102 Rear Surface of Substrate 103 Side Surface of Substrate 104 Side Surface of Substrate 105 Side Surface of Substrate 106 Side Surface of Substrate 11 First Through Hole 113 Inner Side 12 Second Through Hole 123 Inner Side 13 Third Through Hole 20 Terminal Portion 21 first through electrode 211 upper surface 212 lower surface 213 side surface 214 side surface 215 side surface 22 first main surface wiring 221 upper surface 222 lower surface 223 side surface 224 side surface 22A connection wiring 22B substrate wiring 23 columnar wiring 231 upper surface 232 lower surface 233 side surface 234 side surface 24 first Wiring electrode 30 Heat dissipation conductive portion 31 Second through electrode 311 Upper surface 312 Lower surface 313 Side surface 32 Second main surface wiring 321 Upper surface 322 Lower surface 32A Connection wiring 32B Extension 34 Second wiring electrode 40 Wiring portion 41 Third through electrode 411 Upper surface 412 Lower surface 413 Side surface 414 Side surface 42 Third main surface wiring 421 Upper surface 422 Lower surface 423 Side surface 424 Side surface 43 Columnar wiring 431 Upper surface 432 Lower surface 433 Side surface 434 Side surface 50 Bonding member 51 First bonding member 52 Second bonding member 60 Semiconductor element 601 Element main surface 602 element back surface 603 to 606 element side surface 61 first connection pad 611 first electrode pad 612 first rewiring layer 613 first element electrode 62 second connection pad 621 second electrode pad 622 second rewiring layer 623 second element electrode 70 sealing resin 701 upper surface of resin 703 to 706 side surface of resin 70A first resin portion 70B second resin portion 71 step 81 first external conductive film 81A first conductive film 81B second conductive film 82 second external conductive film 82A first conductive film Film 82B Second conductive film 900 Supporting substrate 900r Bottom surface 900s Main surface 901A First terminal pillar 901B Second terminal pillar 902 Base material 902s Base material main surface 903 Joint 904 Joint 905 Resin layer 905r Lower surface 905t Separation groove 910 Dicing tape P10 Circuit board P11, P12 Pattern SD1A, SD2A Fillet W1, W2, W3 Width X First direction Y Second direction Z Thickness direction

Claims (19)

an electrically insulating substrate having a main surface and a rear surface facing opposite to each other in a thickness direction, and at least one substrate side surface facing in a direction intersecting the thickness direction;
a semiconductor element arranged on the main surface side of the substrate;
a heat dissipating conductive portion provided at a position overlapping at least a portion of the semiconductor element when viewed from the thickness direction and exposed from the back surface of the substrate;
a sealing resin that seals the semiconductor element while covering the main surface of the substrate;
at least one wiring portion connected to the heat dissipation conductive portion, extending from the heat dissipation conductive portion to a side surface of the substrate while being exposed from the back surface of the substrate, and exposed from the side surface of the substrate;
A semiconductor device with 2. The semiconductor device according to claim 1, comprising a plurality of said wiring portions. The substrate has a pair of substrate side surfaces facing in opposite directions,
3. The semiconductor device according to claim 2, wherein said wiring portion is formed so as to extend toward said pair of substrate side surfaces. The substrate has a plurality of substrate side surfaces,
3. The semiconductor device according to claim 2, wherein said wiring portion is formed to extend toward one of said plurality of substrate side surfaces. 2. The semiconductor device according to claim 1, wherein said heat radiating conductive portion is arranged inside a portion of said wiring portion exposed from the back surface of said substrate. 2. The semiconductor device according to claim 1, wherein said heat radiating conductive portion is arranged in a central portion of said semiconductor element, said sealing resin, or said substrate. 2. The semiconductor device according to claim 1, wherein said heat radiating conductive portion is connected to wiring that does not affect electrical characteristics of said semiconductor element. a terminal portion connected to the semiconductor element and exposed to the back surface of the substrate and the side surface of the substrate;
wherein the wiring portion extends toward the side surface of the substrate where the terminal portion is exposed;
A semiconductor device according to claim 1 . 9. The semiconductor device according to claim 8, wherein the width of said heat radiation conductive portion is wider than the width of said terminal portion. 9. The semiconductor device according to claim 8, further comprising a first external conductive film covering the exposed surface of said terminal portion. 11. The semiconductor device according to claim 10, further comprising a second external conductive film covering exposed surfaces of said heat radiation conductive portion and said wiring portion. 12. The semiconductor device according to claim 11, wherein said first outer conductive film and said second outer conductive film are made of the same material. 2. The semiconductor device according to claim 1, wherein said substrate is made of insulating resin. 14. The semiconductor device according to claim 13, wherein resin forming said substrate includes the same material as said sealing resin. 14. The semiconductor device according to claim 13, wherein the resin forming said substrate is made of a material different from said sealing resin. 2. The semiconductor device according to claim 1, wherein said sealing resin is filled between said substrate and said semiconductor element. 17. The semiconductor device according to claim 1, wherein said semiconductor element has an electrode pad connected to said heat radiation conductive portion. The semiconductor element has an element wiring portion connected to the electrode pad, and an element electrode connected to the element wiring portion at a position not overlapping with the electrode pad in the thickness direction,
The electrode pad is connected to the heat dissipation conductive part via the element wiring part and the element electrode,
18. The semiconductor device according to claim 17. The semiconductor element has an element electrode connected to the electrode pad,
The electrode pad is connected to the heat dissipation conductive part via the element electrode,
18. The semiconductor device according to claim 17.

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