JP2017152556A - Electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component capable of suppressing occurrence of variation in the resistance value of a resistive layer by preventing penetration of moisture into an elementary body, thereby suppressing deterioration of the electrical characteristics.SOLUTION: A laminated feedthrough capacitor C1 includes an elementary body 2, and a terminal electrode 5 for signal placed on the elementary body 2, and has a first electrode layer 21, a resistive layer R, a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27. The first electrode layer 21 is a sintered metal layer formed on the elementary body 2, and a base electrode layer containing a metal. The resistive layer R consists of a DLC film, and is formed on the first electrode layer 21. The second electrode layer 23 is a conductive resin layer, and is formed on the DLC film. The third electrode layer 25 and fourth electrode layer 27 are plating layers. The third electrode layer 25 is formed on the conductive resin layer.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an electronic component.

  There is known an electronic component that includes an element body and a terminal electrode that is disposed on the element body and has a resistance layer (see, for example, Patent Document 1). In the electronic component described in Patent Document 1, the resistance layer is made of a resistor material and a binder (for example, a glass component or a thermosetting resin), and the resistor material is dispersed in the binder. .

Japanese Patent Laid-Open No. 10-303066

  In the electronic component described in Patent Document 1, the following problems may occur.

  If moisture enters the element body, the electrical characteristics of the electronic component may be deteriorated. For example, when the electronic component is a multilayer capacitor or a multilayer feedthrough capacitor, if moisture enters the element body, the insulation resistance deteriorates.

  If the dispersion state of the resistor material in the caking agent varies, the resistance value of the resistance layer may vary. For example, when the electronic component is a multilayer capacitor or a multilayer feedthrough capacitor, if the resistance value of the resistance layer varies, the equivalent series resistance (ESR) varies, and desired characteristics cannot be obtained. Further, when the resistance layer contains a caking agent, the thickness of the resistance layer is likely to vary, and this variation in thickness also affects the variation in resistance value of the resistance layer.

  One embodiment of the present invention provides an electronic component that can prevent moisture from entering the element body, suppress deterioration in electrical characteristics, and suppress variation in resistance value of a resistance layer. With the goal.

  An electronic component according to one embodiment of the present invention includes an element body and a terminal electrode disposed on the element body, and the terminal electrode includes a resistance layer made of a DLC film.

  In the electronic component according to one embodiment of the present invention, the resistance layer is formed of a DLC film, and the DLC film hardly transmits moisture. For this reason, it is difficult for moisture to enter from the outside of the DLC film, and deterioration of the electrical characteristics of the electronic component is suppressed.

  The DLC film is generally formed by a physical vapor deposition method (PVD method) or a chemical vapor deposition method (CVD method), and thickness variations of the formed DLC film hardly occur. Further, unlike the electronic component described in Patent Document 1, it is not necessary that the resistance layer contains a caking agent. For this reason, variation in the resistance value of the resistance layer is suppressed.

  The device further includes an inner conductor connected to the terminal electrode, and the terminal electrode further includes a base electrode layer formed on the outer surface of the element body and connected to the inner conductor. You may do it. In this case, the base electrode layer contains a metal, and the DLC film is formed on the base electrode layer. In this embodiment, since the terminal electrode has the base electrode layer, the connectivity between the terminal electrode and the internal electrode is enhanced.

  The terminal electrode may be formed on the DLC film and may further include a conductive resin layer having a volume resistivity lower than that of the DLC film. In this embodiment, even when the plating layer is formed on the DLC film by electroplating, the plating layer is reliably formed, and the DLC film suppresses the penetration of the plating solution. Therefore, in this embodiment, the terminal electrode may further have a plating layer formed on the conductive resin layer.

  The DLC film may include a first DLC film and a second DLC film formed on the first DLC film and having a volume resistivity lower than that of the first DLC film. Even in this embodiment, even when the plating layer is formed on the DLC film (second DLC film) by the electroplating method, the plating layer is surely formed, and the first and second DLC films prevent the plating solution from entering. Surely suppress.

  The terminal electrode is formed on the DLC film, and may further include a metal layer having a volume resistivity lower than that of the DLC film. Even in this embodiment, even when the plating layer is formed on the metal layer by electroplating, the plating layer is reliably formed, and the DLC film suppresses the penetration of the plating solution.

  According to one embodiment of the present invention, there is provided an electronic component capable of preventing moisture from entering the element body, suppressing deterioration of electrical characteristics, and suppressing variation in resistance value of the resistance layer. can do.

1 is a perspective view showing a multilayer feedthrough capacitor according to an embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on this embodiment. It is a top view which shows the signal internal electrode and the ground internal electrode. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer feedthrough capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer penetration capacitor which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the multilayer penetration capacitor which concerns on the modification of this embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  With reference to FIGS. 1-3, the structure of the multilayer feedthrough capacitor C1 which concerns on this embodiment is demonstrated. FIG. 1 is a perspective view showing a multilayer feedthrough capacitor according to this embodiment. 2 and 3 are views for explaining a cross-sectional configuration of the multilayer feedthrough capacitor according to the present embodiment. In the present embodiment, a multilayer feedthrough capacitor C1 will be described as an example of an electronic component.

  As shown in FIGS. 1 to 3, the multilayer feedthrough capacitor C <b> 1 includes an element body 2, a pair of signal terminal electrodes 5 and a pair of ground terminal electrodes 9 arranged on the outer surface of the element body 2. I have. The pair of signal terminal electrodes 5 and the pair of ground terminal electrodes 9 are separated from each other. The rectangular parallelepiped shape includes a rectangular parallelepiped shape in which corners and ridge lines are chamfered and a rectangular parallelepiped shape in which corners and ridge lines are rounded.

  The element body 2 has, as its outer surface, a pair of substantially rectangular main surfaces 2a facing each other, a pair of end surfaces 2c facing each other, and a pair of side surfaces 2e facing each other. doing. The direction in which the pair of main surfaces 2a are opposed is the first direction D1, the direction in which the pair of end surfaces 2c is opposed is the second direction D2, and the direction in which the pair of side surfaces 2e is opposed is the third. The direction is D3. In the present embodiment, the first direction D <b> 1 is the height direction of the element body 2. The second direction D2 is the longitudinal direction of the element body 2 and is orthogonal to the first direction D1. The third direction D3 is the width direction of the element body 2, and is orthogonal to the first direction D1 and the second direction D2.

  The pair of end surfaces 2c extends in the first direction D1 so as to connect the pair of main surfaces 2a. The pair of end surfaces 2c also extends in the third direction D3 (the short side direction of the pair of main surfaces 2a). The pair of side surfaces 2e extends in the first direction D1 so as to connect the pair of main surfaces 2a. The pair of side surfaces 2e also extends in the second direction D2 (the long side direction of the pair of main surfaces 2a).

The element body 2 is configured by laminating a plurality of dielectric layers in a direction (first direction D1) in which the pair of main surfaces 2a face each other. In the element body 2, the stacking direction of the plurality of dielectric layers (hereinafter simply referred to as “stacking direction”) coincides with the first direction D <b> 1. Each dielectric layer is made of a sintered body of a ceramic green sheet containing, for example, a dielectric material (dielectric ceramic such as BaTiO ₃ series, Ba (Ti, Zr) O ₃ series, or (Ba, Ca) TiO ₃ series). Composed. In the actual element body 2, the dielectric layers are integrated to such an extent that the boundary between the dielectric layers is not visible.

  As shown in FIGS. 2 and 3, the multilayer feedthrough capacitor C <b> 1 includes a plurality of signal internal electrodes 11 and a plurality of ground internal electrodes 13 as internal conductors arranged in the element body 2. ing. The signal internal electrode 11 and the ground internal electrode 13 are made of a conductive material (for example, Ni or Cu) that is normally used as an internal electrode of a laminated electric element. The signal internal electrode 11 and the ground internal electrode 13 are configured as a sintered body of a conductive paste containing the conductive material.

  The signal internal electrode 11 and the ground internal electrode 13 are arranged at different positions (layers) in the height direction of the element body 2. That is, the signal internal electrodes 11 and the ground internal electrodes 13 are alternately arranged in the element body 2 so as to face each other with a gap in the first direction D1.

  As shown in FIG. 4A, each signal internal electrode 11 includes a main electrode portion 11a and connection portions 11b and 11c. The main electrode portion 11a has a rectangular shape in which the second direction D2 is the long side direction and the third direction D3 is the short side direction. The connection portion 11b extends from one side (one short side) of the main electrode portion 11a and is exposed at one end surface 2c. The connection portion 11c extends from one side (the other short side) of the main electrode portion 11a and is exposed on the other end surface 2c. The signal internal electrode 11 is exposed on the pair of end surfaces 2c, and is not exposed on the pair of main surfaces 2a and the pair of side surfaces 2e. The main electrode portion 11a and the connection portions 11b and 11c are integrally formed.

  The connecting part 11b extends from the end part on the one end face 2c side of the main electrode part 11a to the one end face 2c. The end of the connecting portion 11b is exposed at one end face 2c, and the exposed end is connected to one signal terminal electrode 5. The connection portion 11c extends from the end portion on the other end surface 2c side of the main electrode portion 11a to the other end surface 2c. The end of the connecting portion 11 c is exposed on the other end face 2 c, and the exposed end is connected to the other signal terminal electrode 5.

  As shown in FIG. 4B, each grounding internal electrode 13 includes a main electrode portion 13a and connecting portions 13b and 13c. The main electrode portion 13a faces the main electrode portion 11a via a part (dielectric layer) of the element body 2 in the first direction D1. The main electrode portion 13a has a rectangular shape in which the second direction D2 is the long side direction and the third direction D3 is the short side direction. The connection portion 13b extends from one side (one long side) of the main electrode portion 13a and is exposed on one side surface 2e. The connection portion 13c extends from one side (the other long side) of the main electrode portion 13a and is exposed on the other side surface 2e. The grounding internal electrode 13 is exposed on the pair of side surfaces 2e, and is not exposed on the pair of main surfaces 2a and the pair of end surfaces 2c. The main electrode portion 13a and the connection portions 13b and 13c are integrally formed.

  The connecting portion 13b extends from the position of the central portion in the second direction D2 to the one side surface 2e at the end portion on the one side surface 2e side of the main electrode portion 13a. The connecting portion 13c extends from the position of the central portion in the second direction D2 to the other side surface 2e at the end portion on the other side surface 2e side of the main electrode portion 13a. The end of the connecting portion 13b is exposed on one side surface 2e, and the exposed end portion is connected to one grounding terminal electrode 9. The end of the connection portion 13c is exposed on the other side surface 2e, and the exposed end portion is connected to the other grounding terminal electrode 9.

  The signal terminal electrode 5 is disposed at the end of the element body 2 in the second direction D2. The signal terminal electrode 5 includes an electrode portion 5a disposed on each of the pair of main surfaces 2a and the pair of side surfaces 2e, and an electrode portion 5b disposed on the end surface 2c. Adjacent electrode portions 5a and 5b are connected at the ridge line portion of the element body 2 and are electrically connected to each other. The signal terminal electrode 5 is formed on five surfaces of a pair of main surfaces 2a, one end surface 2c, and a pair of side surfaces 2e.

  The electrode portion 5b is disposed so as to cover all the portions exposed to the end faces 2c of the connection portions 11b and 11c, and the connection portions 11b and 11c are directly connected to the signal terminal electrode 5. That is, the connecting portions 11b and 11c connect the main electrode portion 11a and the electrode portion 5b. Thereby, each signal internal electrode 11 is electrically connected to the signal terminal electrode 5.

  The grounding terminal electrode 9 is disposed at the central portion of the element body 2 in the second direction D2. The grounding terminal electrode 9 has an electrode portion 9a disposed on each of the pair of main surfaces 2a and an electrode portion 9b disposed on the side surface 2e. The electrode portion 9a and the electrode portion 9b are connected at the ridge line portion of the element body 2 and are electrically connected to each other. The grounding terminal electrode 9 is formed on three surfaces of a pair of main surfaces 2a and one side surface 2e.

  The electrode portion 9b is disposed so as to cover all portions exposed to the side surface 2e of the connection portions 13b and 13c, and the connection portions 13b and 13c are directly connected to the ground terminal electrode 9. That is, the connection parts 13b and 13c connect the main electrode part 13a and the electrode part 9b. Thereby, each grounding internal electrode 13 is electrically connected to the grounding terminal electrode 9.

  As shown in FIG. 2, each signal terminal electrode 5 includes a first electrode layer 21, a resistance layer R, a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27. The fourth electrode layer 27 constitutes the outermost layer of the signal terminal electrode 5.

  The first electrode layer 21 is formed by applying and baking a conductive paste on the surface of the element body 2. The first electrode layer 21 is a sintered metal layer formed by sintering a metal component (metal powder) contained in the conductive paste. That is, the first electrode layer 21 is a sintered metal layer formed on the element body 2 and is a base electrode layer containing metal. The conductive paste is applied by, for example, a printing method or a dipping method. In order to increase the adhesion strength between the first electrode layer 21 and the element body 2, the first electrode layer 21 may contain a glass component.

  In the signal terminal electrode 5, the first electrode layer 21 is formed on the end surface 2c, and is connected to the connection portions 11b and 11c exposed on the end surface 2c. That is, in the signal terminal electrode 5, the first electrode layer 21 is directly connected to the signal internal electrode 11.

  In the present embodiment, the first electrode layer 21 is a sintered metal layer made of Cu. The first electrode layer 21 may be a sintered metal layer made of Ni. Thus, the first electrode layer 21 contains Cu or Ni. As the conductive paste, a powder made of Cu or Ni mixed with a glass component, an organic binder, and an organic solvent is used. The thickness of the first electrode layer 21 is, for example, 5 to 15 μm.

  The resistance layer R included in the signal terminal electrode 5 is made of a DLC (diamond-like carbon) film. The DLC film is an amorphous film (amorphous carbon film) mainly made of an allotrope of hydrocarbon or carbon. The resistance layer R is formed on the first electrode layer 21 so as to cover the first electrode layer 21. The thickness of the resistance layer R is, for example, 0.1 to 5 μm.

  The DLC film is formed by, for example, a PVD method or a CVD method. The PVD method includes a sputtering method, an arc ion plating method, an ion deposition method, an ion beam method, a laser ablation method, and the like. The CVD method includes a plasma CVD method, a thermal CVD method, a photo CVD method, and the like. The DLC film may contain an element such as N, W, Si, or Cr. Depending on the method of forming the DLC film, the DLC film may contain H.

  It may be formed on the first electrode layer 21 via a resistance layer R (DLC film) and an intermediate layer (not shown). The intermediate layer is in contact with the first electrode layer 21 and is in contact with the resistance layer R. The intermediate layer is any one of a metal layer or a semimetal layer, a nitride layer, and a carbide layer of an element selected from the group consisting of Ti, Cr, W, Si, and Ge. The intermediate layer is formed by, for example, a PVD method or a CVD method. The thickness of the intermediate layer is, for example, 5 to 500 nm.

  The second electrode layer 23 is formed by curing a conductive resin, and is a conductive resin layer. The conductive resin is applied by, for example, an immersion method or a printing method. As the conductive resin, a thermosetting resin mixed with a metal powder and an organic solvent is used. As the metal powder, for example, Ag powder or Cu powder is used. As the thermosetting resin, for example, a phenol resin, an acrylic resin, a silicone resin, an epoxy resin, or a polyimide resin is used.

  In the signal terminal electrode 5, the second electrode layer 23 is formed by curing a conductive resin provided on the resistance layer R (DLC film). That is, in the signal terminal electrode 5, the second electrode layer 23 is a conductive resin layer formed on the resistance layer R. The second electrode layer 23 is in contact with the resistance layer R.

The volume resistivity of the second electrode layer 23 is smaller than the volume resistivity of the resistance layer R (DLC film). The volume resistivity of the second electrode layer 23 that is a conductive resin layer is, for example, 1.0 × 10 ^{−5 to} 1.0 × 10 ⁻³ Ω · cm. The volume resistivity of the resistance layer R is, for example, 10 to 1000 Ω · cm. The second electrode layer 23 is formed on the resistance layer R so as to cover the resistance layer R. In the present embodiment, the second electrode layer 23 is formed not only on the resistance layer R but also on the element body 2. That is, the second electrode layer 23 is formed on the pair of main surfaces 2a and the pair of side surfaces 2e. The second electrode layer 23 is formed so as to go around the four surfaces 2 a and 2 e from the end surface 2 c side of the element body 2.

  The third electrode layer 25 is formed on the second electrode layer 23 by a plating method (for example, an electroplating method). In the present embodiment, the third electrode layer 25 is a Ni plating layer formed on the second electrode layer 23 by Ni plating. The third electrode layer 25 may be a Sn plating layer, a Cu plating layer, or an Au plating layer. As described above, the third electrode layer 25 includes Ni, Sn, Cu, or Au.

  The fourth electrode layer 27 is formed on the third electrode layer 25 by a plating method (for example, an electroplating method). In the present embodiment, the fourth electrode layer 27 is a Sn plating layer formed on the third electrode layer 25 by Sn plating. The fourth electrode layer 27 may be a Cu plating layer or an Au plating layer. As described above, the fourth electrode layer 27 contains Sn, Cu, or Au. The third electrode layer 25 and the fourth electrode layer 27 are plating layers formed on the second electrode layer 23.

  The electrode portion 5a includes a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27, respectively. The electrode portion 5 b includes a first electrode layer 21, a resistance layer R, a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27. The length of the electrode portion 5a in the second direction D2 is mainly determined by the length in the second direction D2 of the portion formed on each surface 2a, 2e in the second electrode layer 23.

  As shown in FIG. 3, each ground terminal electrode 9 has a first electrode layer 21, a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27. The fourth electrode layer 27 constitutes the outermost layer of the ground terminal electrode 9. In the present embodiment, the ground terminal electrode 9 does not have the resistance layer R. The ground terminal electrode 9 may not have the second electrode layer 23.

  In the ground terminal electrode 9, the first electrode layer 21 is formed on the side surface 2e and connected to the connection portions 13b and 13c exposed on the side surface 2e. That is, in the ground terminal electrode 9, the first electrode layer 21 is directly connected to the ground internal electrode 13.

  In the grounding terminal electrode 9, the second electrode layer 23 is formed by curing the conductive resin applied on the first electrode layer 21. That is, in the ground terminal electrode 9, the second electrode layer 23 is a conductive resin layer formed on the first electrode layer 21. The second electrode layer 23 is in contact with the first electrode layer 21.

  The electrode portion 9a includes a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27, respectively. The electrode portion 9 b includes a first electrode layer 21, a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27. The length of the electrode portion 9a in the third direction D3 is mainly determined by the length in the second direction D2 of the portion formed on each surface 2a in the second electrode layer 23.

  As described above, in this embodiment, each signal terminal electrode 5 has the resistance layer R. For this reason, in the multilayer feedthrough capacitor C1, higher ESR is achieved as compared with the multilayer feedthrough capacitor not including the resistance layer R.

  The resistance layer R is made of a DLC film, and the DLC film hardly permeates moisture. For this reason, it is difficult for moisture to enter from the outside of the resistance layer R, and the deterioration of the electrical characteristics of the multilayer feedthrough capacitor C1 is suppressed.

  As described above, the DLC film is formed by the PVD method or the CVD method, and the formed DLC film is unlikely to have thickness variations. Further, unlike the electronic component described in Patent Document 1, the resistance layer R does not contain a caking agent. For this reason, variation in the resistance value of the resistance layer R is suppressed. Therefore, in the multilayer feedthrough capacitor C1, variations in ESR are suppressed.

  The signal terminal electrode 5 has a first electrode layer 21 formed on the outer surface of the element body 2 and connected to the signal internal electrode 11. The first electrode layer 21 includes a metal, and the resistance layer R is formed on the first electrode layer 21. Since the signal terminal electrode 5 has the first electrode layer 21, the connectivity between the signal terminal electrode 5 and the signal internal electrode 11 is enhanced. Similarly, since the ground terminal electrode 9 has the first electrode layer 21 formed on the outer surface of the element body 2 and connected to the ground internal electrode 13, the ground terminal electrode 9 And the grounding internal electrode 13 are connected.

  The signal terminal electrode 5 is formed on the resistance layer R (DLC film), the second electrode layer 23 having a volume resistivity lower than that of the resistance layer R, and the second electrode layer 23 formed on the second electrode layer 23. The third and fourth electrode layers 25 and 27 are provided. Even when the third electrode layer 25 is formed by electroplating, since the volume resistivity of the second electrode layer 23 is smaller than the volume resistivity of the resistance layer R, the third electrode layer 25 is reliably formed. In addition, since the resistance layer R suppresses the penetration of the plating solution into the element body 2, the deterioration of the electrical characteristics (for example, insulation resistance) of the multilayer feedthrough capacitor C1 is suppressed.

  Since the second electrode layer 23 is a conductive resin layer, it may contain moisture. Even when the second electrode layer 23 contains moisture, the resistance layer R suppresses the penetration of moisture contained in the second electrode layer 23 into the element body 2. Therefore, even when the signal terminal electrode 5 has the second electrode layer 23, deterioration of the electrical characteristics of the multilayer feedthrough capacitor C1 is suppressed.

  Next, a configuration of a modified example of the multilayer feedthrough capacitor C1 will be described with reference to FIGS. 5 to 13 are views for explaining a cross-sectional configuration of the multilayer capacitor in accordance with this modification.

  In the modification shown in FIG. 5, the first electrode layer 21 is formed not only on the end surface 2c but also on the pair of main surfaces 2a and the pair of side surfaces 2e. That is, the first electrode layer 21 is formed so as to wrap around the four surfaces 2 a and 2 e from the end surface 2 c side of the element body 2. The resistance layer R is formed only on the portion formed on the end face 2 c of the first electrode layer 21. That is, portions of the first electrode layer 21 formed on the pair of main surfaces 2a and the pair of side surfaces 2e are exposed from the resistance layer R. The second electrode layer 23 is formed on the resistance layer R and the first electrode layer 21 so as to cover the entire portion of the resistance layer R and the first electrode layer 21 exposed from the resistance layer R. ing.

  In the modification shown in FIG. 6, the signal terminal electrode 5 does not have the first electrode layer 21. That is, the signal terminal electrode 5 includes a resistance layer R, a second electrode layer 23, a third electrode layer 25, and a fourth electrode layer 27. The resistance layer R is formed on the end face 2c. The resistance layer R may be formed on the end surface 2c via the intermediate layer described above.

  In the modification shown in FIG. 7, the signal terminal electrode 5 does not have the second electrode layer 23. That is, the signal terminal electrode 5 includes a first electrode layer 21, a resistance layer R, a third electrode layer 25, and a fourth electrode layer 27. The third electrode layer 25 is formed on the resistance layer R. The third electrode layer 25 may be formed on the resistance layer R via the above-described intermediate layer. The first electrode layer 21 may be formed not only on the end surface 2c but also on the pair of main surfaces 2a and the pair of side surfaces 2e. In this case, the third electrode layer 25 (fourth electrode layer 27) is also formed on portions of the first electrode layer 21 formed on the pair of main surfaces 2a and the pair of side surfaces 2e.

  In the modification shown in FIG. 8, the signal terminal electrode 5 does not have the first electrode layer 21 and the second electrode layer 23. That is, the signal terminal electrode 5 has a resistance layer R, a third electrode layer 25, and a fourth electrode layer 27. The resistance layer R is formed on the end face 2c. The third electrode layer 25 is formed on the resistance layer R. The resistance layer R may be formed on the end surface 2c via the above-described intermediate layer, and the third electrode layer 25 may be formed on the resistance layer R via the above-described intermediate layer.

In the modification shown in FIGS. 9 and 10, the resistance layer R includes a first resistance layer R1 made of a DLC film and a second resistance layer R2 made of a DLC film. The thickness of the first resistance layer R1 (first DLC film) is, for example, 0.1 to 5 μm. The thickness of the second resistance layer R2 (second DLC film) is, for example, 0.1 to 1 μm. The volume resistivity of the second resistance layer R2 is smaller than the volume resistivity of the first resistance layer R1. In the DLC film, for example, the volume resistivity varies depending on the ratio of the sp ³ bond corresponding to the diamond structure and the sp ² bond corresponding to the graphite bond, the metal element content, or the hydrogen content. The volume resistivity of the first resistance layer R1 is, for example, 10 to 1000 Ω · cm. The volume resistivity of the second resistance layer R2 is, for example, 0.1 to 10 Ω · cm.

  The second resistance layer R2 is formed on the first resistance layer R1. The first resistance layer R1 may be formed on the end surface 2c or the first electrode layer 21 via the above-described intermediate layer. The third electrode layer 25 may be formed on the second resistance layer R2 via the above-described intermediate layer.

  In the modification shown in FIGS. 9 and 10, even when the third electrode layer 25 is formed by electroplating, the volume resistivity of the second resistance layer R2 is higher than the volume resistivity of the first resistance layer R1. Since it is small, the third electrode layer 25 is reliably formed. Further, since the first resistance layer R1 and the second resistance layer R2 suppress the penetration of the plating solution into the element body 2, the deterioration of the electrical characteristics of the multilayer feedthrough capacitor C1 is suppressed.

In the modification example shown in FIG. 11, _M second electrode layer 23 is formed by baking to impart electroconductive paste so as to cover the resistive layer R. The second electrode layer _23M is a sintered metal layer formed by sintering a metal component (metal powder) contained in the conductive paste. That, _M second electrode layer 23, a sintered metal layer formed on the element body 2 comprises a metal. The conductive paste is applied by, for example, a dipping method or a printing method. In this modification, the second electrode layer _23M is a sintered metal layer made of Cu. The second electrode layer 23 _M, may be a sintered metal layer formed of Ni.

The volume resistivity of the second electrode layer 23 _M is smaller than the volume resistivity of the resistive layer R (DLC film). The volume resistivity of the second electrode layer 23 _M is a sintered metal layer is, for example, ^{1.5 × 10 -8 ~1.0 × 10 -7} Ω · cm.

In the modification example shown in FIG. 11, even when the third electrode layer 25 is formed by electroplating, for the volume resistivity of the second electrode layer 23 _M is smaller than the volume resistivity of the resistive layer R, plating The third electrode layer 25 as a layer is reliably formed. Further, since the resistance layer R suppresses the penetration of the plating solution into the element body 2, the deterioration of the electrical characteristics of the multilayer feedthrough capacitor C1 is suppressed.

When the signal terminal electrode 5 has the first electrode layer 21 that is a sintered metal layer, the first electrode layer 21 is melted when the second electrode layer _23M is formed, and the signal terminal electrode 5 may not be formed properly. Therefore, in the modification example shown in FIG. 11, since the second electrode layer 23 _M is a sintered metal layer, the signal terminal electrode 5 does not have a first electrode layer 21 is a sintered metal layer .

  In the modification shown in FIGS. 12 and 13, the signal terminal electrode 5 does not have the second electrode layer 23, the third electrode layer 25, and the fourth electrode layer 27. In the modification shown in FIG. 12, the signal terminal electrode 5 has a resistance layer R. In the modification shown in FIG. 13, the signal terminal electrode 5 includes a first electrode layer 21 and a resistance layer R.

  As mentioned above, although embodiment of this invention has been described, this invention is not necessarily limited to embodiment mentioned above, A various change is possible in the range which does not deviate from the summary.

  In the embodiment and each modification described above, the pair of signal terminal electrodes 5 includes the resistance layer R, but the present invention is not limited thereto. For example, only one of the signal terminal electrodes 5 may have the resistance layer R. The ground terminal electrode 9 may have the resistance layer R instead of the signal terminal electrode 5.

  The signal terminal electrode 5 and the ground terminal electrode 9 have third and fourth electrode layers 25 and 27 as plating layers, that is, the plating layer is constituted by a plurality of plating layers. It is not limited to this. The plating layer may be composed of a single plating layer.

  In the present embodiment, the multilayer feedthrough capacitor C1 has been described as an example of the electronic component. However, the present invention is not limited to this, and a multilayer capacitor, a multilayer inductor, a multilayer varistor, a multilayer piezoelectric actuator, a multilayer thermistor, a multilayer composite component, etc. The present invention can also be applied to other multilayer electronic components or electronic components other than multilayer electronic components.

2 ... body, 5 ... signal terminal electrodes, 9 ... ground terminal electrode, the internal electrode 11 ... signal, 13 ... internal electrode grounded, 21 ... first electrode layer, 23, 23 M _... second electrode layer, 25 ... Third electrode layer, 27 ... Fourth electrode layer, C1 ... Multilayer feedthrough capacitor, R ... Resistance layer, R1 ... First resistance layer, R2 ... Second resistance layer.

Claims (6)

With the body,
A terminal electrode disposed on the element body,
The terminal electrode is an electronic component having a resistance layer made of a DLC film. An inner conductor disposed in the element body and connected to the terminal electrode;
The terminal electrode further includes a base electrode layer formed on the outer surface of the element body and connected to the inner conductor,
The base electrode layer includes a metal,
The electronic component according to claim 1, wherein the DLC film is formed on the base electrode layer.   The electronic component according to claim 1, wherein the terminal electrode further includes a conductive resin layer formed on the DLC film and having a volume resistivity lower than that of the DLC film.   The electronic component according to claim 3, wherein the terminal electrode further includes a plating layer formed on the conductive resin layer. The DLC film is
A first DLC film;
The electronic component according to claim 1, further comprising: a second DLC film formed on the first DLC film and having a volume resistivity lower than that of the first DLC film.   The electronic component according to claim 1, wherein the terminal electrode further includes a metal layer formed on the DLC film and having a volume resistivity lower than that of the DLC film.

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