JP2017028012A - Semiconductor manufacturing device and semiconductor manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing device and a semiconductor manufacturing method which can reduce manufacturing failure caused by a foreign object mixed in especially in a transferring process of a semiconductor substrate.SOLUTION: A semiconductor manufacturing method comprises: foreign object removal processing (S202) of controlling a gas supply part to cause a first process gas to be introduced into a reaction chamber after a substrate is placed on a placement part and controlling a plasma creation part so as to create plasma of the first process gas to remove the foreign object on the substrate; and thin film deposition processing (S204) of controlling the gas supply part to cause a second process gas to be introduced into the reaction chamber after execution of the foreign object removal processing and controlling the plasma creation part to cause a thin film to be deposited on the substrate by the second process gas in a plasma atmosphere.SELECTED DRAWING: Figure 7

Description

  The present invention relates to a semiconductor manufacturing apparatus and a semiconductor manufacturing method, and more particularly to an apparatus for forming a thin film on a semiconductor substrate used for manufacturing a semiconductor, and a semiconductor manufacturing method using the apparatus.

  In a semiconductor manufacturing process, a process of forming an insulating film (thin film) for the purpose of separating each semiconductor layer is frequently used. In this insulating film formation process, contamination due to foreign matters generated due to various factors, or semiconductor manufacturing defects due to the contamination often becomes a problem, and various countermeasures have been taken for each factor.

  For example, Patent Document 1 discloses a CVD (Chemical Vapor Deposition) apparatus that removes organic contaminants adhering to the inner wall of a vacuum vessel with plasma excited by O 2 gas. In Patent Document 1, by performing such a removal process at the time of forming the protective film, mixing of organic contaminants accumulated in the vacuum vessel is avoided, and organic contamination can be efficiently and inexpensively removed. It is said.

JP 2005-200680 A

  However, in the film formation process of the insulating film, not only the foreign matter adhering to the reaction chamber (vacuum vessel) but also the transfer process by the transfer robot etc. between the transfer chamber (load lock chamber) etc. connected to the reaction chamber There are not a few foreign substances mixed in. Foreign matter that is mixed in during the conveyance process is often a material-type foreign matter that is not directly related to the raw material used in the insulating film formation process, and such a material-type foreign matter is required to be efficiently removed. ing.

  In this regard, as represented by Patent Document 1, the reaction chamber cleaning mechanism in the CVD apparatus is a mechanism for preventing the reaction product attached to the inner wall of the reaction chamber from falling on the semiconductor substrate. No consideration is given to the removal of foreign matter generated in a transfer chamber (load lock chamber) different from the above and foreign matter generated by transfer.

  The present invention has been made to solve the above-described problems, and in particular, provides a semiconductor manufacturing apparatus and a semiconductor manufacturing method capable of reducing manufacturing defects caused by foreign matters mixed in the process of transporting a semiconductor substrate. For the purpose.

  In order to achieve the above object, a semiconductor manufacturing apparatus according to the present invention is a semiconductor manufacturing apparatus for forming a thin film on a substrate by converting a processing gas into plasma, and a reaction chamber containing the substrate, and the reaction chamber A gas supply provided to supply the reaction chamber by selecting a mounting portion for holding the substrate, a first processing gas capable of obtaining a foreign matter removal effect, and a second processing gas for forming a thin film on the substrate. And a plasma generation unit that generates plasma in the reaction chamber, and after the substrate is mounted on the mounting unit, the first processing gas is introduced from the gas supply unit into the reaction chamber and the reaction is performed. After execution of the first control for generating plasma of the first processing gas in the chamber and the first control, the second processing gas is introduced from the gas supply unit into the reaction chamber and generated in the reaction chamber. The second processing gas Characterized in that it comprises a second control for forming a thin film on the substrate by the plasma, and a control unit for executing, a.

  In order to achieve the above object, a semiconductor manufacturing method according to the present invention fixes a substrate to be deposited on a mounting portion in a reaction chamber, allows oxygen gas to flow into the reaction chamber, and controls the pressure by a pressure adjustment valve. The oxygen pressure in the reaction chamber is adjusted, and oxygen plasma is excited in the reaction chamber by a plasma source to remove carbon-based foreign matter adhering to the substrate.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor manufacturing apparatus and semiconductor manufacturing method which can reduce the manufacturing defect resulting from the foreign material mixed especially in the conveyance process of a semiconductor substrate can be provided.

It is a schematic sectional drawing which shows an example of a structure of the semiconductor manufacturing apparatus which concerns on embodiment. It is sectional drawing which shows an example of a structure of the wafer in which the interlayer film based on the prior art was formed. It is a longitudinal cross-sectional view which shows the interlayer film production | generation process based on a prior art. It is process drawing which shows the process of the interlayer lower layer film production | generation process based on a prior art. In an interlayer film production | generation process, it is sectional drawing which shows the state of a wafer when an interlayer lower layer film is formed through the foreign material on metal wiring. It is a figure for demonstrating the exposure of the metal wiring which concerns on a prior art. It is process drawing which shows the process of the interlayer lower layer film production | generation process which concerns on embodiment. It is a figure for demonstrating the effect | action of O2 radical with respect to a carbon-type foreign material.

  Hereinafter, the semiconductor manufacturing apparatus and the semiconductor manufacturing method according to the present embodiment will be described in detail with reference to FIGS.

FIG. 1 is a cross-sectional view showing an example of the configuration of a semiconductor manufacturing apparatus 100 according to the present embodiment.
In this embodiment, a plasma enhanced CVD (PECVD) apparatus is described as an example of the semiconductor manufacturing apparatus according to the present invention. A plasma CVD apparatus is a kind of plasma processing apparatus, and is an apparatus for forming thin films for various purposes in a semiconductor manufacturing process. As shown in FIG. 1, the semiconductor manufacturing apparatus 100 includes a reaction unit 50, a transfer unit 70, a load lock unit 80, and gate valves 90 and 92.

The reaction unit 50 includes a reaction chamber 52, a stage (mounting unit) 54, an exhaust unit 56, a gas supply unit 58, and a plasma generation unit 60, and deposits a thin film such as an insulating film by PECVD.
The reaction chamber 52 is an airtight chamber in which processing (in this embodiment, formation of an insulating film) is performed, and is kept in a vacuum by evacuating the exhaust unit 56 as necessary. The exhaust unit 56 is connected to a vacuum pump (not shown) to constitute a vacuum exhaust system. The stage 54 is a placement unit on which a semiconductor substrate (wafer) W to be processed is placed. The gas supply unit 58 switches and supplies a gas (O 2 (oxygen) gas in the present embodiment) and a source gas (SiH 4 (silane) gas or the like in the present embodiment) to be plasma decomposed. It is a part.

  The plasma generation unit 60 is a part that generates plasma by decomposing a target gas into plasma, and includes an electrode 62, a high-frequency power source 64, and an electrode 66 disposed on the stage 54. The plasma generation unit 60 according to the present embodiment employs a parallel plate type plasma generation apparatus, and the electrode 62 and the electrode 66 face each other to form a parallel plate electrode. That is, plasma is generated by subjecting the target gas to plasma decomposition by an electric field generated between the parallel plate electrodes (plasma generation area PA), and the generated plasma is confined in the plasma generation area PA. Therefore, the electrode 62 of the plasma generating unit 60 according to the present embodiment is connected to the high frequency power supply 64, and the electrode 66 is grounded. Of course, this connection relationship may be reversed, that is, the high frequency power supply 64 may be connected to the electrode 66 and the electrode 62 may be grounded. Note that the plasma generation unit 60 according to the present embodiment is not limited to the parallel plate method, and other methods such as a microwave plasma method may be employed.

  The transfer unit 70 is a part for moving the wafer W arranged in the load lock unit 80 to the reaction unit 50, and includes a transfer chamber 72, a vacuum robot 74, and an exhaust unit 76. The transfer chamber 72 is always evacuated by the exhaust unit 76. The exhaust unit 76 is connected to a vacuum pump (not shown) and constitutes a vacuum exhaust system. The vacuum robot 74 places the wafer W received from the load lock unit 80 on the stage 54 of the reaction unit 50.

  The load lock unit 80 is a part where a wafer carrier 84 into which a wafer W to be processed is inserted is disposed in the load lock chamber 82. The load lock chamber 82 includes an exhaust unit 86 and is configured to be switchable between an atmospheric pressure state and a vacuum state.

  The gate valve 90 is a valve that can open and close the reaction chamber 52 and the transfer chamber 72 in an airtight manner, and the reaction chamber 52 and the transfer chamber 72 are spatially separated by closing the gate valve 90. On the other hand, the gate valve 92 is a valve capable of opening and closing the load lock chamber 82 and the transfer chamber 72 in an airtight manner. By closing the gate valve 92, the load lock chamber 82 and the transfer chamber 72 are spatially separated. Is done.

  The control unit 40 includes a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), and the like (not shown). The CPU controls and controls the entire semiconductor manufacturing apparatus 100, the ROM is a storage unit that stores in advance a control program of the semiconductor manufacturing apparatus 100, various parameters, and the like, and the RAM is a work area when various programs are executed. Or the like used as a storage means.

  Next, a semiconductor manufacturing method using the semiconductor manufacturing apparatus 100 will be described, but before that, a conventional semiconductor manufacturing method will be described.

FIG. 2 shows an example of a wafer W that has been subjected to film formation by a semiconductor manufacturing apparatus according to the prior art.
As shown in FIG. 2, the wafer W is formed so as to cover the intermediate film 12 formed on a semiconductor substrate (not shown), the metal wiring 16 formed on the intermediate film 12, and the intermediate film 12 and the metal wiring 16. The interlayer film 14 is included. The intermediate film 12 is formed on a semiconductor element or the like (not shown) and functions as an interlayer film.

  With reference to FIG. 3, the manufacturing method of the wafer W which concerns on a prior art is demonstrated.

  First, after forming a semiconductor element or the like on a semiconductor substrate (not shown), an intermediate film 12 is formed to cover an upper portion of the semiconductor element or the like, and a metal wiring 16 is formed on the intermediate film 12. The above steps may be performed by appropriately adopting known semiconductor manufacturing techniques.

  Next, as shown in FIG. 3A, an interlayer lower layer film 14a is formed by PECVD method so as to cover the intermediate film 12 and the metal wiring 16, and the interlayer interlayer film 14b is formed on the interlayer lower layer film 14a by PECVD method. Form a film. At this time, as shown in FIG. 3A, a step is generated on the interlayer intermediate film 14 b due to the thickness of the metal wiring 16. Hereinafter, the interlayer lower layer film 14a and the interlayer interlayer film 14b may be collectively referred to as an interlayer film 14.

  Next, the planarization process of the interlayer film 14 will be described.

  First, as shown in FIG. 3B, an SOG (Spin On Glass) film 18 is coated on the interlayer film 14 while filling the step. The SOG film 18 is obtained by spin-coating a chemical solution in which a SiO 2 (quartz) -based material is dissolved in a solvent on the wafer W. Spin coating is a coating method in which a wafer is spun and applied to the entire surface while a chemical solution is poured onto the wafer W.

  Next, as shown in FIG. 3C, the entire surface of the wafer is etched (interlayer etchback), and the SOG film 18 and a part of the interlayer film 14 are deleted. Through the above steps, the interlayer film 14 is planarized (steps of the interlayer film 14 are eliminated).

  FIG. 4 is a process diagram showing a process of generating an interlayer lower layer film 14a according to the prior art.

As shown in FIG. 4, first, in step S100, the wafer W is loaded into a reaction chamber of a conventional semiconductor manufacturing apparatus and set on a stage.
Next, in step S102, a plasma oxide film is formed by PECVD, and an interlayer lower layer film 14a is generated.

  Next, in step S104, the wafer W on which the interlayer lower layer film 14a is formed is unloaded from the reaction chamber.

  Next, with reference to FIGS. 5 and 6, the metal wiring exposure phenomenon (metal exposure) due to foreign matter on the wafer will be described. The metal exposure means that in the semiconductor manufacturing process, when a foreign substance adheres to the metal wiring before the formation of the interlayer film (insulating film), the foreign substance becomes an interlayer film (insulating film) in the subsequent scrubbing process (foreign substance removing process). This refers to the exposure of the metal wiring that is generated by removing all of them. This metal exposure is an aspect of a manufacturing failure that is assumed in the present embodiment and is caused by foreign matter mixed in the conveyance process, and this embodiment is intended to suppress such a manufacturing failure. It is one.

  FIG. 5 shows a state in which the foreign matter S adheres to the metal wiring 16 before the formation of the interlayer lower layer film 14a and the interlayer lower layer film 14a is formed thereafter on the wafer W during the film formation process.

  As shown in FIG. 5, when the foreign substance S adheres to the metal wiring 16, the interlayer lower layer film 14a is less likely to be formed below the foreign substance S in the subsequent generation process of the interlayer lower layer film 14a. Moreover, since the surface area of the foreign matter S is increased by the interlayer lower layer film 14a, it is easily removed in the scrub process after the formation of the interlayer lower layer film 14a.

Here, the scrub process will be described in more detail. Scrubbing means removing particles (dust) adhering to the surface of the wafer, protrusions formed on the wafer surface, and the like at each stage of the wafer processing process. More specifically, for example, in the case of a brush scrub, the wafer W is mounted on a rotating mechanism and rotated, and a rotating brush is in contact with the rotating wafer W while injecting a pure rinse solution, etc. Particles adhering to the wafer W due to friction between W and the brush or protrusions formed on the wafer W are removed.
This scrubbing process is generally performed by a scrubber provided separately from the plasma CVD apparatus.

  Next, with reference to FIG. 6, the mechanism after the foreign substance S of the said metal exposure is removed is demonstrated.

  FIG. 6A shows the wafer W in the state shown in FIG. 5, that is, the state in which the interlayer lower layer film 14a is generated on the foreign substance S, and the foreign substance S is removed along with the interlayer lower layer film 14a in the subsequent scrub process. Thereafter, the interlayer intermediate film 14b is formed, and the SOG film 18 is spin-coated. As shown in FIG. 6A, the portion of the interlayer film 14 where the foreign matter S is present is thin, so that the surface of the SOG film 18 where the foreign matter S is present is greatly depressed.

  Thereafter, when the interlayer etchback is performed, the metal wiring is exposed in the thinned portion of the interlayer film 14 as shown in FIG. 6B, and an exposed region P is formed. When the exposed region P of the metal wiring is formed in this manner, the breakdown voltage of the interlayer film is reduced in the exposed region P, the metal wiring is corroded, and the like, which causes a manufacturing defect of a semiconductor element that has been manufactured. .

Therefore, in the semiconductor manufacturing apparatus and the semiconductor manufacturing method according to the present embodiment, high-temperature O 2 radical processing is performed as pre-processing of a processing step (target step) in which foreign matter becomes a problem.
The O2 radical is a short-lived intermediate rich in reactivity that exists in an O2 plasma state, and quickly combines with other radical species to form another compound.

  With reference to FIG. 1, FIG. 3 and FIG. 7, a semiconductor manufacturing method using the semiconductor manufacturing apparatus 100 according to the present embodiment when the target process is an interlayer lower layer film generation process will be described. The semiconductor manufacturing method shown in FIG. 7 corresponds to the interlayer underlayer film generation process according to the prior art shown in FIG. All or part of the steps of the semiconductor manufacturing method described below are described as a semiconductor manufacturing program, stored in a storage means such as a ROM (not shown), expanded in a RAM or the like as necessary, and executed by the CPU. You may do it.

  On the other hand, the foreign matter S to be removed in the present semiconductor manufacturing method is assumed to be a foreign matter S mixed in various transport processes in the semiconductor manufacturing apparatus 100. In the present embodiment, as an example, an O-ring or the like used for holding the vacuum of the gate valve 90 of the semiconductor manufacturing apparatus 100 is rubbed when the gate valve 90 is opened and closed, and the debris adheres to the wafer W. It is assumed that foreign matter is mixed.

  In the semiconductor manufacturing method shown in FIG. 7, the process up to the process of forming the metal wiring 16 on the intermediate film 12 is completed as a pre-process of Step S200. That is, in the wafer W shown in FIG. 2, the wafer W without the interlayer film 14 is put into the manufacturing process shown in FIG.

  First, after the load lock chamber 82 is brought into an atmospheric pressure state, a wafer W (in this embodiment, an Si (silicon) substrate is used as an example) stored in the wafer carrier 84 shown in FIG. set. Thereafter, the pressure inside the load lock chamber 82 is reduced by the exhaust part 86 to make a vacuum state.

  Next, the gate valve 92 between the load lock chamber 82 and the transfer chamber 72 is opened, and the film formation target wafer W is carried into the transfer chamber 72 from the load lock chamber 82 by the vacuum robot 74. Thereafter, the gate valve 92 is closed.

  Next, the gate valve 90 between the transfer chamber 72 and the reaction chamber 52 is opened, and the film formation target wafer W is transferred from the transfer chamber 72 to the stage 54 in the reaction chamber 52 via the gate valve 90 by the vacuum robot 74. (Step S200). Thereafter, the gate valve 90 is closed.

  Next, after the film formation target wafer W is fixed on the stage 54, an O 2 gas is allowed to flow from the gas supply unit 58 into the reaction chamber 52, and the pressure in the reaction chamber 52 is appropriately set using a pressure adjustment valve (not shown). Adjust.

  Next, high temperature O2 radical treatment according to the present embodiment is performed. That is, after the pressure in the reaction chamber 52 is stabilized at a desired value, the plasma generation unit 60 excites O 2 plasma in the plasma generation region PA. By this O 2 plasma, high temperature O 2 radical treatment is performed to remove foreign matter (carbon foreign matter in the present embodiment) adhering to the wafer W (step S202). In the present embodiment, “removed” includes not only the case where it is completely removed, but also the case where it is reduced to such an extent that it does not affect the manufacturing process.

Hereinafter, an example of conditions for the high-temperature O 2 radical treatment performed in step S202 will be described.
Temperature: 400 ° C
O2 flow rate: 500 sccm (standard cubic centimeter per minute)
Pressure: 1.0 Torr
High frequency (RF) power supply: 500W to 1000W
Processing time: 10-60 seconds

  Next, after generating O2 plasma for a time sufficient to remove the carbon-based foreign matter, the plasma discharge is stopped and the flow of O2 gas into the reaction chamber 52 is stopped.

  Next, a raw material gas (in this embodiment, SiH 4 (silane) is used as an example in this embodiment) is flowed from the gas supply unit 58 in the reaction chamber 52 to react appropriately using a pressure adjustment valve. Adjust the room pressure.

  Next, after the pressure in the reaction chamber 52 is stabilized at a desired value, the plasma generation unit 60 excites plasma in the plasma generation region PA. With this plasma, a plasma oxide film (in this embodiment, an SiO 2 film (silicon oxide film) is formed as an example), and an interlayer lower layer film 14a is formed on the wafer W (step S204).

  Next, the interlayer lower layer film 14a having a desired film thickness is formed by discharging for a desired time, and then the inflow of the gas used for forming the interlayer lower layer film 14a is stopped together with the stop of the plasma discharge.

  Next, the gate valve 90 between the reaction chamber 52 and the transfer chamber 72 is opened, and the wafer W on which the interlayer lower layer film 14 a has been formed is taken out of the reaction chamber 52 by the vacuum robot 74 and transferred to the transfer chamber 72. (Step S206). Thereafter, the gate valve 90 is closed.

  Next, the gate valve 92 between the transfer chamber 72 and the load lock chamber 82 in a vacuum state is opened, and the wafer W after film formation is transferred from the transfer chamber 72 to the load lock chamber 82 by the vacuum robot 74. Thereafter, the gate valve 92 is closed, and the load lock chamber 82 is changed from a vacuum state to an atmospheric pressure state.

  Through the above steps, the film formation process (interlayer lower layer film generation process) is performed by the semiconductor manufacturing apparatus 100 according to the present embodiment. Thereafter, the processes such as the generation of the interlayer interlayer 14b and the interlayer etchback are performed in the same manner as the semiconductor manufacturing method according to the prior art shown in FIG. Therefore, the configuration of the wafer W for which the film forming process has been completed by the semiconductor manufacturing apparatus 100 according to the present embodiment is the same as the configuration of the wafer W according to the prior art shown in FIG.

  Next, with reference to FIG. 8, the effect | action of the high temperature O2 radical process which concerns on this Embodiment is demonstrated. FIG. 8 shows a state where the carbon-based foreign matter X exists in a high temperature atmosphere filled with O2 radicals.

  As described above, since the O2 radical is highly reactive, the O2 radical reacts quickly with C (carbon) of the carbon-based foreign matter X and is replaced with CO2 under the state shown in FIG. By supplying sufficient O2 radicals while appropriately discharging the generated CO2, the carbon-based foreign matter X is reduced to such an extent that it does not become a problem in the wafer processing process (carbon-based foreign matter X ').

  As described above in detail, according to the semiconductor manufacturing apparatus and the semiconductor manufacturing method according to the present embodiment, the carbon-based foreign matter adhering to the wafer after the scrubbing process can be processed thereafter (target process, for example, film forming process). Since the step of removing in the reaction chamber is provided prior to performing the step, the metal exposure caused by removing the interlayer film covering the carbon-based foreign matter in the subsequent scrub process can be suppressed. As a result, it is possible to provide a semiconductor manufacturing apparatus and a semiconductor manufacturing method that can reduce manufacturing defects caused by foreign matters mixed in the process of transporting a semiconductor substrate.

  In the above-described embodiment, the carbon-based foreign matter X generated due to the O-ring of the gate valve 90 or the like that hermetically separates the reaction chamber 52 and the transfer chamber 72 has been described as an example of the foreign matter to be removed. However, it is not limited to this. It may be a foreign substance generated in another transfer process, for example, a transfer process between the transfer chamber 72 and the load lock chamber 82, or any other material system as long as it is a foreign substance that is reduced by a reaction with O2 radicals. It may be a foreign object.

  In the above-described embodiment, the case where the Si substrate is used as the semiconductor substrate and the SiO 2 film is used as the interlayer lower layer film has been described as an example. However, the present invention is not limited thereto. That is, the semiconductor substrate is not limited to the Si substrate, and other substrates such as a GaAs substrate may be used. Further, the interlayer lower layer film is not limited to the SiO 2 film, and another interlayer lower layer film such as a SiN film (silicon nitride film) may be used.

12 interlayer film 14 interlayer film 14a interlayer lower layer film 14b interlayer interlayer film 16 metal wiring 18 SOG film 40 control unit 50 reaction unit 52 reaction chamber 54 stage 56 exhaust unit 58 gas supply unit 60 plasma generation unit 62 electrode 64 high frequency power source 66 electrode 70 Transfer unit 72 Transfer chamber 74 Vacuum robot 76 Exhaust unit 80 Load lock unit 82 Load lock chamber 84 Wafer carrier 86 Exhaust unit 90, 92 Gate valve 100 Semiconductor manufacturing apparatus P Exposed area PA Plasma generation area S Foreign substance W Wafer X, X 'Carbon Foreign matter

Claims (7)

A semiconductor manufacturing apparatus for converting a processing gas into plasma and forming a thin film on a substrate,
A reaction chamber for storing substrates;
A placement unit provided in the reaction chamber and holding the substrate;
A gas supply unit that selects and supplies a first processing gas capable of removing foreign substances and a second processing gas for forming a thin film on the substrate into the reaction chamber;
A plasma generator for generating plasma in the reaction chamber;
A first control for introducing the first processing gas from the gas supply unit into the reaction chamber and generating plasma of the first processing gas in the reaction chamber after the substrate is mounted on the mounting unit; After the execution of the first control, the second process gas is introduced from the gas supply unit into the reaction chamber, and a thin film is formed on the substrate by the plasma of the second process gas generated in the reaction chamber. A second control for causing the control to execute,
A semiconductor manufacturing apparatus comprising: The semiconductor manufacturing apparatus according to claim 1, wherein the first processing gas contains oxygen. A transfer chamber into which the substrate is once carried when the substrate is transferred to the reaction chamber;
The semiconductor manufacturing apparatus according to claim 1, further comprising: a gate valve that connects the reaction chamber and the transfer chamber. The semiconductor manufacturing apparatus according to claim 3, wherein the gate valve is vacuum-sealed between the reaction chamber and the transfer chamber by sealing formed of a material containing carbon. Fix the deposition target substrate on the mounting part in the reaction chamber,
Flowing oxygen gas into the reaction chamber and adjusting the oxygen pressure in the reaction chamber with a pressure adjustment valve;
A semiconductor manufacturing method in which oxygen plasma is excited in the reaction chamber by a plasma source to remove carbon-based foreign matter adhering to the substrate. The semiconductor manufacturing method according to claim 5, wherein after removing the carbon-based foreign matter, a thin film is formed on the substrate in the reaction chamber. The deposition target substrate is fixed onto the mounting unit by fixing the deposition target substrate transferred from the transfer chamber to the reaction chamber via a gate valve on the mounting unit. The semiconductor manufacturing method of Claim 5 or Claim 6.

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