JP2014146638A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device in which an activation state of an electrode surface on a wiring board is efficiently and easily maintained, and a good electrical connection between an electrode pad of a substrate and a projection electrode of a corresponding semiconductor chip is obtained.SOLUTION: A method of manufacturing a semiconductor device includes a step of activating an electrode 2 of a substrate 1, a step of coating an activated electrode surface of the substrate with an adhesive 5, and a step of bonding a projection electrode 7 on a corresponding semiconductor chip 6, in this order. The substrate coated with the adhesive is transported and stored in the atmosphere.

Description

  The present invention relates to a method of manufacturing a semiconductor device, and in particular, a semiconductor chip such as an IC or LSI is connected to a wiring substrate such as a flexible substrate, a glass epoxy substrate, a glass substrate, a ceramic substrate, a silicon interposer, or a silicon substrate via an adhesive. The present invention relates to a method for manufacturing a semiconductor device.

  In electronic materials, thermosetting adhesives are often used when mounting various components such as semiconductor components such as semiconductor chips and modules on wiring boards, and die bonding films (DAF) and non-conductive films are often used. Known as (NCF).

  In recent years, flip chip mounting has been used as a method for mounting a semiconductor chip on a substrate. In flip-chip mounting, the state of the electrode surface to be joined becomes a problem in securing the electrical and mechanical connection reliability of the semiconductor device. When the electrode surface is in an inactive state covered with a metal oxide film, the electrical resistance increases, or in soldering, the wettability of the solder on the electrode surface deteriorates and the mechanical strength also decreases. Therefore, how to maintain the activated state of the electrode until just before mounting becomes a problem.

  In order to solve the above problems, a prior art having a device configuration in which an electrode on a substrate is transported and mounted in an inert gas atmosphere after activation has been developed (Patent Document 1). In this technique, since a plurality of processes are included in a single apparatus, the apparatus becomes complicated, and there is a problem that the apparatus introduction cost becomes expensive. Moreover, since each process cannot be separated, there is a possibility that inconvenience may occur in a mass production process.

  Immediately after the surface of each electrode on the substrate and the semiconductor chip is activated by removing the surface oxide film by plasma irradiation, both electrode surfaces are sealed with an adhesive film to maintain the activated state of the electrodes even in the atmosphere. Prior arts have been developed (Patent Document 2). In this technique, since it is necessary to perform adhesive coating treatment on both the substrate and the semiconductor chip, there is a problem that productivity is lowered.

JP 2003-303851 A JP 2003-234376 A

  However, in the prior art, when it takes a long time to join after activating the electrode surface to obtain a good electrical connection, the electronic component is kept in the atmosphere while maintaining the activated state of the electrode surface. It was difficult to store. Further, when an adhesive is coated on each electronic component to be joined, there is a problem that the mounting area increases due to the protruding adhesive after joining.

  In view of the above problems, the present invention can maintain the activation state of the electrode efficiently and simply, and further, can be stored in the atmosphere for a long time after the activation, and the good between the electronic component electrodes It is an object of the present invention to provide a semiconductor device having a connection and a mounting area smaller than that of the related art.

A method of manufacturing a semiconductor device for joining a protruding electrode on a semiconductor chip having solder at the tip and an electrode pad on a substrate having an oxide film formed on the surface,
(A) removing the oxide film formed on the electrode pad surface of the substrate;
(B) a step of covering the surface having the electrode pad of the substrate with an adhesive;
(C) after aligning the electrode pad of the substrate and the protruding electrode of the semiconductor chip, and contacting the electrode pad of the substrate and the protruding electrode of the semiconductor chip via the adhesive; and (D) the substrate And melting the solder between the semiconductor chip and having the step of joining the electrode pad and the protruding electrode in this order,
The semiconductor chip and the substrate are transported or stored in the atmosphere between the step (A) and the step (B) and / or between the step (B) and the step (C). A method for manufacturing a semiconductor device.

  According to the present invention, in order to maintain the activated state of the electrode until the electrode connection of the electronic component, it is possible to store it in the air, so that the electrode pad of the substrate and the protruding electrode of the semiconductor chip can be efficiently and easily performed. A semiconductor device having good electrical connection can be obtained.

It is a figure which shows the manufacturing method of the semiconductor device by this invention. (A) The figure which shows the initial state of a board | substrate (b) The figure which shows the state which is activating the electrode pad on a board | substrate (c) The figure which shows the storage form of a board | substrate (d) Position alignment with a flip chip bonder The figure which shows the state (e) The figure which shows the state by which the bump electrode of the semiconductor chip and the electrode pad on a board | substrate were joined It is a figure which shows one of the junction parts of the semiconductor device obtained by this invention. It is a figure which shows the positional relationship of the electrode pad on a board | substrate, a semiconductor chip, and a thermosetting adhesive film based on the Example of this invention. (A) Perspective view showing outline of arrangement of electrode pads and alignment mark on substrate (b) Perspective view showing relationship between bonding position of thermosetting adhesive film and semiconductor chip It is a figure which shows the state of the semiconductor chip which the thermosetting adhesive film based on the comparative example of this invention was laminated.

The method of manufacturing a semiconductor device according to the present invention includes a semiconductor that joins a protruding electrode on a semiconductor chip having solder at the tip and an electrode pad on a substrate having an oxide film formed on the surface. A device manufacturing method comprising:
(A) removing the oxide film formed on the electrode pad surface of the substrate;
(B) a step of covering the surface having the electrode pad of the substrate with an adhesive;
(C) after aligning the electrode pad of the substrate and the protruding electrode of the semiconductor chip, and contacting the electrode pad of the substrate and the protruding electrode of the semiconductor chip via the adhesive; and (D) the substrate And melting the solder between the semiconductor chip and having the step of joining the electrode pad and the protruding electrode in this order,
The semiconductor chip and the substrate are transported or stored in the atmosphere between the step (A) and the step (B) and / or between the step (B) and the step (C). A method for manufacturing a semiconductor device.

  Examples of the semiconductor chip used in the method for manufacturing a semiconductor device of the present invention include IC, LSI, transistor, diode and the like, and are not particularly limited. As a semiconductor chip material, a semiconductor such as silicon or germanium, or a compound semiconductor such as gallium arsenide, gallium phosphide, or indium phosphide can be used. As a method for connecting the semiconductor chip, a semiconductor chip having a flip chip or TSV structure and having a protruding electrode having solder at the tip is used.

  The material of the solder used in the present invention is not particularly limited, but lead-free solders such as SnAgCu-based, SnCu-based, SnAg-based, SnAgCuBi-based, SnZnBi-based, SnAgInBi-based are used from the viewpoint of influence on the human body and the environment. It is preferable. Furthermore, in order to deal with a narrow pitch bump, the solder bump is preferably formed on a metal pillar, particularly a copper pillar. A barrier metal layer for suppressing metal diffusion can also be provided between the solder and the metal pillar. Moreover, it is preferable that the shape of the solder is hemispherical from the viewpoint that the resin or filler is difficult to bite between the protruding electrode and the electrode pad.

  The heights of the protruding electrodes on the semiconductor chip are preferably all uniform, and the variation in the protruding electrode height is preferably 5 μm or less. If the variation is 5 μm or less, the semiconductor chip can be mounted without connection failure when the protruding electrode is crimped. In order to reduce the variation in the height of the protruding electrode, it is possible to perform grinding.

  As a substrate used in the method for manufacturing a semiconductor device of the present invention, a silicon substrate, a semiconductor chip or semiconductor wafer having a TSV structure, a silicon substrate such as a silicon interposer, a semiconductor substrate or ceramics, a compound semiconductor, an organic circuit substrate, Examples thereof include inorganic circuit boards, and those in which circuit constituent materials and passive elements are arranged on these boards. Examples of organic circuit boards include glass-based copper-clad laminates such as glass cloth / epoxy copper-clad laminates, composite copper-clad laminates such as glass nonwoven fabrics / epoxy copper-clad laminates, polyetherimide resin substrates, Examples include heat-resistant / thermoplastic substrates such as ether ketone resin substrates and polysulfone resin substrates, polyester copper-clad film substrates, and polyimide copper-clad film substrates. Examples of the inorganic circuit board include ceramic substrates such as an alumina substrate, an aluminum nitride substrate, and a silicon carbide substrate, and metal substrates such as an aluminum base substrate and an iron base substrate.

  Examples of circuit constituent materials include conductors containing metals such as silver, gold, copper, and aluminum, resistors containing inorganic oxides, low dielectrics and resins containing glass materials and / or resins, etc. And high dielectric materials containing high dielectric constant inorganic particles, insulators containing glass-based materials, and the like.

  The substrate used in the method for manufacturing a semiconductor device of the present invention has an electrode pad corresponding to the position of the protruding electrode of the semiconductor chip. The electrode pad may be flat or may be a so-called pillar-shaped (columnar) protrusion. Moreover, any of polygons, such as a circle, a rectangle, and an octagon, may be sufficient. There are no particular restrictions on the material of the electrode pad, and metals that can be generally used in semiconductor devices, such as aluminum, copper, titanium, tungsten, chromium, nickel, gold, solder, and alloys using them, can be used. These metals can also be laminated. Similarly to the protruding electrode, the electrode pad preferably has a height variation of 5 μm or less, and can be ground.

  The adhesive used in the present invention is preferably a thermosetting adhesive film having electrical insulation, but it may be composed of only an insulating resin, or other components are included in the insulating resin. It may be what is. A plurality of types of insulating resins may be mixed. As long as it is possible to maintain the state of covering the electrode pad surface on the substrate, the adhesive may be liquid or film-like, and the state is not particularly limited. As the insulating resin, a polyimide resin, an epoxy resin, an acrylic resin, a phenoxy resin, a polyethersulfone resin, or the like can be used, but is not limited thereto. You may further contain a hardening | curing agent, a hardening accelerator, etc. A well-known thing can be used as a hardening | curing agent and a hardening accelerator. The adhesive preferably contains an insulating inorganic filler from the viewpoint of insulating reliability and reliability with respect to temperature cycle. As the insulating inorganic filler, silica, silicon nitride, alumina, aluminum nitride, titanium oxide, titanium nitride, barium titanate, or the like can be used. Moreover, a crosslinking agent, surfactant, a dispersing agent, etc. may be contained in the adhesive if necessary. The adhesive preferably contains a thermosetting resin, a thermoplastic resin or a mixture thereof from the viewpoint of process efficiency.

  In the case of using a thermosetting adhesive film, for example, a resin composition disclosed in Japanese Patent Application Laid-Open No. 2004-319823, Japanese Patent Application Laid-Open No. 2008-94870, Japanese Patent No. 3995022, Japanese Patent Application Laid-Open No. 2009-262227, or the like is used. be able to.

Next, a method for manufacturing a semiconductor device of the present invention will be described. The method of manufacturing a semiconductor device according to the present invention includes a semiconductor that joins a protruding electrode on a semiconductor chip having solder at the tip and an electrode pad on a substrate having an oxide film formed on the surface. A device manufacturing method comprising:
(A) removing the oxide film formed on the electrode pad surface of the substrate;
(B) a step of covering the surface having the electrode pad of the substrate with an adhesive;
(C) after aligning the electrode pad of the substrate and the protruding electrode of the semiconductor chip, and contacting the electrode pad of the substrate and the protruding electrode of the semiconductor chip via the adhesive; and (D) the substrate And melting the solder between the semiconductor chip and having the step of joining the electrode pad and the protruding electrode in this order,
The semiconductor chip and the substrate are transported or stored in the atmosphere between the step (A) and the step (B) and / or between the step (B) and the step (C). A method for manufacturing a semiconductor device.

  In the step (A), the oxide film on the electrode pad surface shown in FIG. At this time, etching using a plasma of a gas such as flux, formic acid, acetic acid, acrylic acid, propionic acid, oxalic acid, or a gas such as argon, xenon, hydrogen, helium, etc. can be used. Not exclusively. Plasma etching is preferably used from the viewpoint of throughput and substrate drying. When the electrode pad is activated by plasma etching, the substrate installation location in the processing apparatus is cooled with cooling water or the like in order to suppress deformation and melting due to overheating during processing and formation of a metal oxide film when the atmosphere is released. Also good. In order to prevent voids from being taken into the adhesive by degassing from the substrate due to heating during mounting, a step of drying the substrate may be added before the step (A). In addition, since the organic matter adhering to the electrode surface also hinders good connection between the electronic components like the metal oxide film, ashing with oxygen plasma is performed before the step (A) for the purpose of removing this organic matter. May be. In plasma etching using an inert gas, it is difficult to increase the selectivity with respect to a portion other than the electrode to be etched depending on the selection of the material constituting the substrate. It is desirable not to perform processing longer than the processing time that can be sufficiently removed. The plasma etching processing time [sec] is calculated from the thickness [nm] of the target metal oxide film and the etching rate [nm / sec], and the thickness [nm] of the metal oxide film / etching rate [nm / sec]. ] × 1.2 is preferable. By one of the above processing conditions or a combination of a plurality of conditions, an electrode pad surface is not covered with an oxide film or the like, and a completely exposed substrate is obtained (FIG. 1B).

  While moving from the step (A) to the step (B), the substrate can be transported or stored in the atmosphere. The movement from the step (A) to the step (B) is preferably performed within 24 hours from the viewpoint of preventing re-formation of the oxide film.

  In the step (B), the adhesive to be used is preferably in the form of a film from the viewpoint of throughput. More preferably, it is a thermosetting adhesive film. Moreover, since a void is suppressed and an adhesive agent can be efficiently coated on a substrate, it is preferable to press laminate while heating the adhesive film in a vacuum using a vacuum laminator. The laminating temperature is preferably 60 ° C. or higher from the viewpoint of the ability to follow the unevenness of the bonded surface. Moreover, in order to prevent hardening of the adhesive film at the time of affixing, it is preferable that affixing temperature shall be 100 degrees C or less. In this temperature range, the dynamic viscosity of the thermosetting adhesive film is preferably 50 to 5000 Pa · s. When the dynamic viscosity of the thermosetting adhesive film is 50 Pa · s or more, it is easy to handle, and when it is 5000 Pa · s or less, the protruding electrode is easily embedded in the thermosetting adhesive film, and lamination at a low pressure. Is possible. The thickness of the thermosetting adhesive film to be laminated is preferably equal to or higher than the average height of the protruding electrodes. More preferably, it is not less than the average height of the protruding electrodes and not more than 1.5 times the thickness obtained by adding the average height of the protruding electrodes and the average height of the electrode pads on the substrate. Even more preferably, the thickness is equal to or greater than the average height of the protruding electrodes and equal to or less than the sum of the average height of the protruding electrodes and the average height of the electrode pads on the substrate. The height of the protruding electrode and the height of the electrode pad are obtained by measuring the shape of the surface of the semiconductor chip and the substrate, respectively, and measuring the peak value of the height with the lowest height as a reference (0 μm). be able to. The average height of the protruding electrodes and the average height of the electrode pads are the average values of all the protruding electrodes of the semiconductor chip and all the electrode pads on the substrate, respectively, for example, a confocal microscope (made by Lasertec Corporation, H1200). When the thickness of the thermosetting adhesive film is equal to or higher than the average height of the protruding electrodes, voids are unlikely to occur between the thermosetting adhesive film after bonding and the substrate, and the adhesive strength is reduced. And the impact on reliability is reduced. In addition, if the thickness of the thermosetting adhesive film is 1.5 times or less the sum of the average height of the protruding electrodes and the average height of the electrode pads on the substrate, not only is it excellent in economic efficiency, As the amount of protrusion of the thermosetting adhesive film decreases, the mounting area decreases, or the protruding thermosetting adhesive film wraps around the top of the semiconductor chip and contaminates the heat tool of the bonding device. Less sticking.

  As shown in FIG.1 (c), the board | substrate which passed through the said process (B) has coat | covered the electrode pad surface on a board | substrate completely with an adhesive agent, and can be conveyed or preserve | saved in air | atmosphere. At that time, a plastic film may be attached to the surface of the adhesive to protect the adhesive. The temperature at which the substrate subjected to the step (B) is stored is preferably 40 ° C. or lower, more preferably 10 ° C. or lower from the viewpoint that the storage stability of the adhesive is improved and the mounting connectivity is improved. Moreover, -60 degreeC or more is preferable from the point of the ease at the time of the handling after a preservation | save.

  In the step (C), a flip chip bonder is used (FIG. 1D). The flip chip bonder preferably has a heat tool on the pick-up surface of the semiconductor chip or the suction surface of the substrate in order to increase the efficiency of the transition to the step (D). The temperature of the heat tool when the protruding electrode of the semiconductor chip is brought into contact with the electrode of the substrate is lower than the melting point of the solder, the viscosity of the thermosetting adhesive film is lowered to increase the adhesiveness, and the semiconductor chip is fixed at a predetermined position. In order to prevent the curing of the thermosetting adhesive film, a temperature range of 60 to 180 ° C. and a time of 10 seconds or less are preferable. More preferably, it is 60-150 degreeC and 3 seconds or less. The pressure is preferably in the range of 0.01 to 0.5 MPa. If it is 0.01 MPa or more, as shown in FIG.1 (e), the objective of the said process (C) can fully be achieved, and if it is 0.5 MPa or less, a protruding electrode will not deform | transform greatly. Can be crimped. The step (C) may be performed under normal pressure, or may be performed in a vacuum in order to prevent entrapment of bubbles. Here, the temperature is a temperature in the thermosetting adhesive film, and can be obtained by connecting a thermocouple to a temperature recorder (NR100, manufactured by Keyence Corporation), for example.

  In the step (D), it is preferable to pressurize and heat using a heat tool mounted on the flip chip bonder. The heating temperature is higher than the melting point of the solder, and preferably 200 ° C. or higher. In order to suppress generation of voids due to degassing from the adhesive, the heating temperature is preferably 270 ° C. or lower. More preferably, it is 250 degrees C or less. What is the heat retention time in the heated state? Before curing the thermosetting adhesive film, the solder can be melted and wetted and spread on the electrode surface to increase the contact area of the electrode connection interface and obtain good mechanical strength and electrical connection. Since it is possible, it is preferable that the time required for temperature increase is 2 seconds or less. Since the distance between the protruding electrode of the semiconductor chip and the electrode pad of the substrate is controlled by the pressure at the time of melting the solder in the step (C) and the step (D), the step (C) and the step ( In D), the compression pressure may be arbitrarily set.

  In the method for manufacturing a semiconductor device of the present invention, additional curing may be performed after the above steps. The conditions for the additional curing can be arbitrarily set according to the characteristics of the thermosetting adhesive film to be used.

  Hereinafter, the present invention will be described with reference to examples and the like, but the present invention is not limited to these examples. The materials and evaluation methods used in Examples 1-2 and Comparative Examples 1-2 are shown below.

<Thermosetting adhesive film>
The following (a) polyimide, (b) epoxy resin, (c) curing accelerator, (e) insulating filler are mixed, and (d) the solvent is appropriately adjusted so that the coating film thickness becomes uniform. In addition, a thermosetting adhesive film was prepared by coating and drying on a release plastic film (polyethylene terephthalate film). (A), (b), (c), and (e) were mixed at a weight ratio of 25: 10: 25: 50. The thickness of the produced thermosetting adhesive film was 47 μm.

  (C) is a microcapsule type curing accelerator dispersed in an epoxy resin, and the weight ratio is microcapsule type curing accelerator / epoxy resin = 33/67. The proportion of c) is calculated based on the total amount of (c), and the epoxy resin in (c) is not included in the proportion of (b).

(A) Polyimide An organic solvent-soluble polyimide synthesized by the following process was used.

  First, 24.54 g (0.067 mol) of 2,2-bis (3-amino-4-hydroxyphenyl) hexafluoropropane and 1,3-bis (3-aminopropyl) tetramethyldisiloxane under a dry nitrogen stream 4.97 g (0.02 mol) and 2.18 g (0.02 mol) of 3-aminophenol as an end-capping agent were dissolved in 80 g of N-methyl-2-pyrrolidone (hereinafter referred to as NMP). . Here, 31.02 g (0.1 mol) of bis (3,4-dicarboxyphenyl) ether dianhydride was added together with 20 g of NMP, reacted at 20 ° C. for 1 hour, and then stirred at 50 ° C. for 4 hours. Thereafter, 15 g of xylene was added, and the mixture was stirred at 180 ° C. for 5 hours while water was azeotroped with xylene. After the stirring was completed, the solution was poured into 3 L of water to obtain a white precipitated polymer. The precipitate was collected by filtration, washed with water three times, and then dried at 80 ° C. for 20 hours using a vacuum dryer.

(B) Epoxy resin A solid epoxy compound (Japan Epoxy Resin Co., Ltd., Epicoat 157S70) was used.

(C) Curing accelerator A microcapsule-type curing accelerator (manufactured by Asahi Kasei Chemicals Corporation, NovaCure HX-3941HP) was used.

(D) Solvent Methyl ethyl ketone / toluene = 4/1 (weight ratio) was used.

(E) Insulating inorganic filler SO-E2 (trade name, manufactured by Admatechs Co., Ltd., spherical silica particles, average particle size 0.5 μm) was used.

<Mountability evaluation>
At the connection part where the protruding electrode of the semiconductor chip and the electrode pad of the substrate were connected via solder, the contact area evaluation of the solder and the electrode pad and the evaluation of the amount of generated intermetallic compound were performed.

  A semiconductor device obtained after mounting is embedded in an epoxy resin using a cylindrical mold having a diameter of 3 cm, and then polished so that a cross section that is perpendicular to the semiconductor chip and passes through the center of the connection portion is formed. Formed.

  The contact area evaluation and the evaluation of the amount of intermetallic compound production were performed on 20 connection sites corresponding to the following conditions using an optical microscope. In the target connection part, the solder at the tip of the protruding electrode is in contact with the corresponding electrode pad that is aligned, the deviation of each center line is within 3 μm, and the distance between the protruding electrode and the tip of the electrode pad is 20 points randomly selected from within 4 μm.

  In the contact area evaluation, the ratio between the length of the contact between the electrode pad of the substrate and the solder and the width of the protruding electrode in the connection portion (FIG. 2) to be evaluated in the obtained cross section (the electrode pad of the substrate) The case where the length of the contacted solder / the width of the bump electrode) is 0.9 or more is 18 or more, and the case where it is less than 18 is x.

  In the intermetallic compound evaluation, the length of the intermetallic compound generated at the interface in the side where the electrode pad of the substrate is in contact with the solder in the connection portion (FIG. 2) to be evaluated in the obtained cross section. When the ratio of the length (the length at which the intermetallic compound is formed at the interface / the length of the side where the electrode pad of the substrate is in contact with the solder) is 0.9 or more is 18 or more, 18 When it was less than a place, it was set as x.

The mounting area was evaluated based on the volume (discharge volume) of the thermosetting adhesive film that existed immediately below the semiconductor chip before bonding and was discharged from the end of the semiconductor chip by bonding. FIG. 3 shows the relationship between the substrate and electrodes (FIG. 3A) before adhesive coating, the lamination position of the thermosetting adhesive film, the bonding position of the semiconductor chip, and the thermosetting adhesive film is discharged by bonding. It is the figure which showed the area | region (FIG.3 (b)) just under a semiconductor chip. The discharge volume [mm ³ ] is determined by the area [mm ² ] of the semiconductor chip × (the thickness of the thermosetting adhesive film [mm] −the distance between the semiconductor chip after mounting and the surface of the substrate [mm]). A sample having a volume of less than 1.5 mm ³ was evaluated as ◯, and a sample having a volume of 1.5 mm ³ or more was evaluated as ×.

Example 1
<Semiconductor chip structure>
The protruding electrode of the peripheral part to be observed on the used semiconductor chip (CC80-0101JY manufactured by Waltz Co., Ltd.) has a square columnar Cu pillar with a height of 38 μm and a height of 30 μm and a hemispherical SnAg solder with a height of 15 μm. .

  The chip size is 7.3 mm × 7.3 mm, and the chip thickness is 100 μm.

<Substrate structure>
The electrode pad of the peripheral part to be observed on the substrate used (CC80-0102JY manufactured by Waltz Co., Ltd.) has a solid Cu wiring having a width of 32 μm and a height of 15 μm.

  The substrate size is 17.0 mm × 17.0 mm, and the substrate thickness is 356 μm.

<Removal of oxide film formed on electrode pad surface>
A plasma generator (manufactured by Hitachi High-Tech Instruments, SPC-100B) was used for removing the oxide film. The processing conditions were etching for 60 seconds with plasma generated by an Ar (argon) flow rate of 20 sccm, an output of 600 W, and a chamber pressure of 15 Pa.

<Adhesive coating>
A vacuum laminator (manufactured by Nichigo Morton Co., Ltd., CVP300T) was used for covering the electrode pad with the thermosetting adhesive film. Lamination was performed by avoiding alignment marks on the substrate and placing a thermosetting adhesive film at a position where all the electrodes could be covered. Lamination conditions were a temperature of 90 ° C., a chamber pressure of 2.0 Pa, and a lamination pressure of 0.4 MPa.

<Conveyance and storage conditions>
When moving from the removal step (A) of the oxide film formed on the electrode pad surface to the coating step (B) of the adhesive, it took 1 hour in the atmosphere at 23 ° C.

  From the adhesive coating step (B) to the bonding step (C) described below, storage was performed in the atmosphere at 23 ° C. for 4 days. Moreover, it dried for 1 hour at 80 degreeC just before moving to the following process (C).

<Bonding>
In the used flip chip bonder (FC3000WS, manufactured by Toray Engineering Co., Ltd.), first, a substrate covered with a thermosetting adhesive film on a stage maintained at 80 ° C. is installed with the surface having the electrode pad as the upper side. The opposite surface was vacuum-adsorbed. Next, the semiconductor chip stored in the chip tray was picked up by a pickup tool, and the surface of the chip was inverted. Next, a heat tool set at 50 ° C. vacuum-sucks the surface of one semiconductor chip that does not have a protruding electrode, and transports it to above the substrate placed on a stage maintained at 80 ° C. Next, the alignment recognition camera entered between the semiconductor chip and the substrate so that the protruding electrode of the semiconductor chip and the electrode pad on the substrate overlapped with each other, and each alignment mark was detected.

After the alignment mark was detected, bonding was performed under the following conditions.
Temperature: 150 ° C., 0.5 seconds → 250 ° C., 20 seconds Pressure: 70N
The surface temperature of the attachment of the heat tool used for mounting was calibrated in advance using a temperature recorder (manufactured by Keyence Corporation, NR100) and a K thermocouple.

<Mountability evaluation>
The contact area evaluation, intermetallic compound evaluation, and mounting area evaluation were all “good”. The results are shown in Table 1.

Example 2
The storage conditions, which were 4 days in the atmosphere at 23 ° C. in Example 1 until moving from the process (B) to the process (C), were 21 days in the atmosphere at 5 ° C. in Example 2. Evaluation was performed in the same manner as in Example 1 except for the storage conditions.

  The contact area evaluation, intermetallic compound evaluation, and mounting area evaluation were all “good”. The results are shown in Table 1.

Comparative Example 1
First, as a substrate pretreatment, the substrate was heated at 180 ° C. for 30 minutes, and the step (A) was not performed, so that an oxide film was reliably formed on the electrode surface of the substrate. The storage conditions from the process (B) to the process (C) were 1 hour in the atmosphere at 23 ° C. Evaluation was performed in the same manner as in Example 1 except for the above changes.

  Both contact area evaluation and intermetallic compound evaluation were x. The evaluation of the mounting area was ○. The results are shown in Table 1.

Comparative Example 2
A semiconductor chip prepared by laminating a thermosetting resin film similar to that used in Example 1 on a surface having a protruding electrode using a vacuum laminator was prepared (FIG. 4). At this time, the lamination conditions were a temperature of 90 ° C., a chamber pressure of 2.0 Pa, and a lamination pressure of 0.4 MPa. Evaluation was performed in the same manner as in Example 1 except for the above-described changes. The contact area evaluation and the intermetallic compound evaluation were both good. The mounting area evaluation was x. The results are shown in Table 1.

DESCRIPTION OF SYMBOLS 1 Substrate 2 Electrode pad 3 Metal oxide film 4 Etchant 5 Thermosetting adhesive film 6 Semiconductor chip 7 Projection electrode 8 Solder 9 Heat tool 10 Stage 11 Intermetallic compound 12 Alignment mark

Claims (4)

A method of manufacturing a semiconductor device for joining a protruding electrode on a semiconductor chip having solder at the tip and an electrode pad on a substrate having an oxide film formed on the surface,
(A) removing the oxide film formed on the electrode pad surface of the substrate;
(B) a step of covering the surface having the electrode pad of the substrate with an adhesive;
(C) after aligning the electrode pad of the substrate and the protruding electrode of the semiconductor chip, and contacting the electrode pad of the substrate and the protruding electrode of the semiconductor chip via the adhesive; and (D) the substrate And melting the solder between the semiconductor chip and having the step of joining the electrode pad and the protruding electrode in this order,
The semiconductor chip and the substrate are transported or stored in the atmosphere between the step (A) and the step (B) and / or between the step (B) and the step (C). A method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor chip and the substrate are stored at −60 to 10 ° C. between the step (B) and the step (C). 3. The method of manufacturing a semiconductor device according to claim 1, wherein in the step (D), the electrode pad and the protruding electrode are joined by pressing and heating with a heat tool. The method for manufacturing a semiconductor device according to claim 1, wherein the adhesive is a thermosetting adhesive film having electrical insulation.

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