JP2013214616A - Solid-state imaging device, method of manufacturing solid-state imaging device, and electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve light receiving characteristics in a solid-state imaging device of a 3D structure in which a sensor substrate with a photoelectric conversion part and a circuit substrate with a driving circuit are laminated; to provide a method of manufacturing the solid-state imaging device; and to provide an electronic device using the solid-state imaging device.SOLUTION: A connection part 50 electrically connecting a sensor substrate 2 to a circuit substrate 9 is provided on the side of a light receiving surface S of the semiconductor substrate 2. An insulating layer 14 covering the connection part 50 is made thin at least in a pixel region 4. A cross-sectional shape of a step part 38 of the insulating layer 14 or a planar shape of a convex portion of the insulating layer 14 formed by the step part 38 is designed to reduce fluid pressure of an organic material applied on the insulating layer 14.

Description

  The present technology relates to a solid-state imaging device, a manufacturing method of the solid-state imaging device, and an electronic device, and in particular, a solid-state imaging device in which a drive circuit is provided on the surface side opposite to a light-receiving surface of a semiconductor substrate, The present invention relates to a manufacturing method and an electronic apparatus using the solid-state imaging device.

  Conventionally, in a solid-state imaging device, a technique for shortening the distance between a light incident surface and a light receiving portion formed on a substrate has been proposed in order to improve sensitivity. In the invention described in Patent Document 1, in the surface irradiation type solid-state imaging device in which the wiring layer is provided on the light incident surface side of the substrate, the thickness of the wiring layer in the upper part of the imaging region is set to the periphery formed around the imaging region. A technique for making the wiring layer thinner than the wiring layer above the circuit portion is described. In Patent Document 1, since the wiring layer at the upper part of the imaging region is thinner than the wiring layer at the upper part of the peripheral circuit unit, the distance from the light incident surface to the light receiving unit provided in the imaging region of the substrate is shortened. Improvements are being made.

  In recent years, a so-called back-illuminated solid-state imaging device has been proposed in which a drive circuit is formed on the front side of a semiconductor substrate and the back side is a light-receiving surface for the purpose of improving photoelectric conversion efficiency and sensitivity to incident light. Has been. In the back-illuminated solid-state imaging device, since the wiring layer is provided on the opposite side of the light receiving surface of the substrate, the distance between the light receiving portion provided on the substrate and the surface of the on-chip lens provided on the light incident side of the substrate As a result, the sensitivity is improved.

  In addition to the semiconductor substrate (sensor substrate) on which the photoelectric conversion unit is formed, a circuit substrate on which a drive circuit is formed is prepared, and the circuit substrate is bonded to the surface opposite to the light receiving surface of the semiconductor substrate. A back-illuminated solid-state imaging device having a three-dimensional structure has also been proposed (Patent Document 2). In this back-illuminated solid-state imaging device having a three-dimensional structure, a three-dimensional structure is configured by connecting a wiring layer side surface of a semiconductor substrate and a wiring layer side surface of a circuit board.

  By the way, in such a solid-state imaging device having a three-dimensional structure, a connection unit is provided for electrically connecting the semiconductor substrate on which the photoelectric conversion unit is formed and the circuit substrate on which the drive circuit is formed. In the connecting portion, a through via that penetrates the semiconductor substrate and connects to the wiring layer provided on the semiconductor substrate, and a through via that penetrates the semiconductor substrate and connects to the wiring layer provided on the circuit board are provided on the semiconductor substrate. Are connected by a connection electrode of the connection portion on the light receiving surface side. Further, an insulating film and a protective film covering the connection electrode are provided on the light receiving surface side of the semiconductor substrate, and a color filter and an on-chip lens are provided on the upper portion corresponding to each photoelectric conversion unit.

JP 2010-267675 A JP 2011-096851 A

  As described above, in the solid-state imaging device having a three-dimensional structure, the connection electrodes that electrically connect the sensor substrate having the photoelectric conversion unit and the circuit substrate and various material films are provided on the light receiving surface side of the semiconductor substrate. For this reason, the distance from the light receiving surface of the sensor substrate to the on-chip lens is large, and the light receiving characteristics in the photoelectric conversion unit may be deteriorated.

  In view of the above, an object of the present disclosure is to improve light receiving characteristics in a solid-state imaging device having a three-dimensional structure in which a sensor substrate having a photoelectric conversion unit and a circuit substrate having a driving circuit are stacked. The present disclosure also provides a method for manufacturing the solid-state imaging device. Furthermore, this indication provides the electronic device using the solid-state imaging device.

  The solid-state imaging device according to the first aspect of the present disclosure includes a sensor substrate, a circuit board, a connection unit region, and an insulating layer. The sensor substrate includes a sensor side semiconductor layer including a pixel region in which the photoelectric conversion unit is provided, and a sensor side wiring layer provided on the surface side opposite to the light receiving surface of the sensor side semiconductor layer. The circuit board has a circuit side semiconductor layer and a circuit side wiring layer, and is provided on the sensor side wiring layer side of the sensor board. The connection unit region includes a first through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer, and a first through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer. 2 through electrodes. The connection unit region has a connection electrode that is provided on the light receiving surface side surface of the sensor-side semiconductor layer and connects the first through electrode and the second through electrode. The first through electrode, the second through electrode, and the connection electrode constitute a connection portion. The insulating layer has a step portion formed by embedding the connection electrode and gradually decreasing in thickness from the connection unit region to the pixel region.

  In the solid-state imaging device according to the first aspect described above, the insulating layer has a step portion formed by gradually decreasing the film thickness from the connection unit region to the pixel region. For this reason, when apply | coating an organic material on an insulating layer upper part, the fluid pressure of the organic material concerning the level | step-difference part of an insulating layer is reduced. Thereby, the application | coating nonuniformity of an organic material is suppressed.

  The solid-state imaging device according to the second aspect of the present disclosure includes a sensor substrate, a circuit board, a connection unit region, and an insulating layer. The sensor substrate includes a sensor side semiconductor layer including a pixel region in which the photoelectric conversion unit is provided, and a sensor side wiring layer provided on the surface side opposite to the light receiving surface of the sensor side semiconductor layer. The circuit board has a circuit side semiconductor layer and a circuit side wiring layer, and is provided on the sensor side wiring layer side of the sensor board. The connection unit region includes a first through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer, and a first through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer. 2 through electrodes. The connection unit region has a connection electrode that is provided on the light receiving surface side surface of the sensor-side semiconductor layer and connects the first through electrode and the second through electrode. The first through electrode, the second through electrode, and the connection electrode constitute a connection portion. The insulating layer is formed so that the connection electrode is buried and the thickness of the region adjacent to the connection unit region is thinner than the thickness in the connection unit region. The insulating layer has a convex portion with a convex cross section in the region including the connection unit region, and the planar shape of the convex portion is a rounded rectangular shape extending in a direction along the corresponding side of the pixel region. . Here, the rounded rectangular shape refers to a rectangular shape in which both ends in the major axis direction are arc-shaped, elliptical arc-shaped, polygonal shape greater than or equal to a triangle, and arc-shaped.

  In the solid-state imaging device according to the second aspect of the present disclosure, the insulating layer has a convex portion having a convex cross-sectional shape in a region including the connection unit region, and the planar shape of the convex portion corresponds to a corresponding side of the pixel region. Is a rounded rectangular shape extending in the direction along For this reason, when an organic material is applied to the upper part of the insulating layer, the fluid pressure of the organic material applied to both ends in the direction along the side of the pixel area of the convex portion is reduced. Thereby, the application | coating nonuniformity of an organic material is suppressed.

  The manufacturing method of the solid-state imaging device according to the first aspect of the present disclosure includes a step of bonding the sensor substrate and the circuit substrate. The sensor substrate has a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion unit is provided, and a sensor-side wiring layer provided on the surface side opposite to the light receiving surface of the sensor-side semiconductor layer. . The circuit board has a circuit side semiconductor layer and a circuit side wiring layer. The sensor substrate and the circuit board are bonded together with the surface of the sensor side wiring layer facing the surface of the circuit side wiring layer. Moreover, it has the process of forming the connection part which has a 1st penetration electrode, a 2nd penetration electrode, and the connection electrode which connects a 1st penetration electrode and a 2nd penetration electrode. The first through electrode is provided in the connection unit region outside the pixel region from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer. The second through electrode is provided to reach the circuit side wiring layer from the light receiving surface side of the sensor side semiconductor layer. The connection electrode is provided on the light receiving surface side surface of the sensor side semiconductor layer. In addition, the method includes a step of forming an insulating layer for embedding the connection portion on the light receiving surface side of the sensor side semiconductor layer. In addition, the method includes a step of etching the insulating layer to a predetermined depth so that the film thickness gradually decreases from the connection unit region to the pixel region.

  The manufacturing method of the solid-state imaging device according to the second aspect of the present disclosure includes a step of bonding the sensor substrate and the circuit substrate. The sensor substrate has a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion unit is provided, and a sensor-side wiring layer provided on the surface side opposite to the light receiving surface of the sensor-side semiconductor layer. . The circuit board has a circuit side semiconductor layer and a circuit side wiring layer. The sensor substrate and the circuit board are bonded together with the surface of the sensor side wiring layer facing the surface of the circuit side wiring layer. Moreover, it has the process of forming the connection part which has a 1st penetration electrode, a 2nd penetration electrode, and the connection electrode which connects a 1st penetration electrode and a 2nd penetration electrode. The first through electrode is provided in the connection unit region outside the pixel region from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer. The second through electrode is provided to reach the circuit side wiring layer from the light receiving surface side of the sensor side semiconductor layer. The connection electrode is provided on the light receiving surface side surface of the sensor side semiconductor layer. In addition, the method includes a step of forming an insulating layer for embedding the connection portion on the light receiving surface side of the sensor side semiconductor layer. In addition, by etching the insulating layer to a predetermined depth in the region outside the connection unit region, a convex portion whose planar shape is an arc shape or a substantially arc-shaped rounded rectangular shape at both ends in the direction along the side of the pixel region is formed. Forming.

  An electronic apparatus according to the present disclosure includes the above-described solid-state imaging device and a signal processing circuit that processes an output signal output from the solid-state imaging device.

  According to the present disclosure, the light receiving characteristics can be improved in the solid-state imaging device. Further, by using this solid-state imaging device, an electronic device with improved image quality can be obtained.

1 is a schematic configuration diagram illustrating an entire CMOS (Complementary Metal Oxide Semiconductor) type solid-state imaging device according to a first embodiment of the present disclosure. It is a cross-sectional block diagram which follows the AA line of FIG. 3A to 3C are process diagrams (part 1) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment of the present disclosure. 4A to 4C are process diagrams (part 2) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment of the present disclosure. 5A to 5C are process diagrams (part 3) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment of the present disclosure. 6A to 6C are process diagrams (part 4) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment of the present disclosure. It is a schematic block diagram of the sensor board | substrate of the solid-state imaging device which concerns on the modification 1-1. It is a schematic block diagram of the sensor board | substrate of the solid-state imaging device which concerns on modification 1-2. It is a block diagram of the sensor board | substrate of the solid-state imaging device which concerns on 2nd Embodiment of this indication. It is a cross-sectional block diagram which follows the BB line of FIG. FIG. 11A is a schematic configuration diagram of a sensor substrate of a solid-state imaging device according to the third embodiment of the present disclosure, and FIG. 11B is an enlarged view of a region a in FIG. 11A. In the 2nd Embodiment of this indication, it is a figure which shows typically the result of having simulated the mode that an organic material flows when an organic material was apply | coated to the upper part of an insulating layer. The figure which shows typically the result of having simulated the flow state of the organic material when the organic material was apply | coated to the upper part of an insulating layer in the example (for example, 2nd Embodiment) which made the planar shape of the convex part of the insulating layer rectangular. It is. 14A is a schematic configuration diagram of a sensor substrate of a solid-state imaging device according to Modification 3-1, and FIG. 14B is an enlarged view of a region a in FIG. 14A. It is a figure which shows typically the result of having simulated the mode that an organic material flows when an organic material was applied to the upper part of an insulating layer which has the structure of modification 3-1. It is a schematic block diagram of the sensor board | substrate of the solid-state imaging device which concerns on modification 3-2. It is a schematic block diagram of the electronic device which concerns on 4th Embodiment of this indication.

Hereinafter, an example of a solid-state imaging device, a manufacturing method thereof, and an electronic apparatus according to an embodiment of the present disclosure will be described with reference to FIGS. Embodiments of the present disclosure will be described in the following order. Note that the present disclosure is not limited to the following examples.
1. 1. First embodiment: Solid-state imaging device 1-1. Configuration of entire solid-state imaging device 1-2. Configuration of main part 1-3. Manufacturing method 2. 2. Second embodiment: solid-state imaging device Third Embodiment: Solid-state imaging device4. Fourth embodiment: electronic device

<< 1. First Embodiment: Solid-State Imaging Device >>
<1-1 Overall Configuration of Solid-State Imaging Device>
FIG. 1 is a schematic configuration diagram illustrating an entire CMOS solid-state imaging device according to the first embodiment of the present disclosure. The solid-state imaging device 1 according to this embodiment includes a sensor substrate 2 on which a plurality of photoelectric conversion units are arranged, and a circuit board 9 that is laminated on the sensor substrate 2 and bonded to the sensor substrate 2. This is a back-illuminated solid-state imaging device having a structure.

  The sensor substrate 2 includes a pixel region 4 in which one surface is a light receiving surface S and a plurality of pixels 15 including a photoelectric conversion unit are two-dimensionally arranged in the light receiving surface S. In the pixel region 4, a plurality of pixel drive lines 5 are wired in the row direction, a plurality of vertical signal lines 6 are wired in the column direction, and one pixel 15 is connected to the pixel drive line 5 and the vertical signal line 6. It is arranged in a connected state. Each of these pixels 15 is provided with a photoelectric conversion unit, a charge storage unit, and a pixel circuit composed of a plurality of transistors (so-called MOS transistors) and a capacitor element. A part of the pixel circuit is provided on the surface side opposite to the light receiving surface S of the sensor substrate 2. A plurality of pixels 15 may share part of the pixel circuit.

  The sensor substrate 2 includes a peripheral region 7 outside the pixel region 4. A connection unit area 3 is provided in the peripheral area 7. The connection unit region 3 includes a plurality of connection portions (described later) that connect the pixel drive lines 5, the vertical signal lines 6, or the pixel circuits provided on the sensor substrate 2 and the drive circuits provided on the circuit substrate 9. Have. In the present embodiment, the connection unit region 3 is provided for each side corresponding to the three sides of the pixel region 4 partitioned in the rectangular shape in the peripheral region 7 of the pixel region 4, and corresponds to the pixel region 4. It is arranged along the side. Further, a step portion 38 of an insulating layer to be described later is formed at a boundary portion between the connection unit region 3 and the pixel region 4 (see FIG. 2).

  The circuit board 9 has a vertical driving circuit 10, a column signal processing circuit 11, a horizontal driving circuit 12, and a system control circuit for driving each pixel 15 provided on the sensor board 2 on the side facing the sensor board 2. 13 and the like are provided. These drive circuits are connected to desired wiring of the sensor substrate 2 in the connection unit.

  Based on the vertical synchronization signal, horizontal synchronization signal, and master clock, the system control circuit 13 generates a clock signal, a control signal, and the like that are the reference for operations of the vertical drive circuit 10, the column signal processing circuit 11, the horizontal drive circuit 12, and the like. Generate. The clock signal and control signal generated by the system control circuit 13 are input to the vertical drive circuit 10, the column signal processing circuit 11, the horizontal drive circuit 12, and the like.

  The vertical drive circuit 10 is configured by, for example, a shift register, and selectively scans each pixel 15 in the pixel region 4 provided on the sensor substrate 2 via the pixel drive line 5 sequentially in the vertical direction in units of rows. Then, a pixel signal based on the signal charge generated according to the amount of received light in the photoelectric conversion unit (photodiode) of each pixel 15 is supplied to the column signal processing circuit 11 through the vertical signal line 6.

  The column signal processing circuit 11 includes a plurality of unit circuits that perform signal processing for each vertical signal line 6. The column signal processing circuit 11 performs predetermined signal processing on the pixel signals output from the respective pixels 15 in the selected row via the vertical signal lines 6 for every 15 columns of the pixels in the pixel region 4 of the sensor substrate 2. The pixel signal after the signal processing is temporarily held.

  Specifically, the column signal processing circuit 11 performs at least noise removal processing such as CDS (Correlated Double Sampling) processing as signal processing. The CDS process in the column signal processing circuit 11 can remove, for example, fixed pattern noise unique to a pixel caused by reset noise, variation in threshold values of amplification transistors, and the like.

  The horizontal drive circuit 12 is constituted by, for example, a shift register, and sequentially selects the unit circuits of the column signal processing circuit 11 by sequentially outputting horizontal scanning pulses, and from each unit circuit of the column signal processing circuit 11. A pixel signal is output. The output pixel signal is subjected to signal processing by a signal processing unit (not shown), and the processed signal is output.

  Although not shown, a plurality of electrode pads are provided in a region further outside the connection unit region 3 provided in the peripheral region 7. The electrode pads are electrically connected to desired wiring provided on the sensor substrate 2 or wiring provided on the circuit board 9. With this electrode pad, the respective wirings of the sensor substrate 2 and the circuit substrate 9 are drawn out to the light receiving surface side of the sensor substrate 2.

  In this embodiment, the vertical drive circuit 10, the column signal processing circuit 11, and the horizontal drive circuit 12 are provided on the circuit board 9 side. However, these circuits are provided on the sensor board 2 side, and the circuit board 9 side is provided. Alternatively, only the system control circuit 13 may be provided. That is, various selections can be made as to which circuit portion is formed on the circuit board 9 side.

<1-2 Main part configuration>
FIG. 2 shows a cross-sectional configuration along the line AA in FIG. That is, FIG. 2 is a cross-sectional view of a region including the pixel region 4 and the connection unit region 3. Hereinafter, the configuration of the solid-state imaging device 1 of the present embodiment will be described based on the cross-sectional view of the main part.

  The solid-state imaging device 1 according to the present embodiment includes a sensor board 2, a circuit board 9 bonded to the opposite side of the light receiving surface S of the sensor board 2, and a connection unit that electrically connects the sensor board 2 and the circuit board 9. 50. In addition, the solid-state imaging device 1 of the present embodiment includes an insulating layer 14 having a stepped portion 38 provided on the light receiving surface S side of the sensor substrate 2, a light shielding film 16 provided in order on the insulating layer 14, and a transparent protective film. 17, a color filter 18 and an on-chip lens 19.

[Sensor board]
The sensor substrate 2 includes a sensor side semiconductor layer 2a and a sensor side wiring layer 2b.

  The sensor side semiconductor layer 2a is formed by thinning a semiconductor substrate made of, for example, single crystal silicon. In the pixel region 4 in the sensor-side semiconductor layer 2a, a plurality of photoelectric conversion units 20 are arranged in a two-dimensional array along the light receiving surface S (the back surface in the present embodiment). Each photoelectric conversion unit 20 has a stacked structure of, for example, an n-type diffusion layer and a p-type diffusion layer. Note that the photoelectric conversion unit 20 is provided for each pixel 15, and FIG. 2 shows a cross section for one pixel.

  In the sensor-side semiconductor layer 2a, the floating diffusion region FD made of an n + type impurity layer, the source / drain region 21 of the pixel transistor Tr, and each pixel 15 are separated on the surface opposite to the light receiving surface S. An element isolation unit 22 is provided. Further, in the connection unit region 3 outside the pixel region 4 in the sensor-side semiconductor layer 2a, a first through electrode 47 and a second through electrode 48 that form the connection unit 50 are provided.

  The sensor-side wiring layer 2b includes a gate electrode 25 provided on the surface of the sensor-side semiconductor layer 2a via a gate insulating film (not shown), and a plurality of layers stacked on the gate electrode 25 via an interlayer insulating film 26. Wiring (27 in FIG. 2). The wiring 27 is made of, for example, copper (Cu). Further, as necessary, the wirings 27 to be stacked and the wirings 27 and the pixel transistors Tr are connected to each other through vias provided in the interlayer insulating film 26. A pixel circuit for reading the signal charge of each pixel 15 is configured by the pixel transistor Tr and the wiring 27 provided in the sensor side wiring layer 2b.

  An insulating protective film 45 that covers the uppermost layer wiring 27 (the wiring 27 located closest to the circuit board 9) is provided on the surface of the sensor side wiring layer 2b opposite to the sensor side substrate 2a. ing. The surface of the protective film 45 becomes a bonding surface between the sensor substrate 2 and the circuit substrate 9.

[Circuit board]
The circuit board 9 includes a circuit side semiconductor layer 9a and a circuit side wiring layer 9b.

  The circuit-side semiconductor layer 9a is obtained by thinning a semiconductor substrate made of, for example, single crystal silicon. On the surface layer of the circuit side semiconductor layer 9a facing the sensor substrate 2, a source / drain region 31 of the transistor Tr, an element isolation portion 32, and an impurity layer not shown here are provided.

  The circuit side wiring layer 9b includes a gate electrode 35 provided on the surface of the circuit side semiconductor layer 9a via a gate insulating film (not shown), and a plurality of layers laminated on the gate electrode 35 via an interlayer insulating film 36. (Three layers in FIG. 2). The wiring 37 is made of, for example, copper (Cu). If necessary, the wirings 37 to be stacked and the wirings 37 and the transistors Tr are connected to each other through vias provided in the interlayer insulating film 36. A drive circuit is configured by the transistor Tr and the wiring 37 provided in the circuit-side wiring layer 9b. In addition, in the connection unit region 3 of the circuit side wiring layer 9b, a part of the second through electrode 48 constituting the connection portion 50 described later is provided.

  Further, an insulating protective film 46 that covers the uppermost wiring 37 (wiring 37 positioned closest to the sensor substrate 2) is provided on the surface of the circuit side wiring layer 9b opposite to the circuit side substrate 9a. ing. The surface of the protective film 46 becomes a bonding surface between the sensor substrate 2 and the circuit board 9.

[Insulation layer]
The insulating layer 14 is provided on the light-receiving surface S of the sensor-side semiconductor layer 2a, and is formed so as to embed the connection portion 50 on the light-receiving surface S side of the sensor-side semiconductor layer 2a. In addition, the insulating layer 14 has a step portion 38 whose film thickness gradually decreases from the connection unit region 3 to the pixel region 4. In the present embodiment, the insulating layer 14 is formed such that the film thickness continuously decreases from the connection unit region 3 to the pixel region 4, and the stepped portion 38 has an inclined surface with a constant inclination angle (tapered shape). Is formed.

  Such an insulating layer 14 is configured by laminating a plurality of films using different insulating materials, for example. In the present embodiment, the insulating layer 14 is formed of an antireflection film 40, an interface state suppressing film 41, an etching stop film 42, an upper insulating film 43, and a cap film 44 formed in this order from the light receiving surface S side of the sensor substrate 2. It is comprised by the laminated film which consists of layers.

The antireflection film 40 is formed of an insulating material having a higher refractive index than silicon oxide, such as hafnium oxide (HfO ₂ ), tantalum oxide (Ta ₂ O ₅ ), or silicon nitride. The interface state suppression film 41 is made of, for example, silicon oxide (SiO ₂ ). The etching stop film 42 is formed of a material that has a low etching selectivity with respect to the material constituting the upper upper insulating film 43, and is formed of, for example, silicon nitride (SiN). The upper insulating film 43 is made of, for example, silicon oxide (SiO ₂ ). The cap film 44 is made of, for example, silicon carbonitride (SiCN) or silicon nitride (SiN).

  In the insulating layer 14 composed of the laminated film including the five layers as described above, the step portion 38 is formed in the pixel region 4 by removing the cap film 44, the upper insulating film 43, and the etching stop film 42. ing. That is, in the peripheral region 7 including the connection unit region 3, the insulating layer 14 has a five-layer structure, and in the pixel region 4, the insulating layer 14 has a two-layer structure.

[Connection]
The connection unit 50 includes a first through electrode 47, a second through electrode 48, and a connection electrode 49. Further, a plurality of connection portions 50 are provided for each connection unit region 3 shown in FIG.

  The first through electrode 47 is provided so as to penetrate the sensor-side semiconductor layer 2a from the insulating layer 14 and reach the lowermost wiring 27 (the wiring 27 located closest to the sensor-side semiconductor layer 2a) of the sensor-side wiring layer 2b. It has been. The first through electrode 47 is formed in the first through hole 47a provided so that the lowermost wiring 27 of the sensor side wiring layer 2b is exposed from the light receiving surface S of the sensor side semiconductor layer 2a. It is formed of a conductive material embedded through a metal film 29.

  The second through electrode 48 is provided in a region adjacent to the first through electrode 47, penetrates the sensor side semiconductor layer 2a and the sensor side wiring layer 2b from the insulating layer 14, and is the uppermost layer of the circuit side wiring layer 9b. It is provided so as to reach the wiring 37 (wiring 37 farthest from the circuit side semiconductor layer 9a). The second through electrode 48 has an isolation insulating film 28 and a barrier metal in a second through hole 48a provided so that the uppermost wiring 37 of the circuit side wiring layer 9b is exposed from the light receiving surface S of the sensor side semiconductor layer 2a. The conductive material is embedded through the film 29.

  The connection electrode 49 is provided so as to electrically connect the first through electrode 47 and the second through electrode 48 in the insulating layer 14 provided on the light receiving surface S side of the sensor side semiconductor layer 2a. The connection electrode 49 is formed of a conductive material embedded in the connection hole 49a that connects the first through hole 47a and the second through hole 48a.

  As the conductive material constituting the first through electrode 47, the second through electrode 48, and the connection electrode 49, copper (Cu), aluminum (Al), tungsten (W), or the like can be used. In the present embodiment, copper (Cu) is used as a conductive material constituting the first through electrode 47, the second through electrode 48, and the connection electrode 49.

[Light-shielding film]
The light shielding film 16 is provided on the insulating layer 14 in the pixel region 4, that is, on the upper part of the interface state suppressing film 41 that is the uppermost layer of the insulating layer 14 in the pixel region 4. The light shielding film 16 includes a plurality of light receiving openings 16 a provided in the formation region of the photoelectric conversion unit 20 of each pixel 15, and is provided so as to shield between adjacent pixels 15.

  The light shielding film 16 is formed using a conductive material having excellent light shielding properties. For example, tungsten (W), aluminum (Al), Ti (titanium), TiN (titanium nitride), Cu (copper), or Ta (tantalum). ). The light shielding film 16 can be formed of a laminated film made of these material films.

[Transparent protective film]
The transparent protective film 17 is provided so as to cover the light shielding film 16 and the upper part of the insulating layer 14. The transparent protective film 17 is formed using, for example, an acrylic resin.

[Color filter]
The color filter 18 is provided on the transparent protective film 17 so as to correspond to each photoelectric conversion unit 20, and selectively transmits, for example, light of R (red), G (green), and B (blue). A filter layer is disposed for each pixel 15. Moreover, these filter layers are arrange | positioned for every pixel 15 by Bayer arrangement, for example.

  In the color filter 18, light having a desired wavelength is transmitted, and the transmitted light is incident on the photoelectric conversion unit 20 in the sensor-side semiconductor layer 2a. In the present embodiment, each pixel 15 transmits one of R, G, and B. However, the present invention is not limited to this. As the material constituting the color filter 18, other organic materials that transmit light such as cyan, yellow, and magenta may be used, and various selections are possible depending on specifications.

[On-chip lens]
The on-chip lens 19 is formed on the color filter 18 and is formed for each pixel 15. In the on-chip lens 19, the incident light is collected, and the collected light is efficiently incident on each photoelectric conversion unit 20 via the color filter 18. In the present embodiment, the on-chip lens 19 is configured to collect incident light at the center position of the photoelectric conversion unit 20 opened by the light shielding film 16.

<1-3 Manufacturing method>
3-6 is process drawing which shows the manufacturing method of the solid-state imaging device 1 of this embodiment. A method for manufacturing the solid-state imaging device according to the present embodiment will be described with reference to FIGS.

  First, as shown in FIG. 3A, a plurality of photoelectric conversion portions 20 are formed in the pixel region 4 in the sensor-side semiconductor layer 2a, and a floating diffusion region FD and source / drain regions 21 are formed in desired regions of the sensor-side semiconductor layer 2a. Then, the element isolation part 22 is formed. In addition, an impurity region (not shown) is formed in the sensor-side semiconductor layer 2a. Impurity layers such as the photoelectric conversion unit 20, the floating diffusion region FD, the source / drain region 21 and the element isolation unit 22 formed in the sensor side semiconductor layer 2a are formed on the surface of the sensor side semiconductor layer 2a (the side opposite to the light receiving surface S). The surface can be formed by ion implantation from the side.

  Next, a gate electrode 25 constituting each pixel transistor Tr is formed on the surface of the sensor side semiconductor layer 2a via a gate insulating film (not shown), and an interlayer insulating film 26 is formed on the gate electrode 25. A plurality of layers (three layers in FIG. 3A) of wirings 27 are formed. At this time, if necessary, a vertical hole is formed in the interlayer insulating film 26, and the vertical hole is filled with a conductive material, so that it is adjacent to the via connecting the wiring 27 and the pixel transistor Tr or in the stacking direction. A via for connecting the two wirings 27 is formed. Thereafter, a protective film 45 is formed on the interlayer insulating film 26 including the uppermost wiring 27.

  On the other hand, separately from the sensor-side semiconductor layer 2a, a circuit-side semiconductor layer 9a is prepared. On one surface of the circuit-side semiconductor layer 9a, a source / drain region 31, an element isolation portion 32, and other impurity layers ( (Not shown). Impurity layers such as the source / drain regions 31 and the element isolation portion 32 formed in the circuit side semiconductor layer 9a can be formed by ion implantation from the surface side of the circuit side semiconductor layer 9a.

  Next, a gate electrode 35 constituting each transistor Tr is formed on one surface of the circuit side semiconductor layer 9a via a gate insulating film (not shown), and an interlayer insulating film 36 is formed on the gate electrode 35. A plurality of layers (three layers in FIG. 3A) of wirings 37 are formed through the. At this time, if necessary, a vertical hole is formed in the interlayer insulating film 36, and the vertical hole is filled with a conductive material, so that a via that connects the wiring 37 and the transistor Tr or two adjacent layers in the stacking direction are formed. Vias connecting the two wirings 37 are formed. Thereafter, a protective film 46 is formed on the interlayer insulating film 36 including the uppermost wiring 37.

  Thereafter, the surface of the sensor substrate 2 on which the protective film 45 is formed and the surface of the circuit substrate 9 on which the protective film 46 is formed face each other, and the sensor substrate 2 and the circuit substrate 9 are bonded together. After bonding, the light-receiving surface S side (back surface side) of the sensor-side semiconductor layer 2a is thinned as necessary. The procedure described above is not particularly limited in procedure, and can be performed by applying a normal bonding technique.

  Next, as shown in FIG. 3B, an antireflection film 40, an interface state suppression film 41, an etching stop film 42, and an upper insulating film 43 are stacked in this order on the light receiving surface S of the sensor-side semiconductor layer 2a. To do. The antireflection film 40 is made of, for example, hafnium oxide, and is formed with a film thickness of 10 nm to 300 nm (for example, 60 nm) by atomic layer deposition. The interface state suppression film 41 is made of SiO2, and is formed with a film thickness of 200 nm by, for example, a P-CVD (Plasma-Chemical Vapor Deposition) method. The etching stop film 42 is made of, for example, silicon nitride (SiN), and is formed with a film thickness of 50 to 200 nm by a P-CVD method. The upper insulating film 43 is made of, for example, silicon oxide and is formed with a film thickness of 200 nm by the P-CVD method.

  Next, as shown in FIG. 3C, in the connection unit region 3, the first through hole 47a and the second through hole 48a that penetrate the sensor side semiconductor layer 2a from the surface of the upper insulating film 43 and reach the sensor side wiring layer 2b. Form. For example, the first through hole 47a is formed in the interlayer insulating film 26 at a depth that does not reach the wiring 27 in the lowermost layer of the sensor side wiring layer 2b (the layer closest to the sensor side semiconductor layer 2a). It is formed with a depth that does not expose. Further, the second through hole 48a is formed with a depth that does not reach the wiring 27 of the uppermost layer (the layer closest to the circuit board 9) of the sensor-side wiring layer 2b, and is formed with a depth that does not expose the wiring 37, for example. Is done.

  When forming the first through hole 47a and the second through hole 48a, a resist pattern (not shown) is formed on the upper insulating film 43, and etching is performed a plurality of times using the resist pattern as a mask. After the etching process of each of the first through hole 47a and the second through hole 48a is completed, each resist pattern is removed from the upper layer insulating film 43.

  Next, as shown in FIG. 4A, a connection hole 49a is formed in a region including the first through hole 47a and the second through hole 48a. The connection hole 49 a is formed at a depth that does not reach the etching stop film 42 from the surface of the upper insulating film 43. When the connection hole 49a is formed, a resist pattern (not shown) having an opening for forming the connection hole 49a is formed on the upper insulating film 43, and the upper insulating film 43 is etched using the resist pattern as a mask.

  Next, as shown in FIG. 4B, the isolation insulating film 28 is formed so as to cover the inner walls of the first through hole 47a, the second through hole 48a, and the connection hole 49a. The isolation insulating film 28 is made of, for example, silicon oxide and is formed with a thickness of 100 to 1000 nm by a P-CVD method. The isolation insulating film 28 electrically connects the first through electrode 47 formed in the first through hole 47a, the second through electrode 48 formed in the second through hole 48a, and the sensor-side semiconductor layer 2a. Separated.

  Next, as shown in FIG. 4C, the isolation insulating film 28 is removed by etching under highly anisotropic etching conditions, thereby removing the isolation insulating film 28 at the bottom of the first through hole 47a and the second through hole 48a. To do. Subsequently, the bottoms of the first through hole 47a and the second through hole 48a are dug under the highly anisotropic etching conditions. As a result, the lowermost layer wiring 27 of the sensor side wiring layer 2b is exposed at the bottom of the first through hole 47a, and the uppermost layer wiring 37 of the circuit side wiring layer 9b is exposed at the bottom of the second through hole 48a.

  Next, as shown in FIG. 5A, the barrier metal film 29 is formed in a state of covering the inner walls of the first through hole 47a, the second through hole 48a, and the connection hole 49a. The barrier metal film 29 is made of, for example, tantalum nitride (TaN) and is formed with a thickness of 5 to 100 nm by a PVD method. Subsequently, a conductive material made of copper (Cu) is formed on the barrier metal film 29 by a plating method. Thereby, copper (Cu) is embedded in the first through hole 47a, the second through hole 48a, and the connection hole 49a.

  Next, as shown in FIG. 5B, the conductive material layer is polished by CMP (Chemical Mechanical Polishing), and the surface is flattened until the upper insulating film 43 is exposed. Thereby, the 1st penetration electrode 47, the 2nd penetration electrode 48, and the connection electrode 49 which electrically connects these are formed. Thus, in this embodiment, the connection part 50 is formed by what is called a dual damascene method.

  Next, a cap film 44 is formed on the surface of the upper insulating film 43 including the connection electrode 49. The cap film 44 is made of, for example, silicon nitride (SiN), and is formed with a thickness of 5 to 100 nm by a P-CVD method. In the present embodiment, the light-receiving surface S side of the sensor-side semiconductor layer 2a is formed by a laminated film of five layers including the antireflection film 40, the interface state suppressing film 41, the etching stop film 42, the upper insulating film 43, and the cap film 44. The insulating layer 14 is configured.

  Next, as shown in FIG. 6A, a portion corresponding to the pixel region 4 of the insulating layer 14 is selectively thinned with respect to the connection unit region 3. Here, as shown in FIG. 6A, a resist pattern 51 is formed on the insulating layer 14. The resist pattern 51 is formed by forming a resist material layer on the entire upper surface of the insulating layer 14, forming an opening in a region corresponding to the pixel region 4, and then reflowing the end portion on the opening side by a post-baking process. .

  Then, using this resist pattern 51 as a mask, the insulating layer 14 above the pixel region 4 is etched away to a predetermined depth. In this etching step, while changing the etching conditions, the cap film 44 and the upper insulating film 43 are etched, and the etching is stopped by the lower etching stop film 42. Thereafter, the etching conditions are further changed to etch the etching stop film 42, and the etching is terminated when the interface state suppression film 41 is exposed.

  In a series of etching steps in FIG. 6A, etching is performed while changing the etching conditions as needed so that the insulating layer 14 gradually becomes thinner from the connection unit region 3 (end portion of the resist pattern 51) to the pixel region 4. Thereby, in the insulating layer 14, a tapered step portion 38 is formed at the boundary portion between the connection unit region 3 and the pixel region 4.

  In the present embodiment, by forming the etching stop film 42, etching variations that may occur in the etching of the upper insulating film 43 can be reset once on the surface of the etching stop film 42. Thereby, the surface of the insulating layer 14 above the pixel region 4 can be kept flat. Then, due to the etching of the insulating layer 14, only the antireflection film 40 and the interface state suppression film 41 remain on the upper surface of the pixel region 4, and the insulating layer 14 having a five-layer structure is formed in the peripheral region 7 including the connection unit region 3. It is left as it is.

  Next, as shown in FIG. 6B, the insulating layer 14 is etched at a predetermined position in the pixel region 4 to form an opening 14a that exposes the sensor-side semiconductor layer 2a. At this time, the interface state suppressing film 41 and the antireflection film 40 are etched using a resist pattern not shown here as a mask. The opening 14a is formed at a position avoiding the region immediately above the photoelectric conversion unit 20.

  Next, the light shielding film 16 connected to the sensor side semiconductor layer 2a through the opening 14a is patterned on the insulating layer 14 in the pixel region 4. The light shielding film 16 has a light receiving opening 16 a corresponding to the photoelectric conversion unit 20. Here, a conductive material film made of, for example, tungsten is formed on the insulating layer 14 by a sputtering film formation method. Thereafter, the conductive material film is subjected to pattern etching using a resist pattern not shown here as a mask. Thus, the light shielding film 16 having a light receiving opening 16a corresponding to each photoelectric conversion portion 20 and connected to the sensor side semiconductor layer 2a is formed while covering the insulating layer 14 in the pixel region 14 widely.

  Next, as shown in FIG. 6C, a transparent protective film 17 made of a light-transmitting material is formed so as to cover the light shielding film 16 and the insulating layer 14. The transparent protective film 17 is formed by a coating method such as a spin coating method. Next, a color filter 18 of each color corresponding to the photoelectric conversion unit 20 is formed on the transparent protective film 17, and an on-chip lens film 19a provided with an on-chip lens 19 corresponding to the photoelectric conversion unit 20 on the upper part. Form. As described above, the solid-state imaging device 1 of the present embodiment is manufactured.

  In the present embodiment, the distance between the on-chip lens 19 and the light receiving surface S is reduced by thinning the insulating layer 14 formed on the light receiving surface S side of the sensor-side semiconductor layer 2a in the pixel region 4. Can do. Thereby, improvement of a condensing characteristic and an improvement of a sensitivity characteristic are achieved.

  By the way, when an organic resin material is applied, if there is a steep step on the application surface, when the organic material gets over the step, the fluid pressure concentrates on the step portion, which may cause uneven coating. In contrast, in this embodiment, since the stepped portion 38 of the insulating layer 14 is formed in a tapered shape, the fluid pressure in the stepped portion 38 is reduced when an organic material is applied on the insulating layer 14. Thereby, the coating unevenness is reduced, and the organic material film formed on the insulating layer 14 in the pixel region 4 can be formed flat.

  In the present embodiment, the stepped portion 38 of the insulating layer 14 is tapered, but the insulating layer 14 only needs to have a structure in which the film thickness gradually decreases from the connection unit region 3 to the pixel region 4. Even if it becomes the structure which becomes thin, the structure which becomes thin in steps may be sufficient. When the insulating layer 14 is formed so as to be continuously thin as in the present embodiment, the flow of the organic resin material in the upper part of the insulating layer becomes smoother. It can be suppressed more.

  In the present embodiment, the etching stop film 42 is provided and etching is performed up to the etching stop film 42. However, the etching process of the insulating layer 14 is not limited to this. Various configurations can be adopted as long as the thickness of the insulating layer 14 in the pixel region 4 can be made thinner than the thickness of the insulating layer 14 in the connection unit region 3.

  Furthermore, in the present embodiment, the connection unit region 3 is formed on each of the three sides of the pixel region 4, but the region where the connection unit region 3 is formed is not limited to this. Hereinafter, as a modification, an example in which the formation position of the connection unit region 3 is different from that of the first embodiment will be described.

[Modification 1-1]
FIG. 7 is a schematic configuration diagram of the sensor substrate 62 of the solid-state imaging device 60 according to Modification 1-1. The solid-state imaging device 60 in Modification 1-1 is different from the solid-state imaging device 1 shown in FIG. 1 only in the layout of the formation position of the connection unit region 61. That is, also in the modified example 1-1, the circuit board 9 is provided on the surface opposite to the light receiving surface of the sensor substrate 62 as in FIG. 1, and the cross-sectional configuration thereof is the same as in FIG. Therefore, the cross-sectional configurations of the circuit board 9 and the solid-state imaging device 60 are the same as those in FIGS. Further, in FIG. 7, the same reference numerals are given to the portions corresponding to those in FIG.

  In Modification 1-1, as shown in FIG. 7, connection unit regions 61 are provided at four locations in the peripheral region 7 outside the pixel region 4, and are arranged along each side of the pixel region 4. Has been. Also in the modified example 1-1, as in the first embodiment, the stepped portion 38 is formed in the insulating layer above the sensor-side semiconductor layer. And also in the structure in the modification 1-1, the level | step-difference part 38 is made into a taper shape by reducing the film thickness of an insulating layer gradually from the connection unit area | region 61 to the pixel area | region 4 similarly to 1st Embodiment. By doing so, the same effect as the first embodiment can be obtained.

[Modification 1-2]
FIG. 8 is a schematic configuration diagram of the sensor substrate 72 of the solid-state imaging device 70 according to Modification 1-2. The solid-state imaging device 70 in Modification 1-2 is different from the solid-state imaging device 1 shown in FIG. 1 only in the layout of the formation position of the connection unit region 71. That is, also in the modified example 1-2, as in FIG. 1, the circuit board 9 is provided on the surface opposite to the light receiving surface of the sensor substrate 72, and the cross-sectional configuration is the same as in FIG. Therefore, the cross-sectional configurations of the circuit board 9 and the solid-state imaging device 70 are the same as those in FIG. 1 and FIG. Also, in FIG. 8, the same reference numerals are given to the portions corresponding to FIG.

  In Modification 1-2, as shown in FIG. 8, the connection unit region 71 is provided in the peripheral region 7 outside the pixel region 4 and is continuously arranged so as to surround the pixel region 4. Also in the modified example 1-2, the stepped portion 38 is formed in the insulating layer above the sensor-side semiconductor layer, as in the first embodiment. Also in the configuration in Modification 1-2, as in the first embodiment, the stepped portion 38 is tapered by gradually reducing the thickness of the insulating layer from the connection unit region 71 to the pixel region 4. By doing so, the same effect as the first embodiment can be obtained.

  By the way, in the first embodiment described above, the insulating layer 14 formed on the sensor-side semiconductor layer 2a is thinned only on the upper part of the pixel region 4, and the step portion 38 of the insulating layer 14 is connected to the connection unit region 3 and the pixel. The example is provided only at the boundary with the region 4. However, the thin film portion in the insulating layer 14 may be set as wide as possible without affecting the connection portion 50. Below, the example which provides the level | step-difference part of the insulating layer 14 so that the circumference | surroundings of the connection unit area | region 3 is provided is demonstrated.

<< 2. Second Embodiment: Solid-State Imaging Device >>
FIG. 9 is a configuration diagram of the sensor substrate 2 of the solid-state imaging device 80 according to the second embodiment of the present disclosure, and FIG. 10 is a cross-sectional configuration along the line BB in FIG. Also in this embodiment, the circuit board 9 is provided on the surface opposite to the light receiving surface of the sensor substrate 2 as in FIG. The configuration of the circuit board 9 in this embodiment is the same as that in FIG. Further, in FIGS. 9 and 10, the same reference numerals are given to the portions corresponding to FIGS. 1 and 2, and redundant description is omitted.

  In the solid-state imaging device 80 of the present embodiment, the stepped portion 81 of the insulating layer 14 provided on the sensor-side semiconductor layer 2 a is formed so as to surround each connection unit region 3. That is, in the present embodiment, in the region other than the connection unit region 3, the insulating layer 14 above the sensor-side semiconductor layer 2a is thinned in the same manner as the upper part of the pixel region 4.

  As shown in FIG. 10, in the solid-state imaging device 80 of the present embodiment, the insulating layer 14 provided on the sensor-side semiconductor layer 2 a includes a connection unit region 3 and a region adjacent to the outside of the connection unit region 3. A stepped portion 81 is formed at the boundary. Further, the step portion 81 of the insulating layer 14 is formed in a tapered shape that gradually becomes thinner from the connection unit region 3 to a region adjacent to the connection unit region 3, as in the first embodiment.

  As described above, in the present embodiment, the insulating layer 14 is thinned in a region other than the connection unit region 3, whereby the convex portion 82 having a convex cross section is formed in the insulating film 14. And the connection part 50 formed in the connection unit area | region 3 is formed in this convex part 82 inside.

  Such a solid-state imaging device 80 of this embodiment can be formed by changing the resist pattern used in the etching process of the insulating layer 14 shown in FIG. 6A from that of the first embodiment. For example, the solid-state imaging device 80 of this embodiment can be manufactured by etching using a resist pattern that opens an area other than the connection unit area 3 as a mask. In such a solid-state imaging device 80 of this embodiment, the same effect as that of the first embodiment can be obtained.

<< 3. Third Embodiment: Solid-State Imaging Device >>
Next, a solid-state imaging device according to the third embodiment of the present disclosure will be described. FIG. 11A is a schematic configuration diagram of the sensor substrate 2 of the solid-state imaging device 90 of the present embodiment, and FIG. 11B is an enlarged view of a region a in FIG. 11A. Also in this embodiment, the circuit board 9 is provided on the surface opposite to the light receiving surface of the sensor substrate 2 as in FIG. 1 (first embodiment), and the cross-sectional configuration of the solid-state imaging device 90 is as shown in FIG. It is the same. Therefore, the cross-sectional configurations of the circuit board 9 and the solid-state imaging device 90 are the same as those in FIG. In FIG. 11A, parts corresponding to those in FIG.

  The solid-state imaging device 90 of this embodiment is an example in which the layout of the stepped portion 91 of the insulating layer 14 is different from that in FIG. In the present embodiment, the stepped portion 91 of the insulating layer 14 is provided at a position surrounding the connection unit region 3. In addition, the planar shape of the convex portion 92 of the insulating layer 14 formed by the step portion 91 is formed in a rounded rectangular shape that is an arc shape at both end portions orthogonal to the direction along the side of the corresponding pixel region 4.

  Here, as shown in FIG. 11B, it is preferable that the radius of curvature R at the arc-shaped end portion of the convex portion 92 is larger than 0.2 μm. 9 may be formed by adding an arc-shaped end portion to the convex portion 82 whose planar shape shown in FIG. 9 is a rectangular shape. The planar shape may be formed by cutting a corner from the rectangular convex portion 82.

  Such a solid-state imaging device 90 of the present embodiment can be formed by changing the resist pattern used in the etching process of the insulating layer 14 shown in FIG. 6A from the first embodiment. For example, the solid-state imaging device 90 of the present embodiment can be manufactured by etching using a resist pattern that opens an area other than the connection unit area 3 as a mask.

  FIG. 12 is a diagram schematically showing a result of simulating the flow of the organic material when the organic material is applied on the insulating layer 14 having the convex portions 92 of the present embodiment. FIG. 13 shows how the organic material flows when an organic material is applied to the upper portion of the insulating layer 14 in an example (for example, the second embodiment) in which the planar shape of the convex portion 92 of the insulating layer 14 is rectangular. It is a figure which shows the result of simulation typically. The arrows in FIGS. 12 and 13 are fluid vectors, the direction of the arrow indicates the direction in which the organic material applied on the insulating layer 14 flows, and the length of the arrow indicates the flow rate of the organic material flowing in the arrow direction.

  As shown in FIG. 13, when the planar shape of the convex portion 82 of the insulating layer 14 is a rectangular shape, the fluid pressure of the organic material tends to be high at the portion corresponding to the corner portion of the convex portion 82. Thereby, the fluid flowing toward the corner portion of the convex portion 82 is divided into a component in a direction in which the original fluid flows and a component in a direction along the side wall of the convex portion 82, starting from the corner portion. As a result, coating unevenness occurs.

  On the other hand, as shown in FIG. 12, when the planar shape of the convex portion 92 of the insulating layer 14 is a rounded rectangular shape in which both ends orthogonal to the direction along the corresponding side of the pixel region 4 are arcuate. The point where the fluid pressure of the organic material flowing on the insulating layer 14 locally increases is reduced. For this reason, the dispersion | distribution from the edge part of the convex part 92 of the fluid which flows toward the circular arc-shaped edge part of the convex part 92 is eased. Thereby, the coating unevenness of the organic material is reduced.

  Thus, in this embodiment, the planarity of the organic material film applied on the insulating layer 14 in the pixel region 4 can be further improved by making the planar shape of the convex portion 92 a rounded rectangle.

  In the above-described third embodiment, the planar shape of the convex portion 92 of the insulating layer 14 is a rounded rectangular shape, but the planar shape of the convex portion that can relieve the fluid pressure is not limited to this. As a modification, an example in which the planar shape of the convex portion of the insulating layer is different from that of the third embodiment will be described below.

[Modification 3-1]
FIG. 14A is a schematic configuration diagram of the sensor substrate 2 of the solid-state imaging device 100 of Modification 3-1, and FIG. 14B is an enlarged view of a region a in FIG. 14A. Also in the present embodiment, as in FIG. 1, the circuit board 9 is provided on the surface opposite to the light receiving surface of the sensor substrate 2, and the cross-sectional configuration of the solid-state imaging device 100 is shown in FIG. It is the same. Therefore, the cross-sectional configurations of the circuit board 9 and the solid-state imaging device 100 are the same as those in FIG. In FIG. 14A, parts corresponding to those in FIG.

  In the solid-state imaging device 100 according to Modification 3-1, the planar shape of the convex portion 102 of the insulating layer is an example different from that shown in FIG. 11A. In Modification 3-1, the planar shape of the convex portion 102 of the insulating layer is a shape obtained by obliquely cutting off the four corners of the rectangular convex portion 82 shown in FIG. 11A. FIG. 14A shows an example in which the four corners of the rectangular convex portion 82 shown in FIG. 11A are cut off on the surface where the inclination of the convex portion 102 with respect to the side of the corresponding pixel region 4 is 45 degrees or −45 degrees. ing.

  Here, as shown in FIG. 14B, the convex portion 102 is formed such that the radius of curvature R of a circumscribed circle passing through the four apexes provided at one end of the convex portion 102 is larger than 0.2 μm. It is preferable. Further, such a shape may be formed by adding an end portion having four vertices to the convex portion 82 having a rectangular planar shape shown in FIG. 11A, and the planar shape shown in FIG. 11A. May be formed by cutting a corner from the rectangular convex portion 82.

  FIG. 15 is a diagram schematically showing a result of simulating the flow of the organic material when the organic material is applied on the insulating layer having the structure of the present embodiment. FIG. 15 shows a fluid vector. The direction of the arrow indicates the direction in which the organic material applied on the insulating layer flows, and the length of the arrow indicates the flow rate of the organic material flowing in the arrow direction.

  As shown in FIG. 15, also in the modified example 3-1, when the planar shape of the convex portion 102 of the insulating layer is a rounded rectangular shape in which both end portions in the direction along the side of the pixel region 4 are substantially arc-shaped. The point that the fluid pressure of the organic material flowing on the insulating layer locally increases is reduced. For this reason, in the fluid that flows toward the substantially arcuate end of the convex portion 102, the dispersion of the flow velocity vector starting from the end portion of the convex portion 102 is alleviated. Thereby, the coating unevenness of the organic material is reduced.

  As described above, the same effects as those of the third embodiment can be obtained by increasing the number of vertices of the planar shape of each end portion at both end portions of the convex portion 102 so as to approach the arc shape from the rectangular shape. In the present embodiment, four vertices at each end of the convex portion 102 are formed, but it is sufficient that there are three or more, and even if the shape of each end portion of the convex portion is a triangular shape or more. Good. That is, in the present disclosure, the case where there are three or more vertices at each end of the convex portion and the inner angle of each vertex is larger than 90 degrees is defined as “substantially (circular) arc shape”.

[Modification 3-2]
FIG. 16 is a schematic configuration diagram of the sensor substrate 2 of the solid-state imaging device 110 according to Modification 3-2. Also in the present embodiment, as in FIG. 1 (first embodiment), the circuit board 9 is provided on the surface opposite to the light receiving surface of the sensor substrate 2, and the cross-sectional configuration of the solid-state imaging device 110 is as shown in FIG. It is the same. Therefore, the cross-sectional configurations of the circuit board 9 and the solid-state imaging device 100 are the same as those in FIG. In FIG. 16, parts corresponding to those in FIG.

  In the solid-state imaging device 110 according to Modification 3-2, the planar shape of the convex portion 112 of the insulating layer is an example different from that shown in FIG. 11A. In the modified example 3-2, the convex portion 112 of the insulating layer is formed in a rounded rectangular shape that has an arc shape at both end portions orthogonal to the direction along the side of the corresponding pixel region 4. However, in the above-described third embodiment, both end portions of the convex portion 92 are arc-shaped, but in the modified example 3-2, the planar shape is arc-shaped only at the corners on the diagonal line, and the convex portions 92 are convex. Opposite sides of both ends of the portion 112 are formed in parallel to each other.

  Also in Modification 3-2, the same effect as in the third embodiment can be obtained. Thus, the planar shape of the convex portion may be not only a shape in which both ends thereof are arcuate but also a rounded quadrangular shape in which a part is arcuate.

  In addition, although illustration is abbreviate | omitted, the planar shape of each edge part of a convex part may be elliptical arc shape. That is, the shape of each end of the convex portion is not limited to the arc shape, and the same effect as in the third embodiment can be obtained if the shape is an arc shape or a substantially arc shape.

  By the way, in 3rd Embodiment, the modification 3-1, and the modification 3-2, it demonstrated that the cross-sectional structure was the same as that of FIG. 10 (2nd Embodiment). However, in the case where the planar shape of the convex portion of the insulating layer is a rounded rectangular shape, the effect of alleviating coating unevenness can be obtained to some extent even if the step portion of the insulating layer is not tapered. That is, even when the surface of the step portion of the insulating layer is provided at a right angle to the light receiving surface, the unevenness of coating can be alleviated by making the planar shape of the convex portion of the insulating layer a rounded rectangular shape. .

  Therefore, one of a configuration in which the step portion of the insulating layer is tapered and a configuration in which the planar shape of the convex portion of the insulating layer is a rounded rectangular shape may be applied. When the step portion of the insulating layer has a tapered shape and the planar shape of the convex portion of the insulating layer has a rounded rectangular shape as in the third embodiment, the modified example 3-1, and the modified example 3-2 Therefore, the effect of suppressing coating unevenness can be further enhanced.

  The present disclosure is not limited to application to a solid-state imaging device that detects an incident light amount distribution of visible light and captures an image as an image, but a solid-state imaging device that captures an incident amount distribution of infrared rays, X-rays, particles, or the like as an image. It is also applicable to.

  Further, the present disclosure is not limited to a solid-state imaging device that sequentially scans each unit pixel in the pixel region in units of rows and reads a pixel signal from each unit pixel. The present invention is also applicable to an XY address type solid-state imaging device that selects an arbitrary pixel in pixel units and reads out signals from the selected pixels in pixel units. Note that the solid-state imaging device may be formed as a single chip, or may be in a modular form having an imaging function in which a pixel portion and a signal processing portion or an optical system are packaged together. Good.

  Further, the present disclosure is not limited to application to a solid-state imaging device, but can also be applied to an imaging device. Here, the imaging device refers to a camera system such as a digital still camera or a digital video camera, or an electronic device having an imaging function such as a mobile phone. Note that the above-described module form mounted on an electronic device, that is, a camera module may be used as an imaging device.

<< 4. Fourth Embodiment: Electronic Device >>
Next, an electronic apparatus according to the fourth embodiment of the present disclosure will be described. FIG. 17 is a schematic configuration diagram of an electronic device 200 according to the fourth embodiment of the present disclosure.

  The electronic apparatus 200 according to the present embodiment includes a solid-state imaging device 201, an optical lens 203, a shutter device 204, a drive circuit 205, and a signal processing circuit 206. In the electronic device 200 of the present embodiment example, an embodiment in which the solid-state imaging device 1 according to the first embodiment of the present disclosure described above as the solid-state imaging device 201 is used in an electronic device (digital still camera) will be described.

  The optical lens 203 forms image light (incident light) from the subject on the imaging surface of the solid-state imaging device 201. Thereby, the signal charge is accumulated in the solid-state imaging device 201 for a certain period. The shutter device 204 controls a light irradiation period and a light shielding period for the solid-state imaging device 201. The drive circuit 205 supplies a drive signal for controlling the signal transfer operation of the solid-state imaging device 201 and the shutter operation of the shutter device 204. The solid-state imaging device 201 performs signal transfer according to a drive signal (timing signal) supplied from the drive circuit 205. The signal processing circuit 206 performs various signal processes on the signal output from the solid-state imaging device 201. The video signal subjected to the signal processing is stored in a storage medium such as a memory or output to a monitor.

  In the electronic apparatus 200 according to the present embodiment, the solid-state imaging device 201 can improve the light collection characteristic and the sensitivity characteristic, so that the image quality can be improved.

In addition, this indication can also take the following structures.
(1)
A sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion unit is provided, and a sensor-side wiring layer provided on the surface side opposite to the light-receiving surface of the sensor-side semiconductor layer;
A circuit board having a circuit side semiconductor layer and a circuit side wiring layer, provided on the sensor side wiring layer side of the sensor board;
A first through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer, and a second through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer. A connection unit region provided with a connection part having a through electrode and a connection electrode provided on the light receiving surface side surface of the sensor side semiconductor layer and connecting the first through electrode and the second through electrode;
A solid-state imaging device comprising: an insulating layer having a stepped portion in which the connection electrode is embedded and the film thickness gradually decreases from the connection unit region to the pixel region.
(2)
Further, the step portion is formed by gradually thinning the insulating film from the connection unit region to a region adjacent to the connection unit region, and a convex portion is formed in the connection unit region. The solid-state imaging device described in 1.
(3)
The solid-state imaging device according to (1) or (2), wherein a plurality of the connection unit regions are provided, and each connection unit region is arranged along a predetermined side corresponding to the partitioned pixel region.
(4)
The solid-state imaging device according to any one of (1) to (3), wherein the stepped portion is formed at a position surrounding the connection unit region.
(5)
The solid-state imaging device according to any one of (1) to (4), wherein a planar shape of the convex portion is a rounded rectangular shape extending in a direction along a corresponding side of the pixel region.
(6)
The insulating layer is a laminated structure configured using different materials,
The solid-state imaging device according to any one of (1) to (5), wherein a film that forms an upper layer portion of the stacked structure is removed from the insulating layer at a lower portion of the step portion.
(7)
A sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion unit is provided, and a sensor-side wiring layer provided on the surface side opposite to the light-receiving surface of the sensor-side semiconductor layer;
A circuit board having a circuit-side semiconductor layer and a circuit-side wiring layer, and being laminated on the sensor-side wiring layer side of the sensor board;
A first through via provided from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer, and a second through via provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer. A connection unit region provided with a connection portion having a through via and a connection electrode provided on a surface on the light receiving surface side of the sensor substrate and connecting the first through via and the second through via;
The connection electrode is embedded, the thickness in the outer region of the connection unit region is formed to be thinner than the thickness in the connection unit region, and the cross-sectional shape in the region including the connection unit region has a convex portion A solid-state imaging device comprising: a planar shape of the convex portion; and an insulating layer having a rounded rectangular shape extending in a direction along a side of the pixel region.
(8)
A sensor substrate having a sensor-side semiconductor layer including a pixel region provided with a photoelectric conversion unit; and a sensor-side wiring layer provided on a surface side opposite to the light-receiving surface of the sensor-side semiconductor layer; and a circuit side Bonding the semiconductor layer and the circuit side wiring layer with the surface of the sensor side wiring layer and the surface of the circuit side wiring layer facing each other;
Forming an insulating layer on the light receiving surface side of the sensor substrate;
A first through electrode provided in the connection unit region outside the pixel region from the surface of the insulating layer to the sensor side wiring layer, and provided from the surface of the insulating layer to the circuit side wiring layer. Forming a connection portion having a second through electrode and a connection electrode provided on the surface of the insulating layer and connecting the first through electrode and the second through electrode;
Etching the insulating layer to a predetermined depth so that the film thickness gradually decreases from the connection unit region to the pixel region.
(9)
A sensor substrate having a sensor-side semiconductor layer including a pixel region provided with a photoelectric conversion unit; and a sensor-side wiring layer provided on a surface side opposite to the light-receiving surface of the sensor-side semiconductor layer; and a circuit side Bonding the semiconductor layer and the circuit side wiring layer with the surface of the sensor side wiring layer and the surface of the circuit side wiring layer facing each other;
Forming an insulating layer on the light receiving surface side of the sensor substrate;
A first through electrode provided in the connection unit region outside the pixel region from the surface of the insulating layer to the sensor side wiring layer, and provided from the surface of the insulating layer to the circuit side wiring layer. Forming a connection portion having a second through electrode and a connection electrode provided on the surface of the insulating layer and connecting the first through electrode and the second through electrode;
A step of forming a convex portion having a rounded rectangular shape whose planar shape extends in a direction along the side of the pixel region by etching the insulating layer to a predetermined depth in a region outside the connection unit region. A method for manufacturing a solid-state imaging device, comprising:
(10)
A sensor substrate having a sensor-side semiconductor layer including a pixel region provided with a photoelectric conversion unit; and a sensor-side wiring layer provided on a surface side opposite to the light-receiving surface of the sensor-side semiconductor layer; and a circuit-side semiconductor A circuit board provided on the sensor-side wiring layer side of the sensor board, and a sensor board provided from the light-receiving surface side of the sensor-side semiconductor layer to the sensor-side wiring layer. A first through electrode; a second through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer; a surface of the sensor side semiconductor layer on the light receiving surface side; A connection unit region provided with a connection part having a connection electrode connecting the first through electrode and the second through electrode, and the connection electrode are embedded therein, and the film thickness gradually increases from the connection unit region to the pixel region. Thinly A solid-state imaging device comprising an insulating layer having a stepped portion that,
A signal processing circuit for processing an output signal output from the solid-state imaging device;
Including electronic equipment.

  1, 60, 70, 80, 90, 100, 110 ... solid-state imaging device, 2, 62, 72 ... sensor substrate, 2a ... sensor side semiconductor layer, 2b ... sensor side wiring layer, 3 61, 71 ... Connection unit area, 4 ... Pixel area, 5 ... Pixel drive line, 6 ... Vertical signal line, 7 ... Peripheral area, 9 ... Circuit board, 9a ..Circuit side semiconductor layer, 9b... Circuit side wiring layer, 10... Vertical drive circuit, 11... Column signal processing circuit, 12. ... Insulating layer, 14a ... Opening, 15 ... Pixel, 16 ... Light-shielding film, 16a ... Light receiving opening, 17 ... Transparent protective film, 18 ... Color filter, 19. .... On-chip lens, 19a ... On-chip lens film, 20 ... Photoelectric converter, 21, DESCRIPTION OF SYMBOLS 1 ... Source / drain region, 22, 32 ... Element isolation part, 25, 35 ... Gate electrode, 26, 36 ... Interlayer insulation film, 27, 37 ... Wiring, 28 ... Isolation Insulating film 29 ... Barrier metal film 38, 81, 91 ... Stepped portion 40 ... Antireflection film 41 ... Interface state suppression film 42 ... Etching stop film 43 ..Upper insulating film, 44... Cap film, 45 and 46... Protective film, 47... First through electrode, 48. Connection part 51 ... resist pattern 60 ... solid-state imaging device 82, 92, 102, 112 ... convex part 200 ... electronic device 203 ... optical lens 204 ... Shutter device, 205 ... signal processing circuit, 206 ... drive circuit

Claims (10)

A sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion unit is provided, and a sensor-side wiring layer provided on the surface side opposite to the light-receiving surface of the sensor-side semiconductor layer;
A circuit board having a circuit side semiconductor layer and a circuit side wiring layer, provided on the sensor side wiring layer side of the sensor board;
A first through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer, and a second through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer. A connection unit region provided with a connection part having a through electrode and a connection electrode provided on the light receiving surface side surface of the sensor side semiconductor layer and connecting the first through electrode and the second through electrode;
A solid-state imaging device comprising: an insulating layer having a stepped portion in which the connection electrode is embedded and the film thickness gradually decreases from the connection unit region to the pixel region. The step portion is formed by gradually thinning the insulating layer from the connection unit region to a region adjacent to the connection unit region, and a convex portion is formed in the connection unit region. The solid-state imaging device described in 1. The solid-state imaging device according to claim 2, comprising a plurality of the connection unit regions, wherein each connection unit region is arranged along a predetermined side corresponding to the partitioned pixel region. The solid-state imaging device according to claim 3, wherein the step portion is formed at a position surrounding the connection unit region. The solid-state imaging device according to claim 4, wherein a planar shape of the convex portion is a rounded rectangular shape extending in a direction along a corresponding side of the pixel region. The insulating layer is a laminated structure configured using different materials,
The solid-state imaging device according to claim 5, wherein a film constituting an upper layer portion of the laminated structure is removed from the insulating layer at a lower portion of the step portion. A sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion unit is provided, and a sensor-side wiring layer provided on the surface side opposite to the light-receiving surface of the sensor-side semiconductor layer;
A circuit board having a circuit-side semiconductor layer and a circuit-side wiring layer, and being laminated on the sensor-side wiring layer side of the sensor board;
A first through via provided from the light receiving surface side of the sensor side semiconductor layer to the sensor side wiring layer, and a second through via provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer. A connection unit region provided with a connection portion having a through via and a connection electrode provided on a surface on the light receiving surface side of the sensor substrate and connecting the first through via and the second through via;
The connection electrode is embedded, the thickness in the outer region of the connection unit region is formed to be thinner than the thickness in the connection unit region, and the cross-sectional shape in the region including the connection unit region has a convex portion A solid-state imaging device comprising: a planar shape of the convex portion; and an insulating layer having a rounded rectangular shape extending in a direction along a side of the pixel region. A sensor substrate having a sensor-side semiconductor layer including a pixel region provided with a photoelectric conversion unit; and a sensor-side wiring layer provided on a surface side opposite to the light-receiving surface of the sensor-side semiconductor layer; and a circuit side Bonding the semiconductor layer and the circuit side wiring layer with the surface of the sensor side wiring layer and the surface of the circuit side wiring layer facing each other;
Forming an insulating layer on the light receiving surface side of the sensor substrate;
A first through electrode provided in the connection unit region outside the pixel region from the surface of the insulating layer to the sensor side wiring layer, and provided from the surface of the insulating layer to the circuit side wiring layer. Forming a connection portion having a second through electrode and a connection electrode provided on the surface of the insulating layer and connecting the first through electrode and the second through electrode;
Etching the insulating layer to a predetermined depth so that the film thickness gradually decreases from the connection unit region to the pixel region. A sensor substrate having a sensor-side semiconductor layer including a pixel region provided with a photoelectric conversion unit; and a sensor-side wiring layer provided on a surface side opposite to the light-receiving surface of the sensor-side semiconductor layer; and a circuit side Bonding the semiconductor layer and the circuit side wiring layer with the surface of the sensor side wiring layer and the surface of the circuit side wiring layer facing each other;
Forming an insulating layer on the light receiving surface side of the sensor substrate;
A first through electrode provided in the connection unit region outside the pixel region from the surface of the insulating layer to the sensor side wiring layer, and provided from the surface of the insulating layer to the circuit side wiring layer. Forming a connection portion having a second through electrode and a connection electrode provided on the surface of the insulating layer and connecting the first through electrode and the second through electrode;
A step of forming a convex portion having a rounded rectangular shape whose planar shape extends in a direction along the side of the pixel region by etching the insulating layer to a predetermined depth in a region outside the connection unit region. A method for manufacturing a solid-state imaging device, comprising: A sensor substrate having a sensor-side semiconductor layer including a pixel region provided with a photoelectric conversion unit; and a sensor-side wiring layer provided on a surface side opposite to the light-receiving surface of the sensor-side semiconductor layer; and a circuit-side semiconductor A circuit board provided on the sensor-side wiring layer side of the sensor board, and a sensor board provided from the light-receiving surface side of the sensor-side semiconductor layer to the sensor-side wiring layer. A first through electrode; a second through electrode provided from the light receiving surface side of the sensor side semiconductor layer to the circuit side wiring layer; a surface of the sensor side semiconductor layer on the light receiving surface side; A connection unit region provided with a connection part having a connection electrode connecting the first through electrode and the second through electrode, and the connection electrode are embedded therein, and the film thickness gradually increases from the connection unit region to the pixel region. Thinly A solid-state imaging device comprising an insulating layer having a stepped portion that,
A signal processing circuit for processing an output signal output from the solid-state imaging device;
Including electronic equipment.

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