JP2013153074A - Method for forming capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming a capacitor, which can accurately and efficiently remove a sacrificial film formed by stacking a polycrystalline silicon film and an amorphous silicon film.SOLUTION: The method for forming the capacitor comprises the steps of: forming a sacrificial film 2 on a semiconductor substrate 3; sequentially patterning the sacrificial film 2 to form an opening part; forming a lower electrode 50 that covers an inner wall and a bottom face of the opening part; and removing the sacrificial film 2 by wet etching. The method further comprises: forming a stacked film of a polycrystalline silicon film and/or an amorphous silicon film as the sacrificial film 2; and etching at least one part of the sacrificial film 2 by using an aqueous solution containing 7 mass% or more but 25 mass% or less of a quaternary alkyl ammonium hydroxide in a condition of 80°C or higher in the wet etching process.

Description

  The present invention relates to a capacitor forming method.

  Conventionally, a concave type has been adopted as a capacitor structure of a DRAM. In this structure, the lower electrode film is formed in the cylinder hole, and only the inner side surface functions as an electrode. According to this, the area occupied by the capacitor can surely be reduced, but the diameter of the cylinder hole is inevitably reduced. On the other hand, the capacity required for the device operation of the DRAM must be secured. In order to satisfy both of these requirements, the depth of the cylinder hole is becoming deeper and it is becoming difficult to cope with the fine processing technology.

  It is not easy in itself to form and process a fine cylinder structure and a hole forming a capacitor with high accuracy. Usually, this processing is performed by wet etching. That is, the inner and outer members must be removed by the etching solution so that a cylindrical structure having a cylinder wall having a depth of nanometer to submicrometer size is left on the semiconductor substrate. In particular, the removal of the members in the cylinder holes or between the cylinder structures must be removed so as to remove the material from the enclosed space, which is difficult as processing performed by wet etching.

  Recently, there has been proposed a processing method in which a laminated sacrificial film is formed in the capacitor forming process, and the laminated sacrificial film is removed by wet etching before and after the formation of the lower electrode (Patent Document 1). As a result, the use of stacked sacrificial films having different etching rates (ER) can give a step change to the capacitor structure.

JP 2006-114896 A

The use of a polycrystalline silicon film or an amorphous silicon film as a sacrificial film for a capacitor has been studied, but there are not many examples of research on the removability of these films. Therefore, not only the polycrystalline silicon film and the amorphous silicon film but also the chemical solution and conditions advantageous for the process of laminating them as described above and removing them as the sacrificial film by wet etching are unclear.
An object of the present invention is to provide a capacitor forming method capable of accurately and efficiently removing a sacrificial film formed by laminating a polycrystalline silicon film or an amorphous silicon film.

The above problem has been solved by the following means.
(1) a step of forming a sacrificial film on a semiconductor substrate, a step of sequentially patterning the sacrificial film to form an opening, a step of forming a lower electrode that covers an inner wall and a bottom surface of the opening, A method of forming a capacitor including a step of removing the sacrificial film by wet etching,
A multilayer film of a polycrystalline silicon film and / or an amorphous silicon film is formed as the sacrificial film,
A method of forming a capacitor, comprising applying an aqueous solution containing 7% by mass or more and 25% by mass or less of a quaternary alkylammonium hydroxide under a condition of 80 ° C. or higher in the wet etching step to etch at least a part of the sacrificial film.
(2) The capacitor forming method according to (1), wherein the lower electrode includes a Ti compound, and the sacrificial film portion is selectively etched with respect to the Ti compound.
(3) The capacitor forming method according to (1) or (2), wherein the aqueous solution contains only one kind of quaternary alkyl ammonium hydroxide.
(4) The method of forming a capacitor according to any one of (1) to (3), wherein the aqueous solution is applied to the sacrificial film in an inert atmosphere.
(5) The capacitor forming method according to any one of (1) to (4), wherein the lower electrode has a cylinder structure with an aspect ratio (depth / opening width) of 15 to 100.
(6) The capacitor forming method according to any one of (1) to (5), wherein the sacrificial film includes a laminated film of amorphous silicon.
(7) The capacitor forming method according to any one of (1) to (6), wherein the aqueous solution does not contain a hydroxylamine compound.

  According to the capacitor forming method of the present invention, etching of an amorphous silicon or polycrystalline silicon film laminated in stages can be performed at high speed and accurately without depending on an etchant containing an alkali metal whose performance is concerned as an essential component. Can be done. In addition, high-speed etching that achieves the above-described high quality can be achieved with an extremely simple configuration, and particularly has an advantage that it is suitable for forming a capacitor structure having an uneven shape.

It is sectional drawing which shows typically the example of a manufacturing process of the capacitor structure applied to this invention. It is sectional drawing which shows typically the example of a manufacturing process of the capacitor structure applied to this invention (continuation of FIG. 1). It is sectional drawing which shows typically the example of a manufacturing process of the capacitor structure applied to this invention (continuation of FIG. 2). FIG. 4 is a cross-sectional view schematically showing a manufacturing process example of a capacitor structure applied to the present invention (continuation of FIG. 3). It is sectional drawing which shows typically another example of the capacitor structure applied to this invention.

[Formation of capacitor structure]
First, before describing the etching solution according to the present invention, a manufacturing example of a capacitor structure that can be suitably employed in the present invention will be described with reference to the accompanying drawings. In the following detailed description, formation of a capacitor structure, which is a preferred application target of the etching method of the present invention, will be mainly described, but the present invention is not construed as being limited thereto.

(Process a)
In the manufacturing example of the present embodiment, a first molded film 1 and a second molded film (sacrificial film) 2 (2a, 2b) are formed on a silicon wafer 3. The first molding film 1 is an etching stopper film when the cylinder hole is opened, and the second molding film 2 is a film having an etching rate ratio by an anisotropic dry etching process. Here, in the present embodiment, the sacrificial film 2 is formed as a laminated film, and it is preferable to form the sacrificial film 2 with different materials and etching rates. Thereby, it is possible to perform different forms of etching for each layer, and a structure in which the form is changed step by step as necessary. Examples of the first molded film 1 include a nitride film formed by an LP-CVD (Low-Pressure Chemical Vapor Deposition) process. On the other hand, in the present embodiment, a polycrystalline silicon and / or amorphous silicon film is employed as the second molding film 2. Further, although not shown, the sacrificial film may be configured to include a material or a layer different from the above, or a protective film may be provided.
Here, touching on the characteristics of etching in the laminated film of the present embodiment, the laminated film generally has a point that the thickness of the film to be etched is increased as compared with the single-layer film. This must be removed accurately. Also, if there is an oxide film at the stack interface, it is difficult to remove it before etching, and this oxide film must be etched simultaneously with the film body. Furthermore, it may be necessary to etch different films of polycrystalline silicon and amorphous silicon at a time. According to an etching solution or a method using the same in a preferred embodiment of the present invention, the above-mentioned points can be overcome and a good etching process can be performed.

  Although the silicon wafer 3 is greatly simplified and shown as a single layer, a predetermined circuit structure is usually formed here. For example, those using an isolation insulating film, gate oxide film, gate electrode, diffusion layer region, polysilicon plug, silicon oxide film, silicon nitride film, bit line, metal plug, nitride film, plasma oxide film, BPSG film, etc. (For example, refer to Patent Document 1). Moreover, in FIG. 1-5, although it does not show in particular with hatching, the cross section of each member is shown.

(Process b)
Next, after patterning the photoresist 4 using a photolithography process, holes are formed by anisotropic dry etching (concave portion Ka). As for the photoresist 4 and the dry etching method at this time, a normal object or method applied to this type of product may be applied.

(Process c), (Process d)
Furthermore, after opening, along the wall surface Wa of the recess Ka and the upper surface Wb of the molding film (silicon film) 2, the conductive film 5 made of TiN and the embedded film 6 for protecting the conductive film 5 (for example, polycrystalline silicon or amorphous A silicon film is sequentially formed. At this time, a recess formed intermediately (after formation of the conductive film 5) is shown as Kb.

(Process e) (Process f)
After the buried film 6 is formed, a part of the buried film 6 and the conductive film 5 (FIGS. 2 and 3) on the wafer surface is removed by CMP (Chemical Mechanical Polishing), and the etch back line E is exposed. Here, the second molding films 2a and 2b and the embedded film 6 are removed by wet etching. The films 2a and 2b may be removed step by step or at once. In the present invention, this step is important, and an etching solution according to the present invention described later exhibits a high effect. Through this step, the lower electrode (cylinder wall) 50 (FIG. 3) of the capacitor having the cylinder hole Kc is formed. The depth h ₂ of the cylinder bore wall is not particularly limited, considering the conventional construction of such a device, it is practical that a 500-2000 nm. Note that the etching solution of the present invention is preferably applied to the surface smoothed by the etch back or the like as described above, and it is preferable that the buried film is removed therefrom to form a trench structure.

(Process g)
After the formation of the lower electrode 50 of the capacitor formed as described above, the capacitor insulating film 9 is formed, and then the plate electrode (upper electrode) (not shown) is sequentially formed to form the capacitor structure 10. In this specification, the capacitor structure may be a capacitor itself or a structure part constituting a part of the capacitor. In the example shown in FIG. 4, the lower electrode 50, the capacitor insulating film 9, The capacitor structure 10 is shown as comprising. In the figure, the lower electrode 50 and the wafer 3 are shown as being separated from each other by the molding film 1. However, if necessary, the lower electrode 50 and the wafer 3 are electrically connected at the cross section or at different positions in the figure. May be interpreted as For example, a plug structure or damascene structure may be formed in the molding film 1 to ensure conduction, or the lower electrode 50 may be formed so as to penetrate the molding film 1. Further, the capacitor insulating film 9 may be formed not only on the lower electrode 50 but also on other substrate surfaces.

  FIG. 5 shows a modification of the capacitor structure of the above embodiment. In this example, the shape of the lower part 81 and the upper part 82 of the lower electrode (cylinder structure) is changed stepwise up and down from that of FIG. In the present invention, laminated sacrificial films are used, and it is preferable to adopt such an application form. Japanese Patent Application Laid-Open No. 2006-114896 can be referred to for diversification of electrode forms by changing the state of sacrificial film lamination. In order to do this, for example, there is an example in which the lower sacrificial film 2b and the upper sacrificial film 2a have different etching characteristics.

[Silicon etchant]
Next, a preferred embodiment of the silicon etching solution in the present invention that can be used extremely effectively for the wet etching described in the step e will be described.

The etching solution in the present invention is characterized by containing a quaternary ammonium hydroxide at a specific concentration. Specifically, it is essential to contain at 7 mass% or more and 25 mass% or less, and it is preferable that it is 9 mass% or more. By setting it to this lower limit value or more, extremely effective etching force can be exhibited in high temperature etching described later.
The upper limit is not particularly limited, but if this amount is too large, the increase in the etching effect reaches its peak, or on the contrary, it decreases, and it is preferable to limit it to an appropriate amount. Specifically, the quaternary ammonium hydroxide is preferably 18% by mass or less, and more preferably 15% by mass or less.

The etching solution according to the present invention is preferably prepared and etched in a form that prevents carbon dioxide from being mixed with an inert gas or the like. This is for the purpose of preventing this because the pH in the liquid becomes acidic due to the mixing of carbon dioxide and the etching is lowered. The CO ₂ concentration in the liquid is preferably suppressed to 1 ppm (mass basis) or less, and more preferably 0.1 ppm or less. Although there is no particular lower limit value for the CO ₂ concentration, it is practical that it is 0.001 ppm or more in consideration of inevitable contamination.

-Quaternary ammonium hydroxide As a quaternary ammonium hydroxide, the tetraalkylammonium hydroxide is preferable. Specifically, tetramethylammonium hydroxide (TMAH), tetraethylammonium hydroxide (TEAH), benzyltrimethylammonium hydroxide, ethyltrimethylammonium hydroxide, 2-hydroxyethyltrimethylammonium hydroxide, benzyltriethyl Examples thereof include ammonium hydroxide, hexadecyltrimethylammonium hydroxide, tetrabutylammonium hydroxide, tetrahexylammonium hydroxide, and tetrapropylammonium hydroxide.

  A tetraalkylammonium hydroxide having 3 or more methyl groups and / or ethyl groups is more preferred. Most preferred is tetramethylammonium hydroxide or ethyltrimethylammonium hydroxide.

  Although quaternary ammonium hydroxides may be used in combination of a plurality of types, it is preferable to use only one type. Thus, by using only one kind of quaternary ammonium hydroxide, a treatment liquid having a simple configuration can be obtained and a sharp etching effect can be obtained. In addition, it is preferable that the component of the treatment liquid is simpler, and it is preferable not to use two or more kinds of quaternary ammonium hydroxides or other additives as described above, and it is preferable to use one kind of quaternary ammonium. A substantially binary system of hydroxide and water, or a substantially ternary system of one kind of quaternary ammonium hydroxide, metal concealing material and water is preferable.

In this invention, it is preferable not to contain a hydroxylamine compound. Here, the hydroxylamine compound is a general term for hydroxylamine and its salts. Since hydroxylamine compounds are easily decomposed in the first place, they are not suitable for continuous use, but the tendency becomes more remarkable when combined with the quaternary alkylammonium hydroxide such as TMAH.
Furthermore, it is preferable that the etching solution of the present invention consists essentially of water and the quaternary alkyl ammonium hydroxide. Here, “substantially” means that inevitable impurities and trace components that have little influence on the effect may be included. Examples of such trace components include Na, K, Ca, Mn, Fe, Cu, Mg, and trimethylamine. The content of the trace component is preferably 10 ppm or less (mass basis).

[Processing conditions]
In the present invention, a quaternary ammonium hydroxide solution (chemical solution) is applied to a polycrystalline silicon film or an amorphous silicon film (hereinafter sometimes simply referred to as “silicon film”) under a condition of 80 ° C. or higher. The higher this temperature is, the faster the etching rate is, and it is preferable that the temperature is 82 ° C. or higher, and 85 ° C. or higher is more preferable. Especially preferably, it is 90 degreeC or more. Although the upper limit is not particularly limited, it is practical that the upper limit is 99 ° C. or lower, and more practical is 95 ° C. or lower in consideration of boiling of the chemical solution. The application temperature is the temperature on the wafer. This temperature refers to a value measured by the method employed in the examples described later.

In the present invention, when a single wafer type apparatus is used, it is preferable to discharge a heated chemical solution so that the temperature on the wafer becomes the specific temperature to contact the silicon film. Moreover, when using a batch type bathtub, since the temperature on a wafer turns into the bath temperature of an etching, it is preferable to adjust the bath temperature to the said range, to immerse a silicon film there, and to perform an etching process.
In any case, in the etching of the amorphous silicon film, it is preferable to omit the pretreatment for removing the oxide film with a hydrofluoric acid aqueous solution or the like, and the temperature of the chemical solution in the tank and / or in-line or the etching bath temperature is set. It is preferable to set it at 82 ° C. or higher.

  The present invention is more suitable for a method of processing one by one with a single wafer cleaning device than a batch method in which a chemical solution is put in an etching bath and a wafer is immersed.

[Supply system and heating]
In the present invention, the heated chemical supply line format is not particularly limited, but preferred examples are described below.
Example of chemical supply line 1) a) Chemical storage tank-> b) Heating tank-> c) Inline heating-> d) Discharge to wafer-> a) or b) 2) a) Chemical solution tank-> b) Heating tank-> d) Wafer 3) a) Chemical tank → c) In-line heating → d) Discharge onto wafer → a) 4) a) Chemical tank → b) Heating tank → e) Etching bath (circulation heating)
5) a) Chemical tank → e) Etching bath (circulation heating)
6) b) Heating tank → d) Discharge to wafer → b) 7) b) Heating tank → c) Inline heating → d) Discharge to wafer → b) 8) b) Heating tank → e) Etching bath (circulation) There are usage methods such as heating.

  The chemical solution used in the method of the present invention can be circulated and reused. Preferably, it is a method of circulating and reusing rather than pouring (no reuse). Circulation can be performed for 1 hour or more after heating, and repeated etching can be performed. Although there is no upper limit time for circulating reheating, replacement within one week is preferable because the etching rate deteriorates. Within 3 days is more preferable, and it is particularly preferable to replace with a new solution every day. Moreover, since an alkaline chemical | medical solution has the property to absorb a carbon dioxide, it is preferable to use it as a sealed system as much as possible, or to use it, flowing nitrogen. Nitrogen flow is more preferred. In the above-described line type etching, the measurement position of the heating temperature of the chemical solution may be appropriately determined in relation to the line configuration or the wafer, but typically may be managed based on the tank temperature. If measurement and management are possible, such as when severer conditions are required, the temperature may be defined by the wafer surface temperature.

Hereinafter, preferred modifications of the present invention will be described.
In the manufacturing method of the present invention, it is preferable to carry out the etching after the step of cleaning the semiconductor substrate with ultrapure water, the step of removing the silicon oxide film, and the step of cleaning the semiconductor substrate with ultrapure water again. Thereby, an effect of reducing defects (residue residue, defects, particles, etc.) can be expected. Furthermore, after the silicon oxide film removing step, it is also preferable from the same viewpoint to perform water washing with warmed (for example, 50 to 80 ° C.) ultrapure water. Furthermore, from the same viewpoint, it is also preferable to preheat the wafer (for example, 50 to 80 ° C. at the wafer surface temperature) and then perform the etching after the cleaning process with the ultra-pure water again. The ultrapure water is preferably nitrogen-substituted ultrapure water.

In the present invention, the etching is preferably performed by any one of the following processes A and B as described above.
[A: The aqueous solution at the specific temperature is discharged in the heating tank and / or in-line to bring the solution into contact with the silicon film. ]
[B: The aqueous solution in the bath is set to the specific temperature, and the silicon film is immersed in the aqueous solution and brought into contact therewith. ]
In the A process, it is preferable to perform etching at a semiconductor substrate rotation speed of 1000 rpm or more. In the A process, it is also preferable to perform etching while moving the chemical nozzle at a rate of 20 reciprocations / minute or more and at least 2 cm from the center of the semiconductor substrate. By doing in this way, the effect of improvement of in-plane uniformity can be expected.

[Additive]
The chemical solution used in the present invention may contain additives other than quaternary ammonium hydroxide. For example, metal masking agents, etching accelerators, etching inhibitors for members other than silicon, and the like can be mentioned. Among these, it is preferable to add a metal masking agent.
Although there is no restriction | limiting in particular as a metal masking agent to add, Complexane is preferable. Aminopolycarboxylic acids are more preferable, and EDTA (ethylenediaminetetraacetic acid), DTPA (diethylenetriaminepentaacetic acid), and CyDTA (cyclohexanediaminetetraacetic acid) are more preferable.

  The addition amount is preferably 0.00001 to 1% by mass, and more preferably 0.0001 to 0.1% by mass.

  By applying the present invention, it becomes possible to accurately remove the polycrystalline silicon film or the amorphous silicon film related to the formation of the capacitor structure having the uneven shape as described above without damaging the members such as electrodes. .

  In general, the higher the temperature, the higher the solubility, but the solubility order does not necessarily coincide with the dissolution rate order. The method of increasing the solubility varies depending on the material, and salt (sodium chloride) and the like slightly increase the solubility, but alum (potassium aluminum sulfate) and the like rapidly increase in accordance with the temperature. The solubility of polycrystalline silicon and amorphous silicon used in the present invention is substantially the same, and the solubility increases rapidly as the temperature rises. However, there is a difference between the two dissolution rates, and polycrystalline silicon generally has a higher dissolution rate in an alkaline solution. However, in the method of the present invention, it is possible to accurately remove the silicon film regardless of the process regardless of the difference, which is one of the advantages of the present invention.

  In the present specification, a liquid containing a specific agent or a liquid containing a combination means a liquid composition containing the agent, and each agent or a liquid containing the agent is mixed before use. The meaning as a kit is included.

(PH)
The silicon etching solution of the present invention is alkaline and is preferably adjusted to pH 11 or higher. This adjustment can be performed by adjusting the amount of the alkali compound and other additives. However, as long as the effects of the present invention are not impaired, other pH adjusting agents may be used to adjust the pH within the above range. The pH of the silicon etching solution is preferably 12 or more, and more preferably 13 or more. When this pH is equal to or higher than the lower limit, a sufficient etching rate can be obtained. There is no particular upper limit to the pH, but it is practical that it is 14 or less. In the present invention, unless otherwise specified, pH is a value measured at room temperature (25 ° C.) with F-51 (trade name) manufactured by HORIBA.

(Aqueous medium)
The etching solution of the present embodiment is preferably an aqueous liquid composition (aqueous solution) using an aqueous medium as a medium. An aqueous medium refers to an aqueous solution in which water and a water-soluble solute are dissolved. Examples of the solute include alcohols and salts of inorganic compounds. However, even when the solute is applied, it is preferable that the amount thereof be suppressed within a range where a desired effect is exhibited. The aqueous composition or aqueous solution means that water is the main medium, and the majority (mass basis) of the medium other than the solid content is preferably water, more preferably 80% by mass or more. , 85% by mass or more is particularly preferable.
Needless to say, it is preferable that water is basically low in impurities, particularly in view of application to semiconductor manufacturing, which is a preferred application of the present invention. Specifically, it is preferable that the metal content capable of affecting the semiconductor, halogen anions (Cl-, Br-, etc.) other than fluorine included in the present invention, and other impurities be as small as possible. Examples of a method for obtaining such water include an ion exchange method.

(Silicon substrate surface treatment)
In the present embodiment, it is preferable to apply an oxide film removal process that is naturally formed on the surface of the silicon substrate without combining it, particularly for an amorphous silicon film. This eliminates the need to apply the etching solution before applying it, leading to a reduction in time. The surface treatment method is not limited as long as the formed oxide film can be removed. For example, the surface treatment may be performed with an acidic aqueous solution containing fluorine atoms. The acidic aqueous solution containing fluorine atoms is preferably hydrofluoric acid, and the content of hydrofluoric acid is about 0.1 to about 5% by mass with respect to the total mass of the liquid of the present embodiment. It is preferably 0.5 to 1.5% by mass.

  In this specification, the term “semiconductor substrate” is used to mean not only a wafer but also the entire substrate structure having a circuit structure formed thereon. A semiconductor substrate member refers to the member which comprises the semiconductor substrate defined above, and may consist of one material or may consist of several materials. A processed semiconductor substrate is sometimes referred to as a semiconductor substrate product, and is further distinguished as necessary, and a chip that has been processed and diced out and processed product thereof is referred to as a semiconductor element. That is, in a broad sense, a semiconductor element belongs to a semiconductor substrate product.

(Workpiece)
Any material can be etched by applying the etching solution of the present embodiment, but examples of a substrate material used for manufacturing a general capacitor include polycrystalline silicon and / or amorphous silicon. Are stacked. From the viewpoint of omitting the pretreatment for removing the oxide film, a laminated film including at least one amorphous silicon layer is preferable, a laminated film in which at least the uppermost layer is an amorphous silicon layer is more preferable, and a laminated film including only an amorphous silicon layer is provided. Particularly preferred.
On the other hand, a Ti compound such as titanium nitride (TiN) can be cited as an electrode material that forms the core of the capacitor structure (however, the present invention is not limited to the electrode material and may be an etching form that leaves a part of the substrate constituent member containing TiN. Good.) That is, it is preferable that the etching solution of the present embodiment has a large ratio (ERs / ERe) between the etching rate (ERs) of the substrate material and the etching rate (ERe) of the constituent member such as the electrode material. The specific ratio value is not particularly limited because it depends on the type and structure of the material, but ERs / ERe is preferably 100 or more, more preferably 200 or more. Although there is no particular upper limit, it is practical that the upper limit is 100,000 or less.
In this specification, using an etchant to etch a silicon substrate is referred to as “application”, but the embodiment is not particularly limited. Typically, the etching is performed by bringing the etching solution into contact with the substrate. For example, the etching may be performed by dipping in a batch type or by discharging by a single wafer type. In addition, Ti compound is the meaning containing Ti itself and the compound containing this. In addition to TiN, Ti, and further a composite compound of Ti, N, and C can be used. Of these, TiN is preferable.

The shape and dimensions of the capacitor structure to be processed are not particularly limited. However, if the cylinder structure as described above is used, the etching liquid of this embodiment is particularly high when the aspect ratio of the cylinder hole is 5 or more. The effect is utilized and preferable. From the same viewpoint, the aspect ratio is preferably 10 or more, more preferably 15 or more, and even more preferably 20 or more. Although there is no upper limit, it is practical that the aspect ratio is 100 or less. But not limited opening diameter d _c in particular of the cylinder bore, the effect is exhibited in the present embodiment, in consideration of the miniaturization of the recent capacitor structure, it is preferable in 20 to 80 nm. In the present specification, the trench or its structure is a concept including a cylinder structure, and is not particularly limited as long as it has a concave shape in a specific cross section, and not only a groove shape but also a hole shape. It may be the shape, conversely, a large number of needle-like structures protruding around it. Taking FIG. 3 as an example, the cylinder hole Kc corresponds to the hole-shaped trench structure, in which the concave portion Kd corresponds to a trench structure including a large number of needle-shaped structure portions protruding therefrom. Aspect ratio, the cylinder bore Kc is a value obtained by dividing the depth h ₂ of the width d _c of the concave portion. The aspect ratio of the concave portion Kd forming the periphery of needle-like structures have been many projects, for example, a value obtained by dividing the depth h ₁ of the concave portion in the width d _d.

Furthermore, from the above viewpoint, in the present invention, it is preferable to perform etching on the polycrystalline silicon film or the amorphous silicon film while leaving at least the capacitor constituting member containing TiN on the wall surface of the uneven structure. The components, other than TiN, HfOx, SiN, may contain SiO ₂ and the like. TiN typically forms an electrode film. Also, a semiconductor substrate having a substantially flat surface having the polycrystalline silicon film or the amorphous silicon film is prepared, and the etching solution is applied to a surface of the semiconductor substrate, and the polycrystalline silicon film or the amorphous silicon film is formed. It is preferable that the removed portion be a concave portion and the convex portion left in the substrate be a capacitor. At this time, it is preferable that the TiN film remains on the wall surface of the recess. That is, according to the etching solution of the preferred embodiment of the present invention, if necessary, it can be applied to a capacitor structure including an electrode having a cylinder structure. The polycrystalline silicon film or the amorphous silicon film (including the outside) can be selectively removed.

The process requirements relating to the preferred method for manufacturing a semiconductor substrate product in the present invention are described below.
(1) Preparing a semiconductor substrate having a silicon film (laminated film) made of a polycrystalline silicon film or an amorphous silicon film, and applying a specific etching solution to the semiconductor substrate to etch at least a part of the silicon film The process of carrying out.
(2) In the step of preparing the semiconductor substrate, a multilayer film structure including the silicon film is formed, and irregularities are formed on the semiconductor substrate,
Forming a conductive film on at least the upper surface of the irregular surface and the wall surface of the recess;
Providing a buried film on the conductive film and filling the recess with the buried film;
Removing the conductive film portion applied to the upper surface and a part of the embedded film to expose the silicon film of the semiconductor substrate, and
In the silicon film etching step, the etching solution is applied to the semiconductor substrate to remove the exposed silicon film and the embedded film while leaving the conductive film on the wall surface of the recess.
(3) A semiconductor substrate having a substantially flat surface is prepared, the etching solution is applied to the surface of the semiconductor substrate, the silicon film and the embedded film are removed, and the removed portion Is a concave portion, and the convex portion including the conductive film left in the substrate is a capacitor electrode.
In the present invention, preparation means not only preparation or production using raw materials but also procurement by simply purchasing.

<Example 1, comparative example 1>
An etching solution was prepared by containing the components shown in Table 1 below and the composition (mass%) shown in the following formulation. In addition, Test No. The etching solutions 101 to 111 all had a pH of 13 or more.

<T (wafer) measurement method>
A radiation thermometer IT-550F (trade name) manufactured by HORIBA, Ltd. was fixed at a height of 30 cm above the wafer in the single wafer type apparatus. A thermometer was directed onto the wafer surface 2 cm outside from the wafer center, and the temperature was measured while flowing a chemical solution. The temperature was digitally output from the radiation thermometer and recorded on a personal computer. Among these temperatures, a value obtained by averaging the temperatures for the last 10 seconds of the processing time was defined as the temperature on the wafer.
<Etching test>
Test wafer: A wafer was prepared by depositing a 100 nm silicon oxide film on single crystal <100> silicon and laminating two 500 nm thick amorphous silicon films deposited on the silicon oxide film. On the other hand, 0.5% hydrofluoric acid solution (23 ° C., 2 L / min, 500 rpm) with a single-wafer type apparatus (manufactured by SPS-Europe B.V., POLOS (trade name)). Pretreatment was performed for 1 minute, and the substrate was sufficiently washed with pure water (23 ° C., 2 L / min, 500 rpm, 30 seconds). After rotating at 2000 rpm for 30 seconds to completely remove water, etching was performed under the following conditions to perform an evaluation test. A wafer having a diameter of 300 mm was used, and the time required until the remaining film of the laminated silicon film disappeared was visually measured.

・ Chemical solution temperature: listed in Table 1 ・ Discharge rate: 2 L / min.
・ Wafer rotation speed 1000rpm

試験Ｎｏ．１＊＊ 実施例
試験Ｎｏ．ｃ＊＊ 比較例
ＴＭＡＨ：テトラメチルアンモニウム水酸化物
ＴＢＡＨ：テトラブチルアンモニウム水酸化物
Ｔ（ｔａｎｋ）：タンク内のエッチング液温度
Ｔ（ｗａｆｅｒ）：ウエハの表面温度

Test No. 1 ** Example Test No. c ** Comparative Example TMAH: Tetramethylammonium hydroxide TBAH: Tetrabutylammonium hydroxide T (tank): Etch solution temperature in tank T (wafer): Wafer surface temperature

As shown in the above table, according to the silicon etching method of the present invention, a sufficient etching rate was realized for the laminated amorphous silicon. Furthermore, it was confirmed that the silicon etching solution of the present invention caused very little damage to each film on TiN which is a constituent member such as an electrode material of the element.
On the other hand, in the comparative example, the etching rate was low. In recent years, a short time (1 to 2 minutes) treatment of a thick film has been desired, but it has not been suitable for the treatment.

<Example 2>
A test wafer was formed by depositing a 100 nm silicon oxide film on single crystal <100> silicon and laminating two 500 nm thick polycrystalline silicon layers deposited on the silicon oxide film. In the same manner as in Example 1, etching was performed under the following conditions, and an evaluation test was performed.

  As shown in the above table, according to the silicon etching method of the present invention, a high etching rate was realized even with laminated polycrystalline silicon compared to the comparative example.

<Example 3>
A test wafer is formed by depositing a 100 nm silicon oxide film on single crystal <100> silicon, and 500 nm thick amorphous silicon (lower layer) and polycrystalline silicon (upper layer) formed on the silicon oxide film. Etching was performed under the following conditions in the same manner as in Example 1 except that the laminated wafers were used, and an evaluation test was performed.

  As shown in the above table, according to the silicon etching method of the present invention, a high etching rate was realized even with laminated amorphous silicon / polycrystalline silicon compared to the comparative example.

<Example 4>
A 100 nm silicon oxide film formed on a single crystal <100> silicon is formed on a test wafer, and polycrystalline silicon (lower layer) and amorphous silicon (upper layer) each having a thickness of 500 nm are formed on the silicon oxide film. Etching was performed under the following conditions in the same manner as in Example 1 except that the laminated wafers were used, and an evaluation test was performed.

  As shown in the above table, according to the silicon etching method of the present invention, a high etching rate was realized with respect to the comparative example even in the case of laminated polycrystalline silicon / amorphous silicon.

<Example 5>
Next, in order to confirm the stability of the treatment liquid, the following experiment was performed by circulating the treatment liquid using the single wafer apparatus. That is, in the same manner as in Example 1, a treatment liquid having the formulation described in the following table was prepared. Here, hydroxylamine sulfate (HAS) was added to sample 502. Both solutions were applied to the cleaning of the silicon film in the same manner as in Example 1, and the change in activity over time was evaluated.

  Both of them showed excellent performance that was almost equivalent in terms of initial film removability. However, after 24 hours, the activity of the sample 502 decreased, resulting in a longer film removal time. From these results, it can be seen that it is preferable not to use a component that lowers the stability of HA or the like in the etching solution of the present invention under conditions that require long-term stability, such as when film treatment is performed in a circulation system.

DESCRIPTION OF SYMBOLS 1 1st molding film 2 2nd molding film (sacrificial film)
3 Silicon wafer 4 Photoresist 5 Conductive film 6 Buried film (sacrificial film)
9 Capacitance insulating films 10, 20 Capacitor structure 50 Lower electrode (cylinder wall)

Claims (6)

A step of forming a sacrificial film on a semiconductor substrate; a step of sequentially patterning the sacrificial film to form an opening; a step of forming a lower electrode that covers an inner wall and a bottom surface of the opening; and A method of forming a capacitor including a step of removing by wet etching,
A multilayer film of a polycrystalline silicon film and / or an amorphous silicon film is formed as the sacrificial film,
A method of forming a capacitor, comprising applying an aqueous solution containing 7% by mass or more and 25% by mass or less of a quaternary alkylammonium hydroxide under a condition of 80 ° C. or higher in the wet etching step to etch at least a part of the sacrificial film.   The capacitor forming method according to claim 1, wherein the lower electrode includes a Ti compound, and the sacrificial film portion is selectively etched with respect to the Ti compound.   The capacitor forming method according to claim 1, wherein the aqueous solution contains only one kind of quaternary alkyl ammonium hydroxide.   The capacitor forming method according to claim 1, wherein the aqueous solution is applied to the sacrificial film in an inert atmosphere.   5. The capacitor forming method according to claim 1, wherein the lower electrode has a cylinder structure having an aspect ratio (depth / opening width) of 15 to 100. 6.   The capacitor forming method according to claim 1, wherein the sacrificial film includes a laminated film of amorphous silicon.

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