JP2012175424A - Encoding processing apparatus and encoding processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable reduction in power consumption and miniaturization, while improving speed of encoding processing.SOLUTION: Encoding processing parts 120, 121, and 122 encode a macro block which is not in contact with an area boundary by a first encoding mode of encoding using information of a macro block adjacent to the macro block. The encoding processing parts 120, 121, and 122 encode a macro block which is in contact with an area boundary by a second encoding mode of encoding using information of only the macro block or information of a macro block which exists within an area the macro block belongs to and which is adjacent to the macro block.

Description

  The present invention relates to a moving image compression encoding process in a device having a moving image shooting function such as a movie, a digital camera, a camera-equipped mobile phone, or an image content creation device.

  In recent years, moving picture compression encoding technology such as MPEG (moving picture experts group) that performs high-efficiency encoding has been rapidly put into practical use, and is widely used in video cameras and mobile phones. Further, with regard to the encoding resolution and the frame rate, the performance has been improved, and high-resolution moving images such as the number of horizontal pixels 1920, the number of vertical pixels 1088, and 60 fps (frame per second) called full high vision have become mainstream. In the future, it is expected that the number of horizontal pixels will be around 4000 and vertical pixels will be around 4K2K. Furthermore, the number of horizontal pixels will be around 8000 and the number of vertical pixels will be around 8K4K. The As the resolution and the frame rate increase, it is necessary to realize processing at high speed.

  In contrast, conventionally, a plurality of encoding processing circuits are provided, the frame is divided into the same number of regions as the number of encoding processing circuits, and each encoding processing circuit takes charge of the encoding processing in each region. Thus, an image encoding apparatus that performs encoding processing at high speed has been proposed (see Patent Document 1).

  As shown in FIG. 17, for example, when the image coding apparatus performs processing in a first area and a second area, the first area performs processing in the order of macroblocks 1_1, 1_2, 1_3,. At the same time, in the second area, the processing is performed in the order of the macro blocks 2_1, 2_2, 2_3,.

Japanese Patent No. 3639610

  However, MPEG-4 AVC / H. In the H.264 encoding method, for example, when performing encoding processing for encoding pixel value data of a macroblock constituting a B picture (pixel value data corresponding to an inter-frame prediction error in the case of a B picture), the macro Encoding processing is performed using information on motion vectors of macroblocks adjacent to the block. For example, when encoding the prediction error data of the macro block 2_1 in FIG. 17, information on motion vectors of the macro blocks 1_n, 2_2, and 2_n + 1 adjacent to the macro block 2_1 is required. Then, when the encoding process is performed on the macroblock 2_1, the encoding process has already been completed on the macroblocks 1_n, 2_2, and 2_n + 1, and motion vector information on the macroblocks 1_n, 2_2, and 2_n + 1 is prepared. There is a need. In addition, in the process of generating a reference image for motion search, deblock filter processing is executed using pixel value data of macro blocks adjacent to each other to remove block noise. For example, when generating a reference image for the macroblock 2_1 in FIG. 17, pixel value data of the macroblock 1_n and the like are required.

  Therefore, when the encoding processing device described in Patent Document 1 is used, the encoding processing of the information of the macroblock 2_1 is waited until the motion vector information or pixel value data of the macroblock 1_n is generated. Become.

  Further, as described above, the encoding processing apparatus described in Patent Document 1 uses information on macroblocks belonging to one area for encoding macroblocks belonging to another area, and therefore belongs to one area. An extra buffer memory is required to hold the macroblock information until the macroblocks belonging to other areas are encoded.

  The present invention has been made in view of the above reasons, and reduces power consumption by reducing the capacity of a buffer memory for holding macroblock information while speeding up the encoding process, and The goal is to reduce the size.

  The encoding processing apparatus according to the present invention includes a frame dividing unit that divides image data into a plurality of regions arranged in a horizontal direction so that each region includes three or more macroblock sequences in the horizontal direction, and each region. A specific part for identifying the macroblock that is in contact with the boundary of the area and an encoding processing part as many as the number of areas to be divided, and the macroblock group belonging to each area is encoded in parallel for each area. A parallel processing system that is distributed and supplied so as to be encoded and processed in parallel, and each encoding processing unit in the parallel processing system is concerned with a macroblock that is not in contact with the boundary of the region. For a macroblock that is encoded in the first encoding mode that uses the information of the macroblock adjacent to the macroblock and is in contact with the boundary of the region, information on the macroblock alone or Second encoding mode in which encoding is performed without using information on a macroblock existing in an area to which the macroblock belongs and using information on a macroblock adjacent to the macroblock, and not existing in an area to which the macroblock does not belong Encode with

  According to this configuration, when processing is performed by dividing into a plurality of areas, when a macroblock to be encoded touches the boundary of the area, information on a single macroblock to be encoded or the macroblock By encoding using information on macroblocks that exist in the area to which the macro belongs and that are adjacent to the macroblock, information on macroblocks in other areas is generated when encoding each of the plurality of areas. Therefore, the encoding process can be performed in parallel in a plurality of areas at the same time, so that the encoding process can be speeded up.

  Also, according to this configuration, since it is not necessary to use macroblock information of other areas when encoding each of the plurality of areas, the macroblock information used in the encoding process of other areas is retained. Therefore, it is possible to reduce the power consumption required for driving the buffer memory and to reduce the size by reducing the space for the buffer memory.

  In the encoding processing device according to the present invention, the specifying unit specifies a macroblock that is in contact with the boundary from the right side among the macroblocks that are in contact with the boundary of the region. In encoding in the encoding mode, for all macroblocks in the area excluding the macroblock that is adjacent to the boundary from the right side, among the macroblocks adjacent to the macroblock, Encoding is performed using information on neighboring macroblocks adjacent to each other, and encoding in the second encoding mode may be performed on a macroblock that is in contact with the boundary from the right side.

  According to this configuration, even when processing is performed by dividing into multiple regions, encoding processing is performed using information on macroblocks existing in each region without using information on other regions. Therefore, a plurality of areas can be processed in parallel. Furthermore, the amount of code when each frame is encoded can be reduced.

  Further, the encoding processing apparatus according to the present invention divides image data into a plurality of regions arranged in the horizontal direction and the vertical direction so that each region includes three or more macroblock columns in the horizontal direction for each frame. Each region, a specific unit that identifies a macroblock that is in contact with the boundary of the region, and an encoding processing unit that is the same number as the number of regions to be divided. A parallel processing system that is distributed and supplied in parallel so as to be encoded in parallel, and the encoding processing unit in the parallel processing system is provided for macroblocks that are not in contact with the boundary of the region. Is encoded in the first encoding mode that is encoded using information on the macroblock adjacent to the macroblock. Or the information of a macroblock that is present in the area to which the macroblock belongs and that is adjacent to the macroblock, and is encoded without using the information of the macroblock that exists in the area to which the macroblock does not belong. You may encode by 2 encoding mode.

According to this configuration, it is possible to further improve the processing capability by subdividing the areas where encoding processing is performed in parallel.
In the encoding processing apparatus according to the present invention, the specifying unit specifies a macroblock that is in contact with the boundary from the right side or the lower side among the macroblocks that are in contact with the boundary of the region. In encoding in the first encoding mode, macroblocks adjacent to the macroblock for all the macroblocks in the area excluding the macroblock that is in contact with the boundary from the right side or the lower side. Among them, encoding is performed using information of neighboring macroblocks adjacent to the macroblock, and in the encoding in the second encoding mode, for the macroblock that is in contact with the boundary from the right side or the lower side. You may do it.

According to this configuration, it is possible to reduce the code amount when each frame is encoded while further improving the processing capability.
In the encoding processing device according to the present invention, the second encoding mode may be a mode in which I-PCM encoding is performed.

In the encoding processing device according to the present invention, the second encoding mode may be a mode in which not_coded encoding is performed.
According to another aspect of the present invention, there is provided an analog / digital converter for converting an analog image signal into a digital image signal and outputting the digital image signal, and encoding the digital image signal output from the analog / digital converter for output. A signal processing system including a processing device may be used.

According to this configuration, it is possible to realize a signal processing system that has high processing capability and can be widely applied to an apparatus that outputs an analog image signal.
In addition, the present invention provides an optical unit that includes an optical system that generates a subject image, a sensor that converts the subject image generated by the optical unit into an analog image signal, and outputs the analog image signal. It may be a video system provided with the above-described signal processing system that outputs a digitized digital image signal.

According to this configuration, it is possible to reduce the time required for encoding by processing an analog image signal at a high speed, so that a video system with low power consumption can be realized.
The present invention is also an encoding processing method performed using an encoding processing device including a frame dividing unit, a specifying unit, and a parallel processing system, wherein the frame dividing unit stores image data for each frame, A frame dividing step of dividing into a plurality of regions arranged in the horizontal direction so as to include three or more macroblock columns in the horizontal direction, and a specifying step in which the specifying unit specifies a macroblock in contact with the boundary of the region for each region When the parallel processing system is distributed and supplied so that the macroblock group belonging to each region is encoded in parallel for each region to the same number of encoding processing units as the number of regions to be divided, In the parallel processing step, for the macroblock that is not in contact with the boundary of the region, the encoding processing unit performs a macroblock adjacent to the macroblock. For the first encoding step that encodes using information and the macroblock that is in contact with the boundary of the region, the encoding processing unit exists in the information of the macroblock alone or in the region to which the macroblock belongs. And a second encoding step that uses the information of the macroblock adjacent to the macroblock and performs the encoding without using the information of the macroblock existing in the area to which the macroblock does not belong. May be.

  According to this configuration, when processing is performed by dividing into a plurality of regions, if a macroblock to be encoded touches the boundary of the region, information on a single macroblock to be encoded or the macro By encoding using information on macroblocks that exist in the area to which the block belongs and that are adjacent to the macroblock, information on macroblocks in other areas is generated when encoding each of the plurality of areas. Therefore, it is possible to perform the encoding process in parallel in a plurality of areas at the same time.

  Further, according to the present invention, in the specifying step, the specifying unit specifies a macroblock in contact with the boundary from the right side among the macroblocks in contact with the boundary. In the parallel processing step, each encoding processing unit For all macroblocks in the area except for the macroblock that is adjacent to the boundary from the right side, the macroblock among the macroblocks adjacent to the macroblock is encoded in one encoding mode. A first encoding step that performs encoding using information on neighboring macroblocks adjacent to the first macroblock, and a second encoding mode that performs encoding on a macroblock that is in contact with the boundary from the right side. An encoding processing method including two encoding steps may be used.

  According to this configuration, even when processing is performed by dividing into multiple regions, encoding processing is performed using information on macroblocks existing in each region without using information on other regions. Therefore, a plurality of areas can be processed in parallel. Furthermore, the amount of code when each frame is encoded can be reduced.

  The present invention is also an encoding processing method performed using an encoding processing device including a frame dividing unit, a specifying unit, and a parallel processing system, wherein the frame dividing unit stores image data for each frame, A frame dividing step of dividing into a plurality of regions arranged in the horizontal direction and the vertical direction so as to include an integer number of macroblocks; and a specifying step in which the specifying unit specifies a macroblock that is in contact with the boundary of the region for each region; When the parallel processing system is distributed and supplied so that the macroblock group belonging to each region is encoded in parallel for each region to the same number of encoding processing units as the number of regions to be divided, In the parallel processing step, for a macro block that is not in contact with the boundary of the region, the encoding processing unit performs a macro block adjacent to the macro block. For the first encoding step that encodes using the information of the macroblock and the macroblock that is in contact with the boundary of the region, the encoding processing unit exists in the information of the macroblock alone or in the region to which the macroblock belongs And a second encoding step that uses the information of the macroblock adjacent to the macroblock and performs the encoding without using the information of the macroblock existing in the area to which the macroblock does not belong. There may be.

According to this configuration, it is possible to further improve the processing capability by subdividing the areas where encoding processing is performed in parallel.
Further, according to the present invention, in the specifying step, the specifying unit specifies a macroblock in contact with the boundary from the right side or the lower side among the macroblocks in contact with the boundary, and in the parallel processing step, each encoding processing unit The macroblock adjacent to the macroblock for all the macroblocks in the area excluding the macroblock that is in contact with the boundary from the right side or the lower side in the encoding in the first encoding mode. Of these, the first encoding step for encoding using information of neighboring macroblocks adjacent to the macroblock and the encoding in the second encoding mode are touched from the right side or the lower side with respect to the boundary. The encoding processing method may include a second encoding step performed on a macroblock.

According to this configuration, it is possible to reduce the code amount when each frame is encoded while further improving the processing capability.
The present invention may also be an encoding processing method that performs I-PCM encoding in the second encoding step.

  Further, the present invention may be an encoding processing method that performs not_coded encoding in the second encoding step.

FIG. 4 is an operation explanatory diagram of the encoding processing device according to the first embodiment. 1 is a configuration diagram of an encoding processing apparatus according to Embodiment 1. FIG. 3 is a configuration diagram of an encoding processing unit according to Embodiment 1. FIG. 6 is an operation explanatory diagram of an encoding processing unit according to Embodiment 1. FIG. 6 is an operation explanatory diagram of an encoding processing unit according to Embodiment 1. FIG. 6 is an operation explanatory diagram of an encoding processing unit according to Embodiment 1. FIG. 6 is a flowchart showing the operation of the coding mode control unit according to the first embodiment. 3 is a flowchart showing an operation of an encoding processing unit according to the first embodiment. 6 is an operation explanatory diagram of the encoding processing device according to Embodiment 1. FIG. 6 is a configuration diagram of an encoding processing unit according to Embodiment 2. FIG. 6 is a configuration diagram of an imaging system according to Embodiment 3. FIG. It is a block diagram of the encoding processing apparatus which concerns on a modification. It is operation | movement explanatory drawing of the encoding processing apparatus which concerns on a modification. It is operation | movement explanatory drawing of the encoding processing apparatus which concerns on a modification. It is operation | movement explanatory drawing of the encoding processing apparatus which concerns on a modification. It is operation | movement explanatory drawing of the encoding processing apparatus which concerns on a modification. It is operation | movement explanatory drawing of a prior art example.

<Embodiment 1>
<1> Outline The encoding processing apparatus according to the present embodiment includes three encoding processing units that encode image data in units of macroblocks. As shown in FIG. The area is divided into three areas (first area, second area, and third area) so as to include an integer number of macroblocks, and each of the encoding processing units is responsible for the encoding process of each area.

Here, each encoding processing unit only receives information on macroblocks belonging to a region that it is in charge of (for example, information indicating the encoding type of macroblocks, information on motion vectors, pixel value data) during the encoding process. Is used to perform encoding processing, and these pieces of information belonging to other areas are not used. Thereby, regardless of whether each encoding processing unit has generated information belonging to another region (that is, without waiting for encoding processing until information belonging to another region is generated), Since the encoding process can proceed, the encoding processing units can execute the encoding process of each region in parallel at the same time, so that the encoding process can be speeded up. .
<2> Configuration <2-1> Overall Configuration FIG. 2 shows a configuration of encoding processing apparatus 100 according to the present embodiment. As shown in FIG. 2, the encoding processing apparatus 100 includes a frame dividing unit 110, an encoding mode control unit 111, three encoding processing units 120, 121, and 123, an encoded data storage unit 130, and an encoded data level. And a replacement unit 131.

  For example, a digital image signal obtained by analog-to-digital conversion of an analog image signal output from a digital still camera or the like (not shown) is input to the encoding processing apparatus 100 (arrow A1 in FIG. 2). .

  The frame dividing unit 110 divides the image data for each frame in the horizontal direction so that each area includes an integer number of macroblocks, and outputs information indicating which area each macroblock belongs to. Here, the frame division unit 110 calculates the order of macroblocks (how many positions are located from the left end of the macroblock line) for each macroblock line, and manages the macroblock position management data indicating the order of the macroblocks. Input to the unit 112 (arrow A10 in FIG. 2). At this time, the frame division unit 110 also inputs information indicating the macroblock line to which the macroblock belongs to the macroblock position management unit 112. The macroblock position management unit 112 stores data indicating the order of macroblocks located at the left end of each area in advance. Here, since the size of one frame of the image data indicated by the input digital image signal and the sizes of the three areas are fixed, the order of the macroblocks located at the left end of each area is set as a fixed value. It is managed by the position management unit 112. Then, the frame dividing unit 110 compares each macroblock by comparing the order of macroblocks to be determined with the order of macroblocks located at the left end of each area acquired from the macroblock position management unit 112. The area to which it belongs is determined.

  For example, in the example shown in FIG. 2, for the macroblock line 1, the order of the macroblock 1_1 belonging to the first area is “1”, the order of the macroblock 2_1 located at the left end of the second area is “n + 1”, the third The order of the macroblock 3_1 located at the left end of the area is “2n + 1”. Then, the frame dividing unit 110 determines an area to which each macroblock belongs, based on a magnitude relationship between a numerical value indicating the order of each macroblock and a numerical value indicating the order of the macroblock located at the left end of each area. That is, when the order of macroblocks is between “1” and “n”, it is determined that the macroblock belongs to the first area, and when it is between “n + 1” and “2n”. Is determined to belong to the second region, and if it is between “2n + 1” th to “3n” th, it is determined to belong to the third region.

  Then, the frame division unit 110 distributes each macroblock to the three encoding processing units 120, 121, and 122 based on the determination result (arrows A2, A3, and A4 in FIG. 2). Here, macroblocks belonging to the first region are allocated to the encoding processing unit 120, macroblocks belonging to the second region are allocated to the encoding processing unit 121, and macroblocks belonging to the third region are distributed to the encoding processing unit 122. Supply.

  Thereafter, these processes are performed on the macroblock line 2 to the macroblock line m, so that the macroblocks constituting one frame are distributed and supplied to the three encoding processing units 120, 121, and 122.

  The encoding mode control unit (specification unit) 111 uses information output from the frame division unit 110, that is, information indicating which of the first to third regions each macroblock belongs to for each region. Identify macroblocks that touch the boundary of the region. The encoding processing units 120, 121, and 122 are in a first encoding mode (hereinafter, referred to as “normal encoding mode”) that encodes a macroblock that is not in contact with an area boundary by a normal encoding method. The second encoding mode (hereinafter referred to as “intra-region code”) that processes and identifies the macroblock that is identified by the encoding mode control unit 111 and is in contact with the boundary of the region, using information of the macroblock alone. Process). Here, the encoding mode control unit 111 sets the encoding processing units 120, 121, and 122 to the normal encoding mode when the encoding target macroblock does not touch the region boundary, and sets the encoding target macroblock to the encoding target macro. When the block touches the region boundary, the encoding processing units 120, 121, and 122 are set to the intra-region encoding mode.

  In addition, the encoding mode control unit 111 acquires data indicating the order of macroblocks and data indicating the order of macroblocks located at the left end of each region from the macroblock position management unit 112 (arrow A12 in FIG. 1). ) Based on these data, the macroblock that touches the boundary of the region is specified. Then, when the encoding processing units 120, 121, and 122 are set to the normal encoding mode, the encoding mode control unit 111, which will be described later, provided in each of the encoding processing units 120, 121, and 122, is an MB type control unit 990. An encoding mode signal containing an instruction to perform encoding processing in the normal encoding mode is input. On the other hand, when the encoding processing units 120, 121, and 122 are set to the intra-region encoding mode, an encoding mode signal including an instruction to perform the encoding processing in the intra-region encoding mode is input to the MB type control unit 990. To do.

  Here, for the encoding processing unit 120, when the order of the macroblocks is between the first and the “n−1” th, the normal encoding mode is set, and the “n” th is set. In some cases, it is set to the intra-region coding mode. For the encoding processing unit 121, when the order of macroblocks is between the “n + 2” th and the “2n−1” th, the normal encoding mode is set, and the “n + 1” th and “2n” In the case of the “th”, the intra-region coding mode is set. For the encoding processing unit 122, when the order of macroblocks is between “2n + 2” th and “3n” th, the normal encoding mode is set, and when the order is “2n + 1” th, , Set to the intra-region coding mode.

  Based on the encoding mode signal input from the encoding mode control unit 111, the encoding processing units 120, 121, and 122 perform encoding processing in either the normal encoding mode or the intra-region encoding mode. That is, the encoding processing units 120, 121, and 122 have the same number as the number of regions to be divided (three regions) so that the macroblock group belonging to each region is encoded in parallel for each region. When distributed and supplied, a parallel processing system that performs encoding processing in parallel is configured. Then, each encoding processing unit 120, 121, 122 writes the code data obtained by the encoding process in the code data storage unit 130 (arrows A5, A6, A7 in FIG. 2). Details of the configuration of the encoding processing units 120, 121, and 122 will be described later.

The code data rearrangement unit 131 acquires code data from the code data storage unit 130 (arrow A8 in FIG. 2), and MPEG-4 AVC / H. These are rearranged in the order of the H.264 encoding method, combined, and output (arrow A9 in FIG. 2). This MPEG-4 AVC / H. The order of H.264 encoding is such that the macroblock located on the right side of each macroblock line starts from the leftmost macroblock of the topmost macroblock line (macroblock line 1 in FIG. 1) The macroblocks that are located are in the later order. In the example shown in FIG. 1, the first line of the first area, the first line of the second area, the first line of the third area, the second line of the first area, the second line of the second area, the third area The second line, the third line of the first region, and so on. That is, a macroblock line k is configured by macroblocks belonging to the kth line (k is a natural number) in the first area, the kth line in the second area, and the kth line in the third area. In this case, the code data rearrangement unit 131 combines the code data of the first line in the second area after the code data of the first line in the first area, and then the code data of the first line in the third area. Will be repeated.
<2-2> Encoding Processing Unit The configuration of the encoding processing units 120, 121, and 122 is shown in FIG.

  As shown in FIG. 3, the frame type signal is sent from the frame dividing unit 110 to the switch 921 and the MB type control unit 990. The frame type signal is a signal indicating whether the image data input to the encoding processing units 120, 121, and 122 is an I picture, a P picture, or a B picture. Extract.

  When a frame type signal is input, the switch 921 performs a switching operation according to the type of the frame type signal. Here, the switch 921 switches to an off state when the frame type signal indicates an I picture, and turns on when the frame type signal indicates a P picture or a B picture.

  The MB type control unit 990 performs on / off control of the switch 922 based on the frame type signal and the minimum value data of the evaluation function (see [Expression 1] described later) input from the motion search / compensation unit 909 described later. Here, when the frame type signal indicates an I picture, the MB type control unit 920 switches the switch 922 to an OFF state, and causes the variable length encoding unit 904 to perform encoding using intra-frame correlation (hereinafter referred to as Intra code). The encoding type signal indicating the conversion is input.

  Also, the MB type control unit 990 holds a threshold value for the minimum value of the evaluation function (hereinafter referred to as “evaluation function threshold value”). Then, when the frame type signal indicates a P picture or a B picture, the MB type control unit 990 performs Intra encoding according to the magnitude relationship between the minimum value of the evaluation function and the evaluation function threshold, or between frames. It is determined whether to perform encoding using correlation (hereinafter referred to as Inter encoding). When determined to be Intra coding, the MB type control unit 990 switches the switch 922 to the OFF state and inputs a coding type signal indicating Intra coding to the variable length coding unit 904. When the inter coding is determined, the MB type control unit 990 switches the switch 922 to the on state and inputs a coding type signal indicating the inter coding to the variable length coding unit 904.

  Further, the MB type control unit 920 determines whether or not to perform I-PCM encoding based on the signal input from the quantization processing unit 903 and the encoding mode signal input from the encoding mode control unit 111. decide. When the I-PCM encoding is determined, the MB type control unit 990 inputs an encoding type signal indicating I-PCM encoding to the variable length encoding unit 904.

  When the MB type control unit 920 determines I-PCM encoding, the selector 930 inputs the image data as it is to the variable length encoding unit 904, and in other cases, the selector 930 receives the signal output from the quantization processing unit 903. This is input to the variable length coding unit 904.

  The selector 931 inputs the image data as it is to the deblocking filter processing unit 911 when the MB type control unit 920 determines to perform I-PCM encoding, and otherwise deblocks the signal output from the adder 910. Input to the filter processing unit 911.

  The rate control unit 923 monitors the size of code data output from the variable length coding unit 904 (hereinafter referred to as “code amount”), and performs quantization processing according to the size of the code amount. The quantization parameter used in the unit 903 is determined.

  The subtractor 901 calculates difference between the image data input from the frame dividing unit 110 and the image data input from the motion search / compensation unit 909 (pixel corresponding to the inter-frame prediction error). A set of value data) is input to the DCT processing unit 902.

  The DCT processing unit 902 inputs image data obtained by performing discrete cosine transformation or Hadamard transformation on the difference image data input from the subtractor 901 to the quantization processing unit 903.

The quantization processing unit 903 quantizes the image data input from the DCT processing unit 902 and inputs it to the selector 930.
The inverse quantization processing unit 906 performs inverse quantization on the image data input from the quantization processing unit 903.

The inverse DCT processing unit 907 performs inverse orthogonal transform on the image data input from the inverse quantization processing unit 906 and inputs the image data to the adder 910.
The adder 910 inputs image data obtained by adding the image data input from the inverse DCT processing unit 907 and the motion compensated image data input from the motion search / compensation unit 909 to the selector 931.

  The deblock filter processing unit 911 performs a process of removing block noise on the image data input from the selector 931, and stores the processed image data in the temporary data storage unit 908.

  The variable length encoding unit 904 receives image data input from the quantization processing unit 903 via the selector 903, an encoding type signal input from the MB type control unit 990, and input from the motion search / compensation unit 909. The motion vector information to be encoded. Here, when the encoding type signal indicates I-PCM encoding, the variable length encoding unit 904 does not encode motion vector information.

  The motion search / compensation unit 909 performs motion vector search (hereinafter referred to as “motion search”) using a block matching method, which is one of general motion search methods. In this block matching method, pixel value data of a macroblock located at the same position as a macroblock to be encoded (hereinafter referred to as “target macroblock”) and pixel value data of an area near the macroblock Is an area having the same size as the target macroblock (hereinafter referred to as a “reference macroblock”) and is the best match with the target macroblock. The position of the reference macro block to be specified is specified.

  Here, the motion search / compensation unit 909 determines the matching between the target macroblock and the reference macroblock by using an evaluation function ([[ This is performed depending on whether or not (see Equation 1] takes the minimum value.

ここで、Ｒｅｆ（Ｍｘ＋ｘ，Ｍｙ＋ｙ）は、対象マクロブロックに対して（Ｍｘ，Ｍｙ）だけ離間した位置にある参照マクロブロック内における位置（Ｍｘ＋ｘ，Ｍｙ＋ｙ）での画素値を示し、Ｏｒｇ（ｘ，ｙ）は、対象マクロブロック内における位置（ｘ，ｙ）での画素値を表わす。

Here, Ref (Mx + x, My + y) indicates a pixel value at a position (Mx + x, My + y) in the reference macroblock located at a position separated by (Mx, My) from the target macroblock, and Org (x, y) represents a pixel value at a position (x, y) in the target macroblock.

  The motion search / compensation unit 909 then determines the distance between the target macroblock and the position of the reference macroblock that is most matched with the target macroblock, and the direction of the reference macroblock viewed from the target macroblock. The vector specified by is detected as a motion vector. Then, the motion search / compensation unit 909 inputs the detected motion vector information to the variable length coding unit 904.

  In addition, the motion search / compensation unit 909 outputs the reference macroblock having the minimum evaluation function value as motion compensated image data to the switch 922 and transmits data indicating the minimum value of the evaluation function to the MB type control unit 920. input.

  The motion search / compensation unit 909 reads a set of pixel value data constituting the reference area from the temporary data storage unit 908 and stores it in the reference reference image storage unit 961. For example, as shown in FIG. 4, this reference area is a horizontal MX pixel × vertical MY pixel (MX> NX) that is larger than the size of the macroblock to be encoded (horizontal NX pixel × vertical NY pixel). MY> NY).

  Incidentally, as shown in FIG. 5, when there are a first target macroblock and a second target macroblock that are adjacent in the vertical direction, a reference area AR1 and a second target macroblock corresponding to the first target macroblock are included. An overlapping area (hereinafter referred to as “common area”) AR3 exists with the reference area AR2 corresponding to the block. The pixel value data constituting the common area AR3 is required not only when encoding the first target macroblock but also when encoding the second target macroblock.

  Therefore, the reference reference image storage unit 961 further includes the second target macro in the reference area AR1 used in the encoding process of the first target macroblock in addition to the pixel value data constituting the reference area. The pixel value data of the common area AR3 that is also used in the block encoding process is held until the encoding process of the second target macroblock is completed.

  Thus, once the pixel value data in the common area AR3 is transferred from the temporary data storage unit 908 to the reference reference image storage unit 961 during the encoding process of the first target macroblock, the second value is stored. When the target macroblock is encoded, it is not necessary to transfer again, so that the data transfer amount between the temporary data storage unit 908 and the reference reference image storage unit 961 can be suppressed.

  In addition, the encoding processing units 120, 121, and 122 first perform encoding processing on the upper left macroblock of the region, and thereafter, the macroblocks to be encoded are one by one in the right direction of the region. Encoding processing is performed while shifting. When the encoding process is completed up to the rightmost macroblock of the region, the macroblocks to be encoded are positioned one macroblock below the macroblock and aligned in the horizontal direction of the region. The encoding process is performed as the leftmost macroblock of the macroblock sequence. Subsequently, the encoding process is performed while shifting the macroblocks to be encoded one by one in the right direction of the region.

  Therefore, the reference reference image storage means 961 is adjacent to the first macroblock used when the first macroblock is encoded after the first macroblock is encoded in the first encoding mode. Among the macroblock information to be processed, the macroblock information used also when the second macroblock adjacent to the lower side of the first macroblock is encoded in the first encoding mode is used as the second macroblock. It will hold until the block is encoded.

  Therefore, as shown in FIG. 6, if the number of macroblocks arranged in the horizontal direction of one area is five, the reference area corresponding to the macroblock arranged on the right side of the first target macroblock 1 and the first target The pixel value data of the common area (hatched part in FIG. 6) with the reference areas of the macroblocks that are located one macroblock lower than the macroblock 1 and arranged in the horizontal direction in the area are the first Is stored in the reference reference image storage unit 961 until the encoding process of the second macroblock 2 is completed after the encoding process of the target macroblock 1 is performed.

Here, the encoding processing units 120, 121, and 122 divide one frame into a plurality of regions arranged in the horizontal direction, thereby configuring the number of macroblocks arranged in the horizontal direction in one region as one macroblock line. The number is less than the number of macro blocks. Accordingly, since the size of the pixel value data to be stored in the reference reference image storage unit 961 can be reduced as compared with the case where motion search is performed in units of macroblock lines, the capacity of the reference reference image storage unit 961 is increased. This can reduce power consumption.
<3> Operation <3-1> Operation of Coding Mode Control Unit The operation of the coding mode control unit 111 will be described based on the flowchart shown in FIG.

  First, the encoding mode control unit 111 receives, from the macroblock position management unit 112, data indicating the order of macroblocks to be encoded, information indicating the macroblock line to which the macroblock belongs, and the left end of each region. And data indicating the order of the macroblocks located at (step S1).

Next, the encoding mode control unit 111 specifies the position of the macroblock to be encoded based on the acquired data indicating the order of the macroblocks (step S2).
Then, the encoding mode control unit 111 determines that the macroblock to be encoded is a region based on the acquired data indicating the order of the macroblocks and the data indicating the order of the macroblocks located at the left end of each region. It is determined whether or not it is located at the boundary (step S3).

  If it is determined in step S3 that the macroblock to be encoded does not touch the region boundary, the encoding mode control unit 111 sets the encoding processing units 120, 121, and 122 to the normal encoding mode ( Step S4).

  On the other hand, if it is determined in step S3 that the macroblock to be encoded is located at the region boundary, the encoding mode control unit 111 sets each of the encoding processing units 120, 121, and 122 to the intra-region encoding mode ( Step S5).

  Next, the encoding mode control unit 111 determines whether or not the encoding processing units 120, 121, and 122 have ended the encoding process for all the macroblocks in the respective regions in charge (step S6). . In this case, the coding mode control unit 111 performs coding processing on the target macroblock based on the information on the order of the macroblocks input from the frame dividing unit 110 and the information on the macroblock line to which the macroblock belongs. Determines whether it belongs to the macroblock line located at the lowest level and is located at the rightmost end in each area, and if applicable, the encoding process is completed for all macroblocks in the area It is determined that

  If it is determined in step S6 that the encoding processing has not yet been completed for all macroblocks in the region to be processed by the encoding processing units 120, 121, and 122 (step S6: NO), the encoding mode control unit 111 Again, the process proceeds to step S1.

On the other hand, if it is determined in step S6 that the encoding processing has been completed for all macroblocks in the region to be processed by the encoding processing units 120, 121, and 122 (step S6: YES), the encoding mode control unit 111 An end notification is sent to each of the encoding processing units 120, 121, and 122 (step S7), and the process ends.
<3-2> Operation of Encoding Processing Unit The encoding processing units 120, 121, and 122 according to the present embodiment are MPEG-4 AVC / H. The encoding process is performed using the H.264 encoding method.

  MPEG-4 AVC / H. In the encoding process using the H.264 encoding method, an I picture is encoded using only Intra encoding, and a P picture and a B picture are encoded in a mixed form of Intra encoding and Inter encoding. Is done.

Hereinafter, the operations of the encoding processing units 120, 121, and 122 will be described with reference to the flowchart shown in FIG.
First, when the encoding processing units 120, 121, and 122 acquire the encoding mode signal from the encoding mode control unit 111 (step S51), the MB type control unit 990 provided in the encoding processing units 120, 121, and 122 However, it is determined whether or not the coding mode signal is an instruction to code within the region (step S52).

  If it is determined in step S52 that the intra-region encoding is instructed (step S52: YES), the MB type control unit 990 switches the switch 922 and the selectors 930 and 931 in order to perform the I-PCM encoding process. Set (step S53).

  On the other hand, if it is determined in step S52 that the encoding in the region is not instructed (that is, the encoding in the normal mode is instructed) (step S52: NO), the MB type control unit 990 and the switch 921 acquires a frame type signal (step S54). Then, the MB type control unit 990 determines whether or not the acquired frame type signal indicates an I picture (step S55).

  If it is determined in step S55 that the frame type signal indicates an I picture (step S55: YES), the MB type control unit 990 switches the switch 922 and the selectors 930 and 931 in order to perform the I picture encoding process. Set (step S56). The switch 921 is automatically turned off when a frame type signal indicating an I picture is input.

  On the other hand, when it is determined in step S55 that the frame type signal does not indicate an I picture (step S55: NO), the MB type control unit 990 determines whether or not the acquired frame type signal indicates a P picture. Determination is made (step S57).

  When it is determined in step S57 that the frame type signal indicates a P picture (step S57: YES), the MB type control unit 990 switches the switch 922 and the selectors 930 and 931 in order to perform the P picture encoding process. Set (step S58). The switch 921 is automatically turned on when a frame type signal indicating a P picture is input.

  On the other hand, when it is determined in step S57 that the frame type signal does not indicate a P picture (step S57: NO), the MB type control unit 990 performs the B picture encoding process. Then, the switch 922 and the selectors 930 and 931 are set (step S59). The switch 921 is automatically turned on when a frame type signal indicating a B picture is input.

Thereafter, the MB type control unit 990 determines whether or not an end notification has been given from the encoding mode control unit 111 (step S60).
If it is determined in step S60 that the end notification has not been made (step S60: NO), the process proceeds to step S51 again.

On the other hand, if it is determined in step S60 that an end notification has been given (step S60: YES), the process ends.
The I-PCM encoding process, the I picture encoding process, the P picture encoding process, and the B picture encoding process will be described in detail below with reference to FIG.

<3-2-1> I-PCM Encoding Process In the I-PCM encoding process, the MB type control unit 920 switches the selector 930 so that the image data is input to the variable length encoding unit 904 as it is. Then, the variable length coding unit 904 performs I-PCM coding using the image data. Further, the MB type control unit 920 switches the selector 931 so that the image data is input to the deblock filter processing unit 911 as it is. The deblocking filter processing unit 911 performs deblocking processing using the image data and stores it in the temporary data storage unit 908.

<3-2-2> I Picture Encoding Process First, the MB type control unit 990 turns off the switch 921 and the switch 922. At this time, when image data (encoding target block) is input to the subtracter 901, the switch 922 is in an OFF state, and thus the image data is input to the DCT processing unit 902 as it is. Thereafter, the image data orthogonally transformed by the DCT processing unit 902 is quantized by the quantization processing unit 903 and is sequentially sent to the selector 930 and the variable length coding unit 904. Finally, the code generated from the variable length coding unit 904 is output to the outside.

  Further, the image data quantized by the quantization processing unit 903 is also input to the inverse quantization processing unit 906, and after inverse quantization by the inverse quantization processing unit 906, the inverse DCT processing unit 907 performs inverse orthogonal transformation. And input to the adder 910.

  Here, since the switch 922 is in the OFF state, the adder 910 does not receive the signal from the motion search / compensation 909. Therefore, in the case of encoding an I picture, the selector 931 switches the data path so that the signal from the adder 910 is input to the deblock filter processing unit 911, so that the data sent from the inverse DCT processing unit 907 The data is input to the deblock filter processing unit 911 as it is.

  In the deblocking filter processing unit 911, processing for removing block noise is executed. The image data output from the deblock filter processing unit 911 (hereinafter referred to as reconstructed image data) is stored in the temporary data storage unit 908.

<3-2-3> P Picture Encoding Process First, the MB type control unit 990 turns on the switch 921. The switch 922 changes its state according to the result of the motion search / compensation unit 909. At this time, image data (a set of pixel value data) of the macroblock to be encoded is input to the subtracter 901 and also input to the motion search / compensation unit 909 via the switch 921.

  The motion search / compensation unit 909 obtains image data and reads out the image data (image data composed of pixels in the vicinity of the same spatial position as the image data) stored in the temporary data storage unit 908 to obtain a reference reference image. The data is stored in the storage unit 961 and a motion search is performed (see FIG. 4) to detect a motion vector. Then, the motion search / compensation unit 909 inputs the detected motion vector information to the variable length coding unit 904.

  The motion search / compensation unit 909 calculates data indicating the minimum value of the evaluation function and sends it to the MB type control unit 920. The MB type control unit 990 determines the encoding type to be either Intra encoding or Inter encoding based on the data indicating the minimum value of the evaluation function. Then, the MB type control unit 990 transmits an encoding type signal indicating the determined encoding type to the variable length encoding unit 904 and switches the on / off state of the switch 922.

Here, when the MB type control unit 990 determines intra coding, the switch 922 is turned off, and processing similar to the above-described I picture coding processing is performed.
On the other hand, when the MB type control unit 990 determines to perform Inter coding, the motion search / compensation unit 909 generates motion compensated image data. At this time, since the switch 922 is in the ON state, the motion compensation image data is sent to the subtracter 901.

  In the subtractor 901, difference image data (a set of pixel value data corresponding to the inter-frame prediction error) between the image data input from the frame dividing unit 110 and the motion compensated image data input from the motion search / compensation unit 909. Is input to the DCT processing unit 902, and the processing is executed in the order of the quantization processing unit 903, the selector 930, and the variable length coding unit 904. The code data output from the variable length encoding unit 904 is stored in the code data storage unit 130.

Further, the output from the quantization processing unit 903 is also input to the inverse quantization processing unit 906, and then subjected to the inverse DCT processing by the inverse DCT processing unit 907 and then input to the adder 910.
The adder 910 inputs image data obtained by adding the image data input from the inverse DCT processing unit 907 and the motion compensation image data to the deblock filter processing unit 911.

Next, the deblock filter processing unit 911 performs a process of removing block noise on the image data, and stores the processed image data (also referred to as reconstructed image data) in the temporary data storage unit 908.
<2-2-4> B Picture Encoding Process Since the B picture encoding process is substantially the same as the P picture encoding process, only differences from the P picture encoding process will be described.

  The reference area used by the motion search / compensation 909 for the motion search is different between the B picture and the P picture. In the P picture encoding process, only the reference area is used for the temporally forward I picture or P picture, whereas in the B picture encoding process, the temporally forward I picture or P picture reference area is used. (Hereinafter referred to as “forward reference area”) and a temporally backward I picture or P picture reference area (hereinafter referred to as “backward reference area”). Therefore, in the B picture encoding process, it is necessary to perform the encoding process of the I picture or P picture including the backward reference area before the encoding process of the B picture. Therefore, the motion search / compensation unit 909 reads both the forward reference area and the backward reference area from the temporary data storage unit 908 during the motion search.

  Note that a reference image generated when encoding an I picture, a P picture, and a B picture may not be used depending on a macroblock. In this case, a series of processes including the inverse quantization process by the inverse quantization processor 906, the inverse DCT by the inverse DCT processor 907, the addition process by the adder 910, and the deblock filtering by the deblock filter processor 911 are omitted. Is done.

  As described above, in the coding processing apparatus 100 according to the present embodiment, as shown in FIG. 9, the intra-region coding mode is used for macroblocks (hatched portions in FIG. 9) located at the boundary between three regions. I-PCM encoding is performed. This I-PCM encoding outputs a digital image signal corresponding to a macroblock as it is, and does not use information on macroblocks adjacent to the macroblock to be encoded in the encoding process. .

  Therefore, in the coding processing apparatus 100 according to the present embodiment, when the macroblocks belonging to the areas handled by the respective coding processing units 120, 121, and 122 are coded, the macroblocks to be coded belong to. Information on macroblocks belonging to areas other than the area is not used. Therefore, each encoding processing unit 120, 121, and 122 does not need to wait for generation of information on macroblocks belonging to other areas during the encoding process for the area in charge. Since the encoding process can be performed in parallel, the encoding process can be speeded up.

In addition, since block distortion does not occur at the boundary between macroblocks encoded by the I-PCM encoding method, it is not necessary to perform deblocking filter processing. Therefore, for example, there is an advantage that it is not necessary to perform deblock filtering for removing block distortion on the pixel value data near the boundary between the macroblock 2_n and the macroblock 3_1 shown in FIG.
<Embodiment 2>
The encoding processing apparatus according to the present embodiment is substantially the same as the encoding processing apparatus of the first embodiment, and only the configuration of the encoding processing units 120, 121, and 122 is different. Note that the description of the same configuration as that of Embodiment 1 will be omitted as appropriate.

  The encoding processing units 120, 121, and 122 according to the present embodiment are not provided with a selector 930 and a selector 931 for switching whether or not to perform I-PCM encoding, and a deblocking filter processing unit 911. Is different from that of the first embodiment (see FIG. 3).

  The encoding processing units 120, 121, and 122 perform encoding by the MPEG-4 encoding method, and perform encoding processing by not_coded encoding for macroblocks located at the boundary of the region.

  When the coding mode signal instructing intra-region coding is input from the coding mode control unit 111 to the coding processing units 120, 121, and 122, the MB type control unit 991 causes the motion search / compensation unit 992 to The not_coded encoding instruction signal is input to the encoding processing unit 993 and the variable length encoding unit 994.

  When the not_coded encoding instruction signal is input from the MB type control unit 991, the motion search / compensation unit 992 forcibly sets the motion vector (Mx, My) to (0, 0) and sets motion compensated image data. Generate.

On the other hand, the quantization processing unit 993 performs processing for replacing all the results of the quantization processing with “0”, and outputs the result to the variable length coding unit 904 and the inverse quantization processing unit 906.
When the not_coded coding instruction signal is input from the MB type control unit 991, the variable length coding unit 904 performs a not_coded coding process.

  In addition, in coding processing apparatus 100 according to the present embodiment, as shown in FIG. 9, macro_blocks (hatched portions in FIG. 9) positioned at the boundary of three regions are not-coded coded as the intra-region coding mode. Encoding is performed. In this not_coded encoding, information on a macroblock at the same position as the position of a macroblock to be encoded in another frame that has already been encoded is output as it is. Therefore, information on the macroblock adjacent to the macroblock to be encoded is not used.

Therefore, when the macroblocks belonging to the areas handled by the respective encoding processing units 120, 121, and 122 are encoded, information on the macroblocks belonging to other areas other than the area to which the target macroblock to be encoded belongs. Since each encoding processing unit 120, 121, 122 does not need to wait for the generation of information on macroblocks belonging to other regions during the encoding processing of the region in charge, Since the encoding process can be performed simultaneously in parallel in the region, the encoding process can be speeded up.
<Embodiment 3>
FIG. 11 shows a configuration of an imaging system (for example, a digital still camera (DSC)) 601 according to the third embodiment. The encoding processing device 606 in FIG. 11 is configured by the encoding processing device according to the first embodiment or the second embodiment.

In the imaging system 601, light incident through the optical system 602 is imaged on a light receiving unit (not shown) of the sensor 603. Based on the control of the timing control circuit 609, the sensor 603 converts the light received by the light receiving unit at a predetermined timing into an electrical signal (photoelectric conversion) and outputs it as an analog image signal. The analog image signal is converted into a digital image signal by an analog / digital converter (ADC) 604 and input to an image processing circuit 605 having an encoding processing device 606. The image processing circuit 605 generates a code data signal by performing Y / C processing, edge processing, image enlargement / reduction processing, and image compression processing, and inputs the code data signal to the recording / transfer circuit 607. The record transfer circuit 607 records the code data signal on a recording medium (not shown) and transfers it to the reproduction circuit 608. The reproduction circuit 608 decodes and reproduces the code data signal input from the recording / transfer circuit 607. The adjustment of the optical system and the recording / transferring circuit 607 and the reproducing circuit 608 are controlled by the system control circuit 610.
<Modification>
(1) In Embodiments 1 and 2 described above, the example in which the frame dividing unit 110 divides each frame into three regions has been described, but the present invention is not limited to this. For example, as shown in FIG. 12, four or more (10 in the example shown in FIG. 11) encoding processing units 120, 121,..., 129 are provided, and the encoding mode control unit 111 is externally connected. In accordance with the division number designation signal (arrow A21 in FIG. 12) input from the same number of encoding processing units as the division number designated by the division number designation signal (for example, each frame is divided into 10 regions). When the processing is performed, 10 encoding processing units) are driven, and each of the driven encoding processing units sets an area where the encoding processing is performed. Then, the encoding mode control unit 111 inputs identification information of the driven encoding processing unit and region information indicating the region in which each of the driven encoding processing units performs encoding processing to the frame dividing unit 110 ( The arrow A22 in FIG. 12 may be used. Here, the frame division unit 110 distributes the macroblock information to the encoding processing unit that is driving based on the identification information and the region information input from the encoding mode control unit 111.

According to this modification, encoding can be performed in parallel by a larger number of encoding processing units, so that the encoding processing capability can be improved.
(2) In the second embodiment described above, an example in which I-PCM and not_coded are employed as the intra-region coding mode has been described. However, the present invention is not limited to this, and is not affected by surrounding macroblocks. Other coding modes may be adopted as long as the coding mode is coding only with the information of the macroblock in the region to which it belongs.

  (3) In the first and second embodiments described above, the example in which each frame is divided into three regions in the horizontal direction has been described. However, the present invention is not limited to this. For example, as shown in FIG. 13, it is divided into six regions divided into three in the horizontal direction and two in the vertical direction, and the macroblock in the hatched portion in FIG. 13 is encoded in the intra-region coding mode. Macroblocks other than the hatched portion in FIG. 13 may be encoded in the normal encoding mode.

According to this modification, encoding processing can be performed in parallel using more encoding processing units, so that the encoding processing capability can be further improved.
(4) In the first and second embodiments described above, the example in which all the macroblocks at the region boundary are encoded in the intraregion encoding mode has been described. For example, the left side, the upper left side, and the upper side of the encoding target macroblock If it is an encoding system (refer FIG. 14) encoded only using the information of the macroblock adjacent to, it will not be limited to this. For example, as shown in FIG. 15, a macroblock that is in contact with the left boundary in each region excluding the leftmost region may be encoded in the intra-region encoding mode.

According to this modification, the code amount can be reduced.
Also, as shown in FIG. 16, when divided into six regions, for the two regions excluding the leftmost region among the upper three regions, macroblocks that touch the left boundary in each region are included in the region. Encode in encoding mode, and for the leftmost region of the lower three regions, encode the macroblock that touches the upper boundary in intra-region encoding mode, and for the remaining two regions, the left boundary and the upper boundary The macroblock that is in contact with the boundary may be encoded in the intra-region encoding mode.

  (5) In the third embodiment described above, the image processing in the encoding processing device 606 according to the present invention is not necessarily applied only to a signal based on image light imaged on the sensor 603 via the optical system 602. Needless to say, the present invention can also be applied when processing an image signal input as an electrical signal from an external device, for example.

  (6) Recording a program consisting of a program code to be executed by the processor of the encoding processing apparatus 100 shown in the first and second embodiments and various circuits connected to the processor on a recording medium, or various types It can also be distributed and distributed via a communication channel or the like. Examples of such a recording medium include an IC card, a hard disk, an optical disk, a flexible disk, and a ROM. The distributed and distributed control program is used by being stored in a memory or the like that can be read by the processor, and the processor executes the control program to realize the functions shown in the embodiments. Become so. A part of the control program is transmitted to an apparatus (processor) capable of executing a program separate from the encoding processing apparatus 100 via various networks, and a part of the control program is transmitted to the separate program executable apparatus. May be executed.

  (7) A part or all of the constituent elements of the encoding processing apparatus 100 described in the first and second embodiments may be implemented as one or a plurality of integrated circuits (IC, LSI, etc.). Alternatively, other components may be added to the components of the encoding processing apparatus 100 to form an integrated circuit (one chip).

The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration. Further, the method of circuit integration is not limited to LSI's, and implementation using dedicated circuitry or general purpose processors is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can reconfigure the connection or setting of circuit cells inside the LSI may be used. Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied.
<Supplement>
In the first and second embodiments described above, MPEG-4 AVC / H. The encoding processing apparatus 100 that performs encoding using the H.264 encoding method has been described. A decoding processing device (not shown) corresponding to the H.264 encoding scheme determines the macroblock type of each macroblock from the code data transmitted from the encoding processing device 100, and I-PCM encoding is performed. In some cases, it is assumed that decoding processing corresponding to I-PCM encoding is performed.

  Since the encoding processing apparatus 100 according to the present invention can realize high-performance processing such as high resolution and high frame rate, an imaging system and the like that will be required to be reduced in size and power consumption with higher resolution in the future. It is a very useful technique. It is a technology that can realize power saving and is also useful for mobile imaging systems.

DESCRIPTION OF SYMBOLS 100 Coding apparatus 110 Frame division part 111 Coding mode control part 120,121,122 Coding process part 130 Code data storage part 131 Code data rearrangement part 901 Subtractor 902 DCT process part 903 Quantization process part 904 Variable length Encoding unit 906 Inverse quantization processing unit 907 Inverse DCT processing unit 908 Temporary data storage unit 909 Motion search / compensation unit 910 Adder 911 Deblock filter processing unit 921, 922 Switch 923 Rate control unit 930, 931 Selector 990 MB type control Part

Claims (14)

A frame dividing unit that divides image data into a plurality of regions arranged in a horizontal direction so that each region includes three or more macroblock columns in the horizontal direction for each frame;
For each region, a specific unit that identifies a macroblock that touches the boundary of the region;
Parallel processing that has the same number of coding processing units as the number of regions to be divided and is distributed and supplied in parallel so that macroblock groups belonging to each region are coded in parallel for each region. With a processing system,
Each encoding processing unit in the parallel processing system encodes a macroblock that is not in contact with the boundary of the region in a first encoding mode in which encoding is performed using information of a macroblock adjacent to the macroblock. For macroblocks that are in contact with the boundary of the region, the information on the macroblock alone or information on the macroblock that exists in the region to which the macroblock belongs and is adjacent to the macroblock is used. An encoding processing apparatus, characterized in that encoding is performed in a second encoding mode in which encoding is performed without using information on macroblocks existing in a region to which no data belongs. The identification unit identifies a macroblock that is in contact with the boundary from the right side among the macroblocks that are in contact with the boundary of the region,
In each of the encoding processing units, encoding in the first encoding mode is performed on all macroblocks in the region except for macroblocks that are in contact with the boundary from the right side. Of adjacent macroblocks, encoding is performed using information on neighboring macroblocks adjacent to the macroblock, and the encoding in the second encoding mode is performed on the macroblock in contact with the boundary from the right side. The encoding processing device according to claim 1, wherein A frame dividing unit that divides image data into a plurality of regions arranged in the horizontal direction and the vertical direction so that each region includes three or more macroblock columns in the horizontal direction for each frame;
For each region, a specific unit that identifies a macroblock that touches the boundary of the region;
Parallel processing that has the same number of coding processing units as the number of regions to be divided and is distributed and supplied in parallel so that macroblock groups belonging to each region are coded in parallel for each region. With a processing system,
The encoding processing unit in the parallel processing system encodes a macroblock that is not in contact with the boundary of the region in a first encoding mode in which encoding is performed using information on a macroblock adjacent to the macroblock. For a macroblock that is in contact with an area boundary, information on the macroblock alone or information on a macroblock that exists in the area to which the macroblock belongs and is adjacent to the macroblock An encoding processing apparatus, wherein encoding is performed in a second encoding mode in which encoding is performed without using information on a macroblock existing in a region that does not belong. The specifying unit specifies a macroblock that is in contact with the boundary from the right side or the lower side among the macroblocks that are in contact with the boundary of the region;
In each of the encoding processing units, the encoding in the first encoding mode is performed on all macroblocks in the region except for the macroblock that is in contact with the boundary from the right side or the lower side. Encoding is performed using information of neighboring macroblocks adjacent to the macroblock among the macroblocks adjacent to the macroblock, and the encoding in the second encoding mode is performed on the right side or the lower side with respect to the boundary. The encoding processing apparatus according to claim 3, wherein the encoding processing apparatus performs the processing on a macroblock that is in contact with. The encoding processing apparatus according to any one of claims 1 to 4, wherein the second encoding mode is a mode for performing I-PCM encoding. The encoding processing apparatus according to any one of claims 1 to 4, wherein the second encoding mode is a mode for performing not_coded encoding. An analog-digital converter that converts an analog image signal into a digital image signal and outputs the digital image signal;
A signal processing system comprising: the encoding processing apparatus according to claim 1 that encodes and outputs a digital image signal output from the analog / digital converter. An optical unit comprising an optical system for generating a subject image;
A sensor that converts a subject image generated by the optical unit into an analog image signal and outputs the analog image signal;
An image pickup system comprising: the signal processing system according to claim 7 that outputs a digital image signal encoded from the analog image signal output from the sensor. An encoding processing method performed using an encoding processing device including a frame dividing unit, a specifying unit, and a parallel processing system,
A frame dividing step in which the frame dividing unit divides the image data into a plurality of regions arranged in the horizontal direction so that each region includes three or more macroblock columns in the horizontal direction;
The specifying unit specifies, for each area, a macroblock that is in contact with the boundary of the area;
When the parallel processing system is distributed and supplied so that the macroblock group belonging to each region is encoded in parallel for each region to the same number of encoding processing units as the number of regions to be divided, Parallel processing steps for encoding processing,
In the parallel processing step, a first encoding step in which the encoding processing unit encodes a macroblock that is not in contact with the boundary of the region by using information of a macroblock adjacent to the macroblock; For a macroblock that is in contact with the boundary of a region, the encoding processing unit uses information on the macroblock alone or information on a macroblock that exists in the region to which the macroblock belongs and is adjacent to the macroblock. And a second encoding step for encoding without using the information of the macroblock existing in the area to which the macroblock does not belong. In the specifying step, the specifying unit specifies a macroblock in contact with the boundary from the right side among macroblocks in contact with the boundary;
In the parallel processing step, in each of the encoding processing units, encoding in the first encoding mode is performed on all macroblocks in the region excluding macroblocks that are in contact with the boundary from the right side. A first encoding step of performing encoding using information on neighboring macroblocks adjacent to the macroblock among the macroblocks adjacent to the macroblock; and encoding in the second encoding mode. The encoding processing method according to claim 9, further comprising: a second encoding step performed on a macroblock that is in contact with the boundary from the right side. An encoding processing method performed using an encoding processing device including a frame dividing unit, a specifying unit, and a parallel processing system,
The frame dividing unit divides the image data into a plurality of regions arranged in the horizontal direction and the vertical direction so that each region includes an integer number of macroblocks for each frame;
The specifying unit specifies, for each area, a macroblock that is in contact with the boundary of the area;
When the parallel processing system is distributed and supplied so that the macroblock group belonging to each region is encoded in parallel for each region to the same number of encoding processing units as the number of regions to be divided, Parallel processing steps for encoding processing,
In the parallel processing step, a first encoding step in which the encoding processing unit encodes a macroblock that is not in contact with the boundary of the region by using information of a macroblock adjacent to the macroblock; For a macroblock that is in contact with the boundary of a region, the encoding processing unit uses information on the macroblock alone or information on a macroblock that exists in the region to which the macroblock belongs and is adjacent to the macroblock. And a second encoding step for encoding without using the information of the macroblock existing in the area to which the macroblock does not belong. In the specifying step, the specifying unit specifies a macroblock in contact with the boundary from the right side or the lower side among the macroblocks in contact with the boundary;
In the parallel processing step, in each of the encoding processing units, encoding in the first encoding mode is performed for all macros in the region excluding macroblocks that are in contact with the boundary from the right side or the lower side. A first encoding step for encoding a block using information of neighboring macroblocks adjacent to the macroblock among the macroblocks adjacent to the macroblock, and the second encoding mode The encoding processing method according to claim 11, further comprising: a second encoding step that performs encoding on a macroblock that is in contact with the boundary from the right side or the lower side. The encoding processing method according to any one of claims 9 to 12, wherein the second encoding step performs I-PCM encoding. The encoding processing method according to any one of claims 9 to 12, wherein the second encoding step performs not_coded encoding.

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