JP2011182490A - Power control device and method of controlling power - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power control device, along with a method of controlling power, for preventing an increase of loss in an inductor even if an output voltage changes sharply, and also not requiring time for following. <P>SOLUTION: The power control device 1A for controlling power supplied to equipment includes a power supply input unit 10 to which a prescribed voltage is supplied, a signal input unit 40 for receiving an output voltage command signal Vcnt adjusted according to the power supplied to the equipment for a transmission period of the equipment, a digital control processing unit 50A for generating a plurality of voltage control signals VP1 to VP4 based on the output voltage command signal Vcnt selected according to a state of the equipment, a plurality of power analog units 20a to 20d that adjust the prescribed voltage based on the plurality of voltage control signals VP1 to VP4 to individually output an output voltage and are disposed in parallel, and an output filter 60 for compositing a plurality of output voltages output from a plurality of power analog units 20a to 20d to generate the power. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a power control apparatus and a power control method, and more particularly to a power control apparatus and a power control method for supplying power to a wireless communication device.

  In recent years, various studies for reducing power in wireless communication have been conducted. In particular, in a device such as a radio base station that requires a high voltage for driving a transmission amplifier, the demand is high.

  Normally, when performing wireless transmission, a peak voltage required in one wireless transmission section is applied to the transmission amplifier. However, the peak voltage is not always required in the communication section. As a result, power consumption is wasted in the communication section. Several methods have been devised to solve such problems.

  The wireless communication device described in Patent Literature 1 switches between modulation wave tracking control and feedback control depending on whether or not to perform wireless transmission. Specifically, when transmitting a radio signal, the digital control unit receives an interrupt start signal and supplies power following the transmission signal to the amplifier circuit. When the wireless signal is not transmitted, the digital control unit supplies stable power to the amplifier circuit by feedback control. The arithmetic processing unit determines an oscillation frequency and a duty ratio, and generates a PWM (Pulse Width Modulation) signal.

  The power control device described in Patent Literature 2 includes a generation unit that generates a PWM signal based on a maximum voltage value per unit time of a transmission signal to be output from an amplifier circuit according to a transmission signal, and the maximum voltage value A selection unit that obtains a value reflecting the value, compares the value with one or more preset threshold values, and selects an inductor according to the comparison result, and a chopper circuit using the selected inductor And a power generation unit that generates power for driving the amplifier circuit based on the PWM signal.

JP 2009-225186 A JP 2009-225592 A

  In the wireless communication device described in Patent Document 1, since the control at the power supply unit is the duty ratio control, the operating frequency is fixed. Therefore, the voltage change time, that is, the follow-up speed tends to be constant. Therefore, it is easy to predict the time required for the voltage change based on the voltage change amount. However, the wireless communication device described in Patent Document 1 has a problem that the loss in the inductor increases when the output voltage is greatly changed.

  In the power control device described in Patent Document 2, power circuit inductors are provided in parallel for high output voltage and low output voltage. By selecting one of the power circuits based on the output voltage command value, the loss in the inductor is reduced. However, the power control device described in Patent Document 2 has a problem that it takes time to perform wireless control because the longer the change amount of the output voltage, the longer the follow-up time.

  SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a power control apparatus and a power control method in which the loss in the inductor does not increase even when the output voltage changes greatly, and it does not require time for tracking.

  According to an aspect of the present invention, there is provided a power control device that controls power supplied to a device, the power input unit to which a predetermined voltage is supplied, and the power supplied to the device during a transmission period of the device. A signal input unit that receives the adjusted output voltage command signal, a digital control processing unit that generates a voltage control signal according to the state of the device, and a predetermined voltage based on the voltage control signal to generate power The digital control processing unit has an output for adjusting the output voltage of the power analog unit to be maintained at a constant voltage based on the output voltage of the power analog unit during the reception period of the device. A feedback unit that generates a voltage command signal, and based on an output voltage command signal from the feedback unit during the reception period of the device, and based on an output voltage command signal from the signal input unit during the transmission period of the device. Te, by adjusting the respective oscillation frequency and duty ratio, and a processing unit for generating a voltage control signal.

  A power control device for controlling power supplied to a device, wherein a power input unit to which a predetermined voltage is supplied and an output voltage command signal adjusted according to the power supplied to the device during a transmission period of the device A signal input unit for receiving, a digital control processing unit for generating a plurality of voltage control signals according to the state of the device, a predetermined voltage based on the plurality of voltage control signals, and outputting an output voltage in parallel A plurality of power analog units, and an output filter that generates power by combining a plurality of output voltages output from the plurality of power analog units, the digital control processing unit, during the reception period of the device, Based on the output voltage of the output filter, a feedback unit that generates an output voltage command signal for adjusting the output voltage of the output filter to be maintained at a constant voltage, and a reception period of the device Based on the output voltage command signal from the feedback unit, and by adjusting the oscillation frequency, duty ratio and phase, respectively, based on the output voltage command signal from the signal input unit during the transmission period of the device, a plurality of voltage control signals And an arithmetic processing unit for generating

  Preferably, the frequency of the voltage control signal increases or decreases according to the voltage value of the output voltage command signal.

  Preferably, the voltage control signal changes the output voltage of the power analog unit by optimizing the oscillation frequency based on the value of the inductor in the power analog unit and the output voltage command signal.

  Preferably, the signal input unit receives an interrupt signal indicating whether the device is in a reception period or a transmission period, and when the interrupt signal indicates a reception period, the feedback unit outputs an output voltage command signal to the arithmetic processing unit, When the interrupt signal indicates a transmission period, the arithmetic processing unit is notified that it is a transmission period, and generation of the output voltage command signal is stopped.

  Preferably, the power analog unit includes an FET, and includes a power switching unit that turns on / off current, a drive circuit unit that turns on / off the power switching unit based on a voltage control signal, and a power switching unit. And a smoothing unit that smoothes the output voltage of the output.

  According to another aspect of the present invention, there is provided a power control device that controls power supplied to a device, the power input unit to which a predetermined voltage is supplied, and the power supplied to the device during a transmission period of the device. A signal input unit that receives the output voltage command signal adjusted according to the state, a digital control processing unit that generates a low voltage control signal and a high voltage control signal according to the state of the device, and a predetermined voltage based on the low voltage control signal A low voltage power analog unit that adjusts the voltage and outputs a low voltage output voltage, a high voltage power analog unit that adjusts a predetermined voltage based on a high voltage control signal and outputs a high voltage output voltage, and a low voltage output voltage and a high voltage output voltage And an output filter for generating power, and the digital control processing unit determines whether the output voltage of the output filter is constant based on the output voltage of the output filter during the reception period of the device. A feedback unit that generates an output voltage command signal for adjustment to be maintained at a constant, based on an output voltage command signal from the feedback unit during the reception period of the device, and from a signal input unit during the transmission period of the device And an arithmetic processing unit that generates a low voltage control signal and a high voltage control signal by adjusting the oscillation frequency, duty ratio, and phase, respectively, based on the output voltage command signal.

  Preferably, the low-voltage voltage control signal and the high-voltage voltage control signal increase or decrease in frequency according to the voltage value of the output voltage command signal.

  Preferably, the low voltage control signal and the high voltage control signal are obtained by optimizing the oscillation frequency based on the value of the inductor and the output voltage command signal in the low voltage power analog unit and the high voltage power analog unit, and The output voltage of the high-voltage power analog unit is changed.

  Preferably, the low-voltage power analog unit is configured by arranging a plurality of low-voltage power analog elements in parallel, and the high-voltage power analog unit is configured by arranging a plurality of high-voltage power analog elements in parallel.

  Preferably, the signal input unit receives an interrupt signal indicating whether the device is in a reception period or a transmission period, and when the interrupt signal indicates a reception period, the feedback unit outputs an output voltage command signal to the arithmetic processing unit, When the interrupt signal indicates a transmission period, the arithmetic processing unit is notified that it is a transmission period, and generation of the output voltage command signal is stopped.

  Preferably, each of the low-voltage power analog unit and the high-voltage power analog unit includes an FET.

  According to another aspect of the present invention, there is provided a power control method for controlling power supplied to a device, wherein a step of receiving a predetermined voltage and a transmission period of the device are adjusted according to the power supplied to the device. Receiving the output voltage command signal at the signal input unit, generating a voltage control signal according to the state of the device, adjusting a predetermined voltage based on the voltage control signal, and generating power The step of generating the voltage control signal includes a step of generating an output voltage command signal in the feedback unit for adjusting the output voltage to be maintained at a constant voltage during the reception period of the device, and a step of generating the voltage control signal. Is based on the output voltage command signal from the feedback unit, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively. By adjusting the I ratio, and generating a voltage control signal.

  According to another aspect of the present invention, there is provided a power control method for controlling power supplied to a device, wherein a step of receiving a predetermined voltage and a transmission period of the device are adjusted according to the power supplied to the device. Receiving the output voltage command signal at the signal input unit, generating a plurality of voltage control signals according to the state of the device, adjusting a predetermined voltage based on the plurality of voltage control signals, And a step of generating power by combining a plurality of output voltages, and the step of generating a plurality of voltage control signals includes maintaining the combined output voltage at a constant voltage during the reception period of the device. An output voltage command signal for adjusting the output voltage is generated in the feedback unit, and the device reception period is based on the output voltage command signal from the feedback unit during the device reception period. Based on the output voltage command signal from the signal input unit, respectively oscillation frequency, by adjusting the duty ratio and phase to generate a plurality of voltage control signals.

  According to another aspect of the present invention, there is provided a power control method for controlling power supplied to a device, wherein a step of receiving a predetermined voltage and a transmission period of the device are adjusted according to the power supplied to the device. Receiving the output voltage command signal at the signal input unit, generating a low voltage control signal and a high voltage control signal according to the state of the device, adjusting a predetermined voltage based on the low voltage control signal, Outputting a low voltage output voltage; adjusting a predetermined voltage based on the high voltage control signal; outputting a high voltage output voltage; and combining the low voltage output voltage and the high voltage output voltage to generate electric power. And the step of generating the low voltage control signal and the high voltage control signal is an output for adjusting the synthesized output voltage to be maintained at a constant voltage during the reception period of the device. A voltage command signal is generated in the feedback unit, and based on the output voltage command signal from the feedback unit during the device reception period and based on the output voltage command signal from the signal input unit during the device transmission period The low voltage control signal and the high voltage control signal are generated by adjusting the duty ratio and the phase.

  According to the embodiment of the present invention, even when the output voltage changes greatly, the loss in the inductor does not increase, and no time is required for tracking.

1 is a circuit block diagram showing a configuration of a power control apparatus 100 according to Embodiment 1 of the present invention. It is a timing diagram for demonstrating operation | movement of the power control apparatus 100 by Embodiment 1 of this invention. It is the circuit block diagram which showed the structure of 1 A of electric power control apparatuses by Embodiment 2 of this invention. It is a timing diagram for demonstrating operation | movement of 1 A of electric power control apparatuses by Embodiment 2 of this invention. It is a flowchart for demonstrating operation | movement of 50 A of digital control process parts by Embodiment 2 of this invention. It is the circuit block diagram which showed the structure of the power control apparatus 1B by Embodiment 3 of this invention. It is a timing diagram for demonstrating operation | movement of the electric power control apparatus 1B by Embodiment 3 of this invention. It is a flowchart for demonstrating operation | movement of the digital control processing part 50B by Embodiment 3 of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a circuit block diagram showing a configuration of a power control apparatus 100 according to Embodiment 1 of the present invention.

  Referring to FIG. 1, a power control apparatus 100 according to Embodiment 1 includes a power input unit 10, an input filter 11, an auxiliary power supply 12, a current detection sensor 13, a current detection unit 14, and a power analog unit 20. A voltage detection unit 30, a signal input unit 40, a digital control processing unit 50, an output filter 60, and a power output unit 70. The power analog unit 20 includes a power switching unit 21, a drive circuit unit 22, and a smoothing unit 23. The digital control processing unit 50 includes a communication I / F (Interface) unit 51, an external interrupt processing unit 52, an arithmetic processing unit 53, and a feedback unit 54.

  A DC voltage is normally supplied to the power input unit 10. The input filter 11 has a function of suppressing noise generated from the power analog unit 20 or the like and returning to the power input unit 10. The auxiliary power supply 12 generates a voltage Vcc necessary for operating the CPU, memory, and the like included in the digital control processing unit 50. The current detection sensor 13 includes a resistor, a current transformer, and the like, and monitors the current flowing into the power analog unit 20. The current detection unit 14 detects when the current flowing through the current detection sensor 13 changes suddenly. This prevents damage to the amplifier circuit and the like connected to the power output unit 70.

  The power switching unit 21 is configured to include an FET such as a cool MOSFET (Cool Metal Oxide Semiconductor Field Effect Transistor), for example, and turns on / off the current in accordance with a command from the drive circuit unit 22. The drive circuit unit 22 turns on / off the power switching unit 21 based on the voltage control signal VP output from the arithmetic processing unit 53. The power switching unit 21 and the drive circuit unit 22 constitute a step-down chopper circuit for the voltage applied from the power input unit 10. The smoothing unit 23 smoothes the output voltage from the power switching unit 21. The voltage detection unit 30 detects the output voltage in the smoothing unit 23 and outputs it to the digital control processing unit 50. Moreover, the voltage detection part 30 detects it when the voltage in the smoothing part 23 changes suddenly. Thereby, similarly to the current detection unit 14, damage to the amplifier circuit connected to the power output unit 70 is prevented.

  Various signals such as an interrupt signal Int and an output voltage command signal Vcnt are input to the signal input unit 40. The communication I / F unit 51 outputs the interrupt signal Int and the output voltage command signal Vcnt (interrupt data) from the signal input unit 40 to the external interrupt processing unit 52. The external interrupt processing unit 52 outputs the output voltage command signal Vcnt input from the communication I / F unit 51 to the arithmetic processing unit 53 and indicates that an interrupt has occurred (switched from the reception period to the transmission period). The signal is output to the feedback unit 54. Here, “reception period” and “transmission period” mean whether the wireless communication device to which power is supplied by the power control apparatus 100 is in a reception state or a transmission state.

  The arithmetic processing unit 53 generates a fundamental wave Fw that is the basis of the voltage control signal VP. The feedback unit 54 generates the output voltage command signal Vcnt so as to keep the voltage output from the voltage detection unit 30 at a predetermined constant voltage. The feedback unit 54 outputs the generated output voltage command signal Vcnt to the arithmetic processing unit 53 during the reception period. On the other hand, the feedback unit 54 stops generating the output voltage command signal Vcnt while receiving a signal indicating that there is an interrupt from the external interrupt processing unit 52 (transmission period).

  As described above, the output voltage command signal Vcnt is output from the feedback unit 54 to the arithmetic processing unit 53 during the reception period, and is output from the external interrupt processing unit 52 to the arithmetic processing unit 53 during the transmission period. The arithmetic processing unit 53 adjusts the oscillation frequency and the duty ratio based on the fundamental wave Fw and the output voltage command signal Vcnt, and generates the voltage control signal VP. The output filter 60 has a function of suppressing switching noise generated in the power analog unit 20. The power output unit 70 supplies the output voltage from the output filter 60 to an amplifier circuit or the like connected to the power output unit 70.

  FIG. 2 is a timing diagram for explaining the operation of power control apparatus 100 according to the first embodiment of the present invention.

  As shown in FIG. 2, the interrupt signal Int is at the low level RL indicating the reception period before the time t1, and is at the high level TH indicating the transmission period after the time t1. The fundamental wave Fw rises as a short rectangular wave every 3 ms from the time t1, t2,. A numerical value such as 3 ms is an example.

  The output voltage command signal Vcnt is fixed at 5V before time t1 which is a reception period. The output voltage command signal Vcnt changes to 8.0 V, 6.5 V,... Every time t1, t2,. The voltage of the voltage control signal VP changes at a predetermined constant frequency before time t1, which is a reception period. The voltage control signal VP changes in frequency according to the level of the output voltage command signal Vcnt every time t1, t2,... After time t1, which is a transmission period. Here, if the voltage value of the output voltage command signal Vcnt is high, the frequency of the voltage control signal VP decreases, and if the voltage value of the output voltage command signal Vcnt is low, the frequency of the voltage control signal VP increases.

  As described above, the power control apparatus 100 according to the first embodiment controls the power analog unit 20 by the arithmetic processing unit 53 by frequency control (PFM: Pulse Frequency Modulation). In the frequency control, the value of the inductor L in the power analog unit 20 is included in the calculation condition, and the voltage value of the output voltage command signal Vcnt is changed to optimize the oscillation frequency of the voltage control signal VP. Specifically, for example, the value of the inductor L [H] is calculated by the following equation.

L = Vo (Vi−Vo) / (ΔI · fsw · Vi)
Here, Vi [V] is an input voltage applied to the power supply input unit 10, Vo [V] is an output voltage output from the power supply output unit 70, ΔI [A] is a ripple current of the inductor, and fsw [Hz] is The frequency (switching frequency) of the voltage control signal VP is shown. When the above equation is expanded, the switching frequency fsw can be solved. From the condition that the inductor L is fixed and the input voltage Vi is substantially constant, the oscillation frequency required to create an arbitrary output voltage is obtained. As described above, by optimizing the oscillation frequency of the voltage control signal VP, it is possible to reduce the loss in the amplifier circuit or the like connected to the power output unit 70.

[Embodiment 2]
In the power control apparatus 100 according to the first embodiment, the power analog unit 20 has a single circuit configuration. In the case of a single circuit configuration, the only way to cope with the changing speed of the output voltage is basically to increase the operating frequency. When the operating frequency is increased, the loss tends to increase.

  In the first embodiment, if the inductor included in the power analog unit 20 is 120 μH, an oscillation frequency of 417 kHz is required to output 8.0 V, and an oscillation frequency of 911 kHz is necessary to output 1.5 V. Necessary. As described above, the oscillation frequency of the voltage control signal VP changes about three times only within a series of operations in the power analog unit 20. For this reason, in the characteristics of the power control device, when the follow-up speed with respect to the output voltage and the oscillation frequency is taken into account, a mode in which loss increases may occur. One method for solving such a problem is a parallel type power control apparatus.

  FIG. 3 is a circuit block diagram showing a configuration of power control apparatus 1A according to the second embodiment of the present invention.

  Referring to FIG. 3, a power control apparatus 1A according to the second embodiment includes a power input unit 10, an input filter 11, an auxiliary power source 12, a current detection sensor 13, a current detection unit 14, and a power analog unit 20a. To 20d, a voltage detection unit 30AB, a signal input unit 40, a digital control processing unit 50A, an output filter 60, and a power supply output unit 70. In the power control apparatus 1A, the power analog unit has a four-circuit configuration. However, the number of circuit configurations can be a minimum of two circuit configurations, and the maximum number of configurations is not limited as long as it can be controlled. Although the digital control processing unit 50A is described as one block in FIG. 3, the communication I / F unit 51, the external interrupt processing unit 52, the arithmetic processing, and the like, like the digital control processing unit 50 of the first embodiment. The structure including the part 53 and the feedback part 54 may be sufficient.

  Since power supply input unit 10, input filter 11, auxiliary power supply 12, current detection sensor 13, and current detection unit 14 are the same as those in the first embodiment, description thereof will not be repeated here. The power analog units 20a to 20d basically have a plurality of power analog units 20 according to the first embodiment arranged in parallel. The power analog units 20a to 20d chop the voltages based on the voltage control signals VP1 to VP4 output from the digital control processing unit 50A, respectively, and then smooth and output them to the output filter 60. The voltage detection unit 30AB detects the output voltage in the output filter 60 and outputs it to the digital control processing unit 50A.

  Various signals such as an interrupt signal Int and an output voltage command signal Vcnt are input to the signal input unit 40. The digital control processing unit 50A generates the output voltage command signal Vcnt so that the voltage output from the voltage detection unit 30AB is kept at a predetermined constant voltage during the reception period. The digital control processing unit 50A receives the output voltage command signal Vcnt (interrupt data) input from the signal input unit 40 during the transmission period. The digital control processing unit 50A generates the fundamental wave Fw, adjusts the oscillation frequency, duty ratio, and phase based on the fundamental wave Fw and the output voltage command signal Vcnt, and controls the voltage control signals VP1 to VP1 to the power analog units 20a to 20d. Each VP4 is generated.

  The output filter 60 suppresses switching noise generated in the power analog units 20a to 20d and synthesizes voltages output from each of the power analog units 20a to 20d. The power analog units 20a to 20d perform a power supply operation by shifting the phase at equal intervals by the voltage control signals VP1 to VP4. Therefore, the voltage synthesis of the output filter 60 can increase the follow-up speed with respect to the output voltage and the oscillation frequency as compared with the case of the one circuit configuration of the first embodiment. The power output unit 70 supplies the output voltage from the output filter 60 to an amplifier circuit or the like connected to the power output unit 70.

  As described above, by performing the phase operation process using the power analog units 20a to 20d arranged in parallel, it is possible to obtain a tracking characteristic that is equal to or higher than the oscillation frequency. For example, consider a case where the operating frequency is 500 kHz, two power analog circuits operate with a phase shift of 180 degrees, and their outputs are synthesized. In this case, when converted by a single power analog circuit, a tracking effect equivalent to that operated at 1 MHz can be obtained.

  Similarly, consider a case where the operating frequency is 500 kHz, the four power analog circuits operate by shifting the phase by 90 degrees, and the outputs are synthesized. In this case, when converted by a single power analog circuit, a tracking effect equivalent to that operated at 2 MHz can be obtained. In any case, since the operation of each power analog circuit is 500 kHz, the circuit loss itself is almost the same as when one power analog circuit is operated at 500 kHz. At present, the circuit loss increases as the oscillation frequency is increased. Therefore, a parallel phase processing operation is effective as a method for improving the tracking characteristic without increasing the oscillation frequency.

  FIG. 4 is a timing diagram for explaining the operation of power control apparatus 1A according to the second embodiment of the present invention.

  As shown in FIG. 4, the interrupt signal Int is at the low level RL indicating the reception period before the time t1, and is at the high level TH indicating the transmission period after the time t1. The fundamental wave Fw rises as a short rectangular wave every 3 ms from the time t1, t2,. A numerical value such as 3 ms is an example.

  The output voltage command signal Vcnt is fixed at 5V before time t1 which is a reception period. The output voltage command signal Vcnt changes to 8.0 V, 6.5 V,... Every time t1, t2,. The voltage of the voltage control signals VP1 to VP4 changes at a predetermined constant frequency before time t1, which is a reception period. The voltage control signals VP1 to VP4 change in frequency according to the level of the output voltage command signal Vcnt every time t1, t2,... After the time t1, which is a transmission period. Here, the frequency of the voltage control signals VP1 to VP4 is decreased when the voltage value of the output voltage command signal Vcnt is high, and the frequency of the voltage control signals VP1 to VP4 is increased when the voltage value of the output voltage command signal Vcnt is low. ing.

  The voltage control signals VP1 to VP4 are out of phase by 90 degrees in the order of VP1, VP2, VP3, and VP4 in the section before time t1. In the section from time t1 to t2, the phases are shifted by 90 degrees in the order of VP4, VP1, VP2, and VP3. In the section from time t2 to t3, the phases are shifted by 90 degrees in the order of VP3, VP4, VP1, and VP2. As described above, the digital control processing unit 50A sequentially modulates the power supply operations of the power analog units 20a to 20d by shifting the phase of the voltage control signals VP1 to VP4 at equal intervals of, for example, 90 degrees and performing frequency modulation. Switch.

  As described above, the power control apparatus 1 </ b> A sequentially performs the phase processing for shifting the operation phase on the power analog units 20 a to 20 d having the parallel configuration, and adds the results by the output filter 60. As a result, although depending on the number of parallel circuits, it is possible to obtain a change speed more than doubled even at the same operating frequency as compared with the case of one circuit configuration. As described above, the power control apparatus 1A according to the second embodiment can increase only the change speed of the output voltage without increasing the loss because the operating frequency is not increased. Therefore, the characteristics are improved as compared with the case of one circuit configuration.

  FIG. 5 is a flowchart for explaining the operation of the digital control processing unit 50A according to the second embodiment of the present invention.

  Referring to FIG. 5, in step S <b> 10, it is confirmed whether or not the interrupt signal Int is received from the signal input unit 40. If the interrupt signal Int has not been received, it is checked in step S12 whether or not the output voltage in the output filter 60 is sent from the voltage detection unit 30AB. If the output voltage has not been sent, the default output voltage command signal Vcnt is adopted in step S14. Thereafter, in step S16, the oscillation frequency is calculated based on the inductor value in the power analog units 20a to 20d and the output voltage command signal Vcnt that is initially set.

  If the output voltage has been sent in step S12, the current output voltage is compared with the default output voltage command signal Vcnt in step S18. Thereafter, in step S20, the duty ratios of the voltage control signals VP1 to VP4 are optimized based on the feedback process by the comparison.

  On the other hand, if the interrupt signal Int is received in step S10, the voltage value of the output voltage command signal Vcnt in that section is confirmed in step S22. Further, in step S24, the difference from the voltage value of the output voltage command signal Vcnt in the previous section is confirmed. In step S26, an optimum duty ratio that takes into account a delay in the output filter 60 is acquired from a plurality of duty ratios stored in advance in a table in the internal memory. Note that if the output voltage command signal Vcnt has an effect of the delay or the like, step S26 is not necessary. Thereafter, in step S28, the oscillation frequency is calculated from the inductor values in the power analog units 20a to 20d.

  Subsequent to steps S16, S20 and S28, in step S30, oscillation waveforms of voltage control signals VP1 to VP4 are generated from the viewpoint of frequency and duty ratio. In step S32, a phase shift between the voltage control signals VP1 to VP4 is set for each section. Thereafter, in step S34, the voltage control signal VP1 is output to the power analog unit 20a. In step S36, the voltage control signal VP2 is output to the power analog unit 20b. In step S38, the voltage control signal VP3 is output to the power analog unit 20c. In step S40, the voltage control signal VP4 is output to the power analog unit 20d. When the output to the power analog units 20a to 20d is completed, the operation from step S10 is repeated again.

  As described above, the power control device 1A according to the second embodiment outputs the voltage control signals VP1 to VP4 in which the phase shift is adjusted for each section to the power analog units 20a to 20d arranged in parallel. . By such a phase operation process, it is possible to reduce the loss in the power analog unit when the output voltage changes dynamically as compared with the case where the power analog unit has a single circuit configuration. The power control apparatus 1A adds a plurality of output voltages after the phase operation process from the parallel circuit configuration. Thereby, the change of the output voltage can be made smoother than in the case of a circuit configuration with the same operating frequency. As a result, compared to the case of one circuit configuration, the same or better effect is obtained in terms of loss and characteristics.

  Increasing the operating frequency of the power analog unit (switching unit) tends to increase loss due to the component characteristics of the current power control device. In order to suppress this component loss, the power control apparatus 1A is characterized in that the power analog unit is configured in parallel and the operation loss of the power analog unit is further reduced by phase operation processing. Further, since the phase operation process can be performed by the arithmetic processing function of the digital control processing unit 50A, even with the plurality of power analog units 20a to 20d, a complicated operation can be performed by one control unit.

[Embodiment 3]
FIG. 6 is a circuit block diagram showing the configuration of power control apparatus 1B according to the third embodiment of the present invention.

  Referring to FIG. 6, power control device 1 </ b> B according to Embodiment 3 includes power input unit 10, input filter 11, auxiliary power supply 12, current detection sensor 13, current detection unit 14, and low-voltage power analog unit. 20v, 20w, high-voltage power analog units 20x, 20y, a voltage detection unit 30AB, a signal input unit 40, a digital control processing unit 50B, an output filter 60, and a power output unit 70. The digital control processing unit 50B includes a low voltage drive output unit 55vw and a high voltage drive output unit 55xy. In FIG. 6, only the low-voltage drive output unit 55vw and the high-voltage drive output unit 55xy are blocked in the digital control processing unit 50B, but, like the digital control processing unit 50 of the first embodiment, The configuration may include an external interrupt processing unit 52, an arithmetic processing unit 53, and a feedback unit 54.

  Since power supply input unit 10, input filter 11, auxiliary power supply 12, current detection sensor 13, and current detection unit 14 are the same as those in the first embodiment, description thereof will not be repeated here. The low-voltage power analog units 20v and 20w chop the voltages based on the voltage control signals VLP1 and VLP2 output from the low-voltage drive output unit 55vw, respectively, smooth them, and output them to the output filter 60. The high-voltage power analog units 20x and 20y chop the voltages based on the voltage control signals VHP1 and VHP2 output from the high-voltage drive output unit 55xy, and then smooth and output the output to the output filter 60.

  The voltage detection unit 30AB detects the output voltage in the output filter 60 and outputs it to the digital control processing unit 50B. Various signals such as an interrupt signal Int and an output voltage command signal Vcnt are input to the signal input unit 40. The digital control processing unit 50B generates the output voltage command signal Vcnt so that the voltage output from the voltage detection unit 30AB is maintained at a predetermined constant voltage during the reception period. The digital control processing unit 50B receives the output voltage command signal Vcnt (interrupt data) input from the signal input unit 40 during the transmission period.

  The digital control processing unit 50B generates the fundamental wave Fw and generates a drive selection signal VS for selecting either the low-voltage drive output unit 55vw or the high-voltage drive output unit 55xy. The drive selection signal VS is generated based on the output voltage command signal Vcnt. The digital control processing unit 50B adjusts the oscillation frequency, duty ratio, and phase based on the fundamental wave Fw and the output voltage command signal Vcnt, and generates voltage control signals VLP1, VLP2 for the low-voltage power analog units 20v, 20w, Voltage control signals VHP1 and VHP2 are generated for the high-voltage power analog units 20x and 20y.

  The output filter 60 suppresses switching noise generated in the low-voltage power analog units 20v and 20w and the high-voltage power analog units 20x and 20y, and synthesizes voltages output from each of these power analog units. The power output unit 70 supplies the output voltage from the output filter 60 to an amplifier circuit or the like connected to the power output unit 70.

  As described above, in the power control apparatus 1B, the power analog units are arranged in parallel, the inductors of the low voltage power analog units 20v and 20w are for low output voltage, and the inductors of the high voltage power analog units 20x and 20y are for high output voltage. It is said. The power control device 1B selects the low-voltage power analog units 20v and 20w or the high-voltage power analog units 20x and 20y based on the drive selection signal VS. Thereby, the loss in the inductor in the power analog unit can be reduced.

  As described above, the power control apparatus 1B has the power analog units arranged in parallel, and the values of the included inductors are changed between the low-voltage power analog units 20v and 20w and the high-voltage power analog units 20x and 20y. Further, the low voltage power analog units 20v and 20w and the high voltage power analog units 20x and 20y are switched by the drive selection signal VS. As a result, it is possible to operate without lowering the oscillation frequency more than necessary. As a result, the follow-up speed is increased and the performance is improved as compared with the case of a single power analog unit. Further, since the phase processing by the power analog unit having the parallel configuration is maintained, the follow-up speed is further improved as compared with the case of the single power analog unit.

  FIG. 7 is a timing chart for explaining the operation of power control apparatus 1B according to the third embodiment of the present invention.

  As shown in FIG. 7, the interrupt signal Int is at the low level RL indicating the reception period before the time t1, and is at the high level TH indicating the transmission period after the time t1. The fundamental wave Fw rises as a short rectangular wave every 3 ms from the time t1, t2,. A numerical value such as 3 ms is an example.

  The output voltage command signal Vcnt is fixed at 5V before time t1 which is a reception period. The output voltage command signal Vcnt changes to 8.0 V, 6.5 V,... Every time t1, t2,. The drive selection signal VS is at a low level VL when the low voltage power analog units 20v and 20w are selected, and is at a high level VH when the high voltage power analog units 20x and 20y are selected.

  The voltage of the voltage control signals VLP1 and VLP2 changes at a predetermined constant frequency before time t1, which is a reception period. The voltage control signals VHP1 and VHP2 remain constant at a low level before time t1, which is the reception period. The voltage control signals VLP1 and VLP2 are transmitted according to the level of the output voltage command signal Vcnt at each time t1, t2,... Only during the period when the drive selection signal VS is at the low level VL after the time t1, which is the transmission period. The frequency changes. The voltage control signals VHP1 and VHP2 are transmitted according to the level of the output voltage command signal Vcnt at each time t1, t2,... Only during the period when the drive selection signal VS is at the high level VH after the time t1, which is the transmission period. The frequency changes.

  Here, as in the second embodiment, if the voltage value of the output voltage command signal Vcnt is high, the frequency of the voltage control signals VLP1, VLP2, VHP1, and VHP2 decreases, and if the voltage value of the output voltage command signal Vcnt is low, the voltage control is performed. The frequencies of the signals VLP1, VLP2, VHP1, and VHP2 are set to increase.

  The voltage control signals VLP1 and VLP2 are 180 degrees out of phase with each other. The voltage control signals VHP1 and VHP2 are also 180 degrees out of phase with each other. As described above, the digital control processing unit 50B first switches between the voltage control signals VLP1 and VLP2 and the voltage control signals VHP1 and VHP2. For the low-voltage power analog units 20v and 20w, the power control operations of the low-voltage power analog units 20v and 20w are sequentially switched by performing frequency modulation after shifting the phases of the voltage control signals VLP1 and VLP2 by, for example, 180 degrees. For the high-voltage power analog units 20x and 20y, the power control operations of the high-voltage power analog units 20x and 20y are sequentially switched by frequency-modulating the phase of the voltage control signals VHP1 and VHP2 by shifting the phase by 180 degrees, for example.

  The power control apparatus 1B is configured by dividing the low-voltage power analog units 20v and 20w and the high-voltage power analog units 20x and 20y, and further arranging them in parallel to shift the phase. Thereby, the follow-up speed is increased as compared with the case of the first embodiment, and the variation range of the oscillation frequency can be reduced as compared with the case of the second embodiment.

  In the low-voltage power analog units 20v and 20w, for example, an oscillation frequency of 729 kHz is required to generate an output of 1.5V. In the high-voltage power analog units 20x and 20y, for example, an oscillation frequency of 417 kHz is required to generate an output of 8V. In this case, the difference in oscillation frequency between the low pressure side and the high pressure side is in a range up to about twice.

  From the above example, even when the oscillation frequency is set to 750 kHz in the high voltage power analog units 20x and 20y, the oscillation frequency in the low voltage power analog units 20v and 20w can be suppressed to 1.5 MHz or less. As a result, the power control apparatus 1B can reduce the loss even when the follow-up speed is increased.

  FIG. 8 is a flowchart for explaining the operation of the digital control processing unit 50B according to the third embodiment of the present invention.

  With reference to FIG. 8, in step S <b> 10, it is confirmed whether or not the interrupt signal Int is received from the signal input unit 40. If the interrupt signal Int has not been received, it is checked in step S12 whether or not the output voltage in the output filter 60 is sent from the voltage detection unit 30AB. If the output voltage has not been sent, the default output voltage command signal Vcnt is adopted in step S14. If the output voltage has been sent, in step S18, the current output voltage is compared with the default output voltage command signal Vcnt. Thereafter, in step S21, the duty ratios of the voltage control signals VLP1 and VLP2 are optimized based on the feedback process by the comparison.

  On the other hand, if the interrupt signal Int is received in step S10, the voltage value of the output voltage command signal Vcnt in that section is confirmed in step S22. Thereafter, in step S23, it is confirmed whether or not the drive selection signal VS is at a low level VL. If the drive selection signal VS is a low level VL, in step S24, a difference from the voltage value of the output voltage command signal Vcnt in the previous section is confirmed. In step S26, an optimum duty ratio that takes into account a delay in the output filter 60 is acquired from a plurality of duty ratios stored in advance in a table in the internal memory.

  After the process in step S14 or S26, in step S17, the oscillation frequency is calculated based on the inductor value and the output voltage command signal Vcnt in the low voltage power analog units 20v and 20w. If the drive selection signal VS is not the low level VL in step S23, the difference from the voltage value of the output voltage command signal Vcnt in the previous section is confirmed in step S25. Further, in step S27, an optimum duty ratio taking into account a delay in the output filter 60 is acquired from a plurality of duty ratios stored in advance in the table of the internal memory. Thereafter, in step S29, the oscillation frequency is calculated from the inductor values in the high-voltage power analog units 20x and 20y.

  Subsequent to steps S17 and S21, in step S30, oscillation waveforms of voltage control signals VLP1 and VLP2 are generated from the viewpoint of frequency and duty ratio. In step S32, a phase shift between the voltage control signals VLP1 and VLP2 is set for each section. Thereafter, in step S35, the voltage control signal VLP1 is output to the low voltage power analog unit 20v. In step S37, the voltage control signal VLP2 is output to the low voltage power analog unit 20w.

  Subsequent to step S29, in step S31, oscillation waveforms of the voltage control signals VHP1 and VHP2 are generated from the viewpoint of frequency and duty ratio. In step S33, a phase shift between the voltage control signals VHP1 and VHP2 is set for each section. Thereafter, in step S39, the voltage control signal VHP1 is output to the high voltage power analog unit 20x. In step S41, the voltage control signal VHP2 is output to the high voltage power analog unit 20y.

  When the output to the low-voltage power analog units 20v and 20w and the high-voltage power analog units 20x and 20y is finished, the operation from step S10 is repeated again.

  As described above, the power control apparatus 1B according to the third embodiment corresponds to the case where the fluctuation range of the output voltage is large, and the parallel power analog units are divided into the low-voltage power analog units 20v and 20w and the high-voltage power analog units 20x and 20y. It is divided into two parts. Thereby, it is possible to reduce a loss in a fixed constant part such as an inductor of the power analog unit. Switching between the low-voltage power analog units 20v and 20w and the high-voltage power analog units 20x and 20y is performed by a drive selection signal VS.

  The power control device 1B outputs the voltage control signals VLP1 and VLP2 adjusted in phase deviation to the low-voltage power analog units 20v and 20w arranged in parallel, and the voltage control signals VHP1 and VHP2 adjusted in phase deviation are arranged in parallel. Outputs to the high-voltage power analog units 20x and 20y, respectively. Compared to the case where the power analog part is not divided into low-voltage and high-voltage parts, the output voltage change speed is increased and the loss in the power analog part is minimized. Can do.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

  1A, 1B, 100 Power control device, 10 Power input unit, 11 Input filter, 12 Auxiliary power supply, 13 Current detection sensor, 14 Current detection unit, 20, 20a to 20d Power analog unit, 20v, 20w Low voltage power analog unit, 20x 20y High voltage power analog unit, 21 Power switching unit, 22 Drive circuit unit, 23 Smoothing unit, 30, 30AB Voltage detection unit, 40 Signal input unit, 50, 50A, 50B Digital control processing unit, 51 Communication I / F unit, 52 external interrupt processing unit, 53 arithmetic processing unit, 54 feedback unit, 55 vw low voltage drive output unit, 55xy high voltage drive output unit, 60 output filter, 70 power output unit.

Claims (15)

A power control device for controlling power supplied to a device,
A power input section to which a predetermined voltage is supplied;
A signal input unit that receives an output voltage command signal adjusted according to the power supplied to the device during the transmission period of the device;
A digital control processing unit that generates a voltage control signal according to the state of the device;
A power analog unit that adjusts the predetermined voltage based on the voltage control signal and generates the power; and
The digital control processing unit
A feedback unit that generates the output voltage command signal for adjusting the output voltage of the power analog unit to be maintained at a constant voltage based on the output voltage of the power analog unit during the reception period of the device;
Based on the output voltage command signal from the feedback unit during the reception period of the device, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively, the oscillation frequency and the duty ratio are set. An electric power control device including an arithmetic processing unit that generates the voltage control signal by adjusting. A power control device for controlling power supplied to a device,
A power input section to which a predetermined voltage is supplied;
A signal input unit that receives an output voltage command signal adjusted according to the power supplied to the device during the transmission period of the device;
A digital control processing unit that generates a plurality of the voltage control signals according to the state of the device;
A plurality of power analog units arranged in parallel to adjust the predetermined voltage based on the plurality of voltage control signals and output an output voltage, respectively.
An output filter that combines the plurality of output voltages output from the plurality of power analog units to generate the power;
The digital control processing unit
A feedback unit that generates the output voltage command signal for adjusting the output voltage of the output filter to be maintained at a constant voltage based on the output voltage of the output filter during the reception period of the device;
Based on the output voltage command signal from the feedback unit during the reception period of the device, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively, an oscillation frequency, a duty ratio, and A power control apparatus comprising: an arithmetic processing unit that generates the plurality of voltage control signals by adjusting a phase.   The power control apparatus according to claim 1 or 2, wherein the voltage control signal increases or decreases in frequency according to a voltage value of the output voltage command signal.   The said voltage control signal changes the output voltage of the said power analog part by optimizing an oscillation frequency based on the value of the inductor in the said power analog part, and the said output voltage command signal. Power control device. The signal input unit receives an interrupt signal indicating whether the device is in a reception period or a transmission period;
The feedback unit outputs the output voltage command signal to the arithmetic processing unit when the interrupt signal indicates a reception period, and the arithmetic processing indicates that it is a transmission period when the interrupt signal indicates a transmission period. The power control apparatus according to claim 1, wherein the power control apparatus stops notification of the output voltage command signal and notifies generation of the output voltage command signal. The power analog unit is
A power switching unit configured to include an FET and turn on / off current;
A drive circuit unit for turning on / off the power switching unit based on the voltage control signal;
The power control apparatus according to claim 1, further comprising a smoothing unit that smoothes an output voltage from the power switching unit. A power control device for controlling power supplied to a device,
A power input section to which a predetermined voltage is supplied;
A signal input unit that receives an output voltage command signal adjusted according to the power supplied to the device during the transmission period of the device;
A digital control processing unit for generating a low voltage control signal and a high voltage control signal according to the state of the device;
A low voltage power analog unit that adjusts the predetermined voltage based on the low voltage control signal and outputs a low voltage output voltage;
A high voltage power analog unit that adjusts the predetermined voltage based on the high voltage control signal and outputs a high voltage output voltage;
An output filter that combines the low-voltage output voltage and the high-voltage output voltage to generate the power,
The digital control processing unit
A feedback unit that generates the output voltage command signal for adjusting the output voltage of the output filter to be maintained at a constant voltage based on the output voltage of the output filter during the reception period of the device;
Based on the output voltage command signal from the feedback unit during the reception period of the device, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively, an oscillation frequency, a duty ratio, and A power control apparatus comprising: an arithmetic processing unit that generates the low voltage control signal and the high voltage control signal by adjusting a phase.   The power control apparatus according to claim 7, wherein the low-voltage voltage control signal and the high-voltage voltage control signal increase or decrease in frequency according to a voltage value of the output voltage command signal.   The low-voltage voltage control signal and the high-voltage voltage control signal are obtained by optimizing an oscillation frequency based on an inductor value and the output voltage command signal in the low-voltage power analog unit and the high-voltage power analog unit. The power control apparatus according to claim 8, wherein output voltages of the analog unit and the high-voltage power analog unit are respectively changed.   The low-voltage power analog unit is configured with a plurality of low-voltage power analog elements arranged in parallel, and the high-voltage power analog unit is configured with a plurality of high-voltage power analog elements arranged in parallel. Power control device. The signal input unit receives an interrupt signal indicating whether the device is in a reception period or a transmission period;
The feedback unit outputs the output voltage command signal to the arithmetic processing unit when the interrupt signal indicates a reception period, and the arithmetic processing indicates that it is a transmission period when the interrupt signal indicates a transmission period. The power control device according to claim 2, wherein the power control device stops notification of the output voltage command signal and notifies generation of the output voltage command signal.   The power control apparatus according to claim 7, wherein each of the low-voltage power analog unit and the high-voltage power analog unit includes an FET. A power control method for controlling power supplied to a device,
Receiving a predetermined voltage;
Receiving the output voltage command signal adjusted according to the power supplied to the device at the signal input unit during the transmission period of the device;
Generating a voltage control signal according to the state of the device;
Adjusting the predetermined voltage based on the voltage control signal and generating the power, and
Generating the voltage control signal comprises:
Generating, in a feedback unit, the output voltage command signal for adjusting the output voltage to be maintained at a constant voltage during the reception period of the device;
Based on the output voltage command signal from the feedback unit during the reception period of the device, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively, the oscillation frequency and the duty ratio are set. Generating the voltage control signal by adjusting the power control method. A power control method for controlling power supplied to a device,
Receiving a predetermined voltage;
Receiving the output voltage command signal adjusted according to the power supplied to the device at the signal input unit during the transmission period of the device;
Generating a plurality of the voltage control signals according to the state of the device;
Adjusting the predetermined voltage based on the plurality of voltage control signals, respectively outputting an output voltage;
Combining a plurality of the output voltages to generate the power,
Generating the plurality of voltage control signals comprises:
In the reception period of the device, the output voltage command signal for adjusting the synthesized output voltage to be maintained at a constant voltage is generated in a feedback unit,
Based on the output voltage command signal from the feedback unit during the reception period of the device, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively, an oscillation frequency, a duty ratio, and A power control method for generating the plurality of voltage control signals by adjusting a phase. A power control method for controlling power supplied to a device,
Receiving a predetermined voltage;
Receiving the output voltage command signal adjusted according to the power supplied to the device at the signal input unit during the transmission period of the device;
Generating a low voltage control signal and a high voltage control signal according to the state of the device;
Adjusting the predetermined voltage based on the low voltage control signal, and outputting a low voltage output voltage;
Adjusting the predetermined voltage based on the high voltage control signal and outputting a high voltage output voltage;
Combining the low-voltage output voltage and the high-voltage output voltage to generate the power,
Generating the low voltage control signal and the high voltage control signal comprises:
In the reception period of the device, an output voltage command signal for adjusting the synthesized output voltage to be maintained at a constant voltage is generated in a feedback unit,
Based on the output voltage command signal from the feedback unit during the reception period of the device, and based on the output voltage command signal from the signal input unit during the transmission period of the device, respectively, an oscillation frequency, a duty ratio, and A power control method for generating the low voltage control signal and the high voltage control signal by adjusting a phase.

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