JP2010141344A - Thermal processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thermal processing apparatus capable of preventing damage to a processing object substrate during thermal processing. <P>SOLUTION: Reflection intensities of a standard wafer with a known reflectance, a plain wafer on which no pattern is formed, and a semiconductor wafer to be processed practically are measured by using an optical measuring system. Their respective reflection intensities are subjected to spectral resolution processing. An optical energy value absorbed by the plain wafer is calculated from the reflection intensity of the standard wafer and the reflection intensity of the plain wafer, and an optical energy value absorbed by the processing object wafer is calculated from the reflection intensity of the standard wafer and the reflection intensity of the processing object wafer. On the basis of these values, an optical energy absorption ratio of the processing object wafer to the plain wafer is calculated, and an optimum energy value to be irradiated to the processing object wafer is calculated from this optical energy absorption ratio and an optimum energy value of light irradiated to the plain wafer. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a heat treatment apparatus for measuring a light energy absorption ratio of a substrate to be processed with respect to a plain substrate on which no pattern is formed.

  Conventionally, in an ion activation process of a semiconductor wafer after ion implantation, a heat treatment apparatus such as a lamp annealing apparatus using a halogen lamp has been used. In such a heat treatment apparatus, the semiconductor wafer is ion-activated by heating (annealing) the semiconductor wafer to a temperature of about 1000 ° C. to 1100 ° C., for example. In such a heat treatment apparatus, the temperature of the substrate is raised at a rate of several hundred degrees per second by using the energy of light irradiated from the halogen lamp.

  However, even when ion activation of a semiconductor wafer is performed using a heat treatment apparatus that raises the temperature of the semiconductor wafer at a rate of several hundred degrees per second by a halogen lamp, the profile of ions implanted into the semiconductor wafer is reduced. That is, it has been found that a phenomenon occurs in which ions diffuse due to heat. When such a phenomenon occurs, even if ions are implanted at a high concentration on the surface of the semiconductor wafer, the ions after implantation are diffused, so that ions must be implanted more than necessary. Has occurred.

  In order to solve the above-mentioned ion diffusion problem, the surface of the semiconductor wafer is irradiated with flash light using a xenon flash lamp or the like, so that only the surface of the semiconductor wafer into which ions are implanted is extremely short (less than a few milliseconds). ) Has been proposed (see, for example, Patent Documents 1 and 2). If the temperature is raised for a very short time with a xenon flash lamp, there is not enough time for ions to diffuse, so only ion activation is performed without the profile of the ions implanted in the semiconductor wafer being distorted. Can do it.

JP 59-169125 A JP 63-166219 A

  However, in a heat treatment apparatus using a xenon flash lamp, a very large amount of light energy is irradiated to the wafer surface in a very short time, so that the surface temperature rises rapidly and only the wafer surface expands rapidly. . It has been found that if the energy irradiated from the xenon flash lamp is excessive, only the surface expands abruptly, resulting in slippage on the wafer surface or, in the worst case, wafer cracking. On the other hand, if the irradiation energy is low, ion activation cannot be performed. Therefore, it is important to optimize the range of light energy irradiated from the xenon flash lamp.

  In general, in the case of a flash lamp with an extremely short irradiation time, it is impossible to perform feedback control of the lamp output based on the temperature measurement result of the semiconductor wafer. Therefore, ion implantation is performed on a plain bare wafer that is not patterned. Measure the characteristics after processing (eg sheet resistance value) after actually irradiating a plain wafer that has been subjected to light, and adjust the light energy emitted from the xenon flash lamp based on the result Yes.

  However, wafers that are actually processed are those on which a pattern has been formed, and light absorption characteristics are often different from plain wafers. In general, even when irradiated with light of the same energy, a patterned wafer tends to absorb more light energy than a plain wafer. For this reason, even if the irradiation energy is optimized in a plain wafer, there has been a problem that the wafer to be processed actually causes a wafer crack as a result of absorbing more light energy. In order to prevent this, it is necessary to correct the appropriate irradiation energy value on the plain wafer for each wafer to be processed.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment apparatus that can prevent damage to a substrate to be treated during heat treatment.

  In order to solve the above-mentioned problem, the invention of claim 1 is directed to a heat treatment apparatus for heating a substrate by irradiating flash light on the substrate to be processed. A holding unit for holding the substrate to be processed having a known value, a flash lamp, an irradiation unit for irradiating the processing target substrate held by the holding unit with flash light, and the substrate to be processed with respect to the plain substrate. Light energy control means for adjusting the energy of the flash light applied to the substrate to be processed from the irradiation means to an appropriate value based on the light energy absorption ratio and the appropriate energy value of the flash light applied to the plain substrate.

  According to a second aspect of the present invention, there is provided a heat treatment apparatus for heating a substrate by irradiating a flash on the substrate to be processed, and an energy value of the flash applied to the plain substrate on which no pattern is formed, Correlation with temperature is known, holding means for holding the substrate to be processed, a flash lamp, an irradiating means for irradiating the processing target substrate held by the holding means with flash of predetermined energy, and the plain Temperature calculating means for calculating the temperature of the processing target substrate when flash light is irradiated from the irradiation means to the processing target substrate based on the light energy absorption ratio of the processing target substrate to the substrate and the correlation; Prepare.

  The invention of claim 3 further includes a warning generating means for issuing a warning when the temperature calculated by the temperature calculating means exceeds a predetermined threshold in the heat treatment apparatus according to the invention of claim 2.

  According to the invention of claim 1, based on the light energy absorption ratio of the substrate to be processed with respect to the plain substrate and the appropriate energy value of the flash irradiated to the plain substrate, the energy of the flash irradiated to the substrate to be processed from the irradiation means is an appropriate value. Therefore, it is possible to prevent the substrate to be processed from being damaged during the heat treatment.

  According to the second aspect of the present invention, the process from the irradiation means is performed based on the correlation between the light energy absorption ratio of the substrate to be processed with respect to the plain substrate and the energy value of the flash light applied to the plain substrate and the temperature of the plain substrate. Since the temperature of the processing target substrate when the target substrate is irradiated with flash light is calculated, the temperature reached by the processing target substrate can be determined before the heat treatment, and the processing target substrate can be prevented from being damaged during the heat processing. .

  According to the invention of claim 3, since a warning is issued when the calculated temperature exceeds a predetermined threshold, it is possible to more reliably prevent damage to the substrate to be processed during the heat treatment.

It is a top view which shows the heat processing apparatus concerning this invention. It is a front view which shows the heat processing apparatus concerning this invention. It is a sectional side view which shows the process part of the heat processing apparatus of FIG. It is a sectional side view which shows the process part of the heat processing apparatus of FIG. It is a figure for showing the composition of the absorption ratio measuring device provided in the positioning part. It is a figure for demonstrating the structure of a measurement optical system. It is a block diagram which shows the structure of a controller. It is a flowchart which shows the procedure of the optical energy absorption ratio measurement of the semiconductor wafer in a positioning part. It is a figure explaining the light energy which the plain wafer absorbed. It is a figure explaining the light energy which the semiconductor wafer to be processed absorbed. It is a flowchart which shows the procedure which calculates the estimated temperature at the time of the heating of the semiconductor wafer used as a process target. It is a flowchart which shows the other example of the optical energy absorption ratio measurement procedure of a semiconductor wafer. It is a figure which shows the correlation with the irradiation energy when sheet | seat is flash-heated to the ion-implanted plain wafer, and a sheet resistance value.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<1. First Embodiment>
FIG. 1 is a plan view showing a heat treatment apparatus 100 according to the present invention, and FIG. 2 is a front view. 1 and FIG. 2 are partly cross-sectional views as appropriate, and details are simplified as appropriate. 1 and 2 and the subsequent drawings, an XYZ orthogonal coordinate system in which the Z-axis direction is the vertical direction and the XY plane is the horizontal plane is attached as necessary to clarify the directional relationship. .

  As shown in FIG. 1 and FIG. 2, the heat treatment apparatus 100 includes a substrate housing part (indexer) 110 on which two carriers 91 are placed, a delivery robot 120 that takes in and out the semiconductor wafer W with respect to the substrate housing part 110, Positioning part (aligner) 130 for positioning the semiconductor wafer W to be processed, cooling part (cooler) 140 for cooling the processed semiconductor wafer W, positioning part 130, cooling part 140, etc. A transfer robot 150 is provided, and a processing unit 160 that performs flash heat treatment on the semiconductor wafer W is provided.

  In addition, a transfer chamber 170 that accommodates the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150, and the positioning unit 130, the cooling unit 140, and the processing unit 160 are connected to the transfer chamber 170. Yes.

  The substrate housing part 110 is a part on which the carrier 91 is transported and placed by an automatic guided vehicle (AGV) or the like, and the semiconductor wafer W is carried into and out of the heat treatment apparatus 100 while being housed in the carrier 91. Further, in the substrate housing part 110, the carrier 91 is configured to move up and down as indicated by an arrow 91U so that an arbitrary semiconductor wafer W can be taken in and out by the delivery robot 120.

  The delivery robot 120 is slidable as indicated by an arrow 120S and is rotatable as indicated by an arrow 120R. With this, the semiconductor wafer W is taken in and out of the two carriers 91. Further, the semiconductor wafer W is delivered to the positioning unit 130 and the cooling unit 140.

  In addition, the semiconductor wafer W is put in and out of the carrier 91 by the delivery robot 120 by the sliding movement of the hand 121 and the raising and lowering movement of the carrier 91. In addition, the semiconductor wafer W is transferred between the delivery robot 120 and the positioning unit 130 or the cooling unit 140 by sliding the hand 121 and a semiconductor wafer by a pin (a pin that pushes up the semiconductor wafer W in the positioning unit 130 or the cooling unit 140). This is done by moving W up and down.

  The semiconductor wafer W is delivered from the delivery robot 120 to the positioning unit 130 such that the center of the semiconductor wafer W is located at a predetermined position. Then, the positioning unit 130 rotates the semiconductor wafer W to direct the semiconductor wafer W in an appropriate direction. Moreover, the positioning part 130 is provided with the below-mentioned absorption ratio measuring device, and measures the light energy absorption ratio of the semiconductor wafer W to be subjected to heat treatment by the absorption ratio measuring device.

  The transfer robot 150 is turnable as indicated by an arrow 150R about a vertical axis, and has two link mechanisms composed of a plurality of arm segments, and a semiconductor is provided at each end of the two link mechanisms. Transfer arms 151 a and 151 b for holding the wafer W are provided. These transfer arms 151a and 151b are arranged vertically apart from each other by a predetermined pitch, and can be slid linearly in the same horizontal direction independently by a link mechanism. Further, the transfer robot 150 moves up and down the two transfer arms 151a and 151b while moving away from each other by a predetermined pitch by moving up and down a base provided with two link mechanisms.

  When the transfer robot 150 transfers (inserts / removes) the semiconductor wafer W as the positioning unit 130, the processing unit 160, or the cooling unit 140, it first turns so that both transfer arms 151a and 151b face the transfer partner. After that (or while turning), one of the transfer arms is positioned at a height at which the transfer wafer and the semiconductor wafer W are transferred. Then, the transfer arm 151a (151b) is slid linearly in the horizontal direction to deliver the semiconductor wafer W.

  The processing unit 160 is a part that performs heat treatment by irradiating the semiconductor wafer W with flash light from a xenon flash lamp 69 (hereinafter also simply referred to as “flash lamp 69”). The processing unit 160 will be described in detail later.

  Since the semiconductor wafer W immediately after being processed by the processing unit 160 has a high temperature, it is placed on the cooling unit 140 and cooled by the transfer robot 150. The semiconductor wafer W cooled by the cooling unit 140 is returned to the carrier 91 by the delivery robot 120 as a processed semiconductor wafer W.

  Further, as described above, in the heat treatment apparatus 100, the periphery of the transfer robot 150 is covered with the transfer chamber 170, and the positioning unit 130, the cooling unit 140, and the processing unit 160 are connected to the transfer chamber 170. Gate valves 181 and 182 are provided between the positioning unit 130 and the cooling unit 140, respectively, and gate valves 183 and 184 are provided between the transfer chamber 170 and the positioning unit 130, the cooling unit 140, and the processing unit 160, respectively. 185 is provided. Then, high-purity nitrogen gas is supplied from a nitrogen gas supply unit (not shown) so that the interiors of the positioning unit 130, the cooling unit 140, and the transfer chamber 170 are kept clean, and excess nitrogen gas is appropriately exhausted. Exhausted from the tube. Note that these gate valves are appropriately opened and closed when the semiconductor wafer W is transferred.

  Further, the positioning unit 130 and the cooling unit 140 are located at different positions between the delivery robot 120 and the transfer robot 150, and the semiconductor wafer W is temporarily placed on the positioning unit 130 in order to position the semiconductor wafer W. In the cooling unit 140, the semiconductor wafer W is temporarily placed in order to cool the processed semiconductor wafer W.

  Next, the configuration of the processing unit 160 will be further described. 3 and 4 are side sectional views showing the processing section 160 of the heat treatment apparatus 100 according to the present invention. In the processing unit 160, flash heating of a substrate such as a semiconductor wafer is performed.

  The processing unit 160 includes a translucent plate 61, a bottom plate 62, and a pair of side plates 63 and 64, and includes a chamber 65 for housing the semiconductor wafer W and heat-treating it. The translucent plate 61 constituting the upper portion of the chamber 65 is made of a material having infrared transparency such as quartz, for example, and serves as a chamber window that transmits light emitted from the flash lamp 69 and guides it into the chamber 65. It is functioning. Further, on the bottom plate 62 constituting the chamber 65, support pins 70 are provided so as to pass through holding means including a susceptor 73 and a heating plate 74, which will be described later, and support the semiconductor wafer W from its lower surface.

  Further, an opening 66 for carrying in and out the semiconductor wafer W is formed in the side plate 64 constituting the chamber 65. The opening 66 can be opened and closed by a gate valve 68 that rotates about a shaft 67. The semiconductor wafer W is loaded into the chamber 65 by the transfer robot 150 with the opening 66 being opened. Further, when the semiconductor wafer W is heat-treated in the chamber 65, the opening 66 is closed by the gate valve 68.

  The chamber 65 is provided below the light source 5. The light source 5 includes a plurality of (30 in this embodiment) flash lamps 69 and a reflector 71. The plurality of flash lamps 69 are rod-shaped lamps each having a long cylindrical shape, and are arranged in parallel with each other such that the longitudinal direction thereof is along the horizontal direction. The reflector 71 is disposed above the plurality of flash lamps 69 so as to cover all of them.

  The xenon flash lamp 69 includes a glass tube in which xenon gas is sealed and an anode and a cathode connected to a capacitor at both ends thereof, and a trigger electrode wound around an external portion of the glass tube. Prepare. Since xenon gas is an electrical insulator, electricity does not flow into the glass tube under normal conditions. However, if the insulation is broken by applying a high voltage to the trigger electrode, the electricity stored in the capacitor instantaneously flows into the glass tube, and the xenon gas is heated by Joule heat at that time, and light is emitted. . In the xenon flash lamp 69, the electrostatic energy stored in advance is converted into an extremely short light pulse of 0.1 millisecond to 10 millisecond. It has the feature that it can.

  A light diffusing plate 72 is disposed between the light source 5 and the translucent plate 61. As the light diffusion plate 72, a surface of quartz glass as an infrared transmitting material subjected to light diffusion processing is used. Instead of using the light diffusing plate 72, the translucent plate 61 may be subjected to surface processing.

  Part of the light emitted from the flash lamp 69 passes directly through the light diffusing plate 72 and the light transmitting plate 61 toward the chamber 65. Further, another part of the light emitted from the flash lamp 69 is once reflected by the reflector 71, then passes through the light diffusing plate 72 and the light transmitting plate 61 and goes into the chamber 65.

  A heating plate 74 and a susceptor 73 are provided in the chamber 65. The susceptor 73 is installed on the upper surface of the heating plate 74. Further, a misalignment prevention pin 75 of the semiconductor wafer W is attached to the surface of the susceptor 73.

  The heating plate 74 is for preheating (assist heating) the semiconductor wafer W. The heating plate 74 is made of aluminum nitride and has a configuration in which a heater and a sensor for controlling the heater are housed. On the other hand, the susceptor 73 diffuses the thermal energy from the heating plate 74 and preheats the semiconductor wafer W uniformly. As a material of the susceptor 73, quartz, high-purity ceramics, or the like is employed. Note that, similarly to the heating plate 74, the susceptor 73 may be made of aluminum nitride.

  The susceptor 73 and the heating plate 74 are configured to move up and down between the loading / unloading position of the semiconductor wafer W shown in FIG. 3 and the heat treatment position of the semiconductor wafer W shown in FIG.

  That is, the heating plate 74 is connected to the moving plate 42 via the cylindrical body 41. The moving plate 42 can be moved up and down by being guided by a guide member 43 supported by a bottom plate 62 of the chamber 65. A fixed plate 44 is fixed to the lower end portion of the guide member 43, and a motor 40 that rotationally drives a ball screw 45 is disposed at the central portion of the fixed plate 44. The ball screw 45 is screwed with a nut 48 connected to the moving plate 42 via connecting members 46 and 47. For this reason, the susceptor 73 and the heating plate 74 can be moved up and down between the loading / unloading position of the semiconductor wafer W shown in FIG. 3 and the heat treatment position of the semiconductor wafer W shown in FIG.

  The semiconductor wafer W shown in FIG. 3 is loaded or unloaded by placing the semiconductor wafer W carried in from the opening 66 using the transfer robot 150 on the support pins 70 or on the support pins 70. The susceptor 73 and the heating plate 74 are lowered so that the semiconductor wafer W can be unloaded from the opening 66. In this state, the upper end of the support pin 70 passes through a through hole formed in the susceptor 73 and the heating plate 74 and protrudes upward from the surface of the susceptor 73.

  On the other hand, the heat treatment position of the semiconductor wafer W shown in FIG. 4 is a position where the susceptor 73 and the heating plate 74 are raised above the upper ends of the support pins 70 in order to perform heat treatment on the semiconductor wafer W. In the process in which the susceptor 73 and the heating plate 74 are raised from the loading / unloading position in FIG. 3 to the heat treatment position in FIG. 4, the semiconductor wafer W placed on the support pins 70 is received by the susceptor 73. It rises while being supported by the surface, and is held in a horizontal position at a position close to the translucent plate 61 in the chamber 65. Conversely, in the process in which the susceptor 73 and the heating plate 74 are lowered from the heat treatment position to the carry-in / carry-out position, the semiconductor wafer W supported by the susceptor 73 is transferred to the support pins 70.

  In a state where the susceptor 73 and the heating plate 74 that support the semiconductor wafer W are raised to the heat treatment position, the translucent plate 61 is located between the semiconductor wafer W held by them and the light source 5. Note that the distance between the susceptor 73 and the light source 5 at this time can be adjusted to an arbitrary value by controlling the rotation amount of the motor 40.

  Further, between the bottom plate 62 of the chamber 65 and the moving plate 42, a telescopic bellows 77 is disposed so as to surround the cylindrical body 41 and maintain the chamber 65 in an airtight body. When the susceptor 73 and the heating plate 74 are raised to the heat treatment position, the bellows 77 contracts, and when the susceptor 73 and the heating plate 74 are lowered to the loading / unloading position, the bellows 77 is expanded so that the atmosphere in the chamber 65 and the external atmosphere are increased. Cut off.

  In the side plate 63 opposite to the opening 66 in the chamber 65, an introduction path 78 connected to the on-off valve 80 is formed. The introduction path 78 is for introducing a gas necessary for processing, for example, an inert nitrogen gas, into the chamber 65. On the other hand, a discharge passage 79 connected to the on-off valve 81 is formed in the opening 66 in the side plate 64. The discharge path 79 is for discharging the gas in the chamber 65, and is connected to an exhaust means (not shown) via the on-off valve 81.

  A light guide 82 is provided on the inner wall of the side plate 64 in the chamber 65. As shown in FIG. 4, the light guide 82 is installed in the vicinity of the heating plate 74 when the susceptor 73 and the heating plate 74 are raised to the heat treatment position. The light guide 82 is composed of a quartz rod and an optical fiber, and receives the light emitted from the flash lamp 69 and guides it to the power monitor 83 outside the chamber 65 (see FIG. 7). The power monitor 83 receives the light derived from the light guide 82 and measures the intensity of the light emitted from the flash lamp 69 mainly in the visible light region.

  In the heat treatment apparatus 100 of the present embodiment, an absorption ratio measuring device is provided in the positioning unit 130. FIG. 5 is a diagram for illustrating the configuration of the absorption ratio measuring apparatus 30. The absorption ratio measuring device 30 includes a measurement optical system 31, a projector 33 coupled to the measurement optical system 31 via a light projecting optical fiber 32, and a light receiving optical fiber 34 to the measurement optical system 31. And a spectroscope 35 coupled to each other. The projector 33 generates a certain amount of light. The light emitted from the projector 33 is irradiated from the measurement optical system 31 toward the surface of the semiconductor wafer W held by the pins of the positioning unit 130 and is reflected by the surface. The reflected light is supplied from the light receiving optical fiber 34 to the spectroscope 35 via the measurement optical system 31. The output signal of the spectroscope 35 is input to the controller 10.

  FIG. 6 is a diagram for explaining the configuration of the measurement optical system 31. In the measurement optical system 31, an achromatic lens 36, a half mirror 37, and a total reflection mirror 38 are arranged along the vertical direction in order from the bottom. Further, a diffuser 39 is disposed along the direction in which the reflected light from the total reflection mirror 38 is directed.

  The half mirror 37 is provided in a posture that forms an angle of 45 ° with respect to the semiconductor wafer W held by the pins of the positioning unit 130 (an angle of 45 ° with respect to the horizontal plane). The light in the horizontal direction from the emission end 32a is received, reflected downward in the vertical direction, and directed toward the surface of the semiconductor wafer W. The light reflected by the half mirror 37 passes through the achromatic lens 36 and reaches the surface of the semiconductor wafer W.

  Then, the reflected light reflected by the surface of the semiconductor wafer W passes through the achromatic lens 36 and the half mirror 37 in order, and is reflected toward the diffuser 39 by the total reflection mirror 38. The reflected light that has entered the diffuser 39 undergoes a diffusion uniformization process and enters the incident end 34 a of the light receiving optical fiber 34.

  That is, the diffuser 39 is interposed between the incident end 34a of the light receiving optical fiber 34 and the total reflection mirror 38. The incident end surface 39a faces the total reflection mirror 38 and the emission end surface 39b receives light. It faces the incident end 34a of the optical fiber 34 for use. The achromatic lens 36 has a function of focusing the reflected light from the semiconductor wafer W onto the incident end surface 39 a of the diffuser 39.

  The light incident on the light receiving optical fiber 34 is subjected to spectral decomposition processing by the spectroscope 35, and a signal output from the spectroscope 35 as a result of this processing is input to the controller 10. The controller 10 calculates the light energy absorption ratio of the semiconductor wafer W as described later.

  The controller 10 controls the processing unit 160 and the absorption ratio measuring device 30 of the heat treatment apparatus 100 and calculates the light energy absorption ratio of the semiconductor wafer W held by the positioning unit 130 as described later. FIG. 7 is a block diagram showing the configuration of the controller 10. The configuration of the controller 10 as hardware is the same as that of a general computer. That is, the controller 10 stores a CPU 11 that performs various arithmetic processes, a ROM 12 that is a read-only memory that stores basic programs, a RAM 13 that is a readable / writable memory that stores various information, control software, data, and the like. A magnetic disk 14 is connected to a bus line 19.

  The bus line 19 is electrically connected to the lamp power source 99 of the processing unit 160, the spectroscope 35 of the absorption ratio measuring device 30, and the power monitor 83. The CPU 11 of the controller 10 executes the control software stored in the magnetic disk 14 to measure the light energy absorption ratio of the semiconductor wafer W with respect to the plain wafer on which no pattern is formed and supplies it to the flash lamp 69. Adjust the power.

  Further, a display unit 21 and an input unit 22 are electrically connected to the bus line 19. The display unit 21 is configured using, for example, a liquid crystal display or the like, and displays various information such as processing results and recipe contents. The input unit 22 is configured using, for example, a keyboard, a mouse, and the like, and receives input of commands, parameters, and the like. The operator of the apparatus can input commands and parameters from the input unit 22 while confirming the contents displayed on the display unit 21. Note that the display unit 21 and the input unit 22 may be integrated to form a touch panel.

  Next, the heat treatment operation of the semiconductor wafer W by the heat treatment apparatus 100 according to the present invention will be described. A semiconductor wafer W to be processed in the heat treatment apparatus 100 is a semiconductor wafer after ion implantation. Here, after describing the wafer flow in the entire heat treatment apparatus 100, the optical energy absorption ratio measurement of the semiconductor wafer W by the absorption ratio measuring apparatus 30 and the processing contents in the processing unit 160 will be described.

  In the heat treatment apparatus 100, first, a plurality of semiconductor wafers W after ion implantation are placed on the substrate housing part 110 in a state where they are housed in the carrier 91. Then, the delivery robot 120 takes out the semiconductor wafers W one by one from the carrier 91 and places them on the positioning unit 130. In the positioning unit 130, in addition to the positioning of the semiconductor wafer W, the light energy absorption ratio measurement by the absorption ratio measuring device 30 is also performed.

  The semiconductor wafer W positioned by the positioning unit 130 is taken out into the transfer chamber 170 by the transfer arm 151 a on the upper side of the transfer robot 150, and turns so that the transfer robot 150 faces the processing unit 160.

  When the transfer robot 150 faces the processing unit 160, the lower transfer arm 151b takes out the preceding processed semiconductor wafer W from the processing unit 160, and the upper transfer arm 151a transfers the unprocessed semiconductor wafer W to the processing unit 160. And carry it in. At this time, the transfer robot 150 slides the transfer arms 151 a and 151 b perpendicular to the longitudinal direction of the flash lamp 69.

  Next, the transfer robot 150 turns to face the cooling unit 140, and the lower transfer arm 151 b places the processed semiconductor wafer W in the cooling unit 140. The semiconductor wafer W cooled by the cooling unit 140 is returned to the carrier 91 by the delivery robot 120.

  FIG. 8 is a flowchart showing a procedure for measuring the light energy absorption ratio of the semiconductor wafer W in the positioning unit 130. Prior to processing the semiconductor wafer W to be actually processed along the wafer flow as described above, a standard wafer with a known reflectance and a plain wafer with no pattern formed are carried into the positioning unit 130 and are transferred to them. Measure the reflection intensity.

  First, the reflection intensity of a standard wafer with a known reflectance is measured (step S1). As the standard wafer, for example, a glass plate deposited with Al may be used. Since such a standard wafer has a mirror surface, the reflectivity is almost 100%. Such a standard wafer is carried into the positioning unit 130 and placed on the pins, and light is irradiated from the measurement optical system 31 to the surface of the standard wafer. The reflected light reflected on the surface of the standard wafer is subjected to spectral decomposition processing by the spectroscope 35, and the spectral characteristic of the reflected intensity of the reflected light is input to the controller 10 as a result of this processing. In this specification, the spectral characteristic of the reflection intensity of such a standard wafer is defined as the standard reflection intensity.

  Next, the reflection intensity of the plain wafer on which no pattern is formed is measured (step S2). A plain wafer is the same as a normally processed semiconductor wafer W except that it is an unprocessed substrate that has not been patterned. Such a plain wafer is carried into the positioning unit 130 and placed on the pins, and light is irradiated from the measurement optical system 31 to the surface of the plain wafer. The reflected light reflected by the surface of the plain wafer is subjected to spectral decomposition processing by the spectroscope 35, and the spectral characteristic of the reflected intensity of the reflected light is input to the controller 10 as a result of this processing. In this specification, the spectral characteristic of the reflection intensity of such a plain wafer is defined as a plain substrate reflection intensity.

  Measurement of the standard reflection intensity and the plain substrate reflection intensity may be performed once prior to the processing of the semiconductor wafer W to be processed normally. The standard reflection intensity and plain substrate reflection intensity obtained as described above are stored in the magnetic disk 14 of the controller 10.

  Next, the reflection intensity measurement of the semiconductor wafer W to be actually processed is performed (step S3). This measurement is performed every time the semiconductor wafer W to be processed is loaded into the positioning unit 130 for positioning. Since the semiconductor wafer W to be actually processed is after ion implantation, the pattern has already been formed. The measurement optical system 31 irradiates light onto the surface of the semiconductor wafer W carried into the positioning unit 130 by the delivery robot 120 and placed on the pins. The reflected light reflected by the surface of the semiconductor wafer W to be processed is subjected to spectral decomposition processing by the spectroscope 35, and the spectral characteristics of the reflected intensity of the reflected light are input to the controller 10 as a result of this processing. In this specification, the spectral characteristic of the reflection intensity of the semiconductor wafer W to be processed is referred to as the processing target substrate reflection intensity. The reason why the reflection intensity is measured every time the semiconductor wafer W to be processed is carried into the positioning unit 130 is that the reflection intensity varies from wafer to wafer depending on the contents of pattern formation.

  When the measurement of the reflection intensity of the semiconductor wafer W to be processed is completed, the process proceeds to step S4, and the light energy absorbed by the plain wafer is calculated by the CPU 11 of the controller 10. FIG. 9 is a diagram for explaining the light energy absorbed by the plain wafer. In the figure, the vertical axis represents the reflection intensity, and the horizontal axis represents the wave number (the reciprocal of the wavelength). A value obtained by integrating the reflection intensity with such two-dimensional coordinates is the light energy of the reflected light. That is, in FIG. 9, the value obtained by integrating the standard reflection intensity RA is the light energy SA of the reflected light from the standard wafer, and the value obtained by integrating the plain substrate reflection intensity RB is the light energy SB of the reflected light from the plain wafer. Therefore, assuming that the reflectance of the standard wafer is approximately 100%, the value obtained by subtracting the light energy SB from the light energy SA (the area of the hatched portion in FIG. 9) is calculated as the light energy absorbed by the plain wafer.

  In the above, the integration range of the reflection intensity is 1/800 to 1/400, that is, the visible light range is that the wavelength distribution of the xenon flash lamp 69 extends from the ultraviolet range to the infrared range and the silicon semiconductor. In consideration of the fact that the wafer W transmits infrared rays, the wavelength range that contributes to the heating of the semiconductor wafer W is selected.

  Next, the process proceeds to step S <b> 5, and the light energy absorbed by the semiconductor wafer W to be processed is calculated by the CPU 11 of the controller 10. FIG. 10 is a diagram for explaining the light energy absorbed by the semiconductor wafer W to be processed. In this figure, the value obtained by integrating the standard reflection intensity RA is the light energy SA of the reflected light from the standard wafer, and the value obtained by integrating the substrate reflection intensity RC to be processed is the light energy SC of the reflected light from the semiconductor wafer W to be processed. It is. Therefore, a value obtained by subtracting the light energy SC from the light energy SA (the area of the hatched portion in FIG. 10) is calculated as the light energy absorbed by the semiconductor wafer W to be processed.

  When both the light energy absorbed by the plain wafer and the light energy absorbed by the semiconductor wafer W to be processed are calculated, the light energy absorption ratio of the semiconductor wafer W to be processed with respect to the plain wafer is calculated by the CPU 11 of the controller 10. (Step S6). That is, the light energy absorption ratio r of the semiconductor wafer W to be processed with respect to the plain wafer is calculated by the following equation (1).

  In general, since the semiconductor wafer W to be processed absorbs light better than a plain wafer on which no pattern is formed, usually SB> SC, and as a result, r> 1.

  In this way, the optical energy absorption ratio r of the semiconductor wafer W to be processed with respect to the plain wafer can be easily measured with a simple optical system.

After calculating the light energy absorption ratio r of the semiconductor wafer W to be processed with respect to the plain wafer as described above, in the first embodiment, the appropriate value of the energy of the light irradiated from the flash lamp 69 to the semiconductor wafer W to be processed is calculated. Is calculated (step S7). As described above, the energy value of the flash light irradiated from the flash lamp 69 is determined by performing ion implantation on a bare wafer on which no pattern is formed, and actually performing flash light irradiation on the ion-implanted plain wafer. Adjustment is made based on the result of measuring characteristics (for example, sheet resistance value). That is, the appropriate energy value of the light to be irradiated is known for the ion-implanted plain wafer. Note that the proper energy value of the irradiation light, a necessary and sufficient energy values can be performed without ion activation damaging the wafer, in the normal plain wafer about 25J / cm ² ~28J / cm ² of about Value.

  However, since the semiconductor wafer W to be processed absorbs light better than the plain wafer, even if it is an appropriate value for the plain wafer, the surface temperature will be As described above, the wafer cracking may occur as a result of the increase of the value beyond the expected value.

  Therefore, in the first embodiment, based on the appropriate energy value of light to be applied to the ion-implanted plain wafer and the light energy absorption ratio r, the appropriate value of the energy of the flash light applied to the semiconductor wafer W to be processed is determined. The CPU 11 of the controller 10 calculates and controls the lamp power source 99 so as to perform flash irradiation with the appropriate value. Specifically, based on the following equation 2, the CPU 11 of the controller 10 calculates an appropriate value EC of the energy of the flash light irradiated to the semiconductor wafer W to be processed.

  In Equation 2, EB is an appropriate energy value of light to be irradiated onto the ion-implanted plain wafer, and this appropriate energy value is a value as described above obtained in advance by experiment, simulation, or the like. That is, the appropriate value EC of the light energy irradiated to the processing target semiconductor wafer W is calculated from the appropriate energy value EB of light to be irradiated onto the ion-implanted plain wafer and the light energy absorption ratio r. Note that since r> 1 normally, EC <EB.

  When the appropriate value EC of the energy of light to be irradiated onto the semiconductor wafer W to be processed is calculated, the CPU 11 of the controller 10 controls the lamp power supply 99 so that the flash light is emitted from the light source 5 at the appropriate value EC. Specifically, in accordance with an instruction from the controller 10, the voltage stored in the capacitor connected to the electrode of the flash lamp 69 is adjusted. The voltage stored in the capacitor defines the amount of charge, and the energy value of the flashlight emitted from the flash lamp 69 is defined by the amount of charge.

  The reflectance is slightly different between the ion-implanted plain wafer and the non-ion-implanted bare wafer, which is the basis for calculating the appropriate value EC of the light energy to be irradiated on the semiconductor wafer W to be processed. Since the appropriate energy value EB of the light to be irradiated on the plain wafer is a value for the plain wafer into which the ions are implanted, the plain wafer used for calculating the light energy absorption ratio r (the reflection intensity measurement is performed by the positioning unit 130). The plain wafer to be performed) is also preferably an ion-implanted plain wafer.

  The processing operation in the processing unit 160 will be further described. In the processing unit 160, the semiconductor wafer W is loaded by the transfer robot 150 through the opening 66 in a state where the susceptor 73 and the heating plate 74 are arranged at the loading / unloading position of the semiconductor wafer W shown in FIG. It is placed on the support pin 70. The semiconductor wafer W has already been measured for its light energy absorption ratio r by the positioning unit 130, and an appropriate value EC of the energy of the flash light to be irradiated on the semiconductor wafer W is also calculated. When the loading of the semiconductor wafer W is completed, the opening 66 is closed by the gate valve 68. Thereafter, the susceptor 73 and the heating plate 74 are raised to the heat treatment position of the semiconductor wafer W shown in FIG. 4 by driving the motor 40, and hold the semiconductor wafer W in a horizontal posture. Further, the on-off valve 80 and the on-off valve 81 are opened to form a nitrogen gas flow in the chamber 65.

  The susceptor 73 and the heating plate 74 are preheated to a predetermined temperature by the action of a heater built in the heating plate 74. For this reason, in a state where the susceptor 73 and the heating plate 74 are raised to the heat treatment position of the semiconductor wafer W, the semiconductor wafer W is preliminarily heated by coming into contact with the heated susceptor 73, and the temperature of the semiconductor wafer W gradually increases. To do.

  In this state, the semiconductor wafer W is continuously heated via the susceptor 73. When the temperature of the semiconductor wafer W rises, whether or not the internal temperature of the heating plate 74 has reached a set temperature such that the surface temperature of the semiconductor wafer W becomes the preheating temperature T1 by a temperature sensor inside the heating plate 74 (not shown). Is constantly monitored.

  The preheating temperature T1 is, for example, about 200 ° C. to 600 ° C. Even if the semiconductor wafer W is heated to such a preheating temperature T1, ions implanted into the semiconductor wafer W will not diffuse.

  Eventually, when the surface temperature of the semiconductor wafer W reaches the preheating temperature T1, the flash lamp 69 is turned on to perform flash heating. At this time, flash irradiation from the flash lamp 69 is performed at an appropriate value EC of the energy of light to be irradiated onto the semiconductor wafer W, which is calculated in advance as described above. The lighting time of the flash lamp 69 in this flash heating process is a time of about 0.1 to 10 milliseconds. Thus, in the flash lamp 69, the electrostatic energy stored in advance is converted into such an extremely short light pulse, so that an extremely strong flash light is irradiated.

  By such flash heating, the surface temperature of the semiconductor wafer W instantaneously reaches the temperature T2. This temperature T2 is a temperature necessary for the ion activation treatment of the semiconductor wafer W at about 1000 ° C. to 1100 ° C. When the surface of the semiconductor wafer W is heated to such a processing temperature T2, ions implanted into the semiconductor wafer W are activated.

  At this time, since the surface temperature of the semiconductor wafer W is raised to the processing temperature T2 in an extremely short time of about 0.1 to 10 milliseconds, ion activation in the semiconductor wafer W is completed in a short time. . Therefore, the ions implanted into the semiconductor wafer W do not diffuse, and it is possible to prevent the phenomenon that the profile of the ions implanted into the semiconductor wafer W is lost. Since the time required for ion activation is extremely short compared with the time required for ion diffusion, the ion activation is performed even for a short time in which no diffusion of about 0.1 millisecond to 10 millisecond occurs. Complete.

  Further, since flash light irradiation from the flash lamp 69 is performed at an appropriate value EC of light energy to be irradiated onto the semiconductor wafer W to be processed, ion activation is performed without damaging the semiconductor wafer W during heat treatment. Can do.

  Further, before the flash lamp 69 is turned on to heat the semiconductor wafer W, the surface temperature of the semiconductor wafer W is heated to the preheating temperature T1 of about 200 ° C. to 600 ° C. using the heating plate 74. The flash lamp 69 can quickly raise the temperature of the semiconductor wafer W to the processing temperature T2 of about 1000 ° C. to 1100 ° C.

  After the flash heating process is completed, the susceptor 73 and the heating plate 74 are lowered to the loading / unloading position of the semiconductor wafer W shown in FIG. 3 by driving the motor 40, and the opening 66 closed by the gate valve 68 is opened. Is done. Then, the semiconductor wafer W placed on the support pins 70 is unloaded by the transfer robot 150. As described above, a series of heat treatment operations is completed.

<2. Second Embodiment>
Next, a second embodiment of the present invention will be described. The apparatus configuration of the heat treatment apparatus according to the second embodiment and the heat treatment operation on the semiconductor wafer W in the processing unit 160 are the same as those in the first embodiment, and thus description thereof is omitted. The second embodiment is different from the first embodiment in a method of using the light energy absorption ratio r of the semiconductor wafer W to be processed with respect to the plain wafer. In the second embodiment, the light energy absorption ratio r is used during flash heating. The expected temperature of the semiconductor wafer W to be processed is calculated.

  FIG. 11 is a flowchart showing a procedure for calculating an expected temperature during heating of the semiconductor wafer W to be processed. In this figure, the processing procedure from step S11 to S16 is exactly the same as the content of the processing procedure from step S1 to step S6 in FIG. 8, and processing for a plain wafer on which no pattern is formed as in the first embodiment. The light energy absorption ratio r of the target semiconductor wafer W is calculated.

  In the second embodiment, the expected temperature reached by the semiconductor wafer W during flash heating is calculated based on the calculated light energy absorption ratio r (step S17). As described above, the energy value of the light emitted from the flash lamp 69 is determined by performing ion implantation on a plain bare wafer on which no pattern is formed, and actually irradiating the ion-implanted plain wafer. It is adjusted based on the result of measuring the characteristics. That is, in the normal state, the energy value of the flash light irradiated from the flash lamp 69 is set to the appropriate energy value of the flash light to be irradiated on the ion-implanted plain wafer.

  However, since the semiconductor wafer W to be processed absorbs light better than the plain wafer, the surface temperature rises more than expected when the actual wafer to be processed is irradiated with a flash having an appropriate energy value for the plain wafer. In the second embodiment, the CPU 11 of the controller 10 calculates the expected temperature when the actual processing target semiconductor wafer W is irradiated with light having an appropriate energy value for the plain wafer.

  Specifically, first, the correlation between the energy value of the light irradiated to the plain wafer after ion implantation on which pattern formation has not been performed and the temperature of the plain wafer is obtained in advance by experiments, simulations, or the like. Then, the CPU 11 calculates r · EB obtained by multiplying the appropriate energy value EB of the light to be irradiated on the plain wafer by the light energy absorption ratio r of the semiconductor wafer W to be processed with respect to the plain wafer. This r · EB is the energy value of the irradiation light necessary to absorb the energy equivalent to the energy absorbed by the semiconductor wafer W when the semiconductor wafer W to be processed is irradiated with the light of the energy value EB. It is. Accordingly, when the semiconductor wafer W to be processed is irradiated with light having an energy value EB corresponding to r · EB in the correlation between the energy value of the light applied to the plain wafer and the temperature of the plain wafer, the semiconductor wafer The expected temperature at which W reaches.

  As described above, in the second embodiment, the correlation between the energy value of the light applied to the plain wafer after ion implantation that has not been patterned and the temperature of the plain wafer, and the semiconductor wafer W to be processed with respect to the plain wafer. The expected temperature of the semiconductor wafer W to be processed during flash heating is simply calculated based on the light energy absorption ratio r.

  Then, the calculated predicted temperature is compared with the predetermined threshold value by the CPU 11 (step S18). The predetermined threshold may be set in advance as a temperature at which slip occurs in the semiconductor wafer W, for example. As a result of the comparison, when the predicted temperature of the processing target semiconductor wafer W during the flash heating exceeds the threshold value, the process proceeds to step S19, and the controller 10 issues a warning. For example, a warning message may be displayed on the display unit 21.

  On the other hand, when the predicted temperature is equal to or lower than the threshold value, the process is continued as it is, and flash heating by the flash lamp 69 is performed.

  According to the second embodiment, the expected arrival temperature of the semiconductor wafer W to be processed can be calculated before the flash heating, and the energy value of the light emitted from the flash lamp 69 can be adjusted based on the estimated temperature. For example, it is possible to prevent damage to the semiconductor wafer W during the heat treatment.

  In the second embodiment, the correlation between the energy value of light applied to the plain wafer after ion implantation that has not been patterned and the temperature of the plain wafer, and the light of the semiconductor wafer W to be processed with respect to the plain wafer. Since the expected temperature of the processing target semiconductor wafer W during flash heating is simply calculated based on the energy absorption ratio r, a plain wafer (reflected by the positioning unit 130) used to calculate the light energy absorption ratio r is calculated. The plain wafer on which the intensity measurement is performed is also preferably an ion-implanted plain wafer. In addition, since the correlation between the energy value of light irradiating a plain wafer (complete bare wafer) that has not been patterned and ion-implanted and the temperature of the bare wafer has been found in advance through experiments and simulations. If there is, it is appropriate to calculate the predicted temperature of the semiconductor wafer W to be processed during flash heating based on the correlation and the optical energy absorption ratio r of the semiconductor wafer W to be processed with respect to the bare wafer. The plain wafer used to calculate the ratio r is also preferably a complete bare wafer that is not ion-implanted.

<3. Third Embodiment>
Next, a third embodiment of the present invention will be described. The apparatus configuration of the heat treatment apparatus according to the third embodiment and the heat treatment operation on the semiconductor wafer W in the processing unit 160 are the same as those in the first embodiment, and thus description thereof is omitted. The third embodiment differs from the first embodiment in a method of calculating the light energy absorption ratio r of the semiconductor wafer W to be processed with respect to the plain wafer. In the third embodiment, the light energy absorption is performed without using a standard wafer. The ratio r is calculated.

  FIG. 12 is a flowchart showing another example of the procedure for measuring the light energy absorption ratio of the semiconductor wafer W. Prior to executing this measurement procedure, the reflectance of a plain wafer after ion implantation that has not been subjected to pattern formation is determined in advance by experiments. This reflectance is stored in the RAM 13 or the magnetic disk 14. In this state where the reflectance of the plain wafer is known, the reflection intensity of the plain wafer is measured (step S21). When a plain wafer with a known reflectance is after ion implantation, the reflection intensity measurement is also performed for the one after ion implantation. This measurement itself is the same as step S2 of the first embodiment, and a plain substrate reflection intensity is obtained as a result of the measurement.

  Next, based on the plain substrate reflection intensity and the reflectance of the known plain wafer, the CPU 11 calculates an ideal reflection intensity that is a spectral reflection intensity of the reflected light when the ideal mirror having a reflectance of 100% is irradiated with light. (Step S22). Specifically, the ideal reflection intensity is calculated by dividing the plain substrate reflection intensity obtained in step S21 by the reflectance of the plain wafer. This ideal reflection intensity is substantially equal to the spectral reflection intensity (standard reflection intensity) of a standard wafer having a reflectance of approximately 100% in the first embodiment.

  The contents of the processing procedure in steps S23 to S27 in FIG. 12 are exactly the same as the processing procedure in steps S3 to S7 in FIG. However, in the third embodiment, ideal reflection intensity is used instead of standard reflection intensity. That is, after measuring the reflection intensity of the semiconductor wafer W actually to be processed (step S23), the light energy absorbed by the plain wafer using the ideal reflection intensity instead of the standard reflection intensity RA and the semiconductor to be processed The light energy absorbed by the wafer W is calculated (steps S24 and S25). Then, from both of them, the light energy absorption ratio of the semiconductor wafer W to be processed with respect to the plain wafer is calculated by the CPU 11 of the controller 10 (step S26). Thereafter, as in the first embodiment, based on the appropriate energy value of light to be irradiated on the ion-implanted plain wafer and the light energy absorption ratio, the appropriate value of the energy of the flash light irradiated on the semiconductor wafer W to be processed is Calculated (step S27).

  Thus, in the third embodiment, instead of measuring the spectral reflection intensity of a standard wafer having a reflectance of almost 100%, the spectral reflection intensity of a plain wafer with a known reflectance is measured, and the reflectance is calculated from the result. The ideal reflection intensity that should be obtained when light is irradiated onto a 100% ideal mirror is calculated, and the optical energy absorption ratio r is calculated using the ideal reflection intensity instead of the standard reflection intensity. Even in this case, since the physical significance of the ideal reflection intensity is the same as the standard reflection intensity, the appropriate value EC of the energy of the light applied to the semiconductor wafer W to be processed is calculated as in the first embodiment. be able to. Since a standard wafer obtained by vapor-depositing Al on a glass plate is relatively expensive, the cost increase can be suppressed by using the third wafer as in the third embodiment.

  In the third embodiment, the reflection intensity of the plain wafer after ion implantation is measured. However, the reflection intensity of a plain wafer (completely bare wafer) that has not been patterned and is not ion-implanted is measured. May be used to calculate the ideal reflection intensity. The reflectance of a complete bare wafer is widely known, and if the ideal reflection intensity is calculated from the plain substrate reflection intensity obtained by measuring the reflection intensity of the bare wafer, the accurate ideal reflection intensity can be easily calculated. can do. However, even in this case, the appropriate energy value of the light to be applied to the plain wafer serving as the basis for calculating the appropriate value of the energy of the light to be applied to the semiconductor wafer W to be processed is the ion-implanted plain wafer. Therefore, the solid substrate reflection intensity used for calculating the light energy absorbed by the plain wafer is preferably obtained by actually measuring the ion-implanted plain wafer. The measurement of the plain substrate reflection intensity may be performed once prior to the processing of the semiconductor wafer W to be processed normally.

<4. Fourth Embodiment>
Next, a fourth embodiment of the present invention will be described. The apparatus configuration of the heat treatment apparatus of the fourth embodiment and the heat treatment operation on the semiconductor wafer W in the processing unit 160 are the same as those of the first embodiment. In the fourth embodiment, the estimated reaching temperature of the semiconductor wafer W to be processed when flash heating is performed is calculated in real time.

  FIG. 13 is a diagram showing the correlation between the irradiation light energy and the sheet resistance value when flash heating is performed on the ion-implanted plain wafer. The sheet resistance value is an index indicating the surface temperature reached by the wafer, and is a value measured by applying a four-terminal method to a plain wafer after flash heating. The same sheet resistance value indicates that the surface temperature reached by the wafer during flash heating is equal. This measurement is performed for three temperatures at which the preheating temperatures are 400 ° C., 450 ° C., and 500 ° C., and the sheet resistance value is measured by changing the irradiation light energy at each preheating temperature.

As shown in the figure, the irradiation light energy regardless of the preheating temperature is in the region of ^{23J / cm 2 ~29J / cm 2} , is observed good linear relationship correlation between the irradiation light energy and the sheet resistance value. Moreover, the slope in the linear region is substantially constant regardless of the preheating temperature. From this, it can be considered that the preheating temperature of 50 ° C. corresponds to about ² J / cm ² of irradiation energy. That is, even if the preheating temperature is lower by 50 ° C., if the irradiation energy is increased by about ² J / cm ^{2, the} wafer surface temperature can be made comparable, and the wafer surface temperature is about 25 ° C. by the irradiation light energy of 1 J / cm ^2. It can be inferred that it rises. Therefore, the surface temperature reached when flash heating is performed on the ion-implanted plain wafer can be expressed by the following equation (3).

  In Equation 3, Ts is the temperature reached by the surface of the ion-implanted plain wafer during flash heating, Ta is the preheating temperature, and J is the irradiation light energy during flash heating. As already described in the second embodiment, when the actual processing target semiconductor wafer W is irradiated with the flash of energy J, r · J multiplied by the light energy absorption ratio r of the processing target semiconductor wafer W with respect to the plain wafer. Energy will be absorbed. Accordingly, the surface temperature Tserf when the semiconductor wafer W to be processed is irradiated with the flash of the irradiation light energy J is expressed by the following equation (4).

  However, since the irradiation light energy J at the time of flash heating cannot be directly observed, the emitted light intensity M from the flash lamp 69 measured by the power monitor 83 is used. According to the investigation by the present inventor, it has been found that there is a linear correlation between the radiated light intensity M from the flash lamp 69 observed by the power monitor 83 and the energy J of the radiated light. Assuming that the coefficient is β, the surface arrival temperature Tserf of the semiconductor wafer W to be processed at the time of flash heating is expressed by the following equation (5).

  When flash heating is performed on the semiconductor wafer W to be processed, the CPU 11 of the controller 10 calculates the preheating temperature Ta, the light energy absorption ratio r, the coefficient β, and the radiated light intensity M measured by the power monitor 83 in advance. 5, the surface temperature Tserf of the semiconductor wafer W is calculated. The calculated surface temperature Tserf may be displayed on the display unit 21, for example.

<5. Modification>
While the embodiments of the present invention have been described above, the present invention is not limited to the above examples. For example, in the above embodiment, the light source 5 is provided with 30 flash lamps 69, but the present invention is not limited to this, and the number of flash lamps 69 may be arbitrary.

  Further, the technique according to the present invention can be applied to a heat treatment apparatus that includes another type of lamp (for example, a halogen lamp) instead of the flash lamp 69 in the light source 5 and heats the semiconductor wafer W by light irradiation from the lamp. Can be applied. Even in this case, an appropriate value of the energy of light to be irradiated on the semiconductor wafer W to be processed is calculated from the light energy absorption ratio of the semiconductor wafer W to be processed with respect to the bare wafer, or the semiconductor wafer W reaches at the time of heat treatment The expected temperature can be calculated.

  Moreover, in the said embodiment, although the two carriers 91 are mounted in the board | substrate accommodating part 110, only one carrier 91 may be mounted and three or more may be sufficient. Further, although the delivery robot 120 moves between the two carriers 91, two delivery robots 120 may be provided.

  Also, the upper transfer arm 151a of the transfer robot 150 is designed as a dedicated arm for holding the unprocessed semiconductor wafer W, and the lower transfer arm 151b is designed as a dedicated arm for holding the processed semiconductor wafer W. Thus, the transport robot 150 can be reduced in size and transport reliability can be improved.

  Further, the standard wafer is not limited to the one obtained by depositing Al on a glass plate, and any wafer having a known reflectance may be used. This is because if the reflectance is known, the reflection intensity at the time of total reflection can be calculated from the reflectance and the reflection intensity.

  Further, the absorption ratio measuring device 30 is not limited to being installed in the positioning unit 130, and may be installed at any position on the path for transporting the semiconductor wafer W from the substrate housing unit 110 to the processing unit 160. .

  Moreover, in the said 2nd Embodiment, although the light of the appropriate energy value about a plain wafer was irradiated to the actual semiconductor wafer W to be processed, it is not limited to this, and the energy value is known. If the actual semiconductor wafer W is irradiated with light, the expected temperature reached by the semiconductor wafer W during the heat treatment is calculated from the energy value and the optical energy absorption ratio r of the semiconductor wafer W to be processed relative to the plain wafer. Can be calculated.

  In the above embodiment, the semiconductor wafer is irradiated with light to perform the ion activation process. However, the substrate to be processed by the heat treatment apparatus according to the present invention is not limited to the semiconductor wafer. . For example, the glass substrate on which various silicon films such as a silicon nitride film and a polycrystalline silicon film are formed may be processed by the heat treatment apparatus according to the present invention. As an example, an amorphous silicon film made amorphous by ion implantation of silicon into a polycrystalline silicon film formed on a glass substrate by a CVD method is formed, and a silicon oxide film serving as an antireflection film is further formed thereon. Form. In this state, the entire surface of the amorphous silicon film is irradiated with light by the heat treatment apparatus according to the present invention, so that a polycrystalline silicon film obtained by polycrystallizing the amorphous silicon film can be formed.

  Further, a heat treatment according to the present invention is applied to a TFT substrate having a structure in which a base silicon oxide film and a polysilicon film obtained by crystallizing amorphous silicon are formed on a glass substrate, and the polysilicon film is doped with impurities such as phosphorus and boron. It is also possible to activate the impurities implanted in the doping process by irradiating light with an apparatus.

5 Light source 10 Controller 11 CPU
DESCRIPTION OF SYMBOLS 21 Display part 30 Absorption-ratio measuring apparatus 31 Measurement optical system 33 Projector 35 Spectrometer 65 Chamber 69 Flash lamp 73 Susceptor 74 Heating plate 82 Light guide 83 Power monitor 99 Lamp power supply 100 Heat processing apparatus 130 Positioning part 160 Processing part W Semiconductor wafer

Claims (3)

A heat treatment apparatus for heating a substrate by irradiating a flash on the substrate to be processed,
The appropriate energy value of the flash to irradiate a plain substrate that is not patterned is known,
Holding means for holding the substrate to be processed;
An irradiation unit having a flash lamp and irradiating the processing target substrate held by the holding unit with flash light;
Light for adjusting the energy of the flash light applied to the substrate to be processed from the irradiation unit to an appropriate value based on the light energy absorption ratio of the substrate to be processed with respect to the plain substrate and the appropriate energy value of the flash light applied to the plain substrate. Energy control means;
A heat treatment apparatus comprising: A heat treatment apparatus for heating a substrate by irradiating a flash on the substrate to be processed,
The correlation between the energy value of the flash light applied to the plain substrate on which the pattern is not formed and the temperature of the plain substrate is known,
Holding means for holding the substrate to be processed;
An irradiation unit that has a flash lamp and irradiates the processing target substrate held by the holding unit with a flash of predetermined energy;
Temperature calculating means for calculating the temperature of the substrate to be processed when flash light is irradiated from the irradiation means to the substrate to be processed, based on the light energy absorption ratio of the substrate to be processed with respect to the plain substrate and the correlation; ,
A heat treatment apparatus comprising: The heat treatment apparatus according to claim 2,
A heat treatment apparatus, further comprising a warning generation unit that issues a warning when the temperature calculated by the temperature calculation unit exceeds a predetermined threshold.

Images