JP2010040574A - Production process of epitaxial wafer, and epitaxial wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a production process of an epitaxial wafer which prevents the uniformity of thickness of a wafer from decreasing when an epitaxial layer is formed. <P>SOLUTION: The production process of the epitaxial wafer includes a susceptor coat process where the coat time A which represents the time required for making a susceptor coat gas flow into an epitaxial growth furnace 1 is 15-0 seconds and an epitaxial growth process where the lower lamp power B which represents the ratio% of the quantity of heat supplied from a lower lamp 10 to the quantity of heat supplied from the lamps 10 and 15 is 50-40, and the processes are carried out so that the sum of the coat time A and the lower lamp power B becomes 50-55. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an epitaxial wafer manufacturing method for forming an epitaxial layer on a wafer by epitaxial growth and an epitaxial wafer, and in particular, manufacturing of an epitaxial wafer capable of preventing a reduction in wafer thickness uniformity when forming an epitaxial layer. The present invention relates to a method and an epitaxial wafer excellent in thickness uniformity.

  Conventionally, an epitaxial wafer in which an epitaxial layer is grown on a silicon wafer substrate is known. Epitaxial wafers can solve the grow-in defect problem that becomes an obstacle in semiconductor device fabrication, and thus have been used in recent years.

  A single wafer type apparatus is known as a kind of epitaxial growth apparatus for growing an epitaxial layer on a silicon wafer substrate. This apparatus forms an epitaxial layer on the upper surface of a wafer substrate by circulating a silicon source gas in the horizontal direction in the epi growth furnace while placing and rotating the wafer substrate on a susceptor in the epi growth furnace. .

In general, a silane-based gas (SiH ₄ , SiHCl ₃ , SiH ₂ Cl ₂ , SiCl ₄ ) is used as a silicon source gas, H ₂ is used as a carrier gas, and a susceptor made of SiC is used. ing. Therefore, if contaminants such as heavy metals are attached to the surface of the susceptor, the contaminants attached to the surface of the susceptor react with the silicon source gas or carrier gas when growing the epitaxial layer on the substrate. The susceptor is etched to form holes, and the epitaxial wafer is contaminated. In order to solve this inconvenience, conventionally, before placing a wafer substrate on the susceptor, a polysilicon gas is introduced into the epi growth furnace to form a polysilicon coat layer on the surface of the susceptor, and on the surface of the susceptor. This prevents contamination of the epitaxial wafer due to the attached contaminants.

In addition, the demand for miniaturization of semiconductor devices is increasing year by year, and accordingly, the quality of epitaxial wafers used in semiconductor devices must be improved, such as uniformity of thickness and contamination. It has been. In particular, the uniformity of the thickness of the epitaxial wafer is important because it has a great influence on the photolithography process and the like.
As a technique for improving the uniformity of the thickness of the epitaxial wafer, for example, the flatness of the surface of the silicon substrate is measured, and a silicon epitaxial layer having a different thickness depending on the location is grown on the substrate surface according to the unevenness of the substrate surface. A method for manufacturing a semiconductor wafer is known (see Patent Document 1).
Japanese Patent Laid-Open No. 6-232060

  However, in the conventional method for manufacturing an epitaxial wafer, the thickness uniformity of the epitaxial wafer cannot be sufficiently ensured, and it is required to further improve the thickness uniformity.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method for manufacturing an epitaxial wafer that prevents the uniformity of the thickness of the wafer from being lowered when an epitaxial layer is formed.
Moreover, it aims at providing the epitaxial wafer excellent in the uniformity of thickness manufactured by the manufacturing method of this invention.

An epitaxial wafer manufacturing method according to the present invention includes an epitaxial growth furnace for epitaxially growing an epitaxial layer on a wafer substrate, a susceptor disposed in the epitaxial growth furnace, on which the wafer substrate is placed, and heating at least the wafer substrate. A method of manufacturing an epitaxial wafer using an epitaxial apparatus comprising an upper lamp disposed above the susceptor as a lamp and a lower lamp disposed below the susceptor,
A susceptor coat step of forming a susceptor coat layer on the surface of the susceptor by flowing a susceptor coat gas into the epi growth furnace;
Placing the wafer substrate on the susceptor on which the susceptor coat layer is formed, and forming an epitaxial layer on the surface of the wafer substrate while being heated by the lamp, and
In the susceptor coating step, the coating time A indicating the time for flowing the susceptor coating gas into the epi growth furnace in seconds is 15-0,
In the epi process, the lower lamp power B indicating the ratio of the amount of heat supplied from the lower lamp as a percentage of the amount of heat supplied from the upper lamp and the lower lamp is 50 to 40,
The above-mentioned problem has been solved by performing so that the sum of the coating time A and the lower lamp power B is in the range of 50 to 55.
In the present invention, it is preferable that the susceptor is made of SiC and the susceptor coat is polysilicon.
In the present invention, the flow rate of the susceptor coat gas may be in the range of 5 to 20 L / min.
Moreover, the epitaxial wafer of this invention can be manufactured by the manufacturing method of the epitaxial wafer in any one of said.

  An epitaxial wafer manufacturing method according to the present invention includes an epitaxial growth furnace for epitaxially growing an epitaxial layer on a wafer substrate, a susceptor disposed in the epitaxial growth furnace, on which the wafer substrate is placed, and heating at least the wafer substrate. A method of manufacturing an epitaxial wafer using an epitaxial apparatus comprising: an upper lamp disposed above the susceptor as a lamp; and a lower lamp disposed below the susceptor, wherein the susceptor is provided in the epitaxial growth furnace. A susceptor coating step of forming a susceptor coating layer on the surface of the susceptor by flowing a coating gas; placing the wafer substrate on the susceptor on which the susceptor coating layer is formed; Epitaxially on the surface of the wafer substrate In the susceptor coating step, a coating time A indicating a time for flowing a susceptor coating gas into the epi growth furnace in seconds is 15 to 0, and in the epi step, Of the amount of heat supplied from the lamp and the lower lamp, the lower lamp power B indicating the ratio of the amount of heat supplied from the lower lamp in% is 50 to 40, and the coating time A and the lower lamp power B are Is performed so that the difference in film thickness change distribution of the epitaxial layer falls within a range of about 0.04 μm or less, and an epitaxial wafer with high film thickness change uniformity is manufactured. It becomes possible.

Here, the film thickness change uniformity is a difference in film thickness variation before and after the epi growth. For example, when an epitaxial layer having a predetermined film thickness of about 5 to 10 μm is formed, the film thickness after the epi is formed. The distribution is represented by the difference between the maximum value and the minimum value.
Note that a coating time A of 15 corresponds to a susceptor coat layer film thickness of 0.75 μm.
T = 0.005A
It becomes.

In the present invention, the coating time A of 0 second means that the susceptor coating process is not performed.
Further, when the sum of the coating time A and the lower lamp power B is in the range of 50 to 55, when the susceptor coating is extremely thin (coating time A = 15 seconds or less), the upper and lower lamp power ratios are somewhat higher. The lower lamp output needs to be in a range smaller than 40, and when the susceptor coating is not performed (coating time A = 0 second), the upper and lower lamp power ratios are slightly lower. is required.

  Further, according to the present invention, the susceptor is made of SiC, and the susceptor coat is made of polysilicon, so that the susceptor and the wafer adhere to each other after epi growth, or the wafer is caused by susceptor surface roughness. The adverse effect of can be reduced.

  Further, in the present invention, when the flow rate of the susceptor coat gas is in the range of 5 to 20, the coat film thickness on the susceptor surface can be set by setting the coat time A for the susceptor. . Here, the coating gas for susceptor coating is

  In the method for producing an epitaxial wafer according to the present invention, in the susceptor coating step, the coating time A indicating the time for flowing the susceptor coating gas into the epi growth furnace in seconds is 20 to 0, preferably 10 to 0, In the epi process, the lower lamp power B, expressed as a percentage of the amount of heat supplied from the lower lamp, is 75 to 35, preferably 55 to 35, and the coating time A and the lower lamp power B are The sum is 45 to 55.

  The epitaxial wafer manufacturing method of the present invention includes an epitaxial growth furnace for performing epitaxial growth, a susceptor disposed in the epitaxial growth furnace, on which a wafer substrate is placed, and heat in the epitaxial growth furnace. A method of manufacturing an epitaxial wafer using an epitaxial wafer manufacturing apparatus comprising an upper lamp disposed above the susceptor and a lower lamp disposed below the susceptor. A susceptor cleaning step for cleaning the surface of the susceptor; and a wafer substrate is placed on the cleaned susceptor and an epitaxial layer is formed on the surface of the wafer substrate while supplying heat from the lamp. An epi process, and in the epi process, supplied from the lower lamp That the lower lamp power C shown proportion in% of the amount of heat can be carried out such that 50-55.

  The epitaxial wafer of the present invention is manufactured by any one of the above-described epitaxial wafer manufacturing methods.

  In order to solve the above-mentioned problems, the present inventor has conducted extensive research, and in the step of forming the susceptor coat layer on the surface of the susceptor, the shorter the time for flowing the susceptor coat gas, the shorter the time before and after the step of forming the epitaxial layer It was found that there was little change in the thickness of the wafer substrate. In addition, the inventor of the process of forming the epitaxial layer as the proportion of the amount of heat supplied from the lower lamp arranged on the lower side of the amount of heat supplied by the lamps arranged above and below the susceptor decreases. It has been found that there is little change in the thickness of the wafer substrate before and after.

Therefore, the change in the thickness of the wafer substrate before and after the process of forming the epitaxial layer is caused by the film forming gas that circulates on the back side of the wafer substrate in the process of forming the epitaxial layer. It is estimated that the thickness of the epitaxial layer formed in the vicinity and the susceptor coat layer formed on the surface of the susceptor largely depend on the transfer amount transferred to the wafer substrate.
Therefore, the amount of heat supplied from the lamp disposed at the lower side of the amount of heat supplied by the lamp is shortened by shortening the inflow time of the susceptor coat gas supplied to the surface of the susceptor as long as the susceptor coat layer can be formed. If the ratio of the susceptor coat layer is lowered within a range that does not hinder the formation of the epitaxial layer, the susceptor coat layer that becomes the transferred base becomes thin and the wafer substrate is heated by the heat supplied from the lamp disposed below. The transfer of the susceptor coat layer is less likely to occur, and the transfer of the susceptor coat layer to the wafer substrate is reduced. In addition, if the ratio of the amount of heat supplied from the lamp arranged on the lower side of the amount of heat supplied by the lamp is lowered, the temperature near the back surface of the wafer is somewhat lower than the temperature of the wafer surface, Since the amount of gas that has entered the back side of the wafer substrate in the process of forming the epitaxial layer reacts with the back side of the wafer or the susceptor surface can be reduced, an epitaxial layer is formed near the edge on the back side of the wafer substrate. It becomes difficult.

  Furthermore, the present inventor has conducted extensive research, and the effect of suppressing the transfer of the susceptor coat layer to the wafer substrate is that if the inflow time of the susceptor coat gas is made sufficiently short, the lamp disposed on the lower side of the lamp can be used. It can be obtained even if the rate of heat is increased to some extent, and when the rate of heat of the lamps arranged below the lamp is sufficiently low, the inflow time of the susceptor coat gas is increased to about 15 seconds as described above. It was found that even if it is obtained.

  In the method for producing an epitaxial wafer of the present invention, in the susceptor coating step, a time A indicating a time for flowing a susceptor coating gas into the epi growth furnace in seconds is 15 to 0. In the epi step, Of the amount of heat supplied from the upper lamp and the lower lamp, the lower lamp power B indicating the ratio of the amount of heat supplied from the lower lamp in% is 50-40, and the coating time A and the lower lamp power Since the sum with B is in the range of 50 to 55, formation of the epitaxial layer in the vicinity of the edge on the back surface side of the wafer substrate is suppressed, and transfer of the susceptor coat layer to the wafer substrate is suppressed. The Therefore, the change in the thickness of the wafer substrate before and after the epi process can be reduced, and the uniformity of the wafer thickness can be prevented from being lowered when the epitaxial layer is formed. In addition, since this manufacturing method includes a susceptor coating step, the susceptor coating layer can prevent contaminants attached to the surface of the susceptor from interfering with the susceptor and the wafer substrate.

  If the sum (A + B) of the coating time A and the lower lamp power B is less than 50, the lower lamp power B is insufficient and the wafer is not heated to a predetermined temperature, so that the formation of the epitaxial layer is extremely slow. It is not preferable because the film thickness uniformity of the epi layer cannot be maintained, and the susceptor coat layer may be transferred to the back surface of the wafer. In addition, when the sum of the coating time A and the lower lamp power B exceeds 55, the film thickness uniformity of the epi layer cannot be maintained, and the transfer of the susceptor coat layer to the wafer substrate can be sufficiently suppressed. There is a fear of disappearing.

Further, in the above-described epitaxial wafer manufacturing method, by setting the coating time A to 15 to 0, the transfer of the susceptor coat layer to the wafer substrate can be more effectively suppressed, and it adheres to the surface of the susceptor. The susceptor coat layer can effectively prevent the contaminated material from interfering with the susceptor and the wafer substrate.
When the coating time A exceeds the above range, the susceptor coat layer serving as a transfer base becomes thick, and there is a possibility that transfer of the susceptor coat layer to the wafer substrate cannot be sufficiently suppressed.

In the epitaxial wafer manufacturing method described above, by setting the lower lamp power B to 50 to 40, transfer of the susceptor coat layer to the wafer substrate is effectively suppressed without hindering the formation of the epitaxial layer. be able to.
If the lower lamp power B is less than the above range, the output of the upper lamp may be too large and the wafer substrate may be warped. This hinders the formation of the epitaxial layer, and the desired epitaxial layer cannot be formed. In some cases, it is not preferable. Further, when the lower lamp power B exceeds the above range, the wafer substrate may be warped and the transfer of the susceptor coat layer to the wafer substrate is promoted, and the transfer of the susceptor coat layer to the wafer substrate cannot be sufficiently suppressed. In some cases, it is not preferable.

In the epitaxial wafer manufacturing method described above, when the susceptor coat gas is a silane-based gas (SiH ₄ , SiHCl ₃ , SiH ₂ Cl ₂ , SiCl ₄ ) and a polysilicon susceptor coat layer, It is possible to effectively prevent contaminants adhering to the surface from interfering with the susceptor and the wafer substrate by performing the epi process. When the susceptor coat layer is polysilicon, the susceptor coat layer can be easily removed from the surface of the susceptor by, for example, an etching method after the epi process.

In the epitaxial wafer manufacturing method described above, when the flow rate of the susceptor coat gas is in the range of 5 to 20 L / min, a susceptor coat layer can be formed on the surface of the susceptor in the susceptor coat step.
If the flow rate of the susceptor coat gas is less than the above range, the susceptor coat layer may not be formed on the surface of the susceptor in the susceptor coat process. Moreover, it is meaningless to set the flow rate of the susceptor coat gas exceeding the above range, and it becomes difficult to obtain a uniform susceptor coat layer.

In the epitaxial wafer manufacturing method of the present invention, in the epi process, the lower lamp power C indicating the ratio of the amount of heat supplied from the lower lamp out of the amount of heat supplied from the lamp is 50-60. It is good also as a method of doing so. In this case, since there is no susceptor coating process, the transfer of the susceptor coating layer to the wafer substrate is eliminated, the change in the thickness distribution of the wafer substrate before and after the epi process can be reduced, and the thickness of the wafer can be reduced when forming the epitaxial layer. It is possible to prevent the uniformity from decreasing. Further, since there is no susceptor coating step, the settable range of the lower lamp power C is widened.
In addition, since this manufacturing method includes a susceptor cleaning process, contaminants attached to the surface of the susceptor are removed by the susceptor cleaning process. Therefore, also in this manufacturing method, it is possible to effectively prevent contaminants attached to the surface of the susceptor from interfering with the susceptor and the wafer substrate by performing the epi process.

  In addition, since the epitaxial wafer of the present invention is manufactured by any of the above-described epitaxial wafer manufacturing methods, it becomes an epitaxial wafer with little contamination and little thickness uniformity.

  ADVANTAGE OF THE INVENTION According to this invention, when forming an epitaxial layer, it can prevent that the uniformity of the thickness of a wafer falls, and can implement | achieve the high quality epitaxial wafer excellent in the uniformity of thickness.

Hereinafter, the present invention will be described in detail with reference to the drawings.
“First Embodiment”
FIG. 1 is a view for explaining a single wafer epitaxial growth apparatus which is an example of an epitaxial wafer manufacturing apparatus used in the epitaxial wafer manufacturing method of the present invention. FIG. 1 is a side view of a single wafer epitaxial growth apparatus. It is. FIG. 2 is a plan view of the single-wafer epitaxial growth apparatus shown in FIG. FIGS. 1 and 2 show a state where a wafer substrate is placed on a susceptor on which a susceptor coat layer is formed.
In the epitaxial growth apparatus shown in FIG. 1 and FIG. 2, an epi growth furnace 1 is composed of an upper dome part 7, a lower dome part 9, and a middle ring part 8 provided therebetween. A susceptor 11 for holding the wafer 12 is provided in the epi growth furnace 1 so as to be positioned between the gas flow path 2 and the lower part 3 in the chamber.

  The susceptor 11 is rotatably supported by a susceptor support portion 16, and the susceptor support portion 16 can be rotated by a rotation drive mechanism (not shown) outside the chamber. As shown in FIG. 1, a plurality of lamps are provided for heating the wafer substrate 12 on the upper side of the upper dome portion 7 outside the chamber and below the lower dome portion 9. As shown in FIG. 1, the lamp includes an upper lamp 15 disposed on the susceptor 11 and a lower lamp 10 disposed on the lower portion of the susceptor 11. The lower lamp 10 and the upper lamp 15 are for heating the inside of the epi-growth furnace 1 and are constituted by infrared lamps (halogen lamps) suitable for heating the wafer 12 and the susceptor 11.

The upper lamp 15 includes an upper inner lamp 15a arranged on the inner side and an upper outer lamp 15b arranged on the outer side of the upper inner lamp 15a. The lower lamp 10 includes a lower inner lamp 10a disposed on the inner side and a lower outer lamp 10b disposed on the outer side of the lower inner lamp 10a.
The upper inner lamp 15a and the upper outer lamp 15b, the lower inner lamp 10a and the lower outer lamp 10b are infrared lamps (halogen lamps), respectively, and are annularly arranged concentrically with the center of the wafer 12 and the rotation center of the susceptor 11. In addition, ten upper inner lamps 15a, upper outer lamps 15b, lower inner lamps 10a, and lower outer lamps 10b are arranged, respectively.
In the epitaxial growth apparatus of this embodiment, the upper inner lamp 15a, the lower inner lamp 10a, the upper outer lamp 15b, and the lower outer lamp 10b can each arbitrarily set an output (amount of heat to be supplied). Therefore, the output ratio of the upper lamp 15 and the lower lamp 10 in the total output supplied from the lamps 10 and 15, the output ratio of the lower inner lamp 10a and the lower outer lamp 10b in the lower lamp 10 output, Of the output of the upper lamp 15, the output ratio of the upper inner lamp 15a and the upper outer lamp 15b can be arbitrarily set. Generally, lower lamp 10 output (%) / upper inner lamp 15a output (%) / lower inner lamp 10a output (%) = 50/50/50 represents the output balance of the lamp. .

  The middle ring portion 8 is a substantially cylindrical quartz member having a thickness, and its upper surface is flat. The middle ring portion 8 has cutouts 86 having bottom surfaces 82 and 83 that are substantially horizontal and concentric with the outer periphery at the upstream and downstream positions of the gas flow path 2. 87 is provided. The notches 86 and 87 have a uniform dimension in the radial direction of the middle ring portion 8, and the circumferential direction of the middle ring portion 8 is somewhat the same as the radial dimension of the wafer 12 in the width direction of the gas flow path 2. The gas is supplied to the entire surface of the wafer substrate 12 in the width direction of the gas flow path 2 of the gas flow supply port.

  The upper dome portion 7 is a cylindrical quartz member having the same diameter and the same width as that of the middle ring portion 8 closed by the lid portion integrated with the upper portion, and the lower end surface is a flat surface in close contact with the upper surface of the middle ring 8. It is said. At circumferential positions corresponding to the notches 86 and 87 of the middle ring portion 8 of the upper dome portion 7, there are ceiling surfaces 72 and 73 and vertical curved surfaces 74 and 75 that face the bottom surfaces 82 and 83 and the vertical curved surfaces 84 and 85, respectively. Notches 76 and 77 are provided on the inner circumference.

  By combining these notches 76 and 86, a gas supply port surrounded by the middle ring portion 8 and the upper dome portion 7 is formed as shown in FIG. This gas supply port has different height positions at which the gas flows in and out at the outer peripheral position and the inner peripheral position of the middle ring portion 8, and the gas flowing in from the lower side enters the gas collision wall surface (vertical curved surface) 84. It collides and diffuses, and the flow rate is adjusted by a flow velocity adjusting surface (ceiling surface) 72. Similarly, by combining the notches 77 and 87, a gas discharge port surrounded by the middle ring portion 8 and the upper dome portion 7 is formed as shown in FIG. 1, and the outer peripheral position and the inner peripheral position of the middle ring portion 8 are formed. The height positions at which the gas flows in and out are different.

As shown in FIG. 1, an introduction side rectification member 6 is connected to the gas supply port, and a gas supply means (not shown) is connected to the introduction side rectification member 6. The gas supply means is controlled by a control means (not shown) so as to supply a predetermined gas set in advance at a predetermined flow rate for a predetermined time.
Further, an exhaust side rectification member 13 is connected to the gas discharge port, and a gas exhaust means (not shown) is connected to the exhaust side rectification member 13.

Next, as an example of the epitaxial wafer manufacturing method of the present invention, a method for manufacturing an epitaxial wafer using the epitaxial growth apparatus shown in FIGS. 1 and 2 will be described.
First, a silane-based gas is allowed to flow as a susceptor coat gas into the epi growth furnace 1 to form a susceptor coat layer of about 0.75 μm on the surface of the susceptor 11 (susceptor coat process).
The flow rate of the susceptor coat gas is in the range of 5 to 20 L / min, and the time during which the susceptor coat gas is introduced is in the range of 15 seconds to 0 seconds.
As the susceptor coating gas used here, a silane-based gas (SiH ₄ , SiHCl ₃ , SiH ₂ Cl ₂ , SiCl ₄ ) or the like can be used.

Next, an epitaxial layer is formed on the surface of the wafer substrate 12 (epi process).
In the epi process, first, a wafer substrate 12 on which an epitaxial layer is grown is prepared. As the wafer 12, a silicon wafer, a gallium / arsenic wafer, or the like can be used. Further, a wafer for dielectric isolation wafers such as a bonded dielectric isolation wafer may be used.
Next, the wafer substrate 12 is placed on the susceptor 11 on which the susceptor coat layer is formed, heat is supplied from the lamps 10 and 15, and the temperature in the epitaxial growth furnace 1 is increased to an epitaxial growth temperature of 1000 to 1250 ° C. Together with the silicon source gas and the carrier gas, it flows into the epitaxial growth furnace 1 at a flow rate set to realize a desired resistivity and growth rate, and epitaxial growth is performed.

  In the present embodiment, in the epi process, the ratio of the amount of heat supplied from the lower lamp 10 to the amount of heat supplied from the lamps 10 and 15 is controlled to be 40% to 50%. Further, the ratio of the output ratio of the upper and lower lamps 10 and 15 and the ratio of the upper inner lamp power that is the output of the upper inner lamp 15a and the lower inner lamp power that is the output of the lower inner lamp 10a (upper inner lamp power: lower inner lamp power). For example, when upper lamp power: lower lamp power = 60: 40, upper inner lamp power: upper outer lamp power = 47: 53, lower inner lamp power: lower outer lamp power = 45: 55 Lower lamp 10 output (%) / upper inner lamp 15a output (%) / lower inner lamp 10a output (%) = 40/47/45, which is set to realize a desired epitaxial layer.

In this embodiment, the output ratio is set to (40-50) / 50/50, that is, upper inner lamp power: upper outer lamp power = 50: 50, lower inner lamp power: lower outer lamp. It is preferable to set power = 50: 50.
Further, as the epi layer deposition gas, a silicon source gas, for example, a silane-based gas such as SiH ₄ , SiHCl ₃ , SiH ₂ Cl ₂ , SiCl _4, or the like can be used, and as the carrier gas, H ₂ or the like can be used. Can be used.

  Here, in the present embodiment, in the susceptor coating process, the coating time A indicating the time for which the susceptor coating gas is allowed to flow into the epi growth furnace 1 in seconds, and the amount of heat supplied from the lamps 10 and 15 in the epi process. Of these, the sum of the amount of heat supplied from the lower lamp 10 and the lower lamp power B indicated in% is 50 to 55.

  Then, after epitaxial growth is performed until the film thickness reaches a predetermined thickness of about 1 to 15 μm, the supply of heat from the lamps 10 and 15 is stopped, the supply of silicon source gas and carrier gas is stopped, and the epitaxial growth is terminated. The temperature in the epi-growth furnace 1 is lowered until the temperature in the growth furnace 1 can be removed from the wafer.

“Second Embodiment”
In the second embodiment, only the parts different from the above-described first embodiment will be described, and redundant description will be omitted. In the first embodiment described above, the manufacturing method including the susceptor coating process has been described. In the second embodiment, a manufacturing method including the susceptor cleaning process instead of the susceptor coating process will be described.

  In the epitaxial wafer manufacturing method of the present embodiment, first, the surface of the susceptor 11 is cleaned by flowing a cleaning gas into the epi growth furnace 1 (susceptor cleaning step). As the cleaning gas used here, for example, HCl or the like can be used.

Next, an epitaxial layer is formed on the surface of the wafer substrate 12 (epi process).
In the epi-process of this embodiment, the wafer substrate 12 is placed on the cleaned susceptor 11 and the lower part is the ratio of the amount of heat supplied from the lower lamp 10 out of the amount of heat supplied from the lamps 10 and 15. Except that the lamp power C is controlled to be 50% to 60%, it can be performed in the same manner as in the first embodiment described above.
Furthermore, in this embodiment, after the epi process is completed, a process equivalent to the susceptor cleaning process described above may be performed. In this case, it is possible to remove the polysilicon or the like adhering to the inside of the epitaxial growth furnace 1 such as the susceptor 11 to reduce the influence on the next wafer processing.

The present invention is not limited to the above-described embodiment. For example, in the above-described first embodiment including the susceptor coating process, the first embodiment is performed before the susceptor coating process and / or after the epi process is completed. You may perform the susceptor cleaning process demonstrated in 2 embodiment.
In the above-described first embodiment, the susceptor cleaning process is performed before the susceptor coating process, so that contaminants attached to the surface of the susceptor may further interfere with the susceptor and the wafer substrate by performing the epi process. It can be surely prevented.

  In the present invention, when the difference in film thickness between the wafer central portion and the wafer peripheral portion becomes large, specifically, when the epi film thickness is insufficient in the wafer central portion, or the film thickness in the wafer peripheral portion. If this is insufficient, it is possible to compensate for the shortage by controlling the film forming gas supplied to the epi-growth furnace at the central portion and the peripheral portion of the wafer. Specifically, an epi-growth furnace configured as shown in FIG. 3 can be applied.

FIG. 3 shows another epi-growth reactor according to an embodiment of the present invention. As shown in FIG. 3, the gas supply port has an inlet side rectifying member divided into two in the width direction of the gas flow path 2. 6 is connected to the introduction side rectifying member 6 via the baffle 5 with a hole and the gas introduction member 4, and an in-side introduction pipe 19 provided with an in-side flow rate regulator 17 and an out-side flow rate regulator 18 are provided. The out-side introduction pipe 20 thus connected is connected. The in-side introduction pipe 19 and the out-side introduction pipe 20 are branched from a gas introduction pipe 21 connected to a gas supply means (not shown).
An exhaust side rectification member 13 is connected to the gas exhaust port, and a gas exhaust means (not shown) is connected to the exhaust side rectification member 13 via a gas exhaust member 14. In FIG. 2, the gas introduction member 4 and the gas exhaust member 14 are omitted.

Further, as shown in FIG. 3, gas supply port partition plates 8a and 8b extending in the vertical direction and the gas flow rate direction are provided on the bottom surface 82, which is the gas inflow position below the gas supply port.
The upper ends of the gas supply port partition plates 8a and 8b are provided so as to be flush with the upper surface 81 of the middle ring portion 8, and the shape of the portion of the gas discharge port opened to the chamber is divided into a plurality of portions. It becomes one without.
Further, the introduction-side rectifying member 6 is also provided with rectifying member partition plates 6 a and 6 b continuously from these gas supply port partition plates 8 a and 8 b, and the center side (in side) of the wafer 12 and the outer periphery of the wafer 12. It separates so that the gas supplied to the side (out side) may be sent separately.

  In the epi process, a silane-based gas and a carrier gas, which are raw material gases, are introduced from the gas introduction pipe 21 and branched into the in-side introduction pipe 19 and the out-side introduction pipe 20, and then the in-side flow regulator 17 and the out-side flow quantity adjustment. The vessel 18 adjusts the gas flow rate so that it can be controlled at the wafer central portion and peripheral portion. Thereafter, the supply gas passes through the gas introduction member 4, the baffle 5 with holes, and the introduction side rectification member 6, diffuses on the gas collision wall surface 84 of the middle ring portion 8, and further enters the gas flow path 2 on the chamber upper ceiling surface 72. The direction is changed to flow on the wafer 12.

  In this way, by adjusting the gas flow rate so that it can be controlled at the wafer central portion and the peripheral portion, it is possible to further reduce the variation in film thickness on the wafer.

“Experimental Example 1 to Experimental Example 4”
Using the epitaxial growth apparatus shown in FIGS. 1 and 2, an epitaxial wafer was manufactured by the following method.
First, a susceptor coat gas made of TCS was introduced into the epi growth furnace 1 equipped with a 6-inch diameter susceptor 11 at a coating time and a flow rate of 10 l / min shown in Table 1 to form a susceptor coat layer on the surface of the susceptor 11. (Susceptor coating process). Here, when the coating time is 15 seconds, a 0.75 μm coating layer is formed.
Next, a wafer substrate 12 that has been subjected to processes such as slicing, grinding, etching, and polishing from the pulled single crystal silicon is placed on the susceptor 11 on which the susceptor coat layer is formed, and the lamps 10 and 15 are shown in Table 1. Heating is performed with lamp power, the epitaxial growth conditions are set to an epitaxial growth temperature of 1125 ° C. and normal pressure, a silicon source gas made of TCS and a carrier gas made of H ₂ are supplied into the epitaxial growth furnace 1, and the surface of the wafer substrate 12 has a thickness of 10 μm. An epitaxial layer was formed (epi process).

With respect to the epitaxial wafers of Experimental Examples 1 to 4 thus obtained, the change in the thickness of the wafer substrate 12 before and after the epi process was measured.
In Table 1, Max. Is based on the sum of the wafer thickness average before epi and the epi film thickness (increased wafer thickness) of 10 μm as a standard. The thickness of the wafer is measured at 17 points within the wafer surface, and the measured value of the largest value is shown.
Min. Similarly, the thickness of the wafer before and after the epi is measured in the wafer plane as the wafer thickness variation, and the smallest measured value among them is shown.
Max. -Min. Is the difference between the maximum value and the minimum value, and indicates “variation in the amount of change in the thickness of the wafer substrate 12 before and after the epi process”.
Further, the lower lamp power is a value indicating the ratio of the amount of heat supplied from the lower lamp 10 in% of the amount of heat supplied from the lamps 10 and 15.

  The results are shown in Tables 1 to 3 and FIGS. 4 and 5, the x direction and the y direction mean that the measurement was performed with respect to two orthogonal axes within the wafer surface.

As shown in Table 1 and FIGS. 4 and 5, the coating time is within a preferable range of 15 to 0 seconds, the lower lamp power is within a preferable range of 40 to 60, and the coating time and the lower lamp power are In Experimental Example 1 in which the sum is within a preferable range of 50 to 55, the change in the thickness of the wafer substrate 12 before and after the epi process was a small value of 0.04 μm. If the change in the thickness of the wafer substrate 12 before and after the epi process is less than 0.1 μm, the value of the wafer thickness variation is good.
In Experimental Example 2 in which the sum of the coating time and the lower lamp power is 75, Experimental Example 3 in which the sum is 65, and Experimental Example 4 in which the sum is 110, the sum of the coating time and the lower lamp power is more preferable. Therefore, the change in the thickness of the wafer substrate 12 before and after the epi process was larger than that in Experimental Example 1.

“Experimental Example 5, Experimental Example 6”
Using the epitaxial growth apparatus shown in FIGS. 1 and 2, an epitaxial wafer was manufactured by the following method.
First, the surface of the susceptor 11 was cleaned by flowing a cleaning gas made of HCl into the epitaxial growth furnace 1 equipped with the susceptor 11 having a diameter of 6 inches (susceptor cleaning process). Next, a wafer substrate 12 made of single crystal silicon was placed on the cleaned susceptor 11, and an epitaxial layer was formed in the same manner as in Experimental Example 1 (epi process).

  With respect to the epitaxial wafers of Experimental Examples 5 and 6 obtained in this manner, the change in the thickness of the wafer substrate 12 before and after the epi process was examined in the same manner as in Experimental Example 1.

The results are shown in Table 1.
As shown in Table 1, in Example 5 and Example 6 in which the susceptor coating process is not performed and the coating time is 0 second, and the lower lamp power is within a preferable range of 50 to 60, before and after the epi process. The change in the thickness of the wafer substrate 12 was as small as 0.04 μm.

FIG. 1 is a view for explaining a single wafer epitaxial growth apparatus which is an example of an epitaxial wafer manufacturing apparatus used in the epitaxial wafer manufacturing method of the present invention. FIG. 1 is a side view of a single wafer epitaxial growth apparatus. It is. FIG. 2 is a plan view of the single-wafer epitaxial growth apparatus shown in FIG. FIG. 3 is a plan view of another epitaxial wafer manufacturing apparatus used in the epitaxial wafer manufacturing method of the present invention. FIG. 4 is a graph showing the results in the example of the present invention. FIG. 5 is a graph showing the results in the example of the present invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Epi growth furnace, 2 ... Gas flow path, 3 ... Lower part in chamber, 7 ... Upper dome part, 8 ... Middle ring part, 9 ... Lower dome part, 11 ... Susceptor, 12 ... Wafer, 10 ... Lower lamp, 15 ... upper lamp, 10a ... lower inner lamp, 10b ... lower outer lamp, 15a ... upper inner lamp, 15b ... upper outer lamp.

Claims (4)

An epitaxial growth furnace for epitaxially growing an epitaxial layer on a wafer substrate; a susceptor disposed in the epitaxial growth furnace on which the wafer substrate is placed; and a lamp for heating at least the wafer substrate, disposed above the susceptor. A method of manufacturing an epitaxial wafer using an epitaxial apparatus comprising an upper lamp and a lower lamp disposed below the susceptor,
A susceptor coat step of forming a susceptor coat layer on the surface of the susceptor by flowing a susceptor coat gas into the epi growth furnace;
Placing the wafer substrate on the susceptor on which the susceptor coat layer is formed, and forming an epitaxial layer on the surface of the wafer substrate while being heated by the lamp, and
In the susceptor coating step, the coating time A indicating the time for flowing the susceptor coating gas into the epi growth furnace in seconds is 15-0,
In the epi process, the lower lamp power B indicating the ratio of the amount of heat supplied from the lower lamp as a percentage of the amount of heat supplied from the upper lamp and the lower lamp is 50 to 40,
An epitaxial wafer manufacturing method, wherein the sum of the coating time A and the lower lamp power B is in a range of 50 to 55.   2. The method for manufacturing an epitaxial wafer according to claim 1, wherein the susceptor is made of SiC, and the susceptor coat is made of polysilicon.   The method for producing an epitaxial wafer according to claim 1 or 2, wherein a flow rate of the susceptor coat gas is in a range of 5 to 20 L / min.   An epitaxial wafer manufactured by the method for manufacturing an epitaxial wafer according to claim 1.

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