JP2009226030A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To facilitate the work of loading a game board on or unloading it from a game frame in a game machine which keeps the game board detachably mounted on the game frame. <P>SOLUTION: In outputting a control signal for controlling electric parts arrayed on the game board, a performance control means outputs the control signal to which address information is attached which enables the specification of a board-side serial-parallel conversion circuit by a serial signal system. In outputting a control signal for controlling electric parts arrayed on the game frame, the performance control means outputs the control signal to which address information is attached which enables the specification of a frame-side serial-parallel conversion circuit by the serial signal system. The ranges of guiding light to a luminous display part 1606 through a light guide member 457 from each of LEDS 283e and 283f are made different to vary the emission modes between the light-emitting display part 1606 corresponding to the LED 283e and that corresponding to the LED 283f. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention includes a game frame that is installed to be openable and closable with respect to an outer frame, and a game board that is attached to the game frame and includes a predetermined plate-like body and various parts that are attached to the plate-like body. It relates to exchangeable gaming machines.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, a variable display device capable of variably displaying the identification information (also referred to as “variation”) is provided on the game board, and the player when the display result of the variable display of the identification information in the variable display device becomes the specific display result. Some are configured to be controllable to a specific gaming state advantageous to the user.

  The specific game state means a state advantageous for a player who is given a predetermined game value. Specifically, the specific game state is, for example, a state in which a special variable winning device is advantageous for a player who is likely to win a ball (a big hit game state), or a state in which a right to be advantageous for a player has occurred. In this state, a predetermined game value such as a state where conditions for paying out premium game media are easily established is given.

  In such a gaming machine, the fact that the display result of the variable display device that displays the symbol as the identification information becomes a combination of specific display modes (specific display result) determined in advance is generally referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. And the number of times of opening the special winning opening is fixed to a predetermined number (for example, 15 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Further, when a predetermined condition (for example, winning in the V zone provided in the big prize opening) is not established at the time when the big prize opening is closed, the big hit gaming state is ended. Some are also available.

  In addition, in such a gaming machine, a game frame including a game frame installed to be openable and closable with respect to an outer frame of the gaming machine, a predetermined plate-like body, and various parts attached to the plate-like body. There is a board that is detachable. In such a gaming machine, when changing the model of the gaming machine (for example, changing to a new model), the entire gaming machine is not replaced, but the gaming frame is left as it is, and only the gaming board is replaced. That is, by changing only the game board, the model of the gaming machine is changed, and the content of the effect in the game effect is changed.

  Further, Patent Document 1 describes a gaming machine configured to connect a CPU and a multi-color LED used for gaming effects via an IC circuit that converts serial data into parallel data. Further, Patent Document 1 is configured to adjust the brightness of a multi-color LED by changing the number of pulses output within a predetermined control unit time when controlling the light emission state of the multi-color LED. It is described.

  In Patent Document 2, individual addresses are set for the CPUs of the control boards for controlling various displays, speakers, etc., and the CPUs of the sub-control board and the CPUs of the control boards are bidirectional serially connected. It is described that it is configured to reduce the number of wires between a housing of a gaming machine and a door by connecting via bus wires.

Japanese Patent Laying-Open No. 2003-190416 (paragraphs 0043-0046, FIGS. 13-15) JP 2003-164560 A (paragraphs 0029-0030, FIG. 1)

  In a gaming machine in which the game frame and the game board are detachable, when the game board is exchanged for changing the model of the game machine, there are many wirings connecting the game board and the game frame. The wiring work between the game board and the game frame is troublesome and cumbersome. In the gaming machines described in Patent Document 1 and Patent Document 2, the number of wirings between the CPU and the display is reduced by using an IC circuit for serial-parallel conversion, or bidirectional serial bus wiring is used. The number of wirings between the control boards can be reduced. However, in a gaming machine in which a game frame and a game board are detachable, the number of wires between the game board and the game frame cannot be reduced, and the game frame and the game board can be easily attached and detached. I can't do it.

  Therefore, an object of the present invention is to make it possible to easily attach and detach a game frame and a game board in a game machine in which a game frame and a game board are detachable.

In order to solve the above-described problem, a gaming machine according to claim 1 of the present invention provides:
A game frame (11) installed to be openable and closable with respect to the outer frame, and a game board (6) attached to the game frame and including a predetermined plate-like body and various parts attached to the plate-like body; A gaming machine (pachinko gaming machine 1) capable of exchanging the gaming board,
A plurality of light emitting display means (side inner lens 457, right frame lamp LEDs 283a to 283f, left frame lamp LEDs 282a to 282f, second convex portion 1606 / lamp cover 900, and top frame lamp LED 281c provided in the game frame. -281j, front wall 901c-901j / top pan left clear base 313L and top pan right clear base 313R, pan left side lamp LEDs 82a, 82b, pan right side lamp LEDs 82c, 82d and light emitting plates 810a, 810b),
Game control means (for example, a game control microcomputer 560) for controlling the progress of the game and transmitting an effect control command for controlling the electric parts for the effect;
In response to the effect control command transmitted by the game control means, the electric parts for the effect (for example, LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f of each lamp, motors 151a, 152a, 153a) effect control means (for example, effect control microcomputer 100);
With
The light-emitting display means is disposed behind the light guide member having translucency (side inner lens 457, lamp cover 900, upper plate left clear base 313L and upper plate right clear base 313R). Light emitters (right frame lamp LEDs 283a to 283f and left frame lamp LEDs 282a to 282f, top frame lamp LEDs 281c to 281j, dish left side lamp LEDs 82a and 82b, dish right side lamp LEDs 82c and 82d) and the light guide A light emitting display portion (second convex portion 1606, front walls 901c to 901j, light emitting plates 810a and 810b) that emits light by the light of the light emitter introduced into the member, from the light emitter to the light guide member The distance is different between the plurality of light emitting display means (for example, FIG. 24, FIG. 25, FIG. 30),
The game control means includes command transmission means for transmitting an effect control command to the effect control means (for example, a part for executing step S29 in the game control microcomputer 560),
The effect control means outputs an output means (for example, a serial signal system) for controlling a control electrical component including the light emitter based on the effect control command transmitted from the game control means. , A portion for executing step S708 in the production control microcomputer 100),
A board-side serial-parallel conversion circuit (e.g., a serial-side conversion circuit) provided in the game board, which converts the control signal input from the output means from a serial signal system to a parallel signal system and outputs the converted signal to the effect electrical component. Parallel conversion ICs 616 to 619) and a frame side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 611 to 615) provided in the game frame,
The board side serial-parallel conversion circuit converts a control signal converted into a parallel signal system into electric parts (for example, lamp LEDs 125a to 125f, 126a to 126f, Motors 151a to 151c),
The frame-side serial-parallel conversion circuit converts the control signal converted into a parallel signal system into electrical components (for example, lamp LEDs 281a-281l, 282a-282f, 283a to 283f, 82a to 82d, 83),
The panel-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit are connected via one system wiring (for example, one system is connected by connecting the relay boards 606 and 607 to a bus type). The serial-parallel conversion ICs 611 to 619 are connected in one system by being connected in a bus format or a daisy chain type, and different address information is assigned in advance (for example, 12 and FIG. 13 are assigned addresses “01” to “09”), and only the control signal with its own address information added is converted into a parallel signal system and output (for example, header / address detector 653). Is matched with the address stored in the address storage unit 654, it is input to the data buffer 655. And outputs the write signal to the latch) are those,
When the output means outputs a control signal for controlling an electrical component provided on the game board, a control signal to which address information that can identify the board-side serial-parallel conversion circuit is added in a serial signal system. (For example, the production control microcomputer 100 transmits serial data to which any of the addresses “06” to “09” shown in FIG. 13 is added using the serial output circuit 353 in steps S953 and S958. ) When outputting a control signal for controlling an electrical component provided in the game frame, a control signal to which address information capable of specifying the frame side serial-parallel conversion circuit is added is output in a serial signal system ( For example, the production control microcomputer 100 receives the address shown in FIG. 12 in steps S953 and S958. Transmitted using the serial output circuit 353 with serial data either is added "01" - "05"),
A gaming machine characterized by that.
It is characterized by that.
According to this feature, the effect control means includes an output means for outputting a control signal for controlling the electric parts for effect in a serial signal system based on the effect control command received from the game control means, The serial-parallel conversion circuit and the frame side serial-parallel conversion circuit are connected through one system wiring, and different address information is assigned in advance, and only the control signal with its own address information added is used. Address information that can identify the board-side serial-parallel conversion circuit when the output means outputs a control signal for controlling an electrical component provided on the game board. When a control signal added with a serial signal method is output and a control signal for controlling an electrical component provided in the game frame is output Since the frame side serial-parallel conversion circuit is configured to output a control signal added with address information that can identify the serial signal system, the number of wires between the game board and the game frame can be reduced. Can do. Therefore, in the gaming machine in which the game frame and the game board are detachable, it is possible to easily attach and detach the game frame and the game board.
Further, in the case of the serial signal method, changing the light emission control of each of the plurality of light emitters requires gradation control of each light emitter and the amount of data increases, but the light emitter corresponds to the light emitter. By changing the light guide distance to the light emitting display portion among the plurality of light emitting bodies, it is possible to easily change the light emitting mode of the light emitting display portion without performing the gradation control or the like.

A gaming machine according to claim 2 of the present invention,
A game frame (11) installed to be openable and closable with respect to the outer frame, and a game board (6) attached to the game frame and including a predetermined plate-like body and various parts attached to the plate-like body; A gaming machine (pachinko gaming machine 1) capable of exchanging the gaming board,
A plurality of light emitting display means (side inner lens 457, right frame lamp LEDs 283a to 283f, left frame lamp LEDs 282a to 282f, second convex portion 1606 / lamp cover 900, and top frame lamp LED 281c provided in the game frame. -281j, front wall 901c-901j / top pan left clear base 313L and top pan right clear base 313R, pan left side lamp LEDs 82a, 82b, pan right side lamp LEDs 82c, 82d and light emitting plates 810a, 810b),
Game control means (for example, a game control microcomputer 560) for controlling the progress of the game and transmitting an effect control command for controlling the electric parts for the effect;
In response to the effect control command transmitted by the game control means, the electric parts for the effect (for example, LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f of each lamp, motors 151a, 152a, 153a) effect control means (for example, effect control microcomputer 100);
With
The light-emitting display means is disposed behind the light guide member having translucency (side inner lens 457, lamp cover 900, upper plate left clear base 313L and upper plate right clear base 313R). Light emitters (right frame lamp LEDs 283a to 283f and left frame lamp LEDs 282a to 282f, top frame lamp LEDs 281c to 281j, dish left side lamp LEDs 82a and 82b, dish right side lamp LEDs 82c and 82d) and the light guide A light emitting display portion (second convex portion 1606, front walls 901c to 901j, light emitting plates 810a and 810b) that emits light by the light of the light emitter introduced into the member, from the light emitter to the light guide member The distance is different between the plurality of light emitting display means (for example, FIG. 24, FIG. 25, FIG. 30),
The effect control means includes first effect control means (for example, the symbol control microcomputer 100a) for controlling at least one electric component (for example, the variable display device 9) of the effect electric parts, Of the electrical components for performance, electrical components including the light emitter other than the electrical components controlled by the first performance control means (for example, LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f of each lamp, 283a to 283f, motors 151a, 152a, 153a) for controlling the second effect control means (for example, the sound / lamp control microcomputer 100b),
The game control means includes first command transmission means for transmitting the first effect control command to the first effect control means (for example, a part for executing step S29 in the game control microcomputer 560),
The first effect control means outputs a second effect control command that can specify the content of the first effect control command based on the fact that the first effect control command is transmitted. Second command transmission means for transmitting to the means (for example, a part for executing step S788 in the design control microcomputer 100a),
The second effect control means outputs a control signal for controlling the electric parts for the effect in a serial signal system based on the second effect control command received from the first effect control means. Including output means (for example, a part of step S888 in the sound / lamp control microcomputer 100b),
The board side serial-parallel provided in the game board, which converts the control signal input from the output means of the second effect control means from a serial signal system to a parallel signal system and outputs it to the effect electrical parts. A conversion circuit (for example, serial-parallel conversion ICs 616 to 619) and a frame side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 611 to 615) provided in the game frame;
The board side serial-parallel conversion circuit converts a control signal converted into a parallel signal system into electric parts (for example, lamp LEDs 125a to 125f, 126a to 126f, Motors 151a to 151c),
The frame-side serial-larel conversion circuit converts the control signal converted into a parallel signal system into electrical components (for example, lamp LEDs 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82d, 83),
The panel-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit are connected via one system wiring (for example, one system is connected by connecting the relay boards 606 and 607 to a bus type). The serial-parallel conversion ICs 611 to 619 are connected in one system by being connected in a bus format or a daisy chain type, and different address information is assigned in advance (for example, 12 and FIG. 13 are assigned addresses “01” to “09”), and only the control signal with its own address information added is converted into a parallel signal system and output (for example, header / address detector 653). Is matched with the address stored in the address storage unit 654, it is input to the data buffer 655. And outputs the write signal to the latch) are those,
When the output means outputs a control signal for controlling an electrical component provided on the game board, a control signal to which address information that can identify the board-side serial-parallel conversion circuit is added in a serial signal system. (For example, the sound / lamp control microcomputer 100b performs the same processing as steps S953 and S958, and outputs serial data to which any of the addresses “06” to “09” shown in FIG. 353), when outputting a control signal for controlling the electrical components provided in the game frame, the control signal added with address information that can identify the frame side serial-parallel conversion circuit is serialized. For example, the sound / lamp control microcomputer 100b outputs the signal in steps S953 and S95. In the same process as 58, is transmitted using the serial output circuit 353 address "01" - the serial data either is added to "05" shown in FIG. 12),
It is characterized by that.
According to this feature, the second effect control means uses the serial signal method to control the control signal for controlling the electric parts for the effect based on the second effect control command received from the first effect control means. In addition to the output means for outputting, the panel side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit are connected through one system of wiring, and different address information is assigned in advance to each other, and its own address Only the control signal to which information is added is converted into a parallel signal system and output. When the output means outputs a control signal for controlling the electrical components provided in the game board, the board side serial- A control signal with address information that can identify the parallel conversion circuit is output in the serial signal system, and control for controlling the electrical components provided in the game frame The number of wires between the game board and the game frame is configured so that a control signal to which address information that can identify the frame side serial-parallel conversion circuit is added is output in a serial signal system. Can be reduced. Therefore, in the gaming machine in which the game frame and the game board are detachable, it is possible to easily attach and detach the game frame and the game board.
Further, in the case of the serial signal method, changing the light emission control of each of the plurality of light emitters requires gradation control of each light emitter and the amount of data increases, but the light emitter corresponds to the light emitter. By changing the light guide distance to the light emitting display portion among the plurality of light emitting bodies, it is possible to easily change the light emitting mode of the light emitting display portion without performing the gradation control or the like.

A gaming machine according to claim 3 of the present invention is the gaming machine according to claim 1 or 2,
The board-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit are connected through a single line of wiring using a connector (for example, wiring from each of the serial-parallel conversion ICs 611 to 619 is connected to each other). Are connected to the relay boards 606 and 607 using connectors 156a to 156h and 157a to 157e),
It is characterized by that.
According to this feature, since the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit are configured to be connected via a single line of wiring using a connector, the connector can be attached and detached. It is possible to perform the wiring work between the game frame and the game board simply by performing the above, and the work of attaching and detaching the game frame and the game board can be performed more easily.

A gaming machine according to claim 4 of the present invention is the gaming machine according to any one of claims 1 to 3,
The game control means transmits serial data using the serial output circuit 78 in step S29 in the game control microcomputer 560 for transmitting the effect control command to the effect control means in a serial signal system. Part), including
It is characterized by that.
According to this feature, the game control means is configured to include serial transmission means for transmitting the effect control command to the effect control means in a serial signal system, so that the wiring between the game control means and the effect control means The number can also be reduced.

A gaming machine according to claim 5 of the present invention is the gaming machine according to any one of claims 1 to 4,
The game control means includes input electrical components (for example, operation buttons 81a to 81e, position sensors 151b, 152b, and 153b),
Latch means (for example, each of the D flip-flops 661 to 668 constituting the input ICs 620 and 621) that latches an input signal input from the electrical component and outputs the input signal in a parallel signal system;
A parallel-serial conversion circuit (for example, input ICs 620 and 621) that converts the input signal output from the latch means into a serial signal system and outputs the converted signal;
Clock signal output means for outputting a clock signal used in common for the board side serial-parallel conversion circuit, the frame side serial-parallel conversion circuit, and the parallel-serial conversion circuit (for example, the production control microcomputer 100 or sound / lamp control) Clock signal output unit 356) mounted on the microcomputer 100b for use,
Comprising
It is characterized by that.
According to this feature, it is configured to include a clock signal output means for outputting a clock signal used in common for the board side serial-parallel conversion circuit, the frame side serial-parallel conversion circuit, and the parallel-serial conversion circuit. The board-side serial-parallel conversion circuit, the frame-side serial-parallel conversion circuit, and the input parallel-serial conversion circuit can be easily synchronized, and the number of clock signal lines can be reduced.

A gaming machine according to claim 6 of the present invention is the gaming machine according to any one of claims 1 to 5,
The output means outputs, as a control signal for controlling the light emission state of the light emitter, a signal in which the pulse amount is changed according to the luminance when the light emitter emits light (for example, the effect control microcomputer 100). Outputs a signal in which the number of pulses is changed in accordance with the luminance shown in FIG. 78),
It is characterized by that.
According to this feature, the output means is configured to output a signal in which the pulse amount is changed according to the luminance when the light emitting component emits light as the control signal for controlling the light emitting state of the light emitting component. Therefore, gradation control for adjusting the luminance of the light emitting component can be performed.

A gaming machine according to claim 7 of the present invention is the gaming machine according to any one of claims 1 to 6,
At least one of the game board or the game frame is a light-emitting body that adjusts the brightness as an electrical component for production (for example, LEDs 281b, d, f, h, j, l, and 282b with brightness adjustment shown in FIG. 79). , D, f, 283b, d, f) and a light emitter that does not adjust the luminance (for example, LEDs 281a, c, e, g, i, k, 282a, c, e, 283a, c without luminance adjustment shown in FIG. 79). E)
A panel-side serial-parallel conversion circuit or a frame-side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 611b, 612b, 613b, 614b shown in FIG. 79) that outputs a control signal to the light-emitting body that adjusts the brightness; Different from a board side serial-parallel conversion circuit or a frame side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 611a, 612a, 613a, 614a shown in FIG. 79) that outputs a control signal to a light-emitting body whose luminance is not adjusted. The
It is characterized by that.
According to this feature, a panel-side serial-parallel conversion circuit or a frame-side serial-parallel conversion circuit that outputs a control signal to a light-emitting component that adjusts brightness, and a panel-side serial that outputs a control signal to a light-emitting component that does not adjust brightness Since the parallel conversion circuit or the frame side serial-parallel conversion circuit is configured to be different, the number of times of data transfer with respect to the light-emitting component whose luminance is not adjusted can be reduced.

A gaming machine according to claim 8 of the present invention is the gaming machine according to any one of claims 1 to 7,
A variable display device (for example, the special symbol display device 8 or the variable display device 9) that variably displays a plurality of types of identification information (for example, a special symbol or a decorative symbol) that can identify each of them and displays and displays a display result;
A game state transition means for transitioning to a specific gaming state (for example, a jackpot gaming state) advantageous to the player when a specific display result (for example, a jackpot symbol) is derived and displayed on the variable display device;
A variable winning ball apparatus (for example, a special variable winning ball apparatus 20) that can be changed to an open state in the specific gaming state;
Detection means (for example, a count switch 23) for detecting a game ball won in the variable winning ball apparatus and outputting a detection signal;
With
The game control means includes
Prior decision means for deciding whether or not to shift to the specific game state before derivation display of the display result (for example, a part for executing the processing of steps S62 and S63 in the game control microcomputer 560);
Variable display command transmission means for transmitting a variable display command (for example, a variation pattern command) that can specify the start of variable display of identification information and the variable display time in the variable display device based on the determination of the prior determination means. (For example, in the game control microcomputer 560, the part that executes the process of step S103);
Winning determination means for determining whether or not a detection signal from the detection means has been input (for example, a part for executing the processing of steps S341 to S348, S361 to S366, and S361 in the game control microcomputer 560. In particular, counting. A portion for executing the processing of steps S365 and S361 using the switch input bit determination value),
An abnormality notification command transmission means (for example, for game control) that transmits an abnormality notification command for instructing execution of abnormality notification based on the fact that the winning determination means inputs a detection signal in a gaming state other than the specific gaming state In the microcomputer 560, a part for executing the processing of steps S 585, S 587 to S 589),
The effect control means starts variable display of identification information in the variable display device based on the variable display command transmitted by the variable display command transmission means, and the display result on the variable display device when the variable display time has elapsed. Variable display control means for deriving and displaying (for example, the part for executing the processes of steps S800 to S803 in the production control microcomputer 100, and the part for executing the same processes as steps S800 to S803 in the symbol control microcomputer 100a) )When,
Based on the abnormality notification command transmitted by the abnormality notification command transmitting means, abnormality notification means for executing abnormality notification by the effect device (for example, the processing of steps S1924 to S1929, S1977 to S1983 in the effect control microcomputer 100 is executed. The sound / lamp control microcomputer 100b, a portion that executes the same processing as in steps S1924 to S1929, S1977 to S1983).
The abnormality notification means can execute abnormality notification even when the variable display control means is executing variable display of identification information in the variable display device (for example, the production control microcomputer 100 can perform step S835A). The sound / lamp control microcomputer 100b executes step S835D when Y is YES and executes step S845D when Y is YES in step S845A. The sound / lamp control microcomputer 100b executes the same processing as step S835D when Y. And when Y is the same process as in step S845A, the same process as in step S845D is executed).
The output means, when executing the abnormality notification by the abnormality notification means, based on the abnormality notification command transmitted by the abnormality notification command transmission means, a control signal for controlling the electrical parts for production in a serial signal system (For example, in the production control microcomputer 100, the part that executes step S708 based on the setting result of steps S1928 and S1983, and in the sound / lamp control microcomputer 100b, the same processing settings as in steps S1928 and S1983 are set. Step for executing step S888 based on the result)
It is characterized by that.
According to this feature, the abnormality notification in which the game control means transmits an abnormality notification command for instructing the execution of abnormality notification based on the fact that the winning determination means inputs the detection signal in a gaming state other than the specific gaming state. Including a command transmission means, and the effect control means includes abnormality notification means for performing abnormality notification by the effect device based on the abnormality notification command transmitted by the abnormality notification command transmission means, and the abnormality notification means is the variable display control means. Since abnormality notification can be executed even when variable display of identification information is being performed in the variable display device, it is possible to notify that an abnormal winning has occurred and to continue the game. The player can be prevented from suffering a disadvantage.

A gaming machine according to claim 9 of the present invention is the gaming machine according to any one of claims 1 to 8,
The game frame is provided with a collective board (frame side IC board 602) on which a plurality of the frame side serial-parallel conversion circuits (frame side IC boards 602 to 605) are mounted.
It is characterized by that.
According to this feature, the boards on which the serial-parallel conversion circuits are mounted can be integrated, and the number of parts in the gaming machine can be reduced.

A gaming machine according to claim 10 of the present invention is the gaming machine according to any one of claims 1 to 9,
The light guide member (light guide portion 902 of the lamp cover 900) has a light introduction surface (902a) through which light from the light emitter (LEDs 281c to 281j of the top frame lamp) can be introduced into the light guide member. And
A separation distance (P6) between the plurality of light emitting display means in a direction orthogonal to the light irradiation direction from the facing position (Y) facing the light introduction surface to the arrangement position (X) of the light emitter. P7) are different (for example, FIG. 24),
It is characterized by that.
According to this feature, in order to change the separation distance between the light emitter and the light introduction surface, without providing a spacer or the like between the substrate and the light emitter, or without changing the length of the light guide, The distance to the light introduction surface can be easily changed.

A gaming machine according to claim 11 of the present invention is the gaming machine according to any one of claims 1 to 10,
The light guide member (side inner lens 457) transmits light introduced from the light emitters (LEDs 283a to 283f of right frame lamps and LEDs 282a to 282f of left frame lamps) to the light emitting display unit (second display). The lengths of the light guide paths (light guide distances P2A to P2D) leading to the convex portions 1606) of the light emitting display units are different from each other (for example, FIG. 25).
It is characterized by that.
According to this feature, the light guide distance can be changed without changing the arrangement position of the light emitter with respect to the light guide member.

A gaming machine according to claim 12 of the present invention is the gaming machine according to any one of claims 1 to 11,
The light guide members (modified upper plate left clear base 313L and upper plate right clear base 313R) guide the light from the light emitters (LEDs 82a and 82b of the dish left side lamp and LEDs 82c and 82d of the dish right side lamp). A groove (light emitting groove 1810a, 1810b) formed in a light guide path that guides light introduced to the member to the light emitting display unit (light emitting plates 810a, 810b), and the width of the groove is the plurality of light emitting elements. Display means are different from each other (for example, FIG. 31),
It is characterized by that.
According to this feature, in order to change the separation distance between the light emitter and the light introduction surface, without providing a spacer or the like between the substrate and the light emitter, or without changing the length of the light guide, The light guide distance can be easily changed.

  Examples of the present invention will be described below.

  First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. FIG. 2 is a front view showing the front of the game frame 11. FIG. 3 is a front view showing the front of the game board. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine. FIG. 2 also shows an enlarged view of the hitting ball supply tray (upper plate) 3 portion of the front surface of the game frame 11.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame 11 attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided on the game frame 11 so as to be opened and closed. The game frame 11 is a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding game boards to be described later). ).

  As shown in FIGS. 1 to 3, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. On the back surface of the glass door frame 2, there is a plastic frame constituting a part of the game frame 11 as shown in FIG. 3. The plastic frame includes a mechanism plate, and components such as a power supply circuit (not shown) and a speaker 27 are attached to the mechanism plate. In addition, the plastic frame of the game frame 11 is provided with a relay board 607 that relays the wiring between the game frame 11 and the game board 6. Moreover, as shown in FIG. 3, the game board 6 is attached to the front frame of the game frame 11 so that attachment or detachment is possible. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, there is provided a variable display device (image display device) 9 including a plurality of variable display portions each variably displaying a decorative pattern for performance. The variable display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. The variable display device 9 performs variable display of a decorative symbol as a symbol for decoration (production) during the variable symbol display period of the special symbol by the special symbol indicator 8. The variable display device 9 that performs variable display of decorative symbols is controlled by an effect control microcomputer mounted on the effect control board.

  Below the variable display device 9, there is provided a special symbol display (special symbol display device) 8 for variably displaying a special symbol as identification information. In this embodiment, the special symbol display 8 is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying a number of, for example, 00 to 99. The special symbol display 8 is not limited to displaying a two-digit number, and may be configured to variably display a number of other digits such as 0 to 9. In addition, the variable display device 9 performs variable display of a decorative symbol as a symbol for decoration (for production) during the variable symbol display period of the special symbol by the special symbol indicator 8.

  On the right side of the special symbol display 8 is a special symbol hold composed of four indicators for displaying the number of effective winning balls that have entered the start winning openings 13, 14, that is, the number of hold memories (also referred to as start memory or start prize memory). A storage indicator 18 is provided. Every time there is an effective start prize, the display color of one display is changed. Each time the variable display on the special symbol display 8 is started, the display color of one display is restored. In the display area of the variable display device 9, a special symbol reserved storage display area including four display areas for displaying the number of reserved memories may be provided. Further, in this embodiment, the upper limit value of the number of reserved memories is 4, but the upper limit value may be a larger value. Further, the upper limit value may be changed according to the gaming state.

  A first start winning opening 13 is provided below the variable display device 9. A game ball won in the first start winning opening 13 is guided to the back of the game board 6 and detected by the first start opening switch 13a. In addition, on the left side of the variable display device 9, a variable winning device 15 that forms a second start winning port 14 is provided. The winning ball that has entered the second starting winning port 14 is guided to the back of the game board 6 and detected by the starting port switch 14a. The variable winning ball device 15 is opened by a solenoid 16.

  On the right side of the variable display device 9, a trolley 151 as a movable member used for a game effect is provided. In the game effect, the truck 151 can produce an effect of jumping from the right side of the variable display device 9 to the left side as shown in FIG. 4 according to the control of the effect control means.

  Further, on the upper and right sides of the variable display device 9, a beam 152 is provided as a movable member used for a game effect. As shown in FIG. 5, the beam 152 can perform an effect that collapses from the upper part and the right side of the variable display device 9 according to the control of the effect control means in the game effect.

  Furthermore, a skeleton 153 as a movable member used for a game effect is provided below the variable display device 9. In the game effect, the skeleton 153 can perform an effect such that the mouth part opens and closes as shown in FIG. 6 according to the control of the effect control means. Further, the skeleton 153 includes a special variable winning ball apparatus 20 and forms a big winning opening. In this embodiment, in the skeleton 153, in the specific gaming state (big hit state), the special variable winning ball apparatus 20 is controlled to be opened by the solenoid 21, so that the big winning opening serving as the winning area is opened. The winning ball that has won the big winning opening is detected by the count switch 23.

  The pachinko gaming machine 1 also includes operation buttons 81a to 81e that can be operated by the player while the game is in progress. For example, when the operation buttons 81a to 81e are operated (pressed), the trolley 151, the beam 152, and the skeleton 153 as movable members are operated.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the left and right lamps (a symbol can be visually recognized when the lamp is lit). For example, if the right lamp is lit when the variable display ends, it is a hit. And when the stop symbol in the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball apparatus 15 is opened for a predetermined number of times. Below the normal symbol display 10 is provided a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls that have entered the gate 32. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Then, every time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning ports (ordinary winning ports) 29, 30, 33, 39, and winning of game balls to the winning ports 29, 30, 33, 39 is a winning port switch 29a, 30a, respectively. , 33a, 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning ports 13 and 14 and the big winning port also constitute a winning area that accepts game media and allows winning. In addition, the game balls won in the respective winning openings 29, 30, 33, 39 may be detected by one switch.

  A decoration member 154 is attached to the center of the game area 7 so as to surround the variable display device 9, and a decoration lamp (center decoration) that is lit up or flashed during the game is placed above the decoration member 154. Lamp). In this embodiment, six LEDs 125a to 125f are provided as center decoration lamps. In addition, the decoration member 154 is provided with a decoration lamp (stage lamp) that is lit or flashed during the game so as to surround the variable display device 9. In this embodiment, six LEDs 126a to 126f are provided as stage lamps.

  Further, at the lower part of the game area 7, there is an out port 26 for absorbing game balls that have not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. A top frame lamp, a left frame lamp, and a right frame lamp are provided on the outer periphery of the game area 7. Further, a decoration LED is installed around each structure in the game area 7. The top frame lamp, the left frame lamp, the right frame lamp, and the decoration LED are examples of a decorative light emitter provided in the gaming machine. In this embodiment, twelve LEDs 281a to 281l are provided as ceiling lamps. In addition, six LEDs 282a to 282f are provided as left frame lamps. In addition, six LEDs 283a to 283f are provided as right frame lamps. Further, as a decorative LED around the structure, one LED 127a is provided for the skeleton 153, two LEDs 127b and 127c are provided for the special variable winning ball apparatus 20, and one LED 83 is provided for the operation buttons 81a to 81e. 3 includes four LEDs 82a to 82d.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When a game ball enters the first start winning opening 13 and is detected by the first start opening switch 13a, or when a game ball enters the second start winning opening 14 and is detected by the second start winning opening switch 14a, If the variable display can be started, the special symbol on the special symbol display unit 8 starts variable display (variation), and the variable display device 9 starts variable display (variation). If it is not in a state where the variable display of symbols can be started, the start winning memory number is increased by one.

  The variable display of the special symbol on the special symbol display 8 and the variable display of the decorative symbol on the variable display device 9 are stopped when a certain time has passed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special winning opening is opened until a predetermined time elapses or a predetermined number (for example, 10) of game balls wins.

  When the game ball wins the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol on the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. Further, in the short time state (the game state in which the variable symbol variable display time is shortened), the opening time and the number of opening times of the variable winning ball device 15 may be increased.

  As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter also simply referred to as a “card unit”) that enables lending a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  FIG. 7 is an explanatory diagram showing a state in which the game frame 11 is opened. As shown in FIG. 7, four substrates (frame side IC substrates) 602 to 605 for mounting ICs and the like are attached to the back surface on the game frame 11 side. The frame-side IC board 602 attached to the upper part of the game frame 11 is mounted with serial-parallel conversion ICs 611 and 612 for converting serial data into parallel data. From each of the serial-parallel conversion ICs 611 and 612, the ceiling frame lamp A control signal is supplied to each of the LEDs 281a to 281l. Further, the frame side IC substrate 603 attached to the right side (left side when viewed from the back side) of the game frame 11 is mounted with the serial-parallel conversion IC 613, and each LED 283a of the right frame lamp from the serial-parallel conversion IC 613 is mounted. A control signal is supplied to 283f. Further, the frame side IC substrate 604 attached to the left side (right side as viewed from the back side) of the game frame 11 is mounted with a serial-parallel conversion IC 614. From the serial-parallel conversion IC 614, each LED 282a of the left frame lamp. A control signal is supplied to 282f.

  As shown in FIG. 7, in this embodiment, the frame side IC board 602 attached to the upper part of the game frame among the frame side IC boards 602 to 605 is equipped with two serial-parallel conversion ICs. It is configured as a collective substrate. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  Also, as shown in FIG. 7, a relay board 607 is attached to the game frame 11 side, and wiring from the relay board 607 is connected to the frame side IC board 604, and from the frame side IC board 604 to the frame side IC. The frame side IC substrate 602 is connected to the frame side IC substrate 603. Further, the wiring from the relay substrate 607 is connected to the frame side substrate 605. Further, the wiring between the frame side IC substrates 602 to 604 and the wiring between the frame side IC substrates 604 and 605 and the relay substrate 607 are performed using connectors 156a to 156h on each substrate as shown in FIG. Connected. FIG. 7 shows the case where the wiring connection is performed using a connector of a type that is connected to the board in the vertical direction. You may make it perform.

  As shown in FIG. 7, the wiring from the connector 156 a of the relay board 607 is connected to the connector 156 b of the frame side IC board 604. The wiring pattern of the frame side IC substrate 604 is further branched from the connector 156b, one is connected to the serial-parallel conversion IC 614, and the other is connected to the connector 156c. Further, in the frame side IC substrate 604, the connector 156c is arranged at an end portion on the frame side IC substrate 602 side. The wiring from the connector 156c of the frame side IC substrate 604 is connected to the connector 156d of the frame side IC substrate 602. The wiring pattern of the frame side IC substrate 602 is further branched into three from the connector 156d and connected to the serial-parallel conversion IC 611, the serial-parallel conversion IC 612, and the connector 156e. Further, in the frame side IC substrate 602, the connector 156e is disposed at an end portion on the frame side IC substrate 603 side. The wiring from the connector 156e of the frame side IC substrate 602 is connected to the connector 156f of the frame side IC substrate 603. The wiring pattern of the frame side IC substrate 603 is connected to the serial-parallel conversion IC 613.

  Further, the wiring from the connector 156g of the relay board 607 is connected to the connector 156h of the frame side IC board 605. The wiring pattern of the frame side IC substrate 605 is further branched from the connector 156h, one is connected to the serial-parallel conversion IC 615, and the other is connected to the input IC 620.

  Further, as shown in FIG. 7, a door opening sensor 155 for detecting opening of the game frame 11 is attached.

  FIG. 8 is an explanatory view showing the back surface of the game board 6. As shown in FIG. 8, a base (board side IC substrate) 601 for mounting an IC or the like is attached to the back surface of the game board 6. The board side IC substrate 601 is equipped with four serial-parallel conversion ICs 616 to 619 for converting serial data into parallel data, and a motor for driving the movable members 151 to 153 from the serial-parallel conversion IC 616. Control signals are supplied to 151a, 152a, and 153a. Further, a control signal is supplied from the serial-parallel conversion IC 617 to the LEDs 125a to 125f of the center decoration lamp. Further, a control signal is supplied from the serial-parallel conversion IC 618 to each LED 126a to 126f of the stage lamp. In addition, a control signal is supplied from the serial-parallel conversion IC 619 to the skeleton 153 that is a movable member and the LEDs 127 a to 127 b of each lamp provided in the special variable winning ball apparatus 20.

  As shown in FIG. 8, in this embodiment, the board side IC substrate 601 is configured as a collective substrate on which four serial-parallel conversion ICs are mounted. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  The board side IC substrate 601 is equipped with an input IC 621 for converting parallel data into serial data, and detection signals from the position sensors 151b, 152b, and 153b for detecting the positions of the movable members 151 to 153 are received. The signals are input to the input IC 621 in parallel.

  As shown in FIG. 8, a relay board 606 is attached to the game board 6 side, and a relay board 607 is provided on the game frame 11 side. The wiring from the effect control means is first connected to the relay board 606 and further connected to the relay board 607. The wiring from the relay board 606 is connected to the board side IC board 601. Also, the wiring between the board side IC substrate 601 and the relay substrate 606, the wiring between the relay substrates 606 and 607, and the wiring between the relay substrate 606 and the effect control means are shown in FIG. Are connected using connectors 157a to 157e. The connection method of the connectors 157a to 157e is the same as the connection method of the connectors 156a to 156h shown in FIG.

  An opening is formed in the upper plate of the plastic frame above the hole for paying out the game ball, and a relay board 607 is provided in the opening. The relay board 607 is a board that relays through the front and back connectors. The connector 157b is disposed on the front side of the plastic frame, and the connectors 156a and 156g are disposed on the back side. The relay board 607 is disposed at the end of the opening to which the game board 6 is attached. As shown in FIG. 7, the relay board 607 is formed in a shape that follows the shape of the end of the opening to which the game board 6 is attached. The relay board 607 is in a state of being shifted so that the positions of the connector 157b arranged on the front side and the connectors 156a and 156g arranged on the back side do not overlap.

  A relay board 606 is provided on the back side of the game board 6. As shown in FIG. 8, the relay board 606 is provided at the end of the game board 6 so as to be positioned in the vicinity of the relay board 607 of the plastic frame. The relay board 606 is a board that relays via a connector, and connectors 157b to 157d are arranged. The connector 157b is connected to the production control microcomputer 100 mounted on the game board 6.

  FIG. 9 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. FIG. 9 also shows the payout control board 37, the effect control board 80, and the like. A game control microcomputer (corresponding to game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. And a serial output circuit for converting parallel data into serial data and outputting the serial data. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. Further, the I / O port unit 57 may be externally attached.

  The game control microcomputer 560 further includes a random number circuit for generating hardware random numbers.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Also, an input driver circuit for supplying detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a and 39a to the game control microcomputer 560. 58 is also mounted on the main board 31. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a big winning opening in accordance with a command from the game control microcomputer 560. 31.

  In addition, the game control microcomputer 560 includes a special symbol display 8 that variably displays special symbols, a normal symbol display 10 that variably displays normal symbols, a special symbol hold memory display 18, and a normal symbol hold memory display 41. Perform display control.

  Further, the serial output circuit 78 mounted on the game control microcomputer 560 is constituted by a shift register or the like, converts the effect control command output from the CPU 56 into serial data, and sends it to the effect control board 80 via the relay board 77. Send. The serial output circuit 78 converts the control signal output from the CPU 56 into serial data, and via the relay board 77, the special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10, and the normal symbol. The data is output to the on-hold storage display 41. The special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10 and the normal symbol hold storage display 41 are provided with serial-parallel conversion ICs for converting serial data into parallel data, respectively. The control signal from the relay board 77 is converted into parallel data and supplied to the special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10, and the normal symbol hold storage display 41.

  An information output circuit (not shown) that outputs an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state to an external device such as a hall computer is also mounted on the main board 31.

  In this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 receives the effect control command from the game control microcomputer 560 via the relay board 77. It receives as a serial data system, and performs display control of the variable display device 9 for variably displaying decorative symbols.

  Further, the effect control means mounted on the effect control board 80 controls the display of the center decoration lamps 125a to 125f and the stage lamps 126a to 126f provided on the game board 6, and is provided on the frame side. The display control of the LEDs 281a to 281l of the ceiling frame lamps, the LEDs 282a to 282f of the left frame lamps, and the LEDs 283a to 283f of the right frame lamps is performed, and the sound output from the speaker 27 is controlled.

  Further, the effect control microcomputer 100 of the effect control board 80 has a control for display control of the lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f output by the effect control means. A serial output circuit 353 for converting a signal from parallel data to serial data is mounted. In addition, the effect control microcomputer 100 of the effect control board 80 is equipped with a serial input circuit 354 that converts the input serial data into parallel data and outputs the parallel data to the effect control means. Therefore, the effect control means outputs the control signal as a serial data system via the serial output circuit 353, thereby controlling the display of each of the lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f. I do.

  On the game board side, a board-side IC board 601 on which a serial-parallel conversion IC for converting serial data into parallel data is mounted. The board side IC board 601 is connected to the effect control board 80 via the relay board 606. On the game frame 11 side, frame-side IC substrates 602, 603, 604, and 605 on which serial-parallel conversion ICs for converting serial data into parallel data are provided. Each frame-side IC substrate 602, 603, 604, 605 is connected to the effect control substrate 80 via the relay substrate 606, 607.

  As shown in FIG. 9, the effect control board 80, the relay board 606, and the relay board 607 are connected to each other by a single wiring route in a bus shape.

  FIG. 10 is a block diagram illustrating a circuit configuration example of the relay board 77 and the effect control board 80. In addition, although the example shown in FIG. 10 shows the case where only the effect control board 80 is provided regarding the effect control, a lamp driver board and an audio output board may be provided. In this case, the lamp driver board and the audio output board are not equipped with a microcomputer, but may be equipped with a microcomputer.

  The effect control board 80 includes an effect control microcomputer 100 including an effect control CPU 101, a RAM (not shown), a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356 and an input capture signal output unit 357. It is installed. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives an effect control command via the serial input circuit 102 and the input port 103. In this case, the serial input circuit 102 converts the effect control command received as the serial data method into parallel data and outputs the parallel data. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 based on the effect control command.

  In this embodiment, a VDP 109 that performs display control of the variable display device 9 in cooperation with the effect control microcomputer 100 is mounted on the effect control board 80. The VDP 109 has an address space independent of the production control microcomputer 100, and maps a VRAM therein. VRAM is a buffer memory for developing image data. The VDP 109 outputs the image data in the VRAM to the variable display device 9 via the frame memory.

  The effect control CPU 101 outputs to the VDP 109 a command for reading out necessary data from a CGROM (not shown) in accordance with the received effect control command. The CGROM stores character image data and moving image data displayed on the variable display device 9, specifically, a person, characters, figures, symbols, etc. (including decorative designs), and background image data in advance. ROM. The VDP 109 reads image data from the CGROM in response to the instruction from the effect control CPU 101. The VDP 109 executes display control based on the read image data.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 10 illustrates a diode.

  Further, the effect control CPU 101 outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606. Further, the production control CPU 101 outputs sound number data to the speech synthesis IC 173.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 611 to 615 and the input IC 620 mounted on the frame side IC substrates 602 to 605 via the relay substrates 606 and 607. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 619 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to each of the serial / parallel conversion ICs 611 to 619 and the input ICs 620 and 621.

  Further, the input capture signal output unit 357 inputs the input capture signal (latch signal) to the board side IC board 601 or the frame side IC boards 602 to 605 via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Is output. The input IC 620 mounted on the frame side IC board 605 latches the detection signals of the operation buttons 81a to 81e when the input capture signal from the production control microcomputer 100 is input, and relays boards 606 and 607 as a serial data system. To the production control microcomputer 100. The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b, 152b, 153b when the input capture signal from the production control microcomputer 100 is input, and the serial data system is used. This is output to the production control microcomputer 100 via the relay board 606.

  When the sound number IC 173 receives the sound number data, the sound synthesizing IC 173 generates a sound or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  FIG. 11 is a block diagram illustrating a configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605. The effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 607 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the effect control microcomputer 100 to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601. And each serial-parallel conversion IC616-619 converts the input serial data into parallel data, LED125a-125f of each lamp provided in the game board 6, 126a-126f, 127a-127c, and each movable member The motors 151a to 151c are supplied.

  Further, the relay board 607 is connected to the relay board 606 through a single wiring route in a bus type, and the serial data line 300 and the clock signal line 301 connected to each serial-parallel conversion IC 616 to 619 are connected to the board side. It is connected to the bus form on the IC substrate 601.

  Each serial-parallel conversion IC 616 to 619 mounted on the board side IC substrate 601 has a unique ID. In this embodiment, as shown in FIG. 11, the ID of IC 616 is 06, the ID of IC 617 is 07, the ID of IC 618 is 08, and the ID of IC 619 is 09.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the production control microcomputer 100 mounted on the board-side IC board 601 include an input signal line 302, a clock signal line 301, and an input capture signal line 303 via a relay board 606. The presentation control microcomputer 100 is connected and outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input fetch signal (latch signal) and outputs it to the effect control microcomputer 100 via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it. In this embodiment, the unique ID of the input IC 621 is 11, as shown in FIG.

  As shown in FIG. 11, the serial data and the clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC boards 602 to 605, respectively. And each serial-parallel conversion IC611-615 converts the input serial data into parallel data, LED281a-281l of each lamp provided in the game frame 11, 282a-282f, 283a-283f, 82a-82d, 83.

  The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 611 to 614 are connected in a bus format on the frame side IC substrates 602 to 604. In this embodiment, as shown in FIG. 11, first, the serial-parallel conversion IC 614 of the frame-side IC board 604 is input, and the serial-parallel conversion IC 614 and the serial-parallel conversion IC 611 and the serial-parallel of the frame-side IC board 602 are input. The signals are input in the order of the parallel conversion IC 612, and further input from the serial-parallel conversion IC 612 to the serial-parallel conversion IC 613 of the frame side IC substrate 603. The serial data line and the clock signal line connected to the serial-parallel conversion IC 615 are directly connected from the relay board 607.

  Each serial-parallel conversion IC 611 to 615 mounted on each frame side IC substrate 602 to 605 has a unique ID. In this embodiment, as shown in FIG. 11, the ID of IC 611 is 01, the ID of IC 612 is 02, the ID of IC 613 is 03, the ID of IC 614 is 04, and the ID of IC 615 is 05 It is.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81 a to 81 e provided on the game frame 11 is mounted on the frame side IC board 605. In this embodiment, an input signal line, a clock signal line, and an input capture signal line are connected to the input IC 620 mounted on the frame side IC board 605 and the production control microcomputer 100 via the relay boards 606 and 607. Thus, the production control microcomputer 100 outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the production control microcomputer 100 outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the effect control microcomputer 100 via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data. In this embodiment, the unique ID of the input IC 620 is 10 as shown in FIG.

  The serial-parallel conversion ICs 616 to 619 mounted on the panel-side IC substrate 601 and the serial-parallel conversion ICs 611 to 615 mounted on the frame-side IC substrates 602 to 605 are connected via one line of wiring. . Specifically, the connection through one system of wiring means that the relay boards 606 and 607 are connected in a bus type, and the serial-parallel conversion ICs 611 to 619 are connected in a bus type or a daisy chain type. It is that. In this embodiment, as shown in FIG. 11, the serial-parallel conversion ICs 611 to 619 are connected in a bus type. As described above, in this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel ICs 611 to 615 mounted on the frame side IC substrates 602 to 605 are provided. The connectors 156a to 156h and 157a to 157e are connected via the relay boards 606 and 607 via one line of wiring. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed simply by attaching and detaching the connector, and the game frame 11 and the game board 6 can be attached and detached more easily.

  In addition, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621. The common clock signal is input from the production control microcomputer 100. Therefore, the wiring of the clock signal to the serial-parallel conversion ICs 611 to 619 and the wiring of the clock signal to the input ICs 620 and 621 can be shared, and communication between the effect control means and the board-side IC 601 board, Communication between the effect control means and the frame side IC substrates 602 to 605 can be realized using one channel, respectively, and the number of wirings can be reduced. Also, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621 can be easily synchronized. The number of clock signal wirings can also be reduced.

  In this embodiment, each serial-parallel conversion IC 611 to 619 is assigned an address in advance, and when the production control microcomputer 100 outputs a control signal converted into serial data, the serial data is addressed to serial data. Is added and output. When each serial-parallel conversion IC 611-619 inputs serial data, it checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. Are supplied (ie, output) to the LEDs of each lamp. If the addresses do not match, the LED of each lamp is not supplied.

  12 and 13 are explanatory diagrams showing examples of addresses given to the serial-parallel conversion ICs 611 to 619. FIG. In this embodiment, the production control microcomputer 100 stores the addresses of the serial-parallel conversion ICs 611 to 619 shown in FIGS. 12 and 13 in a predetermined address storage area previously provided in the RAM.

  In this embodiment, as shown in FIGS. 12 and 13, in the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, an address 01 is assigned to the IC 611, and an address is assigned to the IC 612. 02 is given, address 03 is given to IC613, address 04 is given to IC614, and address 05 is given to IC615. Further, in the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the address 006 is given to the IC 616, the address 07 is given to the IC 617, the address 08 is given to the IC 618, and the IC 619 is given. Address 09 is given.

  The serial-parallel conversion ICs 611 to 619 may be given the same ID as the unique ID of the IC as an address, or may be given an address including numbers, characters, and symbols different from the unique ID of the IC. Good.

  As shown in FIGS. 12 and 13, the serial-parallel conversion IC 611 whose address is 01 converts serial data into parallel data, and the LED of the top frame lamp of the game frame 11 (in this example, the top frame lamp). Six LEDs (281a to 281f) among the LEDs 281a to 281l are supplied. The serial-parallel conversion IC 612 whose address is 02 converts the serial data into parallel data, and the LED of the top frame lamp of the game frame 11 (in this example, the other six LEDs (281g of the top frame lamp LEDs 281a to 281l) To 281 l)). The serial-parallel conversion IC 613 whose address is 03 converts the serial data into parallel data and supplies the parallel data to the LEDs of the right frame lamp of the game frame 11 (in this example, 6 LEDs (283a to 283f)). Further, the serial-parallel conversion IC 614 whose address is 04 converts the serial data into parallel data, and supplies it to the LED of the left frame lamp of the game frame 11 (in this example, 6 LEDs (282a to 282f)).

  Further, the serial-parallel conversion IC 615 whose address is 05 converts the serial data into parallel data, and a dish side lamp (four LEDs (82a to 82d) in this example) provided on the hitting tray 3 of the game frame 11 And an operation button lamp 83 (one lamp in this example) provided on the operation buttons 81a to 81e.

  Further, the serial-parallel conversion IC 616 whose address is 06 converts serial data into parallel data, and each movable member provided in the game board 6 (in this example, an accessory imitating the shape of a beam, a truck, and a skeleton) ) For driving the motor (in this example, three motors (151a, 152a, 153a) are respectively forward and reverse directions). The serial-parallel conversion IC 617 whose address is 07 converts serial data into parallel data, and each lamp of the decorative structure (center decoration) provided at the center of the game board 6 (in this example, six LEDs (125a To 125 f)). Further, the serial-parallel conversion IC 618 whose address is 08 converts serial data into parallel data, and supplies it to each stage lamp (in this example, six LEDs (126a to 126f)) provided around the variable display device 9. To do. The serial-parallel conversion IC 619 whose address is 09 converts serial data into parallel data, and the lamp LED (three LEDs (127a to 127c in this example) provided around the movable member (skeleton 153 in this example) is provided. )).

  In this embodiment, each input IC 620, 621 is also given an address in advance. FIG. 14 is an explanatory diagram showing an example of addresses given to the input ICs 620 and 621. The production control microcomputer 100 stores the addresses of the input ICs 620 and 621 in a predetermined address storage area provided in advance in the RAM. In this embodiment, as shown in FIG. 14, the address 10 is assigned to the input IC 620 mounted on the frame side IC board 605, and the address 11 is assigned to the input IC 621 mounted on the board side IC board 601. ing.

  Each input IC 620, 621 may be given the same ID as the unique ID of the IC as an address, or may be given an address including numbers, characters, and symbols different from the unique ID of the IC.

  Further, as shown in FIG. 14, the input IC 620 whose address is 10, the detection signal of the operation buttons 81a to 81e provided in the game frame 11 (whether or not the operation buttons 81a to 81e themselves are turned on, the operation button 81a ˜81e) is inputted in parallel, converted into serial data, and outputted. Further, the input IC 621 whose address is 11 inputs the detection signals of the position sensors 151b, 152b, 153b (three in this example) provided on each movable member of the game board 6 in parallel and converts them into serial data. Output.

  FIG. 15 is a block diagram showing the configuration of each serial-parallel conversion IC 611-619. As illustrated in FIG. 15, the serial-parallel conversion ICs 611 to 619 include a data latch unit 651, a shift register 652, a header / address detection unit 653, a data buffer 655, and a sync driver 656.

  The data latch unit 651 includes, for example, a latch circuit. When serial data is input, the data latch unit 651 latches the input data bit by bit at the rising timing of the clock signal pulse and outputs the latched data to the shift register 652. The shift register 652 sequentially stores data input bit by bit from the data latch unit 651. The shift register 652 shifts stored data bit by bit at the rising timing of the pulse of the clock signal. By repeatedly shifting the stored data bit by bit as described above, the data finally input as serial data (that is, in a serial manner) is stored in the shift register 652.

  FIG. 16 is an explanatory diagram showing an example of the format of serial data output from the production control microcomputer 100. FIG. 16A shows a data format of serial data output as lamp lighting data for individually lighting or extinguishing the LEDs of the respective lamps provided on the game board 6 and the game frame 11. FIG. 16B shows a format of serial data output as a reset command for resetting the LEDs of the respective lamps provided on the game board 6 and the game frame 11 to turn off all the lights.

  As shown in FIG. 16A, the lamp lighting data is composed of 28 bits, and includes 9-bit header data, mark bits (M), 8-bit addresses, 8-bit data, and end bits (E). .

  The header data represents the head of the data, and is 1FF (h) in this example. The mark bit (M) is a bit (logical value 0 in this example) representing a data delimiter, and is inserted between the header data and the address and between the address and the data. The address is the address of the data-output destination serial-parallel conversion IC. An ID that is a unique serial number of each serial-parallel conversion IC 611 to 619 may be used as the address.

  The data (8 bits) is for controlling the lighting state of the LED of each lamp, and includes, for example, a logical value 1 as a bit corresponding to the LED of the lamp to be lit, Corresponding bits contain the logical value 0. The end bit (E) indicates the end of data, and is a logical value 0 in this example.

  As shown in FIG. 16B, the reset command is composed of 19 bits and includes 9-bit header data, mark bits (M), 8-bit reset data, and end bits (E).

  The header data represents the head of the data, and is 1FF (h) in this example. The mark bit (M) is a bit (logical value 0 in this example) representing a data delimiter, and is inserted between the header data and the reset data. The reset data is for resetting the lighting states of the LEDs of the respective lamps so that all the lamps are extinguished. For example, the reset data is all data including the logical value 1. The end bit (E) indicates the end of data, and is a logical value 0 in this example.

  In this embodiment, the lamp lighting data shown in FIG. 16A or the reset command shown in FIG. 16B is input, and the shift register 652 is repeatedly shifted bit by bit at the rising timing of the pulse of the clock signal. Will be stored.

  The header / address detector 653 detects the header and address from the data stored in the shift register 652. First, the header / address detection unit 653 constantly detects data from the shift register 652, and confirms whether or not the content of the detected data matches 1FF (h) corresponding to the header data. If it matches the header data (1FF (h)), it is determined that the position that matches the header data is the head of the data, and it is determined that one set of lamp lighting data or reset command is stored in the shift register 652. Next, the header / address detection unit 653 detects the 11th to 18th bits of data from the head corresponding to the address from the shift register 652, and whether or not it matches the address previously given to the serial-parallel conversion IC. To check. The board-side IC board 601 and the frame-side IC boards 602 to 605 are provided with, for example, an address storage register 654 that stores the address of the serial-parallel conversion IC to be mounted, and the header / address detector 653 What is necessary is just to confirm whether or not the address detected from the shift register 652 matches the address stored in the address storage register 654 in advance. If the addresses match, the header / address detection 653 determines that data destined for the serial-parallel conversion IC has been input, and outputs an input capture signal (latch signal) to the data buffer 655. If the addresses do not match, the header / address detection 653 does not output the input capture signal to the data buffer 655. That is, in this case, since the data is not destined for the serial-parallel conversion IC, the data stored in the shift register 652 is discarded without being output to the data buffer 655.

  15 shows a case where the address storage register 654 is provided in advance on the board side IC substrate 601 and each of the frame side IC substrates 602 to 605. However, instead of the address storage register 654, serial-parallel conversion is shown. An address is input from an external hardware circuit (for example, a circuit mounted on the production control board 80) via an address terminal (8 terminals (corresponding to each bit of an 8-bit address)) provided in the IC. You may make it do. Then, an address may be input to the serial-parallel conversion IC by controlling the input of each address terminal to high or low from the external hardware circuit side. In this case, for example, the external hardware circuit sets the input to the terminal to high by applying a voltage to the terminal corresponding to any bit of the address, or sets the input to the terminal to low by switching to the ground. Control to do.

  The data buffer 655 is constituted by, for example, a latch register. When an input capture signal is input from the header / address detector 653, the data of the 20th to 27th bits from the head corresponding to the data portion is captured from the shift register 652. Latch with. The data buffer 655 supplies (that is, outputs) the fetched data to the LEDs of each lamp as parallel data (Q0 to Q7).

  If the data stored in the shift register 652 is a reset command, the 11th to 18th bits from the beginning all store data having a logical value of 1. In this case, the data buffer 655 determines that a reset command has been input when all data having a logical value of 1 is fetched, and the LEDs of all the lamps are reset and turned off.

  The sync driver 656 inverts and outputs the logical value of the parallel data output from the data buffer 655 based on a predetermined logic inversion setting signal, or outputs it as it is. For example, when the predetermined logic inversion setting signal is High, the signal is turned on when the bit value of the parallel data output from the data buffer 655 is 1 (that is, the corresponding bit value of the lamp lighting data is 1), An ON signal is output to the LED of each lamp. In this embodiment, the set value of the logic inversion setting signal is set in advance in a register or the like provided on the panel side IC substrate 601 and each frame side IC substrate 602 to 605, and each lamp is set according to the set value set in advance. It is assumed that an ON signal is output to each of the LEDs and the LEDs of each lamp are lit.

  FIG. 17 is a timing diagram showing an example of the input timing of serial data and clock signals to the serial-parallel conversion IC and the output timing of parallel data. In FIG. 17, a case where lamp lighting data is input as a serial data method will be described. As shown in FIG. 17, the serial data is input to the shift register 652 of the serial-parallel conversion IC in units of 1 bit in the order of header data, mark bits, addresses, mark bits, data, and end bits. The series of data is set as one set. The header / address detection unit 653 does not detect header data until one set of serial data (in this example, lamp lighting data) is completely input, so the output of the data buffer 655 does not change. Therefore, the lighting pattern based on the previously received serial data is output as it is as a parallel data system from the serial-parallel conversion IC.

  When all sets of serial data have been input, the data portion from the data stored in the shift register 652 is latched in the data buffer 655, and a lighting pattern based on the newly received serial data is output as a parallel data system. In this embodiment, as shown in FIG. 17, among the parallel data output from the serial-parallel conversion IC, Q0 and Q4 are the rising timing of the pulse of the next clock signal after completion of the serial data input. Immediately, the data is switched to new lighting pattern data. Q1 and Q5 are switched to new lighting pattern data with a delay of one clock from Q0 and Q4. Q2 and Q6 are switched to new lighting pattern data with a delay of two clocks from Q0 and Q4. Further, Q3 and Q7 are switched to new lighting pattern data with a delay of three clocks from Q0 and Q4.

  FIG. 18 is a block diagram illustrating the configuration of each of the input ICs 620 and 621. As shown in FIG. 18, in this embodiment, each input IC 620, 621 is composed of a plurality (eight in this example) of D flip-flops 661-668. In this embodiment, detection signals from the operation buttons 81a to 81e or the position sensors 151b, 152b, and 153b are input in parallel to the input ICs 620 and 621, and are input to one of the D flip-flops 661 to 668 for each detection signal. Entered. A clock signal is input to each of the D flip-flops 661 to 668, and each D flip-flop 661 to 668 sequentially performs a shift operation at the rising edge of the clock. The detection signals input in parallel are converted into serial data and output.

  An input capture signal (latch signal) is input to each of the D flip-flops 661 to 668 from the effect control microcomputer 100 at a predetermined timing. When an input capture signal is input, detection signals from the operation buttons 81a to 81e or the position sensors 151b, 152b, and 153b are latched by the D flip-flops 661 to 668, respectively. The latched detection signal is sequentially shifted at the rising edge of the clock and output as a serial data system.

  Next, the detailed structure of the left frame light emitting unit having the left frame lamp LEDs 282a to 282f and the right frame light emitting unit having the right frame lamp LEDs 283a to 283f will be described with reference to FIGS. FIG. 19 is an enlarged front view of a main part showing a lower part of the front right side of the glass door frame. FIG. 20 is an enlarged perspective view of a main part showing an attached state of the side inner lens to the glass door frame. FIG. 21 is a cross-sectional view taken along the line AA of FIG. 22A is a sectional view taken along line BB in FIG. 21, FIG. 22B is a sectional view taken along line CC in FIG. 21, and FIG. 22C is a sectional view taken along line DD in FIG. FIG. 23 is a cross-sectional view showing a light guide state in the side inner lens. FIG. 24 is a schematic view showing a light emission state of the side inner lens.

  Note that the BB cross-sectional view of FIG. 21 in FIG. 22A and the DD cross-sectional view of FIG. 21 in FIG. 22C are a first concave portion 1603 and a second portion which will be described later for clarity of illustration. It is set as sectional drawing which shows the state cut | disconnected in the position slightly lower than the up-down center position of the recessed part 1604 of this. Further, since the structures of the left frame light emitting unit and the right frame light emitting unit are substantially the same, only the right frame light emitting unit will be described here, and a detailed description of the structure of the left frame light emitting unit will be omitted.

  As shown in FIG. 19, the right frame light emitting part provided on the right front side of the glass door frame 2 has a side inner lens 457 as a light guide member and a predetermined interval in the vertical direction on the back side (rear). A linear light emitting unit 1600 mainly composed of LEDs 283a to 283f of right frame lamps arranged every other is provided in the vertical direction along the right side of the glass door frame 2.

  As shown in FIG. 20 in particular, the side inner lens 457 is formed in a rod shape from a transparent synthetic resin material. Specifically, from a plate-like portion 1601 formed in a strip shape, a central rib 1602C extending forward from a front center portion in the left-right direction of the plate-like portion 1601, and a front end portion in the left-right direction of the plate-like portion 1601. A left rib 1602L and a right rib 1602R each extending obliquely outward and forward are configured by integral molding. That is, the side inner lenses 457 extending in the vertical direction are arranged side by side in the horizontal direction, and the three rear ribs 1602L, the central rib 1602C, and the right rib 1602R are integrated at their rear ends. Since the left rib 1602L and the right rib 1602R are provided at a predetermined angle with respect to the center rib 1602C, the left rib 1602L and the center rib 1602C and between the right rib 1602R and the center rib 1602C are configured. A space having a substantially triangular cross section is formed between them in the vertical direction.

  The front end surfaces of the left rib 1602L, the central rib 1602C, and the right rib 1602R and the back surface of the plate-like portion 1601 are knurled in the longitudinal direction, and a longitudinal cutout with an open angle θ = 90 degrees has a triangular notch. It is formed continuously in the direction (see FIG. 21), and the internal light is emitted outward.

  In addition, the light emission aspect can be weakened by making the light emission aspect of each LED283a-283f strong by making this angle of opening angle (theta) 90 degrees or more, or less than 90 degree | times. That is, by varying the angle of the knurling opening angle θ in this way, the light emission mode of the light emitting display unit corresponding to each LED can be varied.

  On the back surface of the side inner lens 457, there are six first recesses 1603 having depths from the back surface of the plate-like portion 1601 to the base portions of the left rib 1602L, the central rib 1602C, and the right rib 1602R and extending in the left-right width direction, and Six second concave portions 1604 (see FIG. 20) are alternately provided at predetermined intervals in the longitudinal direction. Further, a first convex portion 1605 for forming the first concave portion 1603 is provided between the left rib 1602L and the central rib 1602C at a position corresponding to the first concave portion 1603 on the surface side of the side inner lens 457. And the right rib 1602R and the central rib 1602C are projected forward, and the second concave portion 1604 is formed at a position corresponding to the second concave portion 1604 on the surface side of the side inner lens 457. A second convex portion 1606 for forming the convex portion is projected forward between the left rib 1602L and the central rib 1602C and between the right rib 1602R and the central rib 1602C.

  As shown in FIGS. 20 and 23, the first concave portion 1603 is connected to the vertical introduction surface 1607a facing the vertical direction and the upper end of the vertical introduction surface 1607a from the upper end to the back surface side, and facing the horizontal direction. An irradiation light introduction surface formed in a substantially inverted U shape in a side view is formed by a horizontal introduction surface 1607b and a lower horizontal introduction surface 1607c which is provided continuously from the lower end of the vertical introduction surface 1607a toward the back surface and faces the horizontal direction. The irradiation light from the LEDs 283a to 283f of the right frame lamp arranged on the back side is introduced into the side inner lens 457.

  The vertical introduction surface 1607a is knurled in the vertical direction, and a light diffusing portion is formed in which notches having a triangular cross section having an opening angle θ = 90 degrees are continuous in the vertical direction. Internal light is emitted outward.

  In addition, the light emission aspect can be weakened by making the light emission aspect of each LED283a-283f strong by making this angle of opening angle (theta) 90 degrees or more, or less than 90 degree | times. That is, by varying the angle of the knurling opening angle θ in this way, the light emission mode of the first convex portion 1605 (light emitting display portion) corresponding to each LED can be varied.

  The second recess 1604 includes a vertical reflecting surface 1608a facing in the vertical direction, an upper inclined reflecting surface 1608b inclined upward from the upper end of the vertical reflecting surface 1608a toward the back surface, and a lower surface from the lower end of the vertical reflecting surface 1608a. A reflecting surface composed of a lower inclined reflecting surface 1608c that is inclined downward toward the side, and is introduced into the inside from the irradiation light introduction surface and guided inside the side inner lens 457 in the longitudinal direction. The light is reflected toward the front side.

  In this embodiment, the vertical reflecting surface 1608a is not knurled. However, the vertical reflecting surface 1608a is knurled in the vertical direction to form a notch having a triangular cross section with an opening angle θ = 90 degrees. May be formed in such a way that the light diffuses continuously in the vertical direction. By doing so, the internal light is radiated outward, so that the brightness at the second convex portion 1606 is increased. Can be increased.

  At the lower end of the side inner lens 457, the upper half of the second recess 1604, that is, the vertical reflecting surface (not shown) whose vertical width is half the vertical width of the vertical reflecting surface 1608a and the upper inclined reflecting surface (not shown). ) And a second semi-convex portion 1606 ′ (see FIG. 21) for forming the second concave portion 1604 ′ (see FIG. 21). FIG. 19 and FIG. 24) are projected. Although not specifically shown, although not shown in detail at the upper end of the side inner lens 457, the lower half of the second recess 1604, that is, the vertical width is half the vertical width of the vertical reflecting surface 1608a. A second semi-recessed portion (not shown) consisting of a vertical reflecting surface (not shown) and a lower inclined reflecting surface (not shown) is formed, and the second recessed portion (not shown) is formed on the front side thereof. ) Is formed as a second semi-convex portion (not shown).

  On the other hand, on the front surface of the glass door frame 2, as shown in FIG. 20, the lens placement portion 1610 that can place the side inner lens 457 from the front is vertically arranged along the right side of the glass door frame 2. It is extended toward. The lens placement portion 1610 is provided with a bottom wall surface 1610a that contacts the back surface of the plate-like portion 1601 in a state where the side inner lens 457 is disposed, and inclined wall surfaces 1610b and 1610c that contact the outer surface of the left rib 1602L and the outer surface of the right rib 1602R, respectively. Are formed in a substantially concave groove shape with a transverse cross section that opens forward.

  Irradiation on the bottom wall surface 1610a to expose the irradiation surfaces of the LEDs 283a to 283f of the right frame lamps forward to the positions facing the LEDs 283a to 283f of the right frame lamps arranged on the back side of the bottom wall surface 1610a. A plurality of openings 1611 are formed in the vertical direction so that the irradiation light from the LEDs 283a to 283f of the right frame lamps arranged at predetermined intervals in the vertical direction can be irradiated forward. It has become.

  In the state where the side inner lens 457 is disposed, a triangular prism-shaped irradiation light reflecting portion 1612 received and engaged in the first concave portion 1603 is installed in front of the irradiation opening 1611 so as to extend in the left-right direction. Yes. As shown in FIG. 23, on the rear surface side of the irradiation light reflecting portion 1612, an upper irradiation light reflecting surface 1612b inclined downward toward the rear surface side and a lower irradiation light reflection inclined upward toward the rear surface side. Surfaces 1612c are respectively formed. The upper irradiation light reflecting surface 1612b reflects the irradiation light from the LEDs 283a to 283f of the right frame lamp toward the lower inclined reflecting surface 1608c of the second recess 1604 provided above the first recess 1603. , And is incident on the upper horizontal introduction surface 1607b. The lower irradiation light reflection surface 1612c reflects the irradiation light from the LEDs 283a to 283f of the right frame lamp toward the upper inclined reflection surface 1608b of the second recess 1604 provided below the first recess 1603. The light is incident on the lower horizontal introduction surface 1607c.

  In addition, an auxiliary reflecting portion 1613 fitted into the second recessed portion 1604 is provided on the bottom wall surface 1610a so as to protrude forward when the side inner lens 457 is disposed. The auxiliary reflecting portion 1613 includes a vertical auxiliary reflecting surface 1613a facing in the vertical direction, an upper auxiliary reflecting surface 1613b inclined upward from the upper end of the vertical auxiliary reflecting surface 1613a toward the back surface, and the lower end of the vertical auxiliary reflecting surface 1613a. The lower auxiliary reflection surface 1613c that is inclined downward toward the back surface side is formed in a substantially triangular shape in the longitudinal section, and the vertical auxiliary reflection surface 1613a is in the state in which the side inner lens 457 is disposed. The upper auxiliary reflecting surface 1613b is in contact with the back surface of the upper inclined reflecting surface 1608b, and the lower auxiliary reflecting surface 1613c is in contact with the back surface of the lower inclined reflecting surface 1608c.

  Although not shown in detail in the lower end portion of the bottom wall surface 1610a, the upper half of the auxiliary reflecting portion 1613, that is, the vertical auxiliary reflecting surface whose vertical width dimension is half the vertical width dimension of the vertical auxiliary reflecting surface 1613a ( A semi-auxiliary reflecting portion 1613 ′ (see FIG. 21) composed of an upper auxiliary reflecting surface (not shown) and an upper auxiliary reflecting surface (not shown) is formed, and when the side inner lens 457 is disposed, The vertical reflecting surface (not shown) is in contact with or close to the vertical auxiliary reflecting surface (not shown), and the upper inclined reflecting surface (not shown) is in contact with or close to the upper auxiliary reflecting surface (not shown).

  Although not shown in detail in the upper end of the bottom wall surface 1610a, the lower half of the auxiliary reflecting portion 1613, that is, the vertical auxiliary reflecting surface whose vertical width dimension is half the vertical width dimension of the vertical auxiliary reflecting surface 1613a ( A semi-auxiliary reflecting portion (not shown) composed of a lower auxiliary reflecting surface (not shown) is formed, and the vertical reflecting surface at the upper end of the side inner lens 457 is formed in a state where the side inner lens 457 is arranged. (Not shown) is in contact with or close to the vertical auxiliary reflecting surface (not shown), and the lower inclined reflecting surface (not shown) is in contact with or close to the lower auxiliary reflecting surface (not shown).

  The glass door frame 2, the irradiation light reflecting portion 1612, and the auxiliary reflecting portion 1613 constituting the lens arrangement portion 1610 are made of a non-transparent synthetic resin material, and include a bottom wall surface 1610 a, inclined wall surfaces 1610 b, 1610 c, and Since each of the reflection surfaces 1612a to 1612c and 1613a to 1613c is plated, the light radiated from the inside of the side inner lens 457 is efficiently reflected without being lost and is incident on the inside again. ing.

  Next, the detailed structure of the side inner lens 457 configured as described above, the glass door frame 2, the LEDs 283a to 283f of the right frame lamp, the mutual arrangement relationship, and the like will be described.

  As shown in FIG. 19, on the surface side of the side inner lens 457, a first convex portion 1605 (first concave portion 1603) and a second convex portion 1606 (second concave portion 1604) are respectively provided in the vertical direction. It is formed alternately toward. As shown in FIG. 21 and FIG. 23, the first recess 1603 and the second recess 1604 are formed in a concave groove shape that opens toward the back surface side.

  The vertical width of the vertical reflecting surface 1612a of the irradiation light reflecting portion 1612 accommodated in the first recess 1603 is shorter than the vertical width of the vertical introduction surface 1607a, and the vertical reflecting surface 1612a A slight gap is formed between the upper end and the upper horizontal introduction surface 1607b and between the lower end of the vertical reflection surface 1612a and the lower horizontal introduction surface 1607c. Therefore, the irradiation light from the LEDs 283a to 283f of the right frame lamp is radiated forward from the irradiation light reflecting portion 1612 through this slight gap.

  The irradiation light reflecting portion 1612 is provided such that the joint end side of the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c, that is, the top side is located slightly ahead of the bottom wall surface 1610a. The inclination angle θ of the upper inclined reflection surface 1612b with respect to the upper horizontal introduction surface 1607b and the inclination angle θ of the lower inclination reflection surface 1612c with respect to the lower horizontal introduction surface 1607c are about 45 degrees, respectively. The LEDs 283a to 283f of each right frame lamp are arranged so as to irradiate light substantially horizontally toward the front, that is, to irradiate in the orthogonal direction with respect to the vertical introduction surface 1607a. The irradiation light from 283f is reflected in the vertical direction by the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c, respectively.

  In addition, the inclination angles θ of the upper inclined reflecting surface 1608b and the lower inclined reflecting surface 1608c with respect to the back surface of the side inner lens 457 (plate-like portion 1601) facing in the vertical direction are each about 135 degrees. That is, since the inclination angle of the upper inclined reflecting surface 1608b and the lower inclined reflecting surface 1608c with respect to the horizontal plane orthogonal to the back surface of the side inner lens 457 (plate-like portion 1601) is about 45 degrees, the upper horizontal introduction surface 1607b, Light incident in the orthogonal direction with respect to the lower horizontal introduction surface 1607c can be efficiently reflected forward.

  As shown in FIG. 21, the frame side IC substrate 603 in which a plurality of LEDs 283 a to 283 f of a plurality of right frame lamps are arranged at predetermined intervals in the longitudinal direction on the front surface is disposed close to the back surface side of the lens arrangement portion 1610. In addition, the LEDs 283a to 283f of the right frame lamps are arranged so as to face the irradiation openings 1611 formed in the bottom wall surface 1610a. That is, the right frame lamp LEDs 283a to 283f are arranged on the back surface side of each irradiation light reflecting portion 1612, but the right frame lamp LEDs 283a to 283f are not arranged on the back surface side of the auxiliary reflecting portion 1613. The LEDs 283a to 283f of the right frame lamps are arranged so as to irradiate light substantially horizontally toward the front, that is, irradiate perpendicularly to the vertical introduction surface 1607a.

  In the side inner lens 457, as shown in FIG. 20, the first concave portion 1603 formed on the back surface is opposed to the irradiation light reflecting portion 1612, and the second concave portion 1604 is opposed to the auxiliary reflecting portion 1613. Thus, the lens is arranged from the front side of the lens arrangement portion 1610 (see FIG. 19). In the state of being arranged in the lens arrangement portion 1610, the back surface of the plate-like portion 1601 and the back surfaces of the left rib 1602L and the right rib 1602R are in contact with the bottom wall surface 1610a and the inclined wall surfaces 1610b and 1610c, respectively. The irradiation light reflecting portion 1612 is accommodated in and fitted into the second recessed portion 1604, and the auxiliary reflecting portion 1613 is fitted into the second recessed portion 1604 (see FIG. 21).

  Next, the light emission mode of the side inner lens 457 will be described with reference to FIGS. In FIG. 24, a region that mainly emits light is shown in white, and a region that hardly emits light is shown in black.

  As shown in FIG. 23, light is supplied to the side inner lens 457 from each first recess 1603. Since the light emitted from the LEDs 283a to 283f of the right frame lamp is emitted almost horizontally toward the front, the light that has passed through the irradiation opening 1611 is mainly moved upward by the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c. And reflected downward. Here, since the inclination angle of the upper inclined reflection surface 1612b with respect to the upper horizontal introduction surface 1607b substantially parallel to the irradiation direction and the inclination angle θ1 = 45 degrees of the lower inclination reflection surface 1612c with respect to the lower horizontal introduction surface 1607c, the reflected light is The light is reflected in a direction substantially orthogonal to the horizontal introduction surface 1607b and the lower horizontal introduction surface 1607c.

  That is, since the incident angle with respect to the upper horizontal introduction surface 1607b and the lower horizontal introduction surface 1607c is 0 degree, the incident light is not refracted by the upper horizontal introduction surface 1607b and the lower horizontal introduction surface 1607c, and is directed upward and downward. Incident almost perpendicularly and proceed straight.

  The light guide distance Pa1 from the light emitting surfaces of the LEDs 283a to 283f of each right frame lamp to the reflection to the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c, and the upper horizontal from the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c. The light guide distance P1 consisting of the light guide distance Pb1 to the introduction surface 1607b and the lower horizontal introduction surface 1607c, that is, the light guide distance P1 that is the distance from the light emission surface of the LEDs 283a to 283f of each right frame lamp to the light introduction surface is The LEDs 283a to 283f of the right frame lamps and the first recesses 1603 are the same.

  Here, the incident light incident from the lower horizontal introduction surface 1607c travels substantially vertically downward, and enters the upper inclined reflection surface 1608b disposed immediately below the lower horizontal introduction surface 1607c. The optical path of this incident light is larger than the critical angle θ4 with respect to the normal H of the upper inclined reflecting surface 1608b, and all the energy before incident becomes reflected light, so that it is reflected almost horizontally toward the front. . Therefore, the front position of the upper inclined reflecting surface 1608b, that is, the vicinity of the upper portion of the second convex portion 1606 emits light more strongly than the periphery thereof (see FIG. 24).

  Incident light that has entered from the upper horizontal introduction surface 1607b travels substantially vertically upward, and is incident on another lower inclined reflection surface 1608c (not shown) disposed immediately above the upper horizontal introduction surface 1607b. . The optical path of this incident light is larger than the critical angle θ4 with respect to the normal H of the lower inclined reflecting surface 1608c, and all the energy before incident becomes reflected light, so that it is reflected almost horizontally toward the front. . Therefore, the front position of the lower inclined reflection surface 1608c, that is, the vicinity of the lower portion of the second convex portion 1606 emits light more strongly than the surrounding area (see FIG. 24).

  The light is emitted after entering the light guide distance P2 from the upper horizontal introduction surface 1607b or the lower horizontal introduction surface 1607c to the upper horizontal introduction surface 1607b or the lower inclined reflection surface 1608c, that is, the inside of the side inner lens 457 as a light guide member. The light guide distance P2 guided to the second convex portion 1606 that is the display unit is configured to be different from each other in the LEDs 283a to 283f of the right frame lamps.

  That is, as shown in FIG. 24, the lengths P2 of the light guides formed inside the side inner lens 457 are different from each other, so that the respective light emitting surfaces of the LEDs 283a to 283f of the right frame lamps Since the light guiding distances P1 + P2 to the second convex portion 1606 corresponding to the LEDs 283a to 283f of the right frame lamp are different from each other, the LEDs 283a to 283f of the right frame lamps are made to emit light with the same intensity. Even in this case, the light emission mode (for example, brightness) of each of the plurality of second convex portions 1606 changes.

  For example, as shown in FIG. 24, the length P2B of the light guide portion from the LED 283e to the upper half of the second convex portion 1606 corresponding to the LED 283e is the light emission corresponding to the LED 283f. Since the length P2C of the light guide part up to the lower half of the second convex part 1606 as the display part is shorter (P2B <P2C), the upper part of the second convex part 1606 as the light emitting display part corresponding to the LED 283e. The half part emits light more strongly than the upper half part of the second convex part 1606 which is a light emitting display part corresponding to the LED 283f.

  The length P2B of the light guide portion from the LED 283e to the upper half of the second convex portion 1606 corresponding to the LED 283e is the second light emission display portion corresponding to the LED 283f. Since the length P2D of the light guide part up to the upper half part of the half convex part 1606 ′ is shorter (P2B <P2D), the upper half part of the second convex part 1606, which is a light emitting display part corresponding to the LED 283e, is better. , Emits light more strongly than the upper half of the second semi-convex portion 1606 ′ which is a light-emitting display portion corresponding to the LED 283f.

  As described above, the lengths P2 of the light guide portions corresponding to the LEDs 283a to 283f are different from each other, so that the LEDs 283a to 283f can be changed without changing the arrangement positions of the LEDs 283a to 283f with respect to the side inner lens 457 that is a light guide member. The light guide distance from the light emitting surface of 283f to the second convex portion 1606 as the light emitting display portion corresponding to each of the LEDs 283a to 283f can be easily changed.

  Here, the light guide distance Pa1 from the light emitting surface of the LEDs 283a to 283f of each right frame lamp to the reflection on the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c, and the upper inclined reflecting surface 1612b and the lower inclined reflecting surface 1612c. The light guide distance P1 consisting of the light guide distance Pb1 to the upper horizontal introduction surface 1607b and the lower horizontal introduction surface 1607c, that is, the light guide distance that is the distance from the light emission surface of the LEDs 283a to 283f of each right frame lamp to the light introduction surface. P1 is the same in the LEDs 283a to 283f and the first recesses 1603 of each right frame lamp. For example, from the light emitting surface of each LED 283a to 283f, the upper inclined reflecting surface 1612b corresponding to each LED 283a to 283f and Different light guide distances Pa1 until the light is reflected by the lower inclined reflecting surface 1612c. It may be respectively made different light distance Pb1 from the upper inclined reflecting surfaces 1612b and the lower inclined reflecting surfaces 1612c to the upper horizontal guide surface 1607b and the lower horizontal guide surface 1607c is.

  As described above, the distance from the light emitting surface of each LED to the introduction into the side inner lens 457 as the light guide member is not only changed by the distance Pa1 in the light emitting direction (front-rear direction) of the light emitter, but also appropriately reflected Since the distance from the light emitting surface to the light introduction surface can be varied by changing the distance Pb1 in the direction (vertical direction) orthogonal to the light emitting direction via the same, the same effect can be obtained. In particular, since the direction (vertical direction) orthogonal to the light emitting direction is the longitudinal direction of the light guide member, the distance Pb1 in each light emitting display unit can be easily varied by simply changing the shape of the light guide member.

  In addition, since the degree of attenuation of light is changed by changing the separation distance between the upper inclined reflection surface 1608b and the upper auxiliary reflection surface 1613b and the separation distance between the lower inclined reflection surface 1608c and the lower auxiliary reflection surface 1613c, respectively. By doing so, the light intensity of the upper half portion and the lower half portion of the second convex portion 1606 can be made different.

  Returning to the first recess 1603, the light irradiated from the LEDs 283a to 283f of the right frame lamp is not all irradiated horizontally toward the upper and lower irradiation light reflecting surfaces 1612b and 1612c as described above. Since some light is incident on the upper horizontal introduction surface 1607b and the lower horizontal introduction surface 1607c at an angle, the light is transmitted or reflected inside the lens.

  Here, the upper edge of the upper irradiation light reflecting surface 1612b and the upper horizontal introducing surface 1607b, such as irradiation light from the LEDs 283a to 283f of the right frame lamp or reflected light reflected by the upper horizontal introduction surface 1607b, the lower horizontal guide surface 1607c, etc. Light entering the gap between the lower edge of the lower irradiation light reflecting surface 1612c and the lower horizontal introduction surface 1607c enters the vertical introduction surface 1607a and is transmitted or reflected inside the lens. The front vertical position of the vertical introduction surface 1607a, that is, the vicinity of the upper and lower portions of the first convex portion 1605 emits light more strongly than the surrounding area (see FIG. 24).

  Further, even if the light incident on the vertical introduction surface 1607a is reflected, the vertical reflection surface 1612b is disposed on the back surface side of the light, so that the reflected light is not radiated to the outside and reflected on the vertical reflection surface 1612a. Then, since the light again enters the vertical introduction surface 1607a, the vertical introduction surface 1607a becomes brighter. Further, since the vertical introduction surface 1607a is knurled, light incident from the vicinity of the upper and lower ends on the back surface side is dispersed and reflected by the uneven surface in the vertical direction. Even if the irradiation light from the LED 283a to 283f of the frame lamp is blocked, light is emitted in the vertical width direction.

  As described above, in the side inner lens 457, the first concave portion 1603 including the respective introduction surfaces 1607a to 1607c is formed in a position facing the LEDs 283a to 283f of the right frame lamp disposed on the back surface side. As a result, the vicinity of the first convex portion 1605 formed in front of the first concave portion 1603 is stronger than the surrounding area due to the light horizontally irradiated forward from the LEDs 283a to 283f of the right frame lamp. Emits light (see FIG. 24). That is, the LEDs 283a to 283f of the right frame lamp emit light, whereby the first light emitted mainly by the incident light introduced from the vertical introduction surface 1607a at the front position of each first recess 1603 on the surface of the side inner lens 457. Are formed.

  In addition, the upper and lower horizontal introduction surfaces are mainly formed by forming the second concave portions 1604 made of the respective reflective surfaces 1608a to 1608c at positions not facing the LEDs 283a to 283f of the right frame lamp arranged on the back side. The light that is transmitted from 1607b and 1607c to the inside of the side inner lens 457 and guided in the vertical direction is reflected and guided forward by the upper and lower inclined reflecting surfaces 1608b and 1608c, so that the light is guided in front of the second recess 1604. The vicinity of the second convex portion 1606 to be formed is stronger than the vicinity and emits light with substantially the same luminance as the first convex portion 1605 (see FIG. 24). That is, the LEDs 283a to 283f of the right frame lamp emit light, so that incident light introduced mainly from the upper and lower horizontal introduction surfaces 1607b and 1607c at the front position of each second recess 1604 on the surface of the side inner lens 457 is used. A second light emitting portion that emits light is formed.

  Further, an irradiation light reflecting portion 1612 made of a non-translucent member is disposed between the vertical introduction surface 1607a and the LEDs 283a to 283f of the right frame lamp, thereby blocking the back surface side of the vertical introduction surface 1607a. As a result, the light emitted from the LEDs 283a to 283f of the right frame lamp does not directly pass through the vertical introduction surface 1607a and radiate forward, so that the luminance in the first light emitting unit is moderately reduced.

  On the other hand, upper and lower inclined reflecting surfaces 1612b and 1612c are formed on the front side of the LEDs 283a to 283f of the right frame lamp, and the irradiation light of the LEDs 283a to 283f of the right frame lamp is directed to the upper and lower horizontal introduction portions 1607b and 1607c. Since the light is incident in the orthogonal direction, the irradiation light can be guided toward the second concave portion 1604 while suppressing the loss of light due to reflection as much as possible. It is effective to be guided linearly toward the upper and lower inclined reflecting surfaces 1608b and 1608c formed immediately below and directly above the portions 1607b and 1607c and to radiate outside before entering the upper and lower inclined reflecting surfaces 1608b and 1608c. Therefore, the luminance in the second light emitting portion can be increased.

  Further, since the upper and lower auxiliary reflecting surfaces 1613b and 1613c made of a non-translucent member are disposed close to the back surfaces of the upper and lower inclined reflecting surfaces 1608b and 1608c, the upper and lower inclined reflecting surfaces 1608b and 1608c are exposed to the outside. Since the emitted light is incident on the inside again, the luminance of the second light emitting unit can be increased.

  In addition, as described with reference to FIG. 21, by making the total width dimension of the upper and lower inclined reflective surfaces 1608b and 1608c substantially the same as the vertical width dimension of the vertical introduction surface 1607a, The vertical width dimension of the light emitting region when the side inner lens 457 is viewed from the front is the vertical width dimension of the vertical introduction surface 1607a and the total width dimension of the vertical width dimensions of the upper inclined reflecting surface 1608b and the lower inclined reflecting surface 1608c. Are approximately the same size, the luminance of the first light emitting unit and the second light emitting unit can be made substantially the same.

  Further, since the vertical width L4 of the vertical reflecting surface 1608a is shorter than the vertical width of the vertical introduction surface 1607a, the upper inclined reflecting surface 1608b and the lower inclined reflecting surface 1608c constituting the light emitting region are larger. Since they are not separated, the luminance of the second light emitting unit is prevented from being reduced.

  As described above, the luminance at the first convex portion 1605 (first light emitting portion) where the LEDs 283a to 283f of the right frame lamp are arranged on the back surface side is moderately reduced, and the LEDs 283a of the right frame lamp on the back surface side. The luminance at the second convex portion 1606 (second light emitting portion) where the 283f is not disposed is effectively improved, so that the first convex portion 1605 (first light emitting portion) and the second convex portion 1606 are provided. The difference in luminance from the (second light emitting unit) is as small as possible. As a result, a sense of incongruity due to a difference in luminance does not occur, and it is possible to make it appear as if the right frame LED is arranged on the back surface side of the second convex portion 1606 (second light emitting portion) to emit light. It is possible to realize a light emission effect with impact without arranging the LEDs.

  Regarding the second semi-recessed portion 1604 ′ formed at the lower end of the side inner lens 457, the above-described upper inclined reflecting surface 1608b ′ (not shown) has the same functions and effects as the upper inclined reflecting surface 1608b, and With respect to the second semi-recessed portion 1604 ′ formed at the upper end of the side inner lens 457, the above described lower inclined reflecting surface (not shown) has the same functions and effects as the lower inclined reflecting surface 1608b. And the upper end of the side inner lens 457 also appear to emit light with the right frame LED arranged.

  In addition, incident light that is obliquely incident on the vertical introduction surface 1607a, the upper horizontal introduction surface 1607b, and the lower horizontal introduction surface 1607c and is transmitted into the side inner lens 457 is a surface mainly subjected to knurling, that is, The ribs 1602L, 1602C, and 1602R are radiated to the outside from the front end surfaces and the back surface of the plate-like portion 1601. In other words, not all the incident light transmitted through the side inner lens 457 travels in the vertical direction, but there is also light that travels while being reflected by the inner surface of the lens, thereby extending the vertical direction of the side inner lens 457. Since the front end surfaces of the ribs 1602L, 1602C, and 1602R emit light uniformly in the vertical direction, the surface of the side inner lens 457 can emit light in the longitudinal direction.

  Further, light emitted from the inside of the side inner lens 457 to the outside from the back surface of the plate-like portion 1601 is reflected by the bottom wall surface 1610a disposed in proximity to the back surface and transmitted to the inside again, and inside the side inner lens 457. The light emitted from the outer surfaces of the left and right ribs 1602L and 1602R to the outside is reflected by the inclined wall surfaces 1601b and 1610c arranged close to the outside and transmitted to the inside again, thereby being guided inside the side inner lens 457. Light is less likely to be emitted to the back side, and light is more likely to be emitted forward, so that the entire area of the side inner lens 457 can be efficiently emitted.

  Next, based on FIG. 25, the structure of the top frame light emitting unit of the top frame lamp LEDs 281c to 281j among the top frame lamp LEDs 281a to 281l will be described. 25A is a cross-sectional view showing the top frame light emitting unit, and FIG. 25B is an enlarged cross-sectional view of the main part of FIG.

  As shown in FIG. 25A, the ceiling frame light emitting unit includes a lamp cover 900 made of a transparent synthetic resin material having translucency, and a plurality of ceiling frames arranged on the back surface (rear side) of the lamp cover 900. It is mainly composed of LEDs 281c to 281j of the lamp. The LEDs 281 c to 281 j of the plurality of ceiling frame lamps are arranged on the front side of the frame side IC substrate 602.

  The lamp cover 900 has an opening on the back side, and hollow bulging portions 900c to 900j each having a substantially trapezoidal cross section are continuously provided in the left-right direction. Each of the bulging portions 900c to 900j is provided so as to bulge forward corresponding to the LEDs 281c to 281j of the eight ceiling frame lamps, and has a flat front wall 901c as a light emitting display portion at the tip thereof. 901j is formed.

  From the back side of the front walls 901c to 901j, columnar light guides 902 having a predetermined length are projected rearward, and the rear ends of the respective light guides 902 A spherical introduction surface 902a into which light from the LEDs 281c to 281j is introduced is recessed. As shown in FIG. 25 (b), the lengths P4 of the respective light guides 902 are all the same, and the distance from each introduction surface 902a to the light emitting surface of the LEDs 281c to 281j of each ceiling lamp. The distances P5 are all the same.

  The LEDs 281c to 281j of the ceiling lamps are opposed to the introduction surface 902a of the light guide 902, specifically, the center point X of the LEDs 281c to 281j on the axial line Y of the columnar light guide 902. LED 281f, 281g arranged at the opposite position where is located, and the center point X with respect to the axial center line Y is separated (shifted) by a predetermined separation distance P6 or P7 in the left-right direction, that is, the direction orthogonal to the light emitting direction. And) LEDs 281c to 281e and 281h to 281f to be arranged.

  Specifically, the LEDs 281f and 281g are arranged at opposite positions where the center point X is positioned on the axis Y, and the LEDs 281d, 281h and 281j are separated from the axis Y by the distance P6 away from the center point X on the left side. The LEDs 281c, 281e, and 281i are arranged at the right separation position where the center point X with respect to the axis Y is separated to the right by the separation distance P7 (P7 <P6).

  When each of the LEDs 281c to 281j arranged in this manner emits light, light enters the light guide unit 902 from the introduction surface 902a, and reaches the front front walls 901c to 901j via the light guide unit 902, thereby emitting light. Each front wall 901c-901j as a display part will light-emit.

  The light guide distance from the light emitting surface of each of the LEDs 281c to 281j to the front walls 901c to 901j is P4 + P5 for the LEDs 281f and 281g arranged at the opposed positions, whereas the LED 281d arranged at the left separated position. , 281h, 281j is P4 + P5 + P6, and LEDs 281c, 281e, 281i arranged at the right separated positions are P4 + P5 + P7. That is, the light guide distance corresponding to the LEDs 281f and 281g arranged at the opposing positions is the shortest, and the light guide distance corresponding to the LEDs 281c, 281e and 281i arranged next to the right separated positions is short and arranged at the left separated positions. The light guide distance corresponding to the LEDs 281d, 281h, and 281j to be used is the longest.

  Accordingly, the front walls 901f and 901g corresponding to the LEDs 281f and 281g arranged at the opposed positions emit the brightest light, and then the right side of the front walls 901c, 901e and 901i corresponding to the LEDs 281c, 281e and 281i arranged at the right separated positions. Then emits brighter light, and the left side of the front walls 901d, 901h, 901j corresponding to the LEDs 281d, 281h, 281j arranged at the left separated positions is darkest.

  As described above, even when the LEDs 281c to 281j emit light under the same conditions, the light guide distances from the light emitting surfaces of the LEDs 281c to 281j to the front walls 901c to 901j are different from each other, so that at least the front surface as the light emitting display unit. The walls 901f and 901g, the front walls 901c, 901e, and 901i and the front walls 901c, 901e, and 901i have different light emission modes.

  Further, the arrangement positions of the LEDs 281c to 281j are separated by a predetermined separation distance P6 or P7 in the direction (left-right direction) in which the center point X is orthogonal to the light emitting direction with respect to the axis Y of the light guide 902. In order to change the separation distance between each LED 281c to 281j and the light introduction surface 902a by changing the light guide distance from the light emitting surface of each LED 281c to 281j to the front wall 901c to 901j by arranging (shifting). In addition, without providing a spacer or the like between the substrate 602 and each of the LEDs 281c to 281j or changing the length of the light guide portion 902, the arrangement position can be easily shifted on the mounting surface of the substrate 602. The light guide distance can be changed.

  In addition, the introduction surface 902a corresponding to each of the LEDs 281c to 281j is formed as a spherical concave portion. However, by changing the shape of the introduction surface 902a for each of the LEDs 281c to 281j, the light emitting display unit The light emission modes of the front walls 901c to 901j can be varied. In this case, for example, the light introduction rate may be changed by changing the spherical curvature or changing the shape to a shape other than the spherical shape.

  Next, based on FIGS. 26 to 30, the upper plate left side lens body and the upper plate right side that constitute the left side light emitting portion and the right side light emitting portion of the door frame provided on the left and right sides of the hitting ball supply tray 3. The structure of the lens body will be described. 26A is a plan view showing the upper plate left side lens body, FIG. 26B is a front view showing the upper plate left side lens body, and FIG. 26C shows the upper plate left side lens body. It is a right view. FIG. 27 is a cross-sectional view taken along the line AA in FIG. 28A is an enlarged cross-sectional view of the upper part of the upper plate left side lens body, and FIG. 28B is an enlarged cross-sectional view of the lower part of the upper plate left side lens body. FIG. 29 is an enlarged cross-sectional view showing a light guide state in the upper plate left side lens body. FIG. 30 is a schematic view showing a light emission state of the upper dish left side lens body. Further, the left side in FIG. 27 will be described as the front side of the upper plate left side lens body, and the right side will be described as the back side of the upper plate left side lens body.

  In FIG. 26 to FIG. 30, the light emitting part structure of the door frame right side light emitting part is substantially the same as the light emitting part structure of the door frame left side light emitting part, and has the same actions and effects. The detailed explanation is omitted.

  As shown in FIG. 26, an upper plate left side lens body 800 constituting a part of the door frame left side light emitting unit is an upper plate having LEDs 82a and 82b of the plate left side lamp as the light emitting body of the present invention on the front surface. The left side board 310L, the upper dish left side decoration 312L arranged on the front side of the upper dish left side board 310L, and the upper dish as a light guide member arranged on the left side in front of the upper dish left side decoration 312L The left clear base 313L.

  As shown in FIG. 26, the upper plate left side decoration 312L is formed so as to cover the front surface of the upper plate left side substrate 310L with a non-transparent synthetic resin material. The front plate and the back surface (entire surface) of the upper plate left side decoration 312L are plated, so that the light guided to the inside of the upper plate left clear base 313L and radiated to the back side is reflected forward. It has become. As a result, the light guided from the LEDs 82a and 82b of the dish left side lamp to the inside of the upper dish left clear base 313L can be concentrated forward without being lost due to the radiation to the back side. Reduction of the light emission amount of the base 313L can be prevented.

  As shown in FIG. 27, hollow bulging portions 802a and 802b that bulge toward the front are formed at locations corresponding to the LEDs 82a and 82b of the left and right dish left side lamps. The rear surface (back surface) of the upper plate left clear base 313L is disposed in contact with the front end surface of the bulging portion 802, and a columnar light guide to be described later is formed on the front end surfaces of the bulging portions 802a and 802b. Insertion openings 803 into which the portions 805a and 805b can be freely inserted are formed.

  The upper plate left clear base 313L is formed of a transparent synthetic resin material in a band shape with a plate material having a thickness of about 3 mm (see FIG. 27), and is attached to the front surface of the upper plate left side decoration 312L in the vertical direction. Yes. As shown in FIG. 27, cylindrical columnar light guides 805a and 805b are provided at positions corresponding to the LEDs 82a and 82b of the upper and lower dish left side lamps on the rear face 313b (back face) of the upper dish left clear base 313L. Projecting backward, and the rear end surfaces of the columnar light guide portions 805a and 805b are arranged inside the upper plate left clear base 313L as the light guide member with the irradiation light from the LEDs 82a and 82b of the plate left side lamps. Irradiation light introduction recesses 806 for constituting the substantially hemispherical irradiation light introduction surface 806a to be introduced are respectively provided. That is, the irradiation light introducing recess 806 is a recess that opens toward the back side.

  These upper and lower columnar light guides 805a and 805b are respectively inserted into the insertion opening 803 from the front surface side of the upper dish left side decoration 312L, and each irradiation light introduction surface 806a faces the LEDs 82a and 82b of each dish left side lamp. So close to each other.

  Further, incident light introduced from the irradiation light introduction surface 806a and guided to the front position of the irradiation light introduction recess 806 on the front surface 313a (front surface) of the upper clear left base 313L, that is, the position facing the irradiation light introduction recess 806. An incident light reflecting concave portion 807 is formed to constitute an incident light reflecting surface 807a that reflects the light. That is, the incident light reflecting recess 807 is a recess that opens toward the front side.

  As shown in the enlarged view in FIG. 26B, the incident light reflecting surface 807a is formed in a circular shape when viewed from the front side of the upper dish left clear base 313L, that is, when the upper dish left clear base 313L is viewed from the front side. At the same time, it is composed of a plurality of (six) reflecting surfaces having a substantially triangular shape in front view, which are equally divided at intervals of 60 degrees in the circumferential direction. In particular, as shown in FIG. 29, each reflecting surface is formed into a curved surface that bulges outward from the center point of the circle toward the circumferential direction and bulges outward in the circumferential direction. That is, the incident light reflecting recess 807 is formed in a substantially hexagonal pyramid shape that is recessed toward the center of the circle by a plurality of curved reflecting surfaces having a substantially triangular shape when viewed from the front.

  Thus, the irradiation light introduction surface 806a constituting the irradiation light introduction concave portion 806 that opens toward the back side and the incident light reflection surface 807a that constitutes the incident light reflection concave portion 807 that opens toward the front side are mutually connected. The concave lens portion is formed at a position facing the LEDs 82a and 82b of each dish left side lamp in the upper dish left clear base 313L by being configured by a concave surface that is recessed so that the central part is close.

  Further, cylindrical light-emitting portions 808a and 808b project from the periphery of the incident light reflecting recess 807 in the front surface 313a of the upper plate left clear base 313L so as to protrude forward. In other words, the incident light reflecting concave portion 807 is formed inside the cylindrical light emitting portion 807 projecting from the front surface 313a (front surface) of the upper dish left clear base 313L toward the opposite side of the dishes 82a and 82b of the dish left side lamp. Has been.

  On the outer peripheral surfaces of the cylindrical light emitting portions 808a and 808b, annular step portions 809a and 809b are formed at predetermined intervals, and the thickness of the cylindrical light emitting portions 808a and 808b is reduced by the step portions 809a and 809b. It is gradually becoming thinner toward By forming these step portions 809a and 809b, the outer circumferential surface of the cylindrical light emitting portions 808a and 808b is a ring that faces the surface orthogonal to the irradiation direction of the LEDs 82a and 82b of the dish left side lamp, that is, the front surface side. The light emitting surface is formed.

  As shown in FIG. 26 (b), the front plate 313 a of the upper clear left base 313 L has a position near the lower side of the cylindrical light emitting portion 808 a that faces in the left-right direction and is equally spaced from each other in the vertical width direction. A plurality of (four) light-emitting plates 810a (light-emitting display portions) arranged are erected forward, and at a position near the upper side of the cylindrical light-emitting portion 808b on the front surface 313a of the upper plate clear base 313L. A plurality of (four) light-emitting plates 810b (light-emitting display portions) that are arranged in the left-right direction and at equal intervals in the vertical width direction are erected forward.

  Further, as shown in FIG. 27, a knurling process is performed in the vertical direction on the back surface 313b of the upper plate left clear base 313L facing the light emitting plates 810a and 810b, and the opening angle θ3 = about 90 degrees. A notch having a triangular cross section (see FIG. 28) is formed continuously in the vertical direction so that the internal light is emitted outward. Reflecting portions 811a and 811b that diffusely reflect the light guided by the incident light reflecting surface 807a toward the front light emitting plates 810a and 810b by the plurality of concave and convex strips that are formed by the knurling and face in the left-right width direction. It is formed vertically.

  This reflection part 811a is formed in the shape of the inclined surface which inclines toward the inner side (inner side of upper plate left clear base 313L) toward the lower cylindrical light emission part 808b side from the upper cylindrical light emission part 808a side. And the light guided by the incident light reflecting surface 807a can be efficiently reflected toward the front light emitting plate 810a. Therefore, the front end surface of each light emitting plate 810a and Light can be emitted substantially uniformly from above to below between the light emitting plates 810a. The reflecting portion 811b is formed in an inclined surface shape that is inclined inward (inner side of the upper clear left base 313L) from the lower cylindrical light emitting portion 808b side toward the upper cylindrical light emitting portion 808a side. (Inclination angle θ5 = 2.5 degrees), the light guided by the incident light reflecting surface 807a can be efficiently reflected toward the front light emitting plate 810b. The light emitting plates 810b can emit light substantially uniformly from above to below.

  As described above, the reflection portion 811a is formed at a position near the lower side of the cylindrical light emitting portion 808a, so that the cylindrical light is incident on the inside of the upper clear left base 313L from the LED 82a of the dish side lamp. The position near the lower part of the light emitting part 808a (near the light emitting plate 810a) emits light, and the reflection part 811b is formed near the upper part of the cylindrical light emitting part 808b, thereby clearing the upper plate left from the LED 82b of the dish side lamp. Incident light guided inside the base 313L emits light in the vicinity of the upper part of the cylindrical light emitting unit 808b (near the light emitting plate 810b).

  As shown in FIGS. 26 (b) and 27, a cylinder having substantially the same shape as the cylindrical light emitting portion 808b is located near the lower cylindrical light emitting portion 808b on the front surface 313a of the upper clear left base 313L. A light emitting portion 808c is formed. In addition, annular step portions 809a and 809b are formed on the outer peripheral surface of the cylindrical light emitting portion 808c, and the LED 82a of the dish left side lamp is formed on the outer peripheral surface of the cylindrical light emitting portions 808a and 808b by these step portions 809a and 809b. , 82b, a surface perpendicular to the irradiation direction, that is, an annular light emitting surface facing the front surface side is formed. Also, a cylindrical recess 807b is formed inside, and the bottom surface of the recess 807b is a flat circular light emitting surface 807c that emits light by reflected light from a lower reflecting portion 812 described later.

  The circular light emitting surface 807c formed on the bottom surface of the concave portion 807b may be subjected to knurling or the like so as to diffuse light. By doing so, the amount of light emitted from the circular light emitting surface 807c increases. The production effect is improved by the diffusion of light.

  In addition, at the position facing the cylindrical light emitting portion 808c on the back surface 313b of the upper clear left base 313L, a concave-convex shape is given in the vertical direction, and a triangular pyramid shape having an opening angle θ3 = about 109.5 degrees. The convex portions are formed continuously in the vertical and horizontal directions, and the internal light is radiated outward. The plurality of uneven portions formed by the uneven processing form a lower reflecting portion 812 that diffusely reflects light guided by the incident light reflecting surface 807a toward the front cylindrical light emitting portion 808c.

  As described above, the lower reflection portion 812 is formed near the lower portion of the cylindrical light emitting portion 808b, so that the incident light guided inside the upper left clear base 313L from the LEDs 82a and 82b of the left pan side lamps. Accordingly, the cylindrical light emitting portion 808c formed near the lower position of the cylindrical light emitting portion 808b emits light. That is, the second light emitting unit is formed by the reflected light from the lower reflecting unit 812.

  Further, a concave groove 813 having a concave cross section (see FIG. 26C) that opens to the front side is formed on the front surface 313a of the upper plate left clear base 313L from the upper right edge of the upper plate left clear base 313L. It extends in the left-right direction over the cylindrical light emitting unit 808a, passes through the light emitting plates 810a and 810b from the cylindrical light emitting unit 808a, and extends in the vertical direction over the cylindrical light emitting units 808b and 808c. It extends from the portion 808c to the lower right edge of the upper plate left clear base 313L, and a streak-like light emitting portion is formed on the surface side of the upper plate left clear base 313L.

  Further, as described above, since the front surface of the upper dish left side decoration 312L is plated, the incident light guided inside the upper dish left clear base 313L from the LEDs 82a and 82b of the dish left side lamp. Radiates from the back side 313b side of the upper plate left clear base 313L, but the emitted light is reflected forward by the front surface of the upper plate left side ornament 312L, and is emitted to the back side of the upper plate left side ornament 312L. This prevents the amount of light emitted from the front side of the upper clear left base 313L from being reduced.

  As described above, the upper plate left clear base 313L in the present embodiment has a lens shape imitating a circuit board, the cylindrical light emitting portions 808a to 808c are light emitting portions, the light emitting plates 810a and 810b are heat sinks, and groove grooves. Reference numeral 813 denotes a printed wiring pattern, which appears to emit light.

  Next, a detailed structure of the upper plate left clear base 313L configured as described above and the LEDs 82a and 82b of the plate left side lamp and the arrangement relationship between them will be described. In addition, the dimension (a unit is mm) of each site | part is described in FIGS. The dimensions are rounded off to the second decimal place.

  The diameter of the incident light reflecting surface 807a of the incident light reflecting recess 807 having a circular shape in front view is the same as the inner diameter of the cylindrical light emitting portions 808a and 808b. As shown in FIG. 29, the incident light reflecting surface 807a and the circular light emitting surface 807c of the cylindrical light emitting portion 808c are embedded inside the upper plate left clear base 313L, that is, inside the upper plate left clear base 313L. In particular, the incident light reflecting surface 807a of each of the cylindrical light emitting portions 808a and 808b extends beyond the back surface 313b of the upper clear left base 313L, and the columnar light guide portions 805a and 805b. It is formed to a depth enough to enter inside. Specifically, the central portions of the incident light reflecting surfaces 807a of the cylindrical light emitting portions 808a and 808b are placed in the columnar light guide portions 805a and 805b from the back surface 313b of the upper plate clear base 313L as shown in FIG. About 0.6 mm has entered.

  In this way, the incident light reflecting surface 807a can be provided as close as possible to the irradiation light introduction surface 806a, so that the incident light from the irradiation light introduction surface 806a is positioned in the vicinity thereof before being diffused to the surroundings. Then, the light is emitted from the incident light reflecting surface 807a to the outside and emitted, and the light is reflected inside and guided to the surroundings, so that the adjacent light emitting plates 810a and 810b and the cylindrical light emitting portion 808c can emit light.

  As shown in the enlarged view in FIG. 26 (b) and FIG. 28 (a), the four light emitting plates 810a have a thickness of about 1 mm, a horizontal width of about 17.5 mm, a vertical width of about 8.5 mm, and front and rear. The width dimension is about 6 mm, and the separation width dimension between the light emitting plates 810a is about 1.5 mm. In addition, the surface between each light emission board 810a protrudes ahead about 0.5 mm rather than the front surface 313a of the upper plate left clear base 313L.

  In addition, as shown in the enlarged view in FIG. 26B and FIG. 29, the four light emitting plates 810b have a thickness of about 2 mm, a horizontal width of about 17.5 mm, a vertical width of about 14 mm, and a front and rear width of about The distance between the light emitting plates 810b is about 2 mm. In addition, the surface between each light emission board 810b protrudes ahead about 0.5 mm rather than the front surface 313a of the upper plate left clear base 313L.

  As described above, the light emitting plate 810a constituting the light emitting display unit corresponding to the LED 82a of the dish side lamp is composed of four light emitting plates having a thickness of 1 mm, and constitutes the light emitting display unit corresponding to the LED 82b of the dish side lamp. The light emitting plate 810b is composed of four light emitting plates having a thickness of 2 mm thicker than the light emitting plate 810a.

  Here, the positional relationship between the LEDs 82a and 82b of the dish left side lamp and the light emitting plates 810a and 810b will be described.

  As shown in FIG. 28A, the light guide distance from the light emitting surface of the dish side lamp LED 82a to the light emitting plate 810a corresponding to the LED 82a of the dish side lamp is the light guide distance of the LED 82a of the dish side lamp. The distance P10 from the light emitting surface to the irradiation light introduction surface 806a and the light guide distances Pa11 to Pd11 from the irradiation light introduction surface 806a to the vertical center position of each light emitting plate of the light emitting plate 801a (P10 + Pa11, P10 + Pb11, P10 + Pc11). , P10 + Pd11).

  Further, the light guide distance from the light emitting surface of the LED 82b of the dish side lamp to the light emitting plate 810b as the light emitting display section corresponding to the LED 82b of the dish side lamp is the light emission of the LED 82b of the dish side lamp as shown in FIG. A distance P10 from the surface to the irradiation light introduction surface 806a and a light guide distance Pa12 to Pc12 from the irradiation light introduction surface 806a to the vertical center position of each light emitting plate of the light emitting plate 801b (P10 + Pa12, P10 + Pb12, P10 + Pc12). .

  That is, in the LEDs 82a and 82b of the dish left side lamp, the distance P10 from the light emitting surface of the LEDs 82a and 82b of each dish left side lamp to the irradiation light introducing surface 806a and the LEDs on the light emitting plates 801a and 801b from the irradiation light introducing surface 806a. The light guide distances Pa11 and Pa12 to the nearest light emitting plate are the same (P10 = P10, Pa11 = Pa12), but the light emitting plates 801a and 801b have different thicknesses and separation widths, so the irradiation light The light guide distances Pb11 to Pd11, Pb12, and Pc12 from the introduction surface 806a to the light emitting plates 801a and 801b are different from each other.

  Next, the light emission mode of the upper left clear base 313L will be described mainly based on FIG. 29 and FIG. In FIG. 30, a region that mainly emits light is shown in white, and a region that hardly emits light is shown in black.

  Here, the irradiation light introduction surface 806a and the incident light reflection surface 807a are formed so as to be recessed inward as described above, and the central portion constitutes a so-called concave lens portion thinner than the periphery. Since the parallel rays incident parallel to the axis are diffused by passing through the lens, the irradiation light from the LEDs 82a and 82b of the dish left side lamp can be effectively diffused in the upper dish left clear base 313L.

  Specifically, with reference to FIG. 29, the light is supplied to the upper plate left clear base 313L from the irradiation light introduction recesses 806 of the columnar light guides 805a and 805b. The light irradiated substantially horizontally from the LEDs 82a and 82b of the dish left side lamp toward the front is irradiated onto the irradiation light introduction surface 806a having a substantially hemispherical shape, as shown by a plurality of arrows in the figure, Spreads vertically and horizontally. Part of the light that has reached the front incident light reflection surface 807a is transmitted through the incident light reflection surface 807a and radiated to the outside, that is, forward, so that the incident light reflection surface 807a becomes brighter (see FIG. 30).

  That is, the area of each incident light reflecting surface 807a formed on the front surface 313a of the upper dish left clear base 313L at the position facing the LEDs 82a and 82b of each dish left side lamp is formed as the first light emitting unit.

  In addition, since the incident light reflecting surface 807a is formed by six reflecting surfaces facing in different directions, light is diffused and emitted in multiple directions, so that the light emission mode is complicated, The decorative effect is improved. In the present embodiment, the incident light reflecting surface 807a is formed by a plurality of reflecting surfaces facing different directions, but may be formed by one reflecting surface such as a hemispherical shape.

  Part of the light introduced from the irradiation light introduction surface 806a and diffused around the incident light reflection surface 807a is guided into the cylindrical light emitting portions 808a and 808b. In this way, part of the light guided toward the tip end portions of the cylindrical light emitting portions 808a and 808b is mainly on the surface orthogonal to the irradiation direction of the LEDs 82a and 82b of the dish left side lamp, that is, the front side. Since the light is emitted from an annular light emitting surface formed by the leading end surface and the step portions 809a and 809b, the cylindrical light emitting portions 808a and 808b appear to emit light in a ring shape (see FIG. 30).

  Further, a part of the light introduced from the irradiation light introduction surface 806a and reaching the incident light reflection surface 807a is reflected by the incident light reflection surface 807a in the vertical and horizontal directions, that is, in the inner direction of the upper clear left base 313L. Be guided. For example, a part of the light that is irregularly reflected by the lower reflecting portion 812 provided near the lower portion of the incident light reflecting surface 807a and guided toward the front cylindrical light emitting portion 808c is a circular light emitting surface 807c or a cylindrical shape. Since the light is emitted from the front end surface of the light emitting portion 808c and the annular light emitting surface formed by the step portions 809a and 809b, the entire tubular light emitting portion 808c appears to emit light with a slightly weaker amount of light than the tubular light emitting portion 808b ( (See FIG. 30).

  Further, the light is reflected from the incident light introducing surface 806a of the cylindrical light emitting portion 808a by the incident light reflecting surface 807a, diffusely reflected by the reflecting portion 811a provided near the lower portion of the incident light reflecting surface 807a, and the front light emitting plate 810a. A part of the light guided toward the surface is emitted from a surface orthogonal to the irradiation direction of the LED 82a of the dish side lamp, that is, from a front end surface of the light emitting plate 810a facing the front surface side or a clearance surface between the light emitting plates 810a. For this reason, the plurality of light emitting plates 810a and the entire gaps between them appear to emit light with a slightly weaker amount of light than the cylindrical light emitting portion 808a (see FIG. 30).

  Further, the light is reflected from the incident light introducing surface 806a of the cylindrical light emitting portion 808b by the incident light reflecting surface 807a, diffusely reflected by the reflecting portion 811b provided near the upper portion of the incident light reflecting surface 807a, and the front light emitting plate 810b. A part of the light guided toward the surface is emitted from a surface orthogonal to the irradiation direction of the LED 82b of the dish side lamp, that is, from a front end surface of the light emitting plate 810b facing the front surface or a clearance surface between the light emitting plates 810b. Therefore, the plurality of light emitting plates 810b and the entire gaps between them appear to emit light with a slightly weaker amount of light than the cylindrical light emitting portion 808b (see FIG. 30).

  Further, as described above, in the LEDs 82a and 82b of the dish left side lamps, the distance P10 from the light emitting surfaces of the LEDs 82a and 82b of the dish left side lamps to the irradiation light introducing surface 806a and the light emitting plate 801a from the irradiation light introducing surface 806a. , 801b have the same light guide distances Pa11, Pa12 to the light emitting plate closest to the LED (P10 = P10, Pa11 = Pa12), but the thickness and the separation width of each light emitting plate 801a, 801b are respectively Therefore, the light guide distances Pb11 to Pd11, Pb12, and Pc12 from the irradiation light introduction surface 806a to the light emitting plates 801a and 801b are different from each other.

  In this way, the light emitting display section corresponding to one LED 82a, 82b is composed of the same number of light emitting plates 801a, 801b, and the thicknesses and separation widths of these light emitting plates are different between the LEDs 82a, 82b. Thus, even when the LEDs 82a and 82b of the left and right side lamps emit light with the same intensity, the light emission modes (for example, brightness and the like) of the respective light emitting plates 801a and 801b change.

  Specifically, as shown in FIG. 30, the light emitting plates on the side of the light emitting plates 801a and 801b that are closer to the LEDs 82a and 82b of the dish left side lamp emit strong light and become weaker as they move away, but the light emitting plate 801a. Since the light emitting plate 801b has a wider wall thickness and separation distance, and the light guide distance from the LED 82b of the dish side lamp becomes longer, the light emitting plate closest to the LED 82b of the dish side lamp and the farthest light emitting plate Since the difference in brightness with the light emitting plate is increased, the light emitting modes of the light emitting plate 801a and the light emitting plate 801b are different.

  Thus, in order to change the distance between the LEDs 82a and 82b of the dish left side lamp and the irradiation light introduction surface 806a, a spacer or the like is provided between the substrate 310L and the LEDs 82a and 82b of the dish left side lamp, or The light guide distance can be easily changed without changing the length of the light guide.

  Further, the irradiation light introduction surface 806a corresponding to the LEDs 82a and 82b of the dish left side lamp was formed as a spherical recess, but the shape of the irradiation light introduction surface 806a is made different for each LED 82a and 82b. In addition, the light emitting modes of the light emitting plate 801a and the light emitting plate 801b as the light emitting display portions can be made different. In this case, for example, the light introduction rate may be changed by changing the spherical curvature or changing the shape to a shape other than the spherical shape.

  Further, the light emitting plate 801a and the light emitting plate 801b as the respective light emitting display portions can be also obtained by making the shape, inclination angle, etc. of the incident light reflecting surface 807a corresponding to the LEDs 82a, 82b of the dish left side lamp different for each LED 82a, 82b. The light emission mode can be made different.

  Further, a part of the light reflected by the incident light reflecting surface 807a and guided to the inner direction of the upper clear left base 313L is radiated through the groove 813 so that a streak of light can be seen. It will be.

  Further, in the upper plate left side lens body 800, as a light emitting display unit provided on the front surface of the upper plate left clear base 313L as a light guide member, the left and right directions are equally spaced from each other in the vertical width direction. A plurality of light emitting plates 810a and 810b that protrude every other time have been applied. However, as shown in FIG. 31, for example, such a light emitting display unit can be seen from the LEDs 82a and 82b of the dish left side lamp. There may be a plurality of slit-like light emitting grooves 1810a, 1810b or the like recessed in the light guide path for guiding the light introduced into the clear base 313L to the light emitting display unit, and the light emitting grooves 1810a, 1810b The width dimensions P13 and P14 may be different from each other (P13 ≠ P14).

  In this case, the light introduced from the LEDs 82a and 82b into the upper clear left base 313L via the irradiation light introduction surface 806a, reflected by the incident light reflection surface 807a, and guided toward the light emitting grooves 1810a and 1810b, As indicated by the arrows in the figure, the light travels through the inner side surfaces of the light emitting grooves 1810a and 1810b that face in the direction orthogonal to the light guide direction. As a result, the light is attenuated each time it passes through each light emitting groove 1810a, 1810b. Therefore, the one that is farther from the light emitting portions 1810c, 1810d formed between the light emitting grooves than the one near the LEDs 82a, 82b gradually. The light is getting weaker.

  In addition, the separation width dimension P13 of each light emitting groove 1810a is larger than the separation width dimension P14 of each light emitting groove 1810b, and thus the distance that the light emitting groove 1810b passes through each groove than the light emitting groove 1810a. Becomes larger (P13 <P14), and the light attenuation rate also becomes larger. Therefore, the degree of light weakening as the distance from the LED increases in the light emitting portion 1810d than in the light emitting portion 1810c.

  As described above, in the upper plate left side lens body 800, the light emitting plates 810a and 810b corresponding to the LEDs 82a and 82b of the plate left side lamp are made different from each other in the distance between the light emitting plates. The distance between the LEDs 82a and 82b and the light introduction surface 806 can be reduced by changing the light guide distance from the light emitting surfaces of the LEDs 82a and 82b of the dish left side lamp to the light emitting plates 810a and 810b corresponding to the LEDs 82a and 82b. In order to change each, a spacer or the like is provided between the upper plate left side substrate 310L and the LEDs 82a and 82b, or the lengths of the light guide portions Pa11 to Pd11 and Pa12 to Pd12 are not changed. Thickness and separation distance between the light emitting plates 810a and 810b projecting from the front surface of the upper clear left base 313L It can be changed easily guided distance by changing a, thereby to vary the light emitting mode of the light emitting plate 810a and the light emitting plate 810b.

  Further, the irradiation light introduction surface 806a is formed in the irradiation light introduction concave portion 806 on the back surface of the upper dish left clear base 313L as the light guide member, so that the irradiation from the LEDs 82a and 82b of the dish left side lamp as the light emitter is performed. Since light can be reliably introduced into the upper clear left base 313L without diffusing light to the surroundings, the incident light reflecting surface 807a on the upper clear left base 313L can effectively emit light. At the same time, since a part of the incident light introduced is guided to the periphery inside the upper dish left clear base 313L by the incident light reflecting surface 807a, the LEDs 82a and 82b of the dish left side lamp and the irradiation light introducing recess 806 are provided. A part of the irradiation light from the LEDs 82a and 82b of the dish left side lamp is separated and the back of the upper dish left clear base 313L is separated. Without or directly irradiated 13b, and illumination light introducing recesses 806 and its peripheral region in Uesarahidari clear base 313L, it can emit light over a wide range within the Uesarahidari clear base 313L.

  That is, since the concave lens portion is formed by the spherical irradiation light introduction surface 806a and the incident light reflection surface 807a at a position facing the LEDs 82a and 82b of the left plate side lamp in the upper left plate clear base 313L, the left plate side Since the light emitted from the LEDs 82a and 82b of the lamp can be effectively diffused inside the upper clear left base 313L, it is formed at the position of the upper clear left base 313L opposite to the LEDs 82a and 82b of the left dish side lamp. The incident light reflecting surface 807a, that is, the first light emitting portion can be caused to emit light, and the periphery of the upper left counter clear base 313L facing the LEDs 82a and 82b of the dish left side lamp can emit light over a wide range. it can.

  In particular, in order to brighten the periphery of the LEDs 82a and 82b of the dish left side lamp, the irradiation light can be increased without arranging the LEDs 82a and 82b of the dish left side lamp apart from the back surface 313b of the upper dish left clear base 313L. By diffusing inside the dish left clear base 313L and being guided to the surroundings, the irradiation light introduction surface 806a is disposed close to the LEDs 82a and 82b of the dish left side lamp, and thereby the entire upper dish left side lens body 800 is arranged. Since it can be made thin, the degree of freedom in design is improved.

  Furthermore, since the irradiation light introduction surface 806a can be disposed close to the LEDs 82a and 82b of the dish left side lamp, the irradiation light from the LEDs 82a and 82b of the dish left side lamp reaches the irradiation light introduction surface 806a. Therefore, it is possible to suppress the loss of the light amount due to the diffusion to the surroundings as much as possible.

  Further, the irradiation light introducing recess 806 is formed on the end surfaces of the columnar light guides 805a and 805b projecting from the back surface 313b of the upper dish left clear base 313L toward the LEDs 82a and 82b of the dish left side lamp. The irradiation light introduction surface 806a can be brought as close as possible to the LEDs 82a and 82b of the dish left side lamps arranged on the back side without increasing the overall thickness of the upper clear left base 313L. Can be efficiently guided into the upper clear left base 313L.

  The incident light reflecting recess 807 is formed on the inner side of the cylindrical light emitting portions 808a and 808b projecting from the front surface 313a of the upper dish left clear base 313L toward the opposite side to the LEDs 82a and 82b of the dish left side lamp. As a result, the light emitted to the outside from the incident light reflecting surface 807a can be efficiently reflected toward the front by being reflected on the inner peripheral surfaces of the cylindrical light emitting portions 808a and 808b without diffusing to the surroundings. .

  Further, the incident light reflecting surface 806a is formed on the inner side of the front surface 313a of the upper clear left base 313L, thereby effectively improving the guiding effect inside the reflected light by the incident light reflecting surface 806a. Can do.

  Further, the upper reflecting portion 811 is formed at a position apart from the irradiation light introducing recess 806 on the back surface 313b of the upper clear left base 313L, and reflects the incident light introduced and guided from the irradiation light introducing surface 806a toward the surface side. In addition, the LED 82a, 82b of the dish left side lamp is emitted from the irradiation light introduction surface 806a at the front position of the irradiation light introduction recess 807 on the front surface 313a of the upper dish left clear base 313L. The first light emitting portion that emits light by the incident light is formed, and is reflected by the incident light reflecting surface 807a at the front positions of the upper reflecting portion 811 and the lower reflecting portion 812 on the front surface 313a of the upper dish left clear base 313L. By forming a second light emitting part that emits light by reflected light, the back of the upper clear left base 313L In this case, the irradiation light introduction concave portion 806 is provided at the position facing the LEDs 82a and 82b of the dish left side lamp in the above, so that the irradiation light from the LEDs 82a and 82b of the dish left side lamp is not only guided toward the surface side. , A part of the irradiation light is introduced into the upper plate left clear base 313L from the irradiation light introduction surface 806a and is easily guided toward the upper reflection portion 811 and the lower reflection portion 812, and the upper reflection portion 811 and the lower reflection portion 811 Since the amount of reflected light reflected toward the front surface side by the reflecting portion 812 increases, not only the first light emitting portion in which the LEDs 82a and 82b of the dish left side lamp are arranged on the back surface side, but also the dish left side lamp The LEDs 82a and 82b can be made to emit light by the second light emitting part, so the number of LEDs 82a and 82b of the dish left side lamp is increased. It is possible to increase the light emitting unit without the.

  Further, a light emitting plate 810 is formed in front of the upper reflecting portion 811, and a cylindrical light emitting portion 808c is formed in front of the lower reflecting portion 812, so that the upper reflecting portion 811 and the lower reflecting portion 812 are formed. The second light-emitting section in which the LEDs 82a and 82b of the dish left side lamp are not disposed can be effectively caused to emit light by the reflected light.

  Further, the cylindrical light emitting portions 808a and 808b projecting from the front surface 313a of the upper plate left clear base 313L toward the opposite side of the LEDs 82a and 82b of the plate left side lamp emit light, so that the upper plate left clear base 313L The position ahead of the front surface 313a emits light, and the light can be given a sense of depth, and the visibility of light from the side of the pachinko machine 1 is improved.

  In particular, the door frame left side light emitting part and the door frame left frame light emitting part are positioned below the viewpoint of the player who sits down and plays a game, and therefore are cylindrical based on the occurrence of a predetermined error. By emitting light from the light emitting units 808a and 808b, it becomes easier for a player, a shop clerk, or the like to notice light emission based on an error than when the front surface 313a of the upper clear left base 313L emits light in a planar shape.

  Further, the configuration of the concave lens shape such as the irradiation light introduction concave portion 806 and the incident light reflection concave portion 807 in the upper plate left clear base 313L is not limited to the upper plate left clear base 313L but, for example, the upper left clear base 455a and the upper right clear base 455b. It can also be applied to other lens units such as the lower left clear base 456a and the lower right clear base 456b.

  Next, the operation of the gaming machine will be described. FIG. 32 is a flowchart showing main processing executed by the game control microcomputer 560 on the main board 31. When power is supplied to the gaming machine and power supply is started, the input level of the reset terminal to which the reset signal is input becomes high level, and the gaming control microcomputer 560 (specifically, the CPU 56) After executing the security check process, which is a process for confirming whether the contents of the program are valid, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). After initialization of the built-in device (CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM is accessible (Step S5). In interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is This mode indicates an interrupt address.

  Next, the CPU 56 checks the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port (step S6). When the ON is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15, including S44 and S45).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process.

  After confirming that the power supply stop process has been performed, the CPU 56 performs data check of the backup RAM area (step S8). In this embodiment, a parity check is performed as a data check. Therefore, in step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power outage or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 restores the game state restoration process (steps S41 to S43) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for areas that may be initialized among the work areas is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain. The part that should not be initialized is, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, probability variation flag, time reduction flag, etc.), and the area where the output state of the output port is saved (output port buffer) ), A portion in which data indicating the number of unpaid prize balls is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). Then, the process proceeds to step S14.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing in steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, and a payout stop An initial value is set to a flag such as a flag for selectively performing processing according to the control state.

  Further, the CPU 56 initializes a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed an initialization process). Is also transmitted to the sub-board (step S13). For example, when the initialization control microcomputer 100 receives the initialization designation command, the variable display device 9 performs screen display for informing that the control of the gaming machine has been initialized, that is, initialization notification.

  Further, the CPU 56 sets an abnormality notification prohibition flag (step S44) and sets a value corresponding to the prohibition period value in the prohibition period timer (step S45). The prohibition period value is a value indicating a period during which an abnormal winning notification described later is prohibited. The abnormality notification prohibition flag is a flag indicating that notification of an abnormal winning is prohibited, and is maintained in the set state until the prohibition period timer times out. Therefore, the start of the abnormal winning notification is prohibited for a predetermined period after the initialization notification is started in the variable display device 9.

  Further, the CPU 56 executes random number circuit setting processing for initial setting of the random number circuit (step S14). For example, the CPU 56 performs setting according to the random number circuit setting program so as to cause the random number circuit to update the value of the random R. In the random number circuit setting process, the CPU 56 also executes a random number circuit confirmation process for confirming the state of the random number circuit. In the random number circuit confirmation process, the CPU 56 monitors a random number confirmation signal output from the random number circuit for a predetermined time. The random number confirmation signal is ON when the clock signal generation circuit built in the random number circuit normally outputs the internal clock signal, and otherwise (for example, when the level of the internal clock signal decreases) Will be off). If the CPU 56 detects the OFF state of the random number confirmation signal continuously for a predetermined time, the CPU 56 determines that an abnormality has occurred in the random number circuit built in the game control microcomputer 560 and notifies the random circuit error of the main board 31. A process of transmitting a random number circuit error designation command for designating to the sub-board is executed. If the OFF state of the random number confirmation signal is not detected continuously for a predetermined time, the CPU 56 determines that the random number circuit is operating normally, and proceeds to step S15 as it is.

  In step S15, the CPU 56 sets a CTC register built in the game control microcomputer 560 so that a timer interrupt is periodically generated every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When executing the display random number update process and the initial value random number update process, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process of updating the count value of the counter for generating the initial value random number. In this embodiment, the initial value random number is an initial count value such as a counter for generating a random number for determining whether or not to win a normal symbol (ordinary random number generation counter for normal symbol determination). It is a random number for determining the value. A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 controls game devices such as a variable display device, a variable winning ball device, a ball payout device, etc. provided in the game machine itself. In the process of transmitting a command signal to be controlled by another microcomputer, or a game machine control process), the count value of the random number for determination per normal symbol is one round (the random number for determination per normal symbol is taken). When the value is incremented by the number of values between the minimum value and the maximum value of the possible values), an initial value is set in the counter.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process in steps S20 to S36 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output, for example, when a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the input driver circuit 58, These state determinations are performed (switch processing: step S21).

  In addition, the CPU 56 performs a process for notifying an abnormal winning when it detects that a game ball has won a prize at a time other than the regular time (step S23: abnormal winning notifying process).

  Next, processing for updating the count value of each counter for generating random numbers for determination such as random numbers for determining jackpot symbols used for game control is performed (determination random number update processing: step S24). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S25 and S26).

  Each random number is used as follows. (1) Random 1: Determine a special symbol's off symbol (stop symbol) (for determining a symbol of discontinuity) (2) Random 2: Determine a special symbol's stop symbol when generating a big jackpot (for determining a big symbol) (3) Random 3: Determines the variation pattern (variation time) of the special symbol (for variation pattern determination) (4) Random 4: Determines whether or not to generate a hit based on the normal symbol (for determination per normal symbol) (5) Random 5: An initial value of random 4 is determined (for determining a random 4 initial value).

  In step S24 in the game control process shown in FIG. 33, the game control microcomputer 560 uses a counter for generating the jackpot symbol determination random number (2) and the random number for determination per regular symbol (4). Count up (add 1). That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may make it use random numbers other than the random number of said (1)-(5). In this embodiment, the big hit determination random number is a random number generated by the hardware (random number circuit) built in the game control microcomputer 560. However, the big hit determination random number is generated by the game control microcomputer 560 as the big hit determination random number. Software random numbers generated based on a program may be used.

  Further, the CPU 56 performs special symbol process processing (step S27). In the special symbol process, the corresponding symbol is executed in accordance with a special symbol process flag for controlling the special symbol display 8 and the special winning award in a predetermined order. The CPU 56 updates the value of the special symbol process flag according to the gaming state.

  Next, normal symbol process processing is performed (step S28). In the normal symbol process, the CPU 56 executes a corresponding process according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S29). In this embodiment, in step S29, the game control microcomputer 560 causes the MODE data or EXT data (MODE data to which the addresses of the transmission destination serial-parallel conversion ICs 611 to 619 are added) to form the effect control command. Alternatively, transmission control is performed by adding header data, mark bits, and end bits to (EXT data). The effect control command is converted into serial data by the serial output circuit 78 and transmitted to the effect control board 80 via the relay board 77.

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, starting information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 performs a prize ball process for setting the number of prize balls based on detection signals of the first start port switch 13a, the second start port switch 14a, the count switch 23 and the winning port switches 29a, 30a, 33a, and 39a. Execute (Step S31). Specifically, payout control is performed in response to detection of a winning based on one of the first starting port switch 13a, the second starting port switch 14a, the count switch 23 and the winning port switches 29a, 30a, 33a, 39a being turned on. A payout control command (award ball number signal) indicating the number of winning balls is output to a payout control microcomputer mounted on the substrate 37. The payout control microcomputer drives the ball payout device 97 in accordance with a payout control command indicating the number of winning balls. In the prize ball process, a process for determining whether or not a prize ball error has occurred is also performed. For example, when there is a discrepancy between the set value of the number of prize balls and the actual number of payouts, the CPU 56 determines that a prize ball error has occurred, and causes the effect control microcomputer 100 mounted on the effect control board 80 to Control is performed to transmit a prize ball error notification designation command designating notification of occurrence of a prize ball error.

  Further, the CPU 56 executes an error detection process based on the detection signal from the full switch, the ball break switch, and the door opening sensor 155 (step S32). Specifically, a full tank error notification designation command for designating notification to the effect control microcomputer 100 mounted on the effect control board 80 that a full tank error has occurred in response to the detection signal of the full tank switch. Send. In addition, in response to a detection signal from the ball-out switch, a ball-out error notification designation command for designating notification to the effect control microcomputer 100 mounted on the effect control board 80 that a ball-out error has occurred. Send. In response to the detection signal of the door opening sensor 155, a door opening error notification designation command for designating that the door opening error has occurred is transmitted to the effect control microcomputer 100 mounted on the effect control board 80. To do.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S33: output process).

  Further, the CPU 56 performs special symbol display control processing for setting special symbol display control data for effect display of the special symbol in the output buffer for setting the special symbol display control data according to the value of the special symbol process flag ( Step S34). For example, if the variation speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 performs variable display of the special symbol on the special symbol display 8 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in an output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S35). For example, when the start flag for normal symbol variation is set, the CPU 56 switches the display state (“◯” and “×”) for the normal symbol variation rate every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Thereafter, the interrupt permission state is set (step S36), and the process ends.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes in steps S21 to S35 (excluding step S30) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  The big hit determination table includes a normal big hit determination table (not shown) used in a normal state (a gaming state that is not a probability change state) and a probability change big hit determination table (not shown) used in a probability change state. When the value of the random R matches any one of the jackpot determination values, the CPU 56 determines that the jackpot is to be made. The CPU 56 extracts the count value of the random number circuit at a predetermined time and uses the extracted value as the jackpot determination random number value. When the jackpot determination random number value matches the jackpot determination value, the big hit (probability change) It is decided to be a big hit or a normal big hit).

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. Usually, the big hit is a big hit that shifts the gaming state after the big hit game to a state that is not a probable change state. Note that the number of rounds in the case of a probable big hit and the normal big hit is larger than that in the case of a small hit and a sudden probable big hit, for example, 15 rounds.

  The small hit is a big hit in which the number of times of opening of the big winning opening is allowed up to two in the big hit gaming state. Note that when the small hit game ends, the gaming state does not shift to the probable change state. Suddenly probable jackpot is a jackpot where the number of times the big prize opening is allowed is 2 in the big hit gaming state, but the opening time of the big prize opening is extremely short, and the gaming state after the big hit game is shifted to the probable state It ’s a big hit. That is, in this embodiment, the number of rounds is the same between the sudden probability big hit and the small hit.

  In addition, in the big hit game of sudden probability change big hit, the number of rounds is smaller than that in the case of normal big hit and probability variable big hit, and the allowance opening allowance time of each round (for example, 29 seconds in the case of normal big hit and probability variable big hit) On the other hand, 0.5 seconds) is shorter than the case of the normal big hit and the probability variation big hit, but only the number of rounds may be reduced, or only the allowance opening allowance time may be shortened.

  As will be described later, in this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). “EXT” indicates the second byte of EXT data in the effect control command having a two-byte structure. “Variation time” indicates the variation time of the special symbol (variable display period of identification information).

  “Normal fluctuation” is a fluctuation pattern without a reach mode. “Normal fluctuation / shortening” is a fluctuation pattern without a reach mode and a fluctuation time shorter than “normal fluctuation”. “Normal reach” is a variation pattern that is accompanied by a reach mode but whose display result (stop symbol) does not become a big hit symbol. The “super reach” is a variation pattern having a reach manner different from “normal reach”, for example, a variation pattern having a reach manner by moving images.

  In addition, there are a fluctuation pattern that is selected only for a normal big hit, a fluctuation pattern that is selected only for a probable big hit, and a fluctuation pattern that can be selected for both a normal big hit and a probable big hit. In the short-time state, the fluctuation patterns of “normal fluctuation / shortening”, “reach A / shortening”, “reach B / shortening”, and “reach C / shortening” are selected. In the non-time-short state, other variation patterns are selected. However, the variation pattern of “reach A / accuracy” is used in both the short-time state and the non-short-time state.

  In this embodiment, when a big hit occurs and the big hit game ends, the gaming state becomes a short-time state thereafter until the execution of 100 special symbol changes (variable display) is completed. In addition, when variable display of a special symbol is started when variable display is finished, when it is decided to change to a probable change state when the special symbol variable display is started, the game state is changed into a probable change state when the big hit game is ended. To be migrated. If the gaming state at that time is a probability variation state, the probability variation state is continued.

  After the transition to the probability changing state, the state of the probability changing state is short and the state is short until the execution of the variation (variable display) of 100 special symbols is completed. In addition, in the non-probability change state after the big hit game is over, the game state is changed to the normal state (the game state that is not the probability change state and not the short-time state) when the execution of 100 special symbol changes (variable display) is completed. Transition.

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. In this embodiment, the effect control command is converted from parallel data to serial data by the serial output circuit 78 and transmitted from the main board 31 to the effect control board 80 via the relay board 77.

  In this embodiment, the effect control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  When transmitting the effect control command, the game control microcomputer 560 (specifically, the CPU 56) first adds the header data, the mark bit, and the end bit to the MODE data (MODE data to which the address is added) and transmits it. Take control. Then, the serial output circuit 78 converts the MODE data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77. Next, the game control microcomputer 560 performs transmission control by adding header data, mark bits, and end bits to EXT data (EXT data with an address added). Then, the serial output circuit 78 converts the EXT data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77.

  Although not particularly illustrated, commands 8001 (H) to 800E (H) are effect control commands (variation patterns) for designating a variation pattern of decorative symbols that are variably displayed on the variable display device 9 in response to the variable symbol special display. Command). The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 800E (H), the variable display device 9 controls the variable display device 9 to start variable display of decorative symbols. In this embodiment, since the variable display of the special symbol and the variable display of the decorative symbol are synchronized (the variable display start time and the variable display end time are the same), the decorative pattern variation pattern (variation time) Determining also means determining the variation pattern (variation time) of the special symbol.

  The commands 8C01 (H) to 8C05 (H) are effect control commands indicating whether or not to make a big hit and the type of the big hit game. The effect control microcomputer 100 determines the display result of the decorative symbols in response to the reception of the commands 8C01 (H) to 8C05 (H), so the commands 8C01 (H) to 8C05 (H) are referred to as display result specifying commands.

  Command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of the decorative symbols is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the decorative symbols and derives and displays the display result. The derived display is to finally stop and display the symbol.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the gaming control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command.

  Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration. The command 9F55 (H) is an effect control command (random number circuit error designation) for designating notification of a random number circuit error of the main board 31 when the occurrence of an abnormality in the random number circuit is detected in the random number circuit check process in the main process. Command).

  The commands A001 to A004 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 4 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of the big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game and an effect control command (special jackpot end 1 designation command: ending) that specifies that the jackpot game is a non-probable big hit (usually a big hit) 1 designation command). The command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a promising big hit (a jackpot end 2 designation command: an ending 2 designation command). is there.

  Command D001 (H) is an effect control command (abnormal winning notification designation command) for instructing notification of abnormal winning.

  The command FF02 (H) notifies that a full tank error has occurred when the lower pan (the surplus ball receiving tray 4) is full (that is, when the full tank switch is turned on). This is an effect control command to be designated (full error notification designation command). The command FF01 (H) is an effect control command for designating cancellation of the full-tan error notification when the full-plate state of the lower pan is released (that is, when the full-tan switch is turned off). (Full tank error release specification command).

  The command FF04 (H) specifies that the door opening error is notified when the game frame 11 is opened (that is, when the detection signal of the door opening sensor 155 is detected). This is a command (door opening error notification designation command). The command FF03 (H) is an effect control command (door opening error release specifying command) that specifies that the notification of the door opening error is released when the open state of the game frame 11 is released.

  Command FF06 (H) is an effect control command (out of ball) that specifies that a ball out error has occurred when the ball is out of state (that is, when the ball out switch is turned on). Error notification designation command). The command FF05 (H) is an effect control command (ball-out error cancel designation command) that designates cancellation of the ball-out error notification when the ball-out state is released.

  The command FF08 (H) is an effect control command (prize ball error notification designation command) for designating notification that a prize ball error has occurred when a prize ball error has occurred. The command FF07 (H) is an effect control command (prize ball error cancel designation command) that designates canceling the notification of the prize ball error when the prize ball error is canceled.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the variable display device 9 is changed according to the contents, the display state of the lamp is changed, or the sound number data is output to the sound output board 70.

  The game control microcomputer 560 transmits a variation pattern command and a display result specifying command at the start of variation. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  Before transmitting the variation pattern command, a background designation command for designating a background image in the variable display device 9 according to the gaming state (for example, normal state / short time state / probability variation state) may be transmitted. Further, an effect control command indicating the number of reserved memories may be transmitted following the display result specifying command.

  FIG. 34 and FIG. 35 are flowcharts showing an example of a special symbol process process (step S27) program executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. As described above, in the special symbol process, a process for controlling the special symbol display 8 and the special winning opening is executed. In the special symbol process, if the first start port switch 13a or the second start port switch 14a for detecting that a game ball has won the start winning port 13 is turned on, that is, a start winning is generated. If so, start port switch passage processing is executed (steps S311 and S312). Then, any one of steps S300 to S310 is performed.

  The processes in steps S300 to S310 are as follows.

  Special symbol normal processing (step S300): Executed when the value of the special symbol process flag is zero. When the game control microcomputer 560 is ready to start the variable display of the special symbol, it checks the number of reserved memories (the number of start winning memories). The reserved memory number can be confirmed by the count value of the reserved memory number counter. If the number of reserved memories is not 0, it is determined whether or not to win. Then, the internal state (special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  Fluctuation pattern setting process (step S301): This process is executed when the value of the special symbol process flag is 1. The stop symbol after the variable display of the special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from when the variable display is started until the display result is derived and displayed (stop display)) is defined as the variable symbol variation display time. Decide to do. Also, a variable time timer for measuring the special symbol variable time is started. Then, the internal state (special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  Display result specifying command transmission process (step S302): This process is executed when the value of the special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  Special symbol changing process (step S303): This process is executed when the value of the special symbol process flag is 3. When the variation time of the variation pattern selected in the variation pattern setting process elapses (the variation time timer set in step S301 times out, that is, the variation time timer value becomes 0), the internal state (special symbol process flag) is stepped. Update to a value corresponding to S304 (4 in this example).

  Special symbol stop process (step S304): executed when the value of the special symbol process flag is 4. The variable display on the special symbol display 8 is stopped and the stop symbol is derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. If the big hit flag is set and the small hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S305 (5 in this example). If the small hit flag is set, the internal state (special symbol process flag) is updated to a value (8 in this example) corresponding to step S308. If the big hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S300 (0 in this example). The effect control microcomputer 100 controls the variable display device 9 to stop the decorative symbols when it receives the symbol confirmation designation command transmitted by the game control microcomputer 560.

  Preliminary winning opening opening process (step S305): This is executed when the value of the special symbol process flag is 5. In the pre-opening process for the big prize opening, control for opening the big prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). Note that the pre-opening process for the big winning opening is executed for each round, but when the first round is started, the pre-opening process for opening the big winning opening is also a process for starting the big hit game.

  Large winning opening open process (step S306): This process is executed when the value of the special symbol process flag is 6. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the big prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S305 (5 in this example). When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S307 (7 in this example).

  Big hit end process (step S307): executed when the value of the special symbol process flag is 7. Control for causing the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended is performed. Also, a process for setting a flag (for example, a probability change flag) indicating the gaming state is performed. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  Small hit release pre-processing (step S308): This process is executed when the value of the special symbol process flag is 8. In the pre-opening process for small hits, control is performed to open the big prize opening. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S309 (9 in this example). It should be noted that the small hit pre-release process is executed for each round, but when the first round is started, the small hit pre-release process is a process for starting the small hit game.

  Small hit release processing (step S309): executed when the value of the special symbol process flag is 9. A control for transmitting an effect control command for a round display during the small hit gaming state to the effect control microcomputer 100, a process for confirming that the closing condition for the big prize opening is satisfied, and the like are performed. If the closing condition for the special prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S308 (8 in this example). When all rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S310 (in this example, 10 (decimal number)).

  Small hit end processing (step S310): executed when the value of the special symbol process flag is 10. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the small hit gaming state has ended. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 36 is a flowchart showing the start-port switch passing process in step S312. In the start port switch passing process, the CPU 56 checks whether or not the reserved storage number is 4 which is the upper limit value (step S211). If the number of reserved memories is 4, the process is terminated.

  If the number of reserved memories is not 4, the value of the reserved memory number counter indicating the number of reserved memories is incremented by 1 (step S212). Further, the CPU 56 extracts software random numbers (counter value for generating a big hit symbol determination random number, etc.) and random R (big hit determination random number), and uses them as an extracted random number value of the reserved memory number counter. A process of storing in the storage area in the storage buffer corresponding to the value is executed (step S213). In step S213, the CPU 56 extracts random values 1 to 3 (see FIG. 21) as software random numbers, and extracts the random R by reading the count value of the random number circuit. In the reserved storage buffer, the same number of storage areas as the upper limit value of the number of reserved memories is secured. Further, a counter for generating a jackpot symbol determination random number and the like and a reserved storage buffer are formed in the RAM 55. “Formed in RAM” means an area in the RAM.

  37 and 38 are flowcharts showing the special symbol normal process (step S300) in the special symbol process. In the special symbol normal process, the CPU 56 checks the value of the number of reserved storage (step S51). Specifically, the count value of the pending storage number counter is confirmed. If the number of reserved memories is 0, the process is terminated.

  If the reserved memory number is not 0, the CPU 56 reads out each random number value stored in the storage area corresponding to the reserved memory number = 1 in the reserved memory number buffer of the RAM 55 and stores it in the random number buffer area of the RAM 55 (step S52). Then, the value of the reserved memory number is decreased by 1 (the count value of the reserved memory number counter is decremented by 1), and the contents of each storage area are shifted (step S53). That is, each random number value stored in the storage area corresponding to the reserved memory number = n (n = 2, 3, 4) in the reserved memory number buffer of the RAM 55 is stored in the storage area corresponding to the reserved memory number = n1. To do. Therefore, the order in which the random number values stored in the respective storage areas corresponding to the number of reserved memories is extracted always matches the order of the number of reserved memories = 1, 2, 3 and 4. Yes.

  Then, the CPU 56 reads a random R (a jackpot determination random number) from the random number buffer area (step S61), and executes a jackpot determination module (step S62). The big hit judgment module compares the big hit judgment value (see Fig. 22) determined in advance with the big hit judgment random number, and if they match, the big hit (normal big hit, probability variation big hit or sudden probability variation big hit) or small hit This is a program for executing the process to be determined.

  Note that, when the gaming state is in the probability variation state, the CPU 56 uses the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 22B is set, and the gaming state is in the normal state (non-probability variation state). Is, the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 22 (A) is set is used. If it is determined to be a big hit (step S63), the process proceeds to step S81. Note that deciding whether or not to make a big hit means deciding whether or not to shift to the big win gaming state, but deciding whether or not to make the stop symbol in the special symbol display 8 a big hit symbol. It is also a thing.

  If it is decided not to win, the CPU 56 reads out the design symbol random number from the random number buffer area (step S64), and determines the stop symbol based on the design symbol random number (step S65). In this case, an off symbol (for example, any of even symbols) is determined.

  Further, when the time reduction flag indicating the time reduction state is set (step S66), the value of the time reduction counter indicating the number of times the special symbol can be changed in the time reduction state is decremented by 1 (step S67). When the value of the time reduction counter becomes 0, a time reduction end flag is set in order to shift the gaming state to the non-time reduction state when the variable display ends (steps S68 and S69). Then, the process proceeds to step S90.

  In step S81, the CPU 56 sets a big hit flag. Then, the big hit symbol determination random number is read from the random number buffer area (step S82), and the big hit symbol (for example, one of the odd symbols) as the stop symbol is determined based on the big hit symbol determination random number (step S83). Here, the stop symbol is determined without distinguishing between the probable big hit and the normal big hit.

  Next, the CPU 56 sets a probability variation jackpot flag if it is determined to be a probability variation jackpot (steps S84 and S85). If it is determined that the sudden probability change big hit is suddenly set, the sudden probability change big hit flag is set (steps S86 and S87). If it is determined to be a small hit, a small hit flag is set (steps S88 and S89). Then, the value of the special symbol process flag is updated to a value corresponding to the variation pattern setting process (step S301) (step S90). When the probability variation big hit flag or the sudden probability variation big hit flag is set, the gaming state is shifted to the probability changing state when the big hit game is finished.

  In this embodiment, whether or not to make a big hit and the type of jackpot are determined based on the big hit determination random number (see FIG. 22), but the big hit is determined based on the big hit determination random number. When it is decided whether to win or not, when a predetermined big hit symbol (predetermined probable big hit symbol or suddenly probable big hit symbol) is determined based on the random number for determining the big hit symbol You may make it control to a probability change state.

  FIG. 39 is a flowchart showing the variation pattern setting process (step S301) in the special symbol process. In the variation pattern setting process, the CPU 56 reads the variation pattern determination random number from the random number buffer area (step S100). Then, the variation pattern is determined based on the variation pattern determination random number (step S101).

  Here, when the gaming state is the non-time saving state and it is determined to be out of play, “normal variation” or “normal reach” is selected (see FIG. 23). If the gaming state is a non-time-saving state and it is determined to be a big hit, “reach A”, “reach A / extension”, “reach B”, “reach B / extension”, “reach C” ”,“ Super Reach A ”,“ Super Reach B ”or“ Reach A · Accuracy ”(see FIG. 23). When it is determined to be a promising big hit out of the big hits, “reach A / extension”, “reach B / extension”, “reach C”, “super reach A” or “super reach B” is selected. In addition, when it is determined that the sudden probability change is a big hit, “reach A / accuracy” is selected. When it is determined to be a big hit (including the case where it is determined to be a small hit) among the big hits (including the case where it is determined to be a small hit), “ Select Reach A, Reach B, Reach C, or Super Reach A.

  When the game state is the short time state and it is determined to be out of play, “normal variation / shortening” is selected (see FIG. 23). If the gaming state is a short-time state and it has been decided to win the game, select “Reach A / Shorten”, “Reach B / Short”, “Reach C / Short” or “Reach A / Success” Select (see FIG. 23). When it is determined to be a promising big hit out of the big hits, “reach C / shortening” is selected. When it is decided to suddenly change the probability big hit, select “reach A / accuracy”. When it is determined that the big hit is usually a big hit (including the case where it is decided to be a small hit), “reach A / shortening”, “reach B / shortening” or “reach C”・ Select “Short”.

  In order to facilitate the selection as described above, a variation pattern table is used according to the game state (whether or not it is a short-time state) and the decision result of whether or not to make a big hit (respectively, each of the types of losing and big hits) . The variation pattern table is stored in the ROM 54, but is prepared according to the gaming state and the determination result as to whether or not to win. In each variation pattern table, data indicating a variation pattern that can be selected and a numerical value corresponding to the data are set. Then, the CPU 56 selects a variation pattern table according to the gaming state and the determination result as to whether or not to win, and corresponds to a numerical value that matches the value of the variation pattern determination random number in the selected variation pattern table. Select a variation pattern. Therefore, the game control microcomputer 560 selects the variation pattern depending on whether or not the jackpot has already been determined and whether or not the probability variation jackpot.

  Then, the CPU 56 performs control to transmit a variation pattern command (see FIG. 23) corresponding to the variation pattern selected in step S101 to the effect control microcomputer 100 (step S103). Specifically, when the CPU 56 transmits an effect control command to the effect control microcomputer 100, the address of the command transmission table (preliminarily set for each command in the ROM) corresponding to the effect control command is used as a pointer. set. Then, the address of the command transmission table corresponding to the effect control command is set in the pointer, and the effect control command is transmitted in the effect control command control process (step S29).

  Moreover, the variation of the special symbol is started (step S104). For example, a start flag referred to in the special symbol display control process in step S34 is set. Further, a value corresponding to the variation time (see FIG. 23) corresponding to the selected variation pattern is set in the variation time timer formed in the RAM 55 (step S105). Then, the value of the special symbol process flag is updated to a value corresponding to the display result specifying command transmission process (step S302) (step S106).

  FIG. 40 is a flowchart showing the display result specifying command transmission process (step S302). In the display result specifying command transmission processing, the CPU 56 performs any one of the display control 1 designation to the display result 5 designation according to the determined big hit type (including the small win) (see FIG. 25). Control to send. Specifically, the CPU 56 first checks whether or not the big hit flag (which is also set when the small hit is determined) is set (step S110). If not set, control is performed to transmit a display result 1 designation command (step S111). When the big hit flag is set, when the probability variation big hit flag is set, control for transmitting the display result 4 designation command is performed (steps S112 and S113). When the sudden probability big hit flag is set, control for transmitting a display result 5 designation command is performed (steps S114 and S115). When the small hit flag is set, control for transmitting a display result 3 designation command is performed (steps S116 and S117). When none of the probability variation big hit flag, sudden probability variation big hit flag, and small hit flag is set, control is performed to transmit a display result 2 designation command (step S118). Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol changing process (step S303) (step S119).

  FIG. 41 is a flowchart showing the special symbol changing process (step S303) in the special symbol process. In the special symbol changing process, the CPU 56 decrements the variable time timer by 1 (step S121), and when the variable time timer times out (step S122), the value of the special symbol process flag corresponds to the special symbol stop process (step S304). The updated value is updated (step S123). If the variable time timer has not timed out, the process ends.

  FIG. 42 is a flowchart showing the special symbol stop process (step S304) in the special symbol process. In the special symbol stop process, the CPU 56 sets an end flag referred to in the special symbol display control process in step S34 to end the variation of the special symbol, and performs control for deriving and displaying the stop symbol on the special symbol display 8. (Step S131). Moreover, control which transmits the symbol determination designation | designated command to the microcomputer 100 for production control is performed (step S132). When the big hit flag is not set, the process proceeds to step S146 (step S133).

  When the jackpot flag is set, the CPU 56 performs control to transmit a jackpot start designation command (step S135). Specifically, when the probability variation big hit flag is set, a big hit start 3 designation command is transmitted, and when the probability variation big hit flag is suddenly set, a big hit start 4 designation command is transmitted. If it is set, a jackpot start 2 designation command is transmitted. Otherwise, a jackpot start 1 designation command is transmitted.

  Further, a value corresponding to the big hit display time (time for notifying the occurrence of the big hit in the variable display device 9, for example) is set in the big hit display time timer (step S136). If the small hit flag is set, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308) (steps S137 and S138). If the small hit flag is not set, the value of the special symbol process flag is updated to a value corresponding to the pre-opening process for the big prize opening (step S305) (step S139). The case where the small hit flag is not set is a case where the normal big hit, the probability variation big hit or the sudden probability variation big hit is determined.

  In step S146, the CPU 56 checks whether or not the time reduction end flag is set. If the time saving end flag is not set, the process proceeds to step S149. If the time reduction end flag is set, the time reduction end flag is reset (step S147), and the time reduction flag indicating that the gaming state is the time reduction state is reset (step S148). Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S149).

  The time reduction end flag is set in step S69 in the special symbol normal process. In addition, the gaming state shifts to a non-time saving state by resetting the time saving flag. At this stage, if the gaming state is a probability variation state, the gaming state becomes a probability variation state of a non-short-time state. On the other hand, if it is in the non-probable change state, it shifts to a normal state (a state that is not in the probabilistic change state and is not in the time-short state).

  In the big winning opening opening pre-processing, when the big hit display time timer is set, the CPU 56 controls to open the big winning opening when the big hit display time timer times out, and sets the big winning opening opening time timer. Set a value corresponding to the opening time (for example, 29 seconds for normal big hits and probable big hits, and 0.5 seconds for sudden big odds), and the special symbol process flag value is processed while the big prize opening is open The value is updated to a value corresponding to (Step S306). The case where the big hit display time timer is set is the case before the start of the first round. When an interval timer (timer for determining the interval time between rounds) is set, when the interval timer times out, control is performed to open the big prize opening, and the opening time ( For example, a value corresponding to 29 seconds is set for a normal big hit and a promising big hit, and a value corresponding to 0.5 seconds is set for a sudden probable big hit. ) To a value corresponding to.

  In the process during opening of the big prize opening, the CPU 56 does not finish the final round when the big prize opening time timer times out or the number of winning balls to the big prize opening reaches a predetermined number (for example, 10). In this case, control for closing the special winning opening is performed, a value corresponding to the interval time is set in the interval timer, and the value of the special symbol process flag is set to a value corresponding to the pre-opening process for the special winning opening (step S305). Update. When the final round is completed, the value of the special symbol process flag is updated to a value corresponding to the jackpot end process (step S307).

  FIG. 43 is a flowchart showing the jackpot end process (step S307) in the special symbol process. In the jackpot end process, the CPU 56 checks whether or not the jackpot end display timer is set (step S150). If the jackpot end display timer is set, the process proceeds to step S154. If the jackpot end display timer is not set, the jackpot flag is reset (step S151), and control for transmitting a jackpot end designation command is performed (step S152). Here, if the probability variation jackpot flag or the sudden probability variation bonus flag is set, a jackpot end 2 designation command is transmitted, and if the probability variation jackpot flag or the sudden probability variation bonus flag is not set, the jackpot end 1 designation is specified. Send a command. Then, a value corresponding to the display time corresponding to the time during which the jackpot end display is performed on the variable display device 9 (the jackpot end display time) is set in the jackpot end display timer (step S153), and the processing is ended.

  In step S154, 1 is subtracted from the value of the big hit end display timer. Then, the CPU 56 checks whether or not the value of the jackpot end display timer is 0, that is, whether or not the jackpot end display time has elapsed (step S155). If not, the process ends. If it has elapsed, the time reduction flag is set to shift the gaming state to the time reduction state (step S156), and 100 is set in the time reduction counter (step S157).

  Then, it is confirmed whether or not the probability variation big hit flag or the sudden probability variation big flag is set (step S158). If the probability variation big hit flag or sudden probability variation big win flag is set, the set flag (probability big hit flag or sudden probability variation big flag) is reset (step S159), the probability variation flag is set and the gaming state is set. The state is changed to a certain change state (step S161). If the gaming state at that time is a probability variation state, the probability variation flag has already been set. Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S162).

  In the pre-opening process for small hits in step S308, the same process as the pre-opening process for the big prize opening (step S305) is performed. However, instead of updating the value of the special symbol process flag to a value corresponding to the large winning opening opening process, the special symbol process flag is updated to a value corresponding to the small hit opening process. Further, in the small hit opening process in step S309, the same process as the big prize opening opening process (step S306) is performed. However, if it is not the final round, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308), and if it is the final round (second round), the value of the special symbol process flag Is updated to a value corresponding to the small hit end process (step S310).

  FIG. 44 is a flowchart showing the small hit end process (step S310) in the special symbol process. In the small hit end process, the CPU 56 checks whether or not the small hit end display timer is set (step S170). If the small hit end display timer is set, the process proceeds to step S174. When the big hit end display timer is not set, the big hit flag and the small hit flag are reset (steps S171A and S171B), and control for transmitting the big hit end 1 designation command is performed (step S172). Then, the small hit end display timer sets a value corresponding to the display time corresponding to the time during which the small hit end display is performed on the variable display device 9 (small hit end display time) in the small hit end display timer ( Step S173), the process is terminated.

  In step S174, 1 is subtracted from the value of the small hit end display timer. Then, the CPU 56 checks whether or not the value of the small hit end display timer is 0, that is, whether or not the small hit end display time has elapsed (step S175). If not, the process ends. If it has elapsed, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S176).

  FIG. 45 is a flowchart showing the abnormal winning notification process in step S23. In the abnormal winning notification process, the CPU 56 checks whether or not an abnormal notification prohibition flag is set (step S581). The abnormality notification prohibition flag is set in the main process executed when power supply to the gaming machine is started (see step S44 in FIG. 32). When the abnormality notification prohibition flag is not set, the process proceeds to step S585. If the abnormality notification prohibition flag is set, the value of the prohibition period timer set in step S45 is decremented by 1 (step S582). When the value of the prohibition period timer becomes 0, that is, when the prohibition period timer times out, the abnormality notification prohibition flag is reset (steps S583 and S584).

  Next, it is confirmed whether or not the value of the special symbol process flag is 5 or more (step S585). The state where the value of the special symbol process flag is 5 or more is a state where a big hit game or a small hit game is being played. In such a state, there is a possibility that a game ball may win the big winning opening, so it is not confirmed that an abnormal winning has occurred in the big winning opening. That is, if the value of the special symbol process flag is 5 or more, the abnormal winning notification process is terminated.

  If the value of the special symbol process flag is less than 5 (a state where neither big hit game nor small hit game is played), the CPU 56 loads the contents of the switch-on buffer into the register (step S586). Then, the logical product of the content of the loaded switch-on buffer and the count switch input bit determination value (for example, 02 (H)) is calculated (step S587). When the content of the switch-on buffer is 02 (H), that is, when the count switch 23 is on, the logical product operation result is 02 (H). When the count switch 23 is not turned on, the operation result of the logical product is 0 (00 (H)).

  If the result of the logical product is not 0, it is determined that an abnormal winning at the special winning opening has occurred, and control is performed to transmit an abnormal winning notification designation command to the effect control board 80 (steps S588 and S589).

  When the count switch 23 is turned on in a state where neither a big hit game nor a small hit game is performed by the above processing, an abnormal winning notification designation command is transmitted. Further, the process of steps S581 to S583 prohibits the start of abnormality notification when the effect control microcomputer 100 is performing initialization notification. Note that the production control microcomputer 100 continues to execute the initialization notification until the period corresponding to the prohibition period has elapsed since the start of the initialization notification.

  Next, the operation of the effect control means will be described. FIG. 46 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 2 ms) (step S701). .

  Then, the effect control CPU 101 proceeds to a loop process for monitoring the timer interrupt flag (step S702). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S703) and executes the effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and executes a process of setting a flag according to the received effect control command (command analysis process: step S704). Next, the effect control CPU 101 executes effect control process processing (step S705). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the variable display device 9 is executed. In addition, a random number update process for updating a counter value of a counter for generating a predetermined random number (for example, a random number for determining a stop symbol) is executed (step S706). Moreover, the notification control process process which performs notification using an effect device such as the variable display device 9 is executed (step S707). Furthermore, the serial input / output process which outputs the data set by the command analysis process, the effect control process process, and the notification control process process to the serial output circuit 353, and reads the data received from the input ICs 620 and 621 from the serial input circuit 354. Is executed (step S708). Thereafter, the process proceeds to step S702.

  FIG. 47 is an explanatory diagram showing a configuration example of a command reception buffer for storing the effect control command received from the game control microcomputer 560 of the main board 31. In this example, a command reception buffer in the form of a ring buffer capable of storing six 2-byte effect control commands is used. Therefore, the command reception buffer is configured by a 12-byte area of reception command buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11. The ring buffer format is not necessarily required.

  The effect control command transmitted from the game control microcomputer 560 is received by an interrupt process based on the effect control INT signal, and is stored in a buffer area formed in the RAM. In the command analysis process, it is analyzed which command (see FIG. 25) the effect control command stored in the buffer area is.

  48 to 50 are flowcharts showing specific examples of the command analysis process (step S704). The effect control command received from the main board 31 is stored in the reception command buffer, but in the command analysis process, the effect control CPU 101 confirms the content of the command stored in the command reception buffer.

  In the command analysis process, the effect control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S611). Whether it is stored or not is determined by comparing the value of the command reception number counter with the read pointer. The case where both match is the case where the received command is not stored. When the received command is stored in the command receiving buffer, the effect control CPU 101 reads the received command from the command receiving buffer (step S612). When reading is performed, the value of the read pointer is incremented by 2 (step S613). The reason for +2 is that 2 bytes (1 command) are read at a time.

  If the received effect control command is a variation pattern command (step S614), the effect control CPU 101 stores the variation pattern command in a variation pattern command storage area formed in the RAM (step S615). Then, a variation pattern command reception flag is set (step S616).

  If the received effect control command is a display result specifying command (step S617), the effect control CPU 101 stores the display result specifying command in a display result specifying command storage area formed in the RAM (step S618). . Then, a display result specifying command reception flag is set (step S619).

  If the received effect control command is a symbol confirmation designation command (step S621), the effect control CPU 101 sets a confirmed command reception flag (step S622).

  If the received effect control command is one of the jackpot start 1-4 designation commands (step S623), the effect control CPU 101 sets the jackpot start 1-4 designation command reception flag (step S624).

  If the received presentation control command is a power-on designation command (initialization designation command) (step S631), the presentation control CPU 101 displays an initial screen on the variable display device 9 indicating that the initialization process has been executed. Control is performed (step S632A). The initial screen includes an initial display of predetermined production symbols. Also, an initial notification flag is set (step S632B), and a RAM clear flag is set (step S632C).

  If the received effect control command is a power failure recovery designation command (step S633), a predetermined power failure recovery screen (screen for displaying information notifying the player that the gaming state is continuing) is displayed. Display control is performed (step S634), and an initial notification flag is set (step S635).

  If the received effect control command is a jackpot end 1 designation command (step S641), the effect control CPU 101 sets a jackpot end 1 designation command reception flag (step S642). If the received effect control command is a jackpot end 2 designation command (step S643), the effect control CPU 101 sets a jackpot end 2 designation command reception flag (step S644).

  If the received effect control command is an abnormal prize notification designation command (step S645), the effect control CPU 101 sets an abnormal prize notification designation command reception flag (step S646).

  If the received effect control command is a random number circuit error designation command (step S647), the effect control CPU 101 sets a random number circuit error flag (step S648).

  If the received production control command is a full tank error release designation command (step S649), the production control CPU 101 resets the full tank error notification flag set in step S652 described later and sets an error notification release flag ( Step S650).

  If the received production control command is a full tank error notification designation command (step S651), the production control CPU 101 sets a full tank error notification flag (step S652).

  If the received effect control command is a door opening error release designation command (step S653), the effect control CPU 101 resets the door opening error notification flag set in step S656, which will be described later, and sets the error notification cancellation flag. (Step S654).

  If the received effect control command is a door opening error notification designation command (step S655), the effect control CPU 101 sets a door opening error notification flag (step S656).

  If the received effect control command is a ball break error release designation command (step S657), the effect control CPU 101 resets a ball break error notification flag set in step S660 described later and sets an error notification cancel flag. (Step S658).

  If the received effect control command is a ball-out error notification designation command (step S659), the effect control CPU 101 sets a ball-out error notification flag (step S660).

  If the received effect control command is a prize ball error release designation command (step S661), the effect control CPU 101 resets the prize ball error notification flag set in step S664 described later and sets the error notification release flag. (Step S662).

  If the received effect control command is a prize ball error notification designation command (step S663), the effect control CPU 101 sets a prize ball error notification flag (step S664).

  If the received effect control command is another command, the effect control CPU 101 sets a flag corresponding to the received effect control command (step S665). Then, control goes to a step S611.

  FIG. 51 is a flowchart showing the effect control process (step S705) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S806 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command is received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the variation pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the decorative symbol variation start process (step S801).

  Decoration symbol variation start processing (step S801): Control is performed so that the variation of the ornament symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol changing process (step S802).

  Decoration symbol variation processing (step S802): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S803).

  Decoration symbol variation stop process (step S803): Based on the reception of the effect control command (design determination designation command) for instructing all symbols to stop, the variation of the ornament symbol is stopped and the display result (stop symbol) is derived and displayed. Take control. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S804) or the variation pattern command reception waiting process (step S800).

  Big hit display processing (step S804): After the end of the variation time, control is performed to display a screen for notifying the variable display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805).

  Big hit game processing (step S805): Control during the big hit game is performed. For example, when a command for opening a special prize opening or a designation command after opening a special prize opening is received, display control of the number of rounds in the variable display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the big hit end process (step S806).

  FIG. 52 is a flowchart showing the variation pattern command reception waiting process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S812). Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation start process (step S801) (step S813).

  FIG. 53 is a flowchart showing a decorative symbol variation start process (step S801) in the effect control process shown in FIG. In the decorative symbol variation start process, the effect control CPU 101 reads data indicating the variation pattern command from the variation pattern command storage area (step S816).

  Next, it is confirmed whether or not the display result specifying command reception flag is set (step S817). If the display result specifying command reception flag is not set, the process proceeds to step S830. When the display result specifying command reception flag is set, the display result (stop symbol) of the decorative symbol is displayed according to the data stored in the display result specifying command storage area (that is, the received display result specifying command). Determination is made (step S818).

  FIG. 54 is an explanatory diagram illustrating an example of a decorative symbol stop pattern in the variable display device 9. In the example shown in FIG. 54, when the received display result specifying command indicates a normal jackpot (when the received display result specifying command is a display result 2 designation command), the effect control CPU 101 uses the stop design as a stop symbol. A combination of decorative symbols in which the left middle right symbol is an even symbol (usually a stop symbol reminiscent of the occurrence of a big hit) is determined. When the received display result specifying command indicates a probable big hit (when the received display result specifying command is a display result 4 designation command), the effect control CPU 101 uses the left middle right symbol as an odd symbol as an odd symbol. A combination of decorative symbols arranged in accordance with (a stop symbol reminiscent of occurrence of a probable big hit) is determined. When the received display result specifying command indicates a small hit or suddenly probable big hit (when the received display result specifying command is a display result 3 specifying command or a display result 5 specifying command), the presentation control CPU 101 A combination of “135” (a stop symbol reminiscent of the occurrence of a small hit or suddenly probable big hit) is determined as the left middle right decorative symbol as the stop symbol. In the case of a loss (when the received display result specifying command is a display result 1 designation command), a combination of decorative symbols other than the above is determined. However, when a reach effect is involved, a combination of decorative symbols with left and right aligned is determined. The combination of the left, middle and right decorative symbols derived and displayed on the variable display device 9 is the “stop symbol” of the decorative symbol.

  The effect control CPU 101 extracts, for example, a random number for determining the stop symbol, and uses the stop symbol determination table in which the data indicating the combination of the decorative symbol and the numerical value are associated with each other to generate the stop symbol of the decorative symbol. decide. That is, the stop symbol is determined by selecting data indicating a combination of decorative symbols corresponding to a numerical value that matches the extracted random number.

  As for the decorative symbol, a stop symbol that recalls a big hit is called a big hit symbol. In addition, a stop symbol reminiscent of a probable big hit is called a probable big hit symbol, and a stop symbol reminiscent of a normal big hit is called a normal big hit symbol. A stop symbol that suddenly recalls a probable big hit is called a sudden probable big hit symbol, and a stop symbol that recalls a small hit is called a small hit symbol. And a stop symbol that reminds of a loss is called a loss symbol.

  Further, the effect control CPU 101 resets the display result specifying command reception flag (step S819). Next, a process table corresponding to the variation pattern is selected (step S833). Then, the process timer in the process data 1 of the selected process table is started (step S834).

  FIG. 55 is an explanatory diagram of a configuration example of a process table. The process table is a table in which process data referred to when the effect control CPU 101 executes control of the effect device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the variable display device 9 in accordance with the data set in the process table. In this embodiment, an error notification process table (error notification process table) used when various types of error notification are performed is prepared in addition to the process table used for normal game effects shown in FIG. ing. Details of the error notification process table will be described later.

  The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. The display control execution data includes data indicating each variation mode constituting the variation mode during the variable display time (variation time) of the variable display of the decorative symbols. Specifically, data relating to the change of the display screen of the variable display device 9 is described. The process timer set value is set with a change time in the form of the change. The effect control CPU 101 refers to the process table and performs control to display the decorative pattern in the variation mode set in the display control execution data for the time set in the process timer set value.

  The process table shown in FIG. 55 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern.

  FIG. 56 is an explanatory diagram showing an example of lamp control contents executed in accordance with process data (including error notification process data) when each production control command is received. As shown in FIG. 56, for example, when the effect control CPU 101 receives a jackpot end 1 designation command and sets the gaming state to the normal state, the LED 125a to 125f of the center decoration lamp on the gaming board 6 and the stage Control is performed so that only the LEDs 126a to 126f of the lamp are lit. Then, while the gaming state is the normal state, an effect is made such that only the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp on the gaming board 6 are lit.

  In addition, for example, when the game control CPU 101 receives the jackpot end 2 designation command and changes the gaming state to the certain change state, the center decoration lamp LEDs 125a to 125f and the stage lamp LEDs 126a to 126f on the gaming board 6 are provided. LED 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82d of each lamp (excluding the dish lamp 83) on the game frame 11 side are blinked at predetermined time intervals (for example, 1 second). Control. While the game state is in a probable state, in addition to the lighting of the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f on the game board 6, each lamp on the game frame 11 side (excluding the dish lamp 83). LED 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d are flashed at predetermined time intervals (for example, 1 second).

  Further, for example, when the big hit start designation command is received and the big hit is made, the effect control CPU 101 blinks the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f on the game board 6, The LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of the respective lamps (excluding the dish lamp 83) on the game frame 11 side are blinked at a time interval (for example, 0.5 seconds) faster than the probability change state. Produce. By performing such an effect, compared to when the gaming state is in the probable state, by flashing more lamps at a faster time interval than in the probable state, compared to when in the promising state when the big hit occurs Can produce a more flashy impression.

  Further, for example, when the CPU 101 for effect control receives an initialization designation command and performs initialization notification and RAM clear notification, the LEDs 281a to 281a of the respective lamps (except the dish lamp 83) on the game frame 11 side. Productions such as lighting 281l, 282a to 282f, 283a to 283f, and 82a to 82d are performed. For example, when the CPU 101 for effect control receives a random number circuit error designation command and notifies the random number circuit error, the LEDs 281a to 281l and 282a of the respective lamps (except the dish lamp 83) on the game frame 11 side. -282f, 283a to 283f, 82a to 82d are illuminated. In addition, for example, when the production control CPU 101 receives an abnormal winning notification designation command and performs abnormal winning notification, the LEDs 281a to 281l and 282a to 282f of the respective lamps (excluding the dish lamp 83) on the game frame 11 side. , 283a to 283f and 82a to 82d are flashed. In addition, for example, the production control CPU 101 receives a full error notification designation command, and performs an effect of blinking the pan lamps 82a to 82d when performing full tank error notification. Further, for example, when the CPU 101 for effect control receives a door opening error designation command and issues a door opening error notification, the LEDs 281a to 281l and 282a to 280a of each lamp (except for the dish lamp 83) on the game frame 11 side. An effect of blinking 282f, 283a to 283f, 82a to 82d is performed. In addition, for example, the effect control CPU 101 receives an out-of-ball error designation command and performs an effect of blinking the LEDs 281a to 281l of the top frame lamps on the game frame 11 side when the out-of-ball error notification is performed. In addition, for example, when the effect control CPU 101 receives a prize ball error designation command and issues a prize ball error notification, the effect control CPU 101 performs an effect of blinking the LEDs 281a to 281l of the top frame lamps on the game frame 11 side.

  Then, the CPU 101 for effect control indicates an abnormality notification flag indicating that an abnormal winning notification is being made and other error flags (RAM clear flag, random number circuit error flag, full tank error notification flag, door opening error notification flag, ball Production device (variable display device as production component) according to the contents of process data 1 (display control execution data 1 and sound number data 1) on condition that the cut error notification flag and the prize ball error notification flag) are not set 9 and the control of the speaker 27 as a production component) are executed (steps S835A and S835B). For example, in order to display an image corresponding to the variation pattern on the variable display device 9, a command is output to the VDP 109. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  Further, the effect control CPU 101 executes a serial setting process in order to control various lamps as effect components in accordance with the lamp control execution data 1 (step S835C). For example, when the gaming state is the normal state, the effect control CPU 101 supplies lamp control signals for lighting only the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f to a predetermined data storage area. set. When the gaming state is a probable change state, the center decoration LEDs 125a to 125f and the stage lamps LEDs 126a to 126f are turned on, and all the lamps provided on the gaming frame 11 side (excluding the dish lamp 83) are turned on. ) Of LED 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82d are set in a predetermined data storage area. The lamp control signal set in step S835C is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  When the abnormality notification flag or other error flag is set, the rendering device is controlled according to the contents of the process data 1 excluding the sound number data 1 and the lamp control execution data 1 (steps S835A and S835D). That is, when the abnormality notification flag or other error flag is set, when a new variable display of a decorative design is started, a sound effect corresponding to the variable display and a display effect by a lamp are executed. Rather than an abnormal winning notification and various error notifications (RAM clear notification, random circuit error notification, full tank error notification, door open error notification, ball runout error notification, prize ball error notification) and sound display and lamp display The production continues.

  In addition, when performing the process of step S835D, the CPU 101 for effect control does not simply output a command based on the display control execution data 1 to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. That is, the display at that time on the variable display device 9 (notification of abnormal winning, notification of full tank error, notification of random circuit error) and the image of the display effect of variable display of the decorative symbols are variable at the same time. Control is performed so that the image is displayed on the display device 9. That is, when the abnormality notification flag and other error flags are set, when a new variable display of a decorative design is started, only the display effect according to the variable display is not executed. Notifications according to abnormal winning notifications and various error notifications are also continued.

  Then, a value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S836), and the value of the effect control process flag is set to a value corresponding to the decorative symbol variation process (step S802). (Step S837).

  In step S830, it is confirmed whether or not a variation pattern command that can be used for both a normal big hit and a probable big hit is received. In this embodiment, as shown in FIG. 23, the fluctuation pattern commands of “reach C / shortening”, “reach C”, and “super reach A” are usually used for both big hits and probable big hits. This is a variable pattern command. Therefore, the CPU 101 for effect control receives the variation pattern command that can be used for both the normal big hit and the probable big hit when the data indicating those fluctuation pattern commands is stored in the fluctuation pattern command storage area. It is determined that When it is determined that the variation pattern command that can be used during both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the stop symbol as the normal big hit symbol (step S832). Also, if it is determined that a variation pattern command other than the variation pattern command that can be used for both a normal big hit and a probable big hit is received, the stop symbol is combined with a decorative symbol corresponding to the received variation pattern. (Step S831). In this embodiment, a variation pattern command other than the variation pattern command that can be used for both a normal jackpot and a probable variation jackpot is used at the time of losing or is used according to the type of jackpot ( (See FIG. 23). Therefore, when the variation control command 101 other than the variation pattern command that can be used for both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the deviation based on the received variation pattern command. Whether or not a big hit (including a small hit) is determined, and if it is determined to be a big hit, the type of the big hit can be specified.

  In this way, the effect control microcomputer 100 receives the variation pattern command that can be used for both the normal big hit and the probable big hit, and when the display result specifying command cannot be received, Since the display result (stop symbol) is determined to be a normal jackpot symbol, it is possible to make the player recognize whether or not a specific gaming state occurs even if the display result specifying command cannot be received. In addition, by including information that can specify the decorative pattern display result in the variation pattern command, the effect control microcomputer 100 can display the display result identification command without using a command other than the variation pattern command and the display result identification command. Since the display result of the decorative design can be determined even if it cannot be received, the types of commands transmitted by the game control microcomputer 560 do not increase, and as a result, the control burden on the game control microcomputer 560 does not increase.

  FIG. 57 is a flowchart showing the decorative symbol variation process (step S802) in the effect control process. In the decorative symbol variation process, the effect control CPU 101 subtracts 1 from the value of the process timer (step S841) and subtracts 1 from the value of the variation time timer (step S842). When the process timer times out (step S843), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S844).

  Also, the abnormality notification flag and other error flags (RAM clear flag, random number circuit error flag, full tank error notification flag, door opening error notification flag, ball out error notification flag, prize ball error notification flag) are not set. As a condition, the control state for the rendering device is changed based on the display control execution data and sound number data set next (steps S845A and S845B).

  In step S845B, the effect control CPU 101 outputs a command to the VDP 109 in order to display an image corresponding to the variation pattern on the variable display device 9, for example. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  Further, the effect control CPU 101 executes serial setting processing in order to control various lamps as effect components in accordance with the lamp control execution data (step S845C). For example, when the gaming state is the normal state, the effect control CPU 101 supplies lamp control signals for lighting only the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f to a predetermined data storage area. set. When the gaming state is a probable change state, the center decoration LEDs 125a to 125f and the stage lamps LEDs 126a to 126f are turned on, and all the lamps provided on the gaming frame 11 side (excluding the dish lamp 83) are turned on. ) Of LED 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82d are set in a predetermined data storage area. The lamp control signal set in step S845C is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  When the abnormality notification flag or other error flag is set, the process data i (i is any one of 2 to n) (except for the sound number data i and the lamp control execution data i). Control of the rendering device is executed (steps S845A and S845D). Therefore, when the abnormality notification flag or other error flag is set, a sound effect according to the variable display of the decorative design and a display effect by the lamp are not executed, but an abnormal winning notification and various error notifications are performed. Sound output corresponding to (RAM clear notification, random number circuit error notification, full tank error notification, door opening error notification, ball outage error notification, prize ball error notification) and display effects by lamps are continued.

  If the variation time timer has timed out (step S846), the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S803) (step S848). Even if the variable time timer has not timed out, if the confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847), the process proceeds to step S848. Even if the variation time timer has not timed out, if the symbol confirmation designation command is received, the process shifts to control to stop variation.For example, a variation pattern command indicating a long variation time due to noise between substrates is received. Even in such a case, the variation of the decorative symbol can be terminated when the regular variation time has elapsed (when the variation of the special symbol has ended).

  FIG. 58 is a flowchart showing a decorative symbol variation stop process (step S803) in the effect control process. In the decorative symbol variation stop process, the effect control CPU 101 confirms whether or not the confirmed command reception flag is set (step S851). If the confirmed command reception flag is set, the confirmed command reception flag is reset. Then, control is performed to derive and display the determined stop symbol (step S853). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S854). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol.

  When it is determined to be a big hit, the value of the effect control process flag is updated to a value corresponding to the big hit display process (step S804) (step S855).

  If it is determined not to win, the effect control CPU 101 checks whether or not the time reduction state flag is set (step S856). The short time state flag is set when the gaming state is a short time state (see step S886 described later). If the time reduction state flag is set, the value of the time reduction variation counter is incremented by 1 (step S857).

  Then, the production control CPU 101 confirms whether or not the value of the time-varying variation number counter is 100 (step S858). If the value of the hour / short fluctuation counter is 100, the hour / short state flag is reset (step S859). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S860).

  In this embodiment, the effect control microcomputer 100 ends the variation (variable display) of the decorative symbols on the condition that the symbol confirmation designation command has been received (see steps S851 and S853). However, if the variation time timer based on the received variation pattern command times out, the variation of the decorative symbol may be controlled to end without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  FIG. 59 is a flowchart showing the jackpot display process (step S804) in the effect control process. In the jackpot display process, the effect control CPU 101 checks whether or not the jackpot start 1-4 designation command reception flag indicating that any of the jackpot start 1-4 designation commands has been received is set (step S871). If any one of the big hit start 1 to 4 designation command reception flags is set, control is performed to display a game start screen corresponding to the set flag on the variable display device 9 (step S872). Further, the set flag (any one of the big hit start 1 to 4 designation command reception flags) is reset (step S873). Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805) (step S874).

  In step S872, when receiving the big hit start 2 designation command, the effect control CPU 101 performs control to display a screen for informing the start of the big hit game on the variable display device 9. Further, when the big hit start 4 designation command is received, the variable display device 9 is controlled to display a screen for informing the start of the sudden probability change big hit game. When the jackpot start 1 designation command or the jackpot start 3 designation command is received, a screen for informing the start of the jackpot game (a screen for informing the start of the jackpot game and a notice of the sudden probability change jackpot game) The display is displayed on the variable display device 9.

  FIG. 60 is a flowchart showing the big hit end process (step S806) in the effect control process. In the jackpot end process, the effect control CPU 101 checks whether or not the jackpot end effect timer is set (step S880). If the big hit end effect timer is set, the process proceeds to step S885. When the jackpot end effect timer is not set, a jackpot end designation command reception flag (a jackpot end 1 designation command reception flag or a jackpot end 2 designation command reception flag) indicating that the jackpot termination designation command has been received is set. It is confirmed whether or not there is (step S881). When the jackpot end designation command reception flag is set, the jackpot end designation command reception flag is reset (step S882), and a value corresponding to the jackpot end display time is set in the jackpot end presentation timer (step S883). Then, the variable display device 9 is controlled to display a jackpot end screen (screen for informing the end of the jackpot game) (step S884). Specifically, an instruction to display the big hit end screen is given to the VDP 109.

  In this embodiment, even if the type of jackpot is different, the same jackpot end screen is displayed on the variable display device 9. For example, the big hit end display and the small hit end display are the same. However, the big hit end display (including the small hit end display) may be divided according to the type of the big hit.

  In step S885, 1 is subtracted from the value of the big hit end effect timer. Then, the effect control CPU 101 checks whether or not the value of the jackpot end effect timer is 0, that is, whether or not the jackpot end effect time has elapsed (step S886). If not, the process ends. If it has elapsed, the time reduction state flag is set (step S887), and the time reduction number counter is set to 0 (step S888). If the jackpot end 1 designation command is received, the probability variation state flag is reset (steps S889 and S891). When the jackpot end 1 designation command has not been received (when the jackpot end 2 designation command has been received), the probability variation state flag is set (steps S889, S890). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S892).

  The probability change state flag and the time reduction state flag are used, for example, when the effect control CPU 101 notifies the probability change state and the time reduction state by a background or a decorative light emitting body (lamp / LED) in the variable display device 9.

  Next, the notification control process process in step S707 will be described. First, various error notification modes executed in the notification control process will be described. FIG. 62 is an explanatory diagram showing an example of various error notification modes executed in the notification control process. As shown in FIG. 62, the RAM clear notification is executed for a predetermined period (for example, 31 seconds) after the gaming machine is turned on. When performing the RAM clear notification, the effect control CPU 101 lights the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) on the game frame 11 side, and the speaker 27. Is controlled to output a predetermined error sound (for example, a beep sound).

  The door opening error notification is executed while the game frame 11 is opened (for example, while the detection signal of the door opening sensor 155 is input). When performing the door opening error notification, the effect control CPU 101 performs control to blink the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (except the dish lamp 83) on the game frame 11 side. . In addition, control is performed so that a predetermined error sound (for example, a beep sound) is output to the speaker 27 together with a sound “the door is open”.

  Further, the ball break error notification is executed from the occurrence of a ball break until the ball break state is canceled (for example, while a detection signal of a ball break switch is input). The effect control CPU 101 performs control of blinking the LEDs 281a to 281l of the top frame lamp on the game frame 11 side when notifying the ball break error. The full tank error notification is executed from the occurrence of the full tank state of the lower pan until the full tank state is canceled (for example, while the detection signal of the full tank switch is input). When performing the full tank error notification, the effect control CPU 101 performs control to blink the LEDs 82a to 82d of the lower pan lamps on the game frame 11 side and to output a sound “the lower pan is full”. In addition, control is performed to display “the bottom plate is full” on the variable display device 9. In this case, when display by a game effect (for example, variable display of decorative symbols) is performed on the variable display device 9, a character string “bottom plate is full” is superimposed on the variable display device 9. .

  The prize ball error notification is executed from the occurrence of the prize ball abnormality until the prize ball abnormality state is canceled. When performing the prize ball error notification, the effect control CPU 101 performs control to blink the LEDs 281a to 281l of the top frame lamp on the game frame 11 side. Further, the random number circuit error notification is executed until the power is turned off after the random number circuit error is detected when the gaming machine is turned on. When performing random number circuit error notification, the effect control CPU 101 lights the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) on the game frame 11 side, and predetermined Is controlled to output an error sound (for example, a beep sound). Further, control is performed to display “error” on the variable display device 9. In this case, when display by a game effect (for example, variable display of decorative symbols) is performed on the variable display device 9, a character string “error” is superimposed on the variable display device 9.

  The abnormal winning error notification is executed for a predetermined period (for example, 30 seconds) from the occurrence of the abnormal winning. When performing the abnormal winning notification, the effect control CPU 101 blinks the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) on the game frame 11 side, and a predetermined number. Control is performed to output an error sound (for example, a beep sound).

  FIG. 63 is a flowchart showing the notification control process (step S707) in the main process shown in FIG. In the notification control process, the effect control CPU 101 performs one of steps S1900 and S1901 according to the value of the notification control process flag. In each process, the following process is executed.

  The notification start processing (step S1900) includes error flags (initial notification flag, random number circuit error flag, abnormal winning notification designation command reception flag, RAM clear flag, full tank error notification flag, prize ball error notification set in the command analysis processing. This is a process of starting error notification based on the flag and the ball break error notification flag. When the error notification is started, the value of the notification control process flag is changed to a value corresponding to the notification process (step S1901).

  The in-notification process (step S1901) is based on each error flag (initial notification flag, random number circuit error flag, abnormality notification flag, RAM clear flag, full tank error notification flag, winning ball error notification flag, out of ball error notification flag). Thus, the error notification process is continued. Further, the error notification is terminated based on the fact that the error notification period (initial notification period, RAM clear notification period) has elapsed, or the error notification cancellation flag set in the command analysis process. When the error notification is finished, the value of the notification control process flag is changed to a value corresponding to the notification start process (step S1901).

  64 and 65 are flowcharts showing notification start processing (step S1900) in the notification control process shown in FIG. In the notification start process, the production control CPU 101 first checks whether or not the initial notification flag is set (step S1911). If set, the effect control CPU 101 sets a value corresponding to the initial notification period value in the period timer 1 (step S1912). The initial notification period is a period in which initialization notification is performed in response to reception of the initialization designation command. The effect control CPU 101 ends the initialization notification when the initial notification period elapses. The initial notification period is the same as the prohibition period set by the game control microcomputer 560 in step S45. Therefore, the abnormality notification designation command is not received when the initialization notification is performed. Then, control goes to a step S1950.

  If the initial notification flag is not set, the production control CPU 101 checks whether or not the door opening error notification flag is set (step S1913). If set, the effect control CPU 101 selects error process data corresponding to the door opening error (step S1914). In this embodiment, error process data (error process data) for controlling the speaker 27 and the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d when various errors are notified. Prepared in advance. Details of the error process data will be described later.

  Next, the production control CPU 101 starts an error process timer (step S1915) and controls the speaker 27 according to the content of the error process data 1 (step S1916). For example, the effect control CPU 101 controls the speaker 27 so as to output a predetermined error sound (for example, a beep sound) together with a sound such as “the door is open”.

  Next, the effect control CPU 101 performs serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d (see FIG. 73). ) Is executed (step S1917). For example, the effect control CPU 101 sends lamp control signals for blinking the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in the game frame 11. Set to a predetermined data storage area. The lamp control signal set in step S1917 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each of the frame side IC substrates 602 to 604. Then, control goes to a step S1950.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether the random number circuit error flag is set (step S1918). If set, the effect control CPU 101 performs control to display a random number circuit error display screen indicating that it is a random number circuit error on the variable display device 9 (step S1919). Next, the effect control CPU 101 selects error process data corresponding to the random circuit error (step S1920). Next, the production control CPU 101 starts an error process timer (step S1921) and controls the speaker 27 according to the content of the error process data 1 (step S1922). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1923). For example, the effect control CPU 101 sends lamp control signals for blinking the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in the game frame 11. Set to a predetermined data storage area. The lamp control signal set in step S1923 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each of the frame side IC substrates 602 to 604. Then, control goes to a step S1950.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether or not the abnormal winning notification designation command reception flag is set (step S1924). If set, the production control CPU 101 selects error process data corresponding to the abnormal winning notification (step S1925). Next, the production control CPU 101 starts an error process timer (step S1926) and controls the speaker 27 according to the content of the error process data 1 (step S1927). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1928). For example, the effect control CPU 101 has predetermined lamp control signals for lighting the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in the game frame. Set to the data storage area. The lamp control signal set in step S1928 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604.

  Therefore, thereafter, sound output (output of an abnormal alarm sound) and lamp display (abnormal alarm flashing) according to the abnormal winning notification are performed. Then, the production control CPU 101 resets the abnormal winning notification designation command reception flag and sets an abnormal notification flag indicating that abnormal notification is being performed (step S1929). Then, control goes to a step S1950.

  If the abnormal winning notification designation command reception flag is not set, the production control CPU 101 checks whether or not the RAM clear flag is set (step S1930). If set, the production control CPU 101 selects error process data corresponding to the RAM clear notification (step S1931). The RAM clear notification is processing for notifying that the initialization process has been executed and the RAM has been cleared.

  Next, the production control CPU 101 starts an error process timer (step S1932) and controls the speaker 27 according to the contents of the error process data 1 (step S1933). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound). Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1934). For example, the effect control CPU 101 emits lamp control signals for lighting the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in the game frame 11. Set in a predetermined data storage area. The lamp control signal set in step S1934 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each of the frame side IC substrates 602 to 604. Then, control goes to a step S1950.

  Next, the effect control CPU 101 sets a value corresponding to the RAM clear notification period value in the period timer 2 (step S1935). The RAM clear notification period is a period during which a RAM clear notification is being notified. When the RAM clear notification period elapses, the effect control CPU 101 ends the RAM clear notification. The initial notification period and the RAM clear notification period may be the same period.

  If the RAM clear flag is not set, the production control CPU 101 checks whether or not the full tank error notification flag is set (step S1936). If set, the effect control CPU 101 performs control to display a full-tank error display screen on the variable display device 9 indicating that it is a full-fill error (step S1937). Next, the effect control CPU 101 selects error process data corresponding to a full tank error (step S1938). Next, the production control CPU 101 starts an error process timer (step S1939) and controls the speaker 27 according to the content of the error process data 1 (step S1940). For example, the production control CPU 101 controls the speaker 27 so as to output a sound such as “the bottom plate is full”.

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1941). For example, the effect control CPU 101 sets lamp control signals for causing the lamps 82 a to 82 d of the dish lamps provided in the game frame 11 to blink in a predetermined data storage area. The lamp control signal set in step S1941 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to the frame side IC substrate 605.

  If the full tank error notification flag is not set, the effect control CPU 101 checks whether or not the prize ball error notification flag is set (step S1942). If set, the production control CPU 101 selects error process data corresponding to the prize ball error (step S1943) and starts an error process timer (step S1944).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1945). For example, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281l of the ceiling lamps provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1945 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602.

  In this embodiment, a case where only a notification process using a lamp is performed and a notification process using sound using the speaker 27 is not performed when a prize ball error is notified will be described. The used notification may be performed.

  If the prize ball error notification flag is not set, the effect control CPU 101 confirms whether or not the ball break error notification flag is set (step S1946). If set, the production control CPU 101 selects error process data corresponding to the ball-out error (step S1947) and starts an error process timer (step S1948).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1949). For example, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281l of the ceiling lamps provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1949 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602.

  In this embodiment, a case where only a notification process using a lamp is performed and a notification process using a sound using the speaker 27 is not performed when a ball break error is notified will be described. The used notification may be performed.

  In step S1950, the effect control CPU 101 changes the value of the notification control process flag to a value corresponding to the processing during notification (step S1901), and ends the processing.

  66 to 68 are flowcharts showing the notification-in-progress process (step S1901) in the notification control process shown in FIG. In the notification process, the production control CPU 101 first checks whether or not the initial notification flag is set (step S1960). The initial notification flag is set when an initialization designation command is received from the game control microcomputer 560 (see step S632B in FIG. 49). If the initial notification flag is not set, the process proceeds to step S1965. If the initial notification flag is set, the value of the timer 1 set in step S1912 is decremented by 1 (step S1961). When the value of the period timer 1 becomes 0, that is, when the initial notification period has elapsed, the initial notification flag is reset (steps S1962, S1963). If the value of the period timer 1 is not 0, the processing is terminated as it is.

  Further, the effect control CPU 101 outputs to the VDP 109 a command for deleting the initial screen or the power failure recovery screen in the variable display device 9 (step S1964). The VDP 109 erases the initial screen or the power failure recovery screen from the variable display device 9 in response to the command. Then, the process proceeds to step S2010.

  If the initial notification flag is not set, the production control CPU 101 checks whether or not the door opening error notification flag is set (step S1965). If not set, the process proceeds to step S1971. If set, the production control CPU 101 decrements the error process timer by 1 (step S1966), and when the error process timer times out (step S1967), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1968).

  FIG. 69 is an explanatory diagram of a configuration example of an error notification process table. The error notification process table is a table in which process data to be referred to when the effect control CPU 101 performs control of the effect device and performs various error notifications is set. That is, the effect control CPU 101 performs error notification by controlling the speaker 27 and each lamp in accordance with data set in the error notification process table. The error notification process table includes data obtained by collecting a plurality of combinations of process timer set values, error lamp control execution data, and error sound number data. In the process timer set value, the duration in the sound output state and the lamp display state is set. The effect control CPU 101 refers to the error notification process table and controls the lighting / non-lighting state of each lamp in a manner set in the lamp display control execution data for the time set in the process timer set value. The sound output using the speaker 27 is controlled.

  The error notification process table shown in FIG. 69 is stored in the ROM of the effect control board 80. The error notification process table is prepared according to the error type (RAM clear notification, random number circuit error, full tank error, door opening error, out of ball error, prize ball error). Further, in this embodiment, every time the error process timer times out, the lighting of the pattern A and the lighting of the pattern B are switched, and the lighting or blinking is controlled.

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1969). In step S1969, the effect control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the CPU 101 for effect control causes the speaker 27 to output a sound “the door is open” and a predetermined error sound (for example, a beep sound).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1970). For example, in step S1970, the effect control CPU 101 causes the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided on the game frame 11 side to blink. Are set in a predetermined data storage area. The lamp control signal set in step S1970 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether or not the random number circuit error flag is set (step S1971). If set, the production control CPU 101 decrements the error process timer by 1 (step S1972), and when the error process timer times out (step S1973), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1974).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1975). In step S1975, the effect control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1976). For example, in step S1976, the effect control CPU 101 turns on the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (except the dish lamp 83) provided on the game frame 11 side. Are set in a predetermined data storage area. The lamp control signal set in step S1976 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the random number circuit error flag is not set, the effect control CPU 101 checks whether or not the abnormality notification flag is set (step S1977). If not set, the process proceeds to step S1984. If set, the variable display device 9 outputs a command to superimpose and display the abnormality notification screen on the screen displayed at that time to the VDP 109 (step S1978). The VDP 109 superimposes and displays the abnormality notification screen on the variable display device 9 according to the command (see FIG. 61C).

  Further, the effect control CPU 101 decrements the error process timer by 1 (step S1979), and when the error process timer times out (step S1980), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1981).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1982). In step S1982, the effect control CPU 101 outputs sound data indicating sound output in response to the abnormal winning notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the production control CPU 101 executes serial setting processing in order to control each lamp in accordance with the abnormal winning notification in accordance with the error lamp control execution data (step S1983). In step S1983, the effect control CPU 101 flashes the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (except the dish lamp 83) provided on the game frame 11 side. A control signal is set in a predetermined data storage area. The lamp control signal set in step S1983 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the abnormality notification flag is not set, the effect control CPU 101 checks whether or not the RAM clear flag is set (step S1984). The RAM clear flag is set when an initialization designation command is received from the game control microcomputer 560 (see step S632C in FIG. 49). If the RAM clear flag is not set, the process proceeds to step S1993. If the RAM clear flag is set, the process timer is decremented by 1 (step S1985), and the value of the timer 2 set in step S1935 is decremented by 1 (step S1986). When the process timer times out (step S1987), the error notification process data is switched. That is, the process timer setting value set next in the error process table is set in the process timer (step S1988).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1989). In step S1989, the production control CPU 101 outputs a control signal (sound number data) to the speech synthesis IC 173 to cause the speaker 27 to output a sound. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the effect control CPU 101 executes serial setting processing to control various lamps as effect parts in accordance with the error lamp control execution data (step S1990). In step S1990, the effect control CPU 101 turns on the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (except the dish lamp 83) provided on the game frame 11 side. A control signal is set in a predetermined data storage area. The lamp control signal set in step S1990 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604.

  Next, the production control CPU 101 confirms whether or not the value of the period timer 2 has become 0 (step S1991). When the value of the period timer 2 becomes 0, that is, when the RAM clear notification period has elapsed, the RAM clear flag is reset (step S1992), and the process proceeds to step S2010. If the value of the period timer 2 has not timed out, the processing is terminated as it is.

  Next, the effect control CPU 101 controls the speaker 27 based on the error sound number data (step S1997). In step S1997, the production control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control CPU 101 causes the speaker 27 to output a sound “the bottom plate is full”.

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1998). For example, in step S1998, the effect control CPU 101 sets a lamp control signal for blinking the lamps 82a to 82d of the dish lamps in a predetermined data storage area. The lamp control signal set in step S1998 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the full tank error notification flag is not set, the production control CPU 101 checks whether or not the prize ball error notification flag is set (step S1999). If not set, the process proceeds to step S2005. If set, the production control CPU 101 decrements the error process timer by 1 (step S2000), and when the error process timer times out (step S2001), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S2002).

  In addition, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S2003). For example, in step S2003, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S2003 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the prize ball error notification flag is not set, the production control CPU 101 checks whether or not the ball break error notification flag is set (step S2004). If not set, the process proceeds to step S2010. If set, the production control CPU 101 decrements the error process timer by 1 (step S2005), and when the error process timer times out (step S2006), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S2007).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S2008). For example, in step S2008, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S2008 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  In this embodiment, as shown in FIG. 73, when a ball break error or a prize ball error is notified, sound output from the speaker 27 is not performed, but a ball break error or a prize ball error is notified. In this case, sound output control using the speaker 27 may be performed.

  In step S2009, the effect control CPU 101 checks whether or not an error notification flag is set. If it is set, the process proceeds to step S2010. If it is not set, the process is terminated as it is. In step S2010, the production control CPU 101 changes the value of the notification control process flag to a value corresponding to the notification start process (step S1900), and ends the process.

  By executing the processing as described above, notification of various errors is executed. Also, error notification is executed in the order of initial notification, door opening error notification, random number circuit error notification, abnormal winning notification, RAM clear notification, full tank error notification, winning ball error notification, and out of ball error notification.

  Next, a lamp control signal set in a predetermined data storage area according to the error lamp control execution data will be described. FIG. 70 is an explanatory diagram showing an example of a lamp control signal output as a serial data method in the notification control process. As shown in FIG. 70, in this embodiment, two patterns of error lamp control execution data (pattern A and pattern B) are used for each error type. In this embodiment, the blinking display of the lamp is controlled by switching and using the error lamp control execution data for the pattern A and the pattern B. The effect control microcomputer 100 stores the lamp control signal shown in FIG. 70 in a predetermined lamp control signal storage area provided in advance in the ROM in association with the error lamp control execution data. Then, the effect control CPU 101 extracts a lamp control signal from a predetermined lamp control signal storage area based on the error lamp control execution data, and outputs it to the serial output circuit 353.

  Further, as shown in FIG. 70, each lamp control signal is stored in a predetermined lamp control signal storage area with the addresses of the output destination serial-parallel conversion ICs 611 to 615 added thereto. For example, since the address of the serial-parallel conversion IC 611 that supplies a control signal to some of the LEDs 281a to 281f among the ceiling lamps is “01”, the address “0001” is stored in the 8-digit data body for controlling the lamp. "Is added and stored. Further, since the address of the serial-parallel conversion IC 612 that supplies the control signal to the other part of the top frame lamps 281g to 281l is “02”, the address of the 8-digit data body for controlling the lamp is addressed. Stored with "0010" added. Since the address of the serial-parallel conversion IC 613 that supplies the control signal to the LEDs 283a to 283f of the right frame lamp is “03”, the address “0011” is added to the 8-digit data body for controlling the lamp. Stored in state. Since the address of the serial-parallel conversion IC 614 that supplies the control signal to the LEDs 282a to 282f of the left frame lamp is “04”, the address “0100” is added to the 8-digit data body for controlling the lamp. Stored in state.

  In the case of RAM clear notification, as shown in FIG. 70, a lamp control signal whose control data body is “00111111” is transmitted to each of the serial-parallel conversion ICs 611 to 614 whose addresses are “01” to “04”. Is done. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281l and 282a to 280a of all the lamps (excluding the dish lamp 83) provided on the game frame 11 side. 282f, 283a to 283f, 82a to 82d are turned on. In addition, when the RAM clear notification is made, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B, so that the game frame 11 side during error notification is being executed. The LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in are continuously turned on.

  In the ramp control signal output to the serial-parallel conversion IC 611, the first bit is an input signal to the LED 281a, the second bit is an input signal to the LED 281b, the third bit is an input signal to the LED 281c, and the fourth bit is The input signal to the LED 281d corresponds to the input signal to the LED 281e, the fifth bit corresponds to the input signal to the LED 281f. In the ramp control signal output to the serial-parallel conversion IC 612, the first bit is an input signal to the LED 281g, the second bit is an input signal to the LED 281h, the third bit is an input signal to the LED 281i, and the fourth bit is The input signal to the LED 281j, the fifth bit corresponds to the input signal to the LED 281k, and the sixth bit corresponds to the input signal to the LED 281l. In the ramp control signal output to the serial-parallel conversion IC 613, the first bit is an input signal to the LED 283a, the second bit is an input signal to the LED 283b, the third bit is an input signal to the LED 283c, and the fourth bit is The input signal to the LED 283d corresponds to the input signal to the LED 283e, the fifth bit corresponds to the input signal to the LED 283f. In the ramp control signal output to the serial-parallel conversion IC 614, the first bit is an input signal to the LED 282a, the second bit is an input signal to the LED 282b, the third bit is an input signal to the LED 282c, and the fourth bit is The input signal to the LED 282d corresponds to the input signal to the LED 282e, the fifth bit corresponds to the input signal to the LED 282f.

  When notifying the door opening error, as shown in FIG. 70, first, based on the error lamp control execution data of pattern A, the serial-parallel conversion ICs 611 to 611 having addresses from “01” to “04”. In 614, a lamp control signal whose control data body is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281l and 282a to 280a of all the lamps (excluding the dish lamp 83) provided on the game frame 11 side. 282f, 283a to 283f, 82a to 82d are turned on. When the process data is switched, the control data body is “00000000” in the serial-parallel conversion ICs 611 to 614 having addresses “01” to “04” based on the error lamp control execution data of pattern B. A lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 0 is output, and the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are turned off. Is done. When notifying the door opening error by repeating such control, the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are blinked at predetermined time intervals. Control is performed.

  When notifying a full tank error, as shown in FIG. 70, first, based on the error lamp control execution data of the pattern A, the control data body is “00001111” in the serial-parallel conversion IC 615 whose address is “05”. Lamp control signal is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to the dish lamp LEDs 82a to 82d are 1, and the dish lamp LEDs 82a to 82d are turned on. At the time of process data switching, based on the error lamp control execution data for pattern B, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 615 whose address is “05”. That is, a lamp control signal in which the logical values of the bits corresponding to the LED of the dish lamp are all 0 is output, and the LEDs 82a to 82d of the dish lamp are turned off. When such a control is repeatedly performed to notify a full tank error, control is performed so that only the LED lamps 82a to 82d of the pan lamp blink at a predetermined time interval.

  In the ramp control signal output to the serial-parallel conversion IC 615, the first bit is an input signal to the LED 82a, the second bit is an input signal to the LED 82b, the third bit is an input signal to the LED 82c, and the fourth bit is The input signal to the LED 82d and the fifth bit correspond to the input signal to the LED 83.

  When notifying the prize ball error, as shown in FIG. 70, first, based on the error lamp control execution data of pattern A, the control data body is “00111111” in the serial-parallel conversion IC 611 whose address is “01”. Is transmitted to the serial-parallel conversion IC 612 whose address is “02”, and the lamp control signal whose control data body is “00000000” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to some of the LEDs of the ceiling lamp are all 1 is output, and only some of the LEDs 281a to 281f of the ceiling lamp provided on the game frame 11 side are lit. Is done. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 611 whose address is “01” based on the error lamp control execution data of pattern B, and the address is A lamp control signal whose control data body is “00111111” is transmitted to the serial-parallel conversion IC 612 of “02”. That is, a lamp control signal in which the logical values of the bits corresponding to some other LEDs of the top frame lamp are all 1 is output, and the other partial LEDs 281g˜ of the top frame lamp provided on the game frame 11 side Only 281l is lit. When such a control is repeatedly performed and a prize ball error is notified, the LED 281a to 281f and the LEDs 281g to 281l of the top frame lamp provided on the game frame 11 side are alternately blinked at predetermined time intervals. Is done.

  When notifying the random number circuit error, as shown in FIG. 70, the lamp control signal whose control data body is “00111111” is sent to each serial-parallel conversion IC 611 to 614 having addresses “01” to “04”. Is sent. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281l and 282a to 280a of all the lamps (excluding the dish lamp 83) provided on the game frame 11 side. 282f, 283a to 283f, 82a to 82d are turned on. In addition, when the RAM clear notification is made, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B, so that the game frame 11 side during error notification is being executed. The LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in are continuously turned on.

  In the case of notifying an abnormal winning error, as shown in FIG. 70, first, serial-parallel conversion ICs 611 to 614 having addresses from “01” to “04” based on the error lamp control execution data of pattern A. A lamp control signal whose control data body is “00101010” is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to some of the LEDs of the lamp provided on the game frame 11 side are 1 is output, and some of the LEDs 281b of each lamp provided on the game frame 11 side. , D, f, h, j, l, 282b, d, f, 283b, d, f only are lit. As described above, in the control signal output to the serial-parallel conversion IC 611, 1 in the second bit is an input signal to the LED 281b, 1 in the fourth bit is an input signal to the LED 281d, and 1 in the sixth bit is This corresponds to an input signal to the LED 281f. In the control signal output to the serial-parallel conversion IC 612, the second bit 1 is an input signal to the LED 281h, the fourth bit 1 is an input signal to the LED 281j, and the sixth bit 1 is an input signal to the LED 281l. It corresponds to. In the control signal output to the serial-parallel conversion IC 613, the second bit 1 is an input signal to the LED 283b, the fourth bit 1 is an input signal to the LED 283d, and the sixth bit 1 is an input signal to the LED 283f. It corresponds to. In the control signal output to the serial-parallel conversion IC 614, the 1st bit of the second bit is an input signal to the LED 282b, the 1st bit is the input signal to the LED 282d, and the 1st bit is the input signal to the LED 282f. It corresponds to.

  Further, when the process data is switched, based on the error lamp control execution data of pattern B, the lamp control whose control data body is “00010101” in the serial-parallel conversion ICs 611 to 614 with addresses “01” to “04”. A signal is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to some other LEDs of the ceiling lamps provided on the game frame 11 side are all 1 is output, and each lamp provided on the game frame 11 side. Only some of the other LEDs 281a, c, e, g, i, k, 282a, c, e, 283a, c, e are lit. As described above, in the control signal output to the serial-parallel conversion IC 611, 1 in the first bit is an input signal to the LED 281a, 1 in the third bit is an input signal to the LED 281c, and 1 in the fifth bit is It corresponds to the input signal to the LED 281e. In the control signal output to the serial-parallel conversion IC 612, the first bit 1 is an input signal to the LED 281g, the third bit 1 is an input signal to the LED 281i, and the fifth bit 1 is an input signal to the LED 281k. It corresponds to. In the control signal output to the serial-parallel conversion IC 613, the first bit 1 is an input signal to the LED 283a, the third bit 1 is an input signal to the LED 283c, and the fifth bit 1 is an input signal to the LED 283e. It corresponds to. In the control signal output to the serial-parallel conversion IC 614, the first bit 1 is an input signal to the LED 282a, the third bit 1 is an input signal to the LED 282c, and the fifth bit 1 is an input signal to the LED 282e. It corresponds to.

  When a prize ball error is notified by repeatedly performing the control as described above, the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of the lamps provided on the game frame 11 side are alternately staggered at a predetermined time interval. Control is performed so as to blink.

  In the example shown in FIG. 70, when error notification is performed, the lamp control signal is also supplied to the serial-parallel conversion ICs 611 to 615 of the lamps that are not subject to display control. For example, when the RAM clear notification is given, it is not necessary to control the lighting or blinking of the pan lamp, but in the example shown in FIG. 70, the serial-parallel conversion IC 615 whose address is “05” is also supported. A lamp control signal whose bit logical values are all 0 is output. By doing so, it is possible to make sure that the LED that is not the control target at the time of error notification is turned off.

  When performing error notification, lamp control signals may not be output (transmitted) to the serial-parallel conversion ICs 611 to 615 of lamps that are not subject to display control. FIG. 71 is an explanatory diagram showing another example of a lamp control signal output as a serial data method in the notification control process.

  When performing RAM clear notification, door opening error notification, random number error notification, or abnormal winning error notification, the dish lamp is not subject to display control, and as shown in FIG. 71, the serial whose address is “05”. -A lamp control signal is not output to the parallel conversion IC 615. In addition, when performing a ball break error notification or a prize ball error notification, the left frame lamp and the right frame lamp are not subject to display control in addition to the dish lamp, and as shown in FIG. The lamp control signal is not output to the serial-parallel conversion ICs 613 to 615 that are "to" 05 ". In addition, when performing full tank error notification, only the dish lamp is subject to display control. Therefore, as shown in FIG. 71, the serial-parallel conversion ICs 611 to 614 whose addresses are “01” to “04” are displayed. Does not output the lamp control signal. By doing so, it is possible to reduce the lamp control signal output from the production control microcomputer 100 to each of the frame side IC substrates 602 to 605.

  In the example shown in FIGS. 70 and 71, the case where various error notifications are performed using only the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of the lamps provided on the game frame 11 side has been described. However, in addition to these, various error notifications may be performed using center decoration lamps or stage lamp LEDs 125a to 125f and 126a to 126f provided on the game board 6 side.

  Next, a motor control signal output when the movable members 151 to 153 are operated in the game effect will be described. FIG. 72 is an explanatory diagram showing an example of a motor control signal output as a serial data system in a game effect. The motor control signal shown in FIG. 72 is, for example, in the serial setting process in step S845C when variable display including a notice effect using the movable members 151 to 153 is executed in the decorative symbol changing process shown in FIG. It is set in a predetermined data storage area. The effect control microcomputer 100 stores the motor control signal shown in FIG. 72 in a predetermined motor control signal storage area provided in advance in the ROM in association with, for example, display control execution data. Then, the effect control CPU 101 extracts a motor control signal from a predetermined motor control signal storage area based on the display control execution data, and outputs the motor control signal to the serial output circuit 353.

  Also, as shown in FIG. 72, each motor control signal is stored in a predetermined lamp control signal storage area with the address of the output destination serial-parallel conversion IC 616 added thereto. In this embodiment, since the address of the serial-parallel conversion IC 616 that supplies a control signal to each of the motors 151a, 152a, 153a is “06”, the address “0110” is stored in the 8-digit data body for controlling the motor. Is stored in a state where is added.

  When the trolley 151 is operated in the reverse direction as a movable member, a motor control signal whose control data body is “00000010” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (second bit of the control data) corresponding to the reverse operation of the motor 151a for driving the trolley 151 is 1 is output, and the trolley 151 is driven by driving the motor 151a. Is operated. When the operation of the truck 151 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 151a (the second bit of the control data) is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a. Is done. In this embodiment, when the trolley 151 is operated in the reverse direction, the trolley 151 is not detected by the position sensor 151b, and the driving time of the motor 151a has elapsed for a predetermined time (for example, 1 second). Then, the driving of the motor 151a is stopped.

  When the beam 152 is moved in the forward direction as a movable member, a motor control signal whose control data body is “00000100” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (the third bit of the control data) corresponding to the forward direction operation of the motor 152a for driving the beam 152 is 1 is output, and the beam 152 is driven by driving the motor 152a. Is operated. When the operation of the beam 152 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the positive direction operation of the motor 152a (the third bit of the control data) is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a. Is done. In this embodiment, when the beam 152 is moved in the forward direction, the beam 152 is detected by the position sensor 152b, and the driving time of the motor 152a has elapsed for a predetermined time (for example, 1 second). The driving of the motor 152a is stopped.

  When the beam 152 is moved in the reverse direction as a movable member, a motor control signal whose control data body is “00001000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the reverse operation of the motor 152a for driving the beam 152 (the fourth bit of the control data) is output, and the motor 152a is driven to drive the beam 152. Is operated. When the operation of the beam 152 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 152a (the fourth bit of the control data) is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a. Is done. In this embodiment, when the beam 152 is operated in the reverse direction, the beam 152 is not detected by the position sensor 152b, and the driving time of the motor 152a has elapsed for a predetermined time (for example, 1 second). The driving of the motor 152a is stopped.

  When the skeleton 153 is moved in the forward direction as a movable member, a motor control signal whose control data body is “00010000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 153a for driving the skeleton 153 (the fifth bit of the control data) is output, and the skeleton 153 is driven by driving the motor 153a. Is operated. When the operation of the skeleton 153 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the forward operation of the motor 153a (the fifth bit of the control data) is output, and the operation of the skeleton 153 is stopped by stopping the driving of the motor 153a. Is done. In this embodiment, when the skeleton 153 is moved in the forward direction, the skeleton 153 is detected by the position sensor 153b, and the driving time of the motor 153a has elapsed for a predetermined time (for example, 1 second). The drive of the motor 153a is stopped.

  When the skeleton 153 is moved in the reverse direction as the movable member, a motor control signal whose control data body is “00100000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the reverse operation of the motor 153a for driving the skeleton 153 (the sixth bit of the control data) is output, and the skeleton 153 is driven by driving the motor 153a. Is operated. When the operation of the skeleton 153 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 153a (the sixth bit of the control data) is output, and the operation of the skeleton 153 is stopped by stopping the driving of the motor 153a. Is done. In this embodiment, when the skeleton 153 is operated in the reverse direction, the skeleton 153 is not detected by the position sensor 153b, and the driving time of the motor 153a has elapsed for a predetermined time (for example, 1 second). The drive of the motor 153a is stopped.

  Next, the serial setting process will be described. FIG. 73 is a flowchart illustrating an example of the serial setting process. In the serial setting process, for example, when decorative display of a decorative design is performed in the effect control process process (see steps S835C and 845C) or various error notifications are performed (steps S1970, S1976, S1983, S1990, S1998, S2003, S2008). ) Is executed.

  In the serial setting process, the production control CPU 101 first reads out lamp control execution data (such as lamp lighting pattern data accompanying the variation pattern, motor control data (step S835C only), etc.) from the ROM (step S950). In this case, for example, when performing the serial setting process during the execution of the variable display of decorative symbols, the effect control CPU 101 reads the lamp control execution data of the process table shown in FIG. When serial setting processing is performed in the notification control process, the error lamp control execution data in the error notification process table shown in FIG. 69 is read.

  Next, the effect control CPU 101 confirms whether or not there is a change in the display state of each lamp based on the read lamp control execution data (step S951). If there is a change in the display state of each lamp, the effect control CPU 101 extracts the lamp control signal to which the address of the serial / parallel conversion IC of the lamp to be controlled for display is added from a predetermined lamp control signal storage area (step). S952). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 16 are added to the extracted ramp control signal and set in a predetermined data storage area provided in the RAM (step S953). Then, a lamp control signal output request flag is set (step S954).

  For example, when the serial setting process is executed in steps S907, S922, and S929 in the notification control process, one of the addressed lamp control signals shown in FIG. 70 is read in step S952, and the data is read in step S953. It will be set in the storage area.

  Next, the production control CPU 101 reads display control execution data from the ROM (step S955). In this case, for example, when performing serial setting processing during execution of variable display of decorative symbols, the effect control CPU 101 reads display control execution data of the process table shown in FIG. On the other hand, when the serial setting process is performed in the notification control process, the error notification process table shown in FIG. 69 does not include display control execution data, so that it is determined as N in the next step S956. become.

  Next, the effect control CPU 101 confirms whether or not the movable effect of any of the movable members 151 to 153 is included in the game effect based on the read display control execution data (step S956). When the movable members 151 to 153 are movable, the effect control CPU 101 adds a motor control signal to which the address (“06” in this example) of the serial-parallel conversion IC of the movable members 151 to 153 to be moved is added. Are extracted from a predetermined motor control signal storage area (step S957). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 16 are added to the extracted motor control signal and set in a predetermined data storage area provided in the RAM (step S958). Then, a motor control signal output request flag is set (step S959).

  For example, if the decorative design variable display includes a notice effect or the like, and any of the movable members 151 to 153 is movable, when the serial setting process is executed in steps S835C and S845C, the diagram is displayed in step S952. One of the motor control signals with an address shown in 72 is read out and set in the data storage area in step S953.

  FIG. 74 is an explanatory diagram showing a configuration example of a data storage area in which a lamp control signal and a motor control signal to be output are set. In this example, nine data storage areas for storing the lamp control signal or the motor control signal are prepared, and the lamp control signal and the motor are sequentially output to the panel side IC substrate 601 and the frame side IC substrates 602 to 605. Control signals are sequentially stored in step S953.

  FIG. 75 is a flowchart showing a specific example of the serial input / output process (step S708). In the serial input / output process, the production control CPU 101 first checks whether the lamp control signal output request flag or the motor control signal output request flag is set (step S970). If set, the lamp control signal output request flag or the motor control signal output request flag is reset (step S971), and the lamp control signal and motor control signal stored in the data storage area are transferred to the serial output circuit 353. Output (step S972). In this case, when a plurality of lamp control signals are set in the data storage area, the effect control CPU 101 sequentially reads each lamp control signal and outputs it to the serial output circuit 353 in step S972. The output lamp control signal and motor control signal are converted into serial data by the serial output circuit 353 and serially transmitted to the board side IC board 601 and the frame side IC boards 602 to 605 via the relay boards 606 and 607. It will be output as a data method.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the board side IC substrate 601 via the relay substrates 606 and 607 (step S973). The input IC 621 mounted on the panel-side IC board 601 latches the detection signals of the position sensors 151b, 152b, and 153b based on the input input signal being input, and relays boards 606 and 607 as a serial data system. Is output to the effect control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S974). In step S974, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying the input data from the input IC 621 by a time.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the frame side IC substrate 605 via the relay substrate 607 (step S975). The input IC 620 mounted on the board-side IC board 605 latches the detection signals of the operation buttons 81a to 81e based on the input input signal being input, and produces the serial data system via the relay board 607. The data is output to the control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S976). In step S976, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying by the time for which the serial input circuit 354 receives the input data from the input IC 620.

  FIG. 76 is an explanatory diagram showing an example of the status of the display effect in the variable display device 9, the sound effect by the speaker 27, and the display effect by each lamp. FIG. 76 (A) shows an example when the decorative display is variably displayed on the variable display device 9.

  FIG. 76 (B) shows an example in which initialization notification is performed in the variable display device 9. As shown in FIG. 76 (B), when the initialization designation command is received and initialization notification is performed in the variable display device 9, a predetermined period (for example, 31 seconds) after the initialization designation command is received, The LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d of all the lamps (excluding the dish lamp 83) provided in the game frame 11 are turned on, and a predetermined error sound is output from the speaker 27, and the RAM Notify that clearing has been performed.

  In FIG. 76 (C), abnormality notification is performed in the variable display device 9, abnormality notification sound is output by the speaker 27, and abnormality notification display (for example, LED 281a to 281l, 282a to 282f, 283a to 283f) of each lamp is performed. An example in the case of blinking) is shown. When receiving the abnormal prize notification designation command from the game control microcomputer 560, the production control microcomputer 100 performs control to display an abnormality notification screen on the variable display device 9, and outputs an abnormality notification sound from the speaker 27. Control is performed to display abnormality notification on the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of each lamp. Further, even if the decorative pattern variable display is started in response to the reception of the variation pattern command, the display of the abnormality notification screen on the variable display device 9, the output of the abnormality notification sound from the speaker 27, and the LEDs 281a to 281l of the lamps, The abnormality notification display of 282a to 282f and 283a to 283f is continued. Even after the variable display of the decorative symbols is completed, the abnormality notification screen is displayed on the variable display device 9, the abnormality notification sound is output from the speaker 27, and the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of each lamp are displayed. The abnormality notification display is continued.

  Since the production control microcomputer 100 does not execute control for deleting the abnormality notification screen, control for stopping the output of the abnormality notification sound, and control for stopping the abnormality notification display, the display of the abnormality notification screen on the variable display device 9 is not performed. The output of the abnormality notification sound from the speaker 27 and the abnormality notification display of the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of each lamp continue until the power supply to the gaming machine is stopped. However, when the predetermined time has elapsed after the display of the abnormality notification screen, the output of the abnormality notification sound, and the abnormality notification display is started, the production control microcomputer 100 displays the abnormality notification screen, the output of the abnormality notification sound, and the abnormality notification. You may control to stop a display.

  Further, in this embodiment, the game control microcomputer 560 does not detect abnormal winnings for a predetermined period (a period during which the initialization notification is executed) after the power supply to the game machine is started, and does not perform game control. The abnormal winning notification designation command is not transmitted from the microcomputer 560. However, the game control microcomputer 560 always detects an abnormal winning when the value of the special symbol process flag is less than a predetermined value (5 in this embodiment), so that the effect control microcomputer 100 performs the game control. If an abnormal winning notification designation command is received during a predetermined period after the power supply to the machine is started, the abnormal winning notification may not be performed.

  Also, in this embodiment, when the game control microcomputer 560 detects that one game ball has won a big winning opening when it is not in the big win game state, the abnormal control notification designation command is sent to the effect control microcomputer. Although it is transmitted to 100, when it is detected that a predetermined number (a plurality of) game balls have won the big winning opening when not in the big hit gaming state, an abnormal winning notification designation command may be transmitted. Further, when it is not in the big hit gaming state, when it is detected that a predetermined number (a plurality of) gaming balls have won within a predetermined time, an abnormal winning notification designating command may be transmitted. When receiving the abnormal winning notification designation command, the production control microcomputer 100 displays the abnormality notification screen, outputs the abnormality notification sound, and displays the abnormality notification as described above.

  As described above, according to this embodiment, the production control microcomputer 100 is based on the production control command received from the game control microcomputer 560, and the LEDs 125a to 125f, 126a to 126f, and 281a of the respective lamps. A control signal for controlling ˜281 l, 282 a to 282 f and 283 a to 283 f is output in a serial signal system. Further, the serial-parallel conversion ICs 616 to 619 mounted on the panel side IC substrate 601 and the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605 are connected through one system wiring. At the same time, different address information is assigned in advance, and only the control signal with its own address information added is converted into a parallel signal system and output. In addition, when the production control microcomputer 100 outputs a control signal for controlling the serial-parallel conversion ICs 616 to 619 provided in the game board 6, address information that can identify the serial-parallel conversion ICs 616 to 619 is provided. The added control signal is output by the serial signal system. In addition, when the production control microcomputer 100 outputs a control signal for controlling the serial-parallel conversion ICs 611 to 615 provided in the game frame 11, address information that can identify the serial-parallel conversion ICs 611 to 615 is provided. The added control signal is output by the serial signal system. Therefore, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  Further, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board-side IC board 601 and the serial-parallel mounted on the frame-side IC boards 602 to 604 are formed by the relay boards 606 and 607. The connection with the conversion ICs 611 to 615 is relayed. The relay board 607 relays the connection between the serial / parallel conversion ICs 611 to 615 mounted on the frame side IC boards 602 to 604 and the effect control microcomputer 100. Therefore, the detachment work between the game frame and the game board 6 can be easily performed only by performing the connection work and the detachment work to the relay boards 606 and 607.

  Further, according to this embodiment, the frame side IC substrate 602 is provided as a collective substrate on which two serial-parallel conversions 611 and 612 are mounted on the game frame side. A board-side IC board 601 as a collective board on which four serial-parallel conversion ICs 616 to 619 are mounted is provided on the game board 6 side. Therefore, the boards on which the serial-parallel conversion ICs are mounted can be integrated, and the number of parts in the gaming machine can be reduced.

  Further, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605 are connected to each other by the connector. Are connected through one line of wiring. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed simply by attaching and detaching the connector, and the game frame 11 and the game board 6 can be attached and detached more easily.

  Further, according to this embodiment, the game control microcomputer 560 transmits the effect control command to the effect control microcomputer 100 in the serial signal system using the serial output circuit 78. Therefore, the number of wires between the game control microcomputer 560 and the effect control microcomputer 100 can also be reduced.

  In addition, according to this embodiment, the production control microcomputer 100 includes the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion mounted on the frame side IC substrates 602 to 605. A clock signal used in common for the ICs 611 to 615 and the input ICs 620 and 621 is output. Therefore, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621 can be easily synchronized. The number of clock signal wirings can also be reduced.

  In this embodiment, the production control microcomputer 100 may store the device IDs of the serial-parallel conversion ICs 611 to 619 as addresses in a predetermined address storage area of the RAM in advance. If comprised in that way, each lamp | ramp 125a-125f, 126a-126f, 281a-281l, 282a-282f, 283a-283f will be controlled using ID information intrinsic | native to serial-parallel conversion IC611-619 as address information. be able to.

  Further, in this embodiment, since the initialization notification is given priority over the abnormality notification, it is possible to prevent a situation in which the initialization notification is difficult to recognize. That is, the initialization notification is performed prominently. The game control microcomputer 560 transmits an initialization designation command when a user reset that causes the program to start executing from the top address (for example, address 0000) occurs even when power supply to the game machine is started. As a cause of the occurrence of the user reset, for example, in the case where the watchdog timer is configured to be used, there is a case where the watchdog timer has timed out due to an illegal act that prevents the smooth progress of the program. Such fraudulent acts are configured to be controlled in a probabilistic state, particularly when a predetermined jackpot symbol (predetermined probability variation jackpot symbol or sudden probability variation jackpot symbol) is determined based on a random number for determining the jackpot symbol. It is likely to occur when it is. That is, the game control microcomputer 560 is initialized, and a counter for generating a jackpot symbol determining random number is initialized, and it is easy to receive an illegal act that makes it easy to grasp the count value of the counter. By making the initialization notice conspicuous as in this embodiment, it is possible to easily grasp from the outside of the gaming machine that the gaming control microcomputer 560 has been initialized. Is easily recognized.

  In this embodiment, the production control board 80, the relay board 606, and the relay board are connected as the production control board 80, the board side IC board 601, the frame side IC boards 602-605, and the relay boards 606 and 607. 607 is connected to the bus type by one wiring route, and the serial-parallel conversion ICs 611 to 619 mounted on the board side IC substrate 601 and the frame side IC substrates 602 to 604 are connected to the bus type by one system wiring route. As described above, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 are connected in series (hereinafter also referred to as daisy chain connection), or the frame side IC substrates 602 to 605 are connected. The serial-parallel conversion ICs 611 to 615 mounted on the PC are connected in series (daisy chain type connection), so that It may be to reduce the number.

  FIG. 77 is a block diagram showing another configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605. In the example shown in FIG. 77, the effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 607 together with serial data as a control signal. The relay board 607 further supplies serial data and a clock signal input from the production control microcomputer 100 to the board side IC board 601 via the relay board 606.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 619. As shown in FIG. 77, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 have serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board side IC substrate 601. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. 15 is input to the data latch unit 651 of the next serial-parallel conversion IC, so that serial data is sequentially sent to the serial-parallel conversion ICs 616 to 619. What is necessary is just to forward. The serial-parallel conversion ICs 616 to 619 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided on the game board 6. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 619 and the input IC 621.

  The relay board 607 supplies the serial data and the clock signal input from the production control microcomputer 100 to the frame side IC board 604 and the frame side IC board 605. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 614. As shown in FIG. 77, the serial-parallel conversion ICs 611 to 614 mounted on the frame side IC substrates 602 to 604 have serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 614 to the other serial-parallel conversion ICs 611 to 613 mounted on the frame side IC substrates 602 and 603. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. 15 is input to the data latch unit 651 of the next serial-parallel conversion IC, whereby serial data is sequentially sent to each serial-parallel conversion IC 611-614. What is necessary is just to forward. And each serial-parallel conversion IC611-614 converts the input serial data into parallel data, and supplies it to LED of each lamp provided in the game frame 11. FIG.

  The clock signal input to the frame side IC board 602 is branched on the frame side IC board 604 and input to the serial-parallel conversion IC 614 and also input to the frame side IC board 602. The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602, input to each serial-parallel conversion IC 611, 612, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 613. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  Further, as the LED of the lamp provided in the game frame 11 or the game board 6, an LED that performs gradation control (for example, a multi-color LED) may be used so that the brightness can be controlled. FIG. 78 is an explanatory diagram showing an example of a pulse train supplied to the LED when the gradation control of the LED is performed. FIG. 78 shows a pulse train when the gradation control of the LED is performed in eight stages. That is, as shown in FIG. 78, the production control microcomputer 100 performs tone control of the LED by outputting a signal in which the number of pulses is changed in accordance with the luminance. In this case, for example, the period of the clock signal is set as one time element, and one control unit time is constituted by seven time elements. Then, the brightness of the LED may be controlled depending on how many time elements for supplying the pulse current in one control unit time are included. For example, as shown in FIG. 78 (a), the brightness of the LED becomes the brightest when a pulse current is passed through the LED in all the time elements among the seven time elements in one control unit time. In addition, as shown in FIG. 78 (g), the brightness of the LED is the darkest when the pulse current is passed through the LED for only one time element among the seven time elements in one control time. Further, as the number of time elements for applying a pulse current to the LED decreases to 6, 5, 4, 3, and 2, the brightness of the LED gradually decreases (FIGS. 78 (b) to (f)). . As shown in FIG. 78 (h), when the pulse current is not allowed to flow through the LED in all seven time elements included in one control unit time, the LED is turned off.

  When the gradation control of the LED is performed, the effect control microcomputer 100 uses the serial output circuit 353 to transmit a control signal including information on the number of pulses corresponding to the luminance (for example, logical value 0 or 1). Output as serial data. The production control microcomputer 100 is not limited to the number of pulses, and may output a control signal including information on a pulse width corresponding to the luminance as a serial data system using the serial output circuit 353. .

  In addition, when controlling the brightness using the LED of the lamp that performs gradation control, a serial-parallel conversion IC that outputs a control signal to the LED of the lamp that adjusts the brightness, and a control signal to the LED of the lamp that does not adjust the brightness You may make it differ from the serial-parallel conversion IC to output. FIG. 79 shows the effects control board 80, relay boards 606 and 607, board-side IC board 601, frame-side IC boards 602, 603, 604, and 605 in the case of controlling the brightness using the LED of the lamp that performs gradation control. It is a block diagram which shows the example of a structure.

  In the example shown in FIG. 79, serial-parallel conversion ICs 611a, 612a, 613a, and 614a that output a control signal to the LED of the lamp that does not adjust the brightness, and serial-parallel conversion that outputs a control signal to the LED of the lamp that adjusts the brightness. ICs 611b, 612b, 613b, and 614b are separately mounted on the frame side IC substrates 602, 603, and 604, respectively. Each serial-parallel conversion IC 611a, 612a, 613a, 614a converts serial data input from the production control microcomputer 100 via the relay boards 606, 607 into parallel data, and does not adjust the brightness. To the LED. The serial-parallel conversion ICs 611b, 612b, 613b, 614b convert serial data input from the production control microcomputer 100 via the relay boards 606, 607 into parallel data, and adjust the brightness of each lamp. Supply to LED.

  In addition, in the example shown in FIG. 79, the case where gradation control is performed by the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of the respective lamps mounted on the game frame 11 side is shown, but it is mounted on the game board 6 side. You may make it perform gradation control with LED125a-125f of each lamp | ramp, 126a-126f. In this case, the panel-side IC board 601 also has a serial-parallel conversion IC that outputs a control signal to the LED of the lamp that does not adjust the brightness, and a serial-parallel conversion IC that outputs a control signal to the LED of the lamp that adjusts the brightness. Will be installed separately.

  As described above, in the example shown in FIG. 78 and FIG. 79, the production control microcomputer 100 uses a pulse according to the luminance when the lamp LED emits light as the control signal for controlling the light emission state of the lamp LED. Output a signal with the number changed. Therefore, it is possible to perform gradation control for adjusting the brightness of the LED of the lamp. In this embodiment, the gradation control is performed by outputting a signal with the number of pulses changed. However, other methods may be used as long as a signal with a changed pulse amount is output. Gradation control may be performed. For example, the production control microcomputer 100 may perform gradation control of the LED of the lamp by outputting a signal with a changed pulse width.

  Since the LED of the lamp that does not adjust the brightness has only the ON state or the OFF state during one control unit time, in the example shown in FIG. 79, the serial-parallel that outputs the control signal to the LED of the lamp that adjusts the brightness. By making the conversion IC different from the serial-parallel conversion IC that outputs a control signal to the LED of the lamp that does not adjust the brightness, the number of times of data transfer to the LED of the lamp that does not adjust the brightness can be reduced.

  In the above embodiment, the production control microcomputer 100 ends the initialization notification when a predetermined period has elapsed (see steps S901 to S905), but ends the initialization notification at another timing. May be. For example, the initialization notification is ended when the decorative symbol variable display is started for the first time after the initialization notification is started, or the abnormal winning notification designation command is received before the decorative symbol variable display is started. Sometimes the initialization notification may be terminated. Alternatively, the initialization notification may be terminated when the customer waiting demonstration designation command is received or when the first effect control command other than the customer waiting demonstration designation command is received after the initialization notification is started. That is, it is preferable that the initialization notification is continued only for a period sufficient for the game store clerk or the like to recognize the initialization notification.

  Further, in this embodiment, the effect control means receives the variation pattern command, but when the display result specifying command cannot be received, the variation pattern command that can be used for both the normal big hit and the probable big hit. If it is determined that a change pattern command other than the change pattern command that can be used for both the normal big hit and the probable big hit is received is determined. Since the stop symbol is determined to be a combination of decorative symbols corresponding to the received variation pattern, even if the display result specifying command cannot be received due to noise or the like, the variable display device 9 can notify that a big hit will occur. Furthermore, immediately after receiving the variation pattern command, when it is determined that an effect control command other than the display result specifying command has been received, the above control based on the received variation pattern command may be performed. In other words, the effect control means determines that the regular command has not been received (for example, the display result specifying command cannot be received) or determines that the non-normal command has been received (for example, the display result subsequent to the variation pattern command). When an effect control command other than the specific command is received), it is preferable to execute effect control (for example, determine a stop symbol of a decorative symbol) based on the received regular command. With such a configuration, it is possible to prevent a player from being disadvantaged due to non-reception of a regular command or reception of a non-regular command.

  The same control may be performed for other effect control commands. For example, when a jackpot start specifying command that can specify the start of a specific gaming state is received, if it does not match the display result specifying command that has already been received (for example, the display result 2 specifying command indicating a normal jackpot is the display result specifying When it is stored in the command storage area, when the jackpot start 3 designation command indicating the probability variation jackpot is received, the production control based on the jackpot start designation command (for example, the effect device notifies the probability variation jackpot) ) Or when a jackpot end designation command that can identify the end of a specific gaming state is received, if it does not match the jackpot start designation command that has already been received (for example, a jackpot start 1 designation command indicating a normal jackpot) After receiving a jackpot end designation 2 command indicating a probabilistic jackpot) Effect control (e.g., the background of the variable display device 9 on the background corresponding to the probability variation state) based on the de to run. In the case of such a configuration, it is possible to prevent the control of the effect control means from being confused as much as possible with the control of the game control means.

  In the present embodiment, detailed description of the parts having the same configuration and processing as those of the first embodiment will be omitted, and parts different from the first embodiment will be mainly described.

  FIG. 80 is a block diagram illustrating a circuit configuration example of the relay board 77, the sound / lamp control board 80b, and the symbol control board 80a according to the second embodiment. In this embodiment, the sound / lamp control board 80b performs sound output control of the sound output device 27 and display control of the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of each lamp. . The symbol control board 80a performs display control of the variable display device 9. In this embodiment, “effect control” means display control of the variable display device 9, sound output control of the speaker 27, LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f of each lamp, By performing display control of 283a to 283f, it means performing an effect such as a game effect. In this embodiment, the effect control means includes a symbol control microcomputer 100a that performs display control of the variable display device 9, sound output control of the speaker 27, and LEDs 125a to 125f, 126a to 126f, and 281a of each lamp. ˜281 l, 282 a to 282 f and 283 a to 283 f are realized by the sound / lamp control microcomputer 100 b which performs display control.

  The sound / lamp control board 80b includes a sound / lamp control microcomputer 100b including a sound / lamp control CPU 101b, a RAM, a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356, and an input capture signal output unit 357. It is equipped with. The RAM may be externally attached. In the sound / lamp control board 80b, the sound / lamp control microcomputer 100b operates in accordance with a program stored in a built-in or external ROM (not shown).

  Further, the sound / lamp control microcomputer 100 b outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 611 to 615 and the input IC 620 mounted on the frame side IC substrates 602 to 605 via the relay substrate 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 619 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to the serial-parallel conversion ICs 611 to 619 and the input ICs 620 and 621.

  Further, the input capture signal output unit 357 inputs the input capture signal (latch signal) to the board side IC board 601 or the frame side IC boards 602 to 605 via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Is output. The input IC 620 mounted on the frame side IC substrate 605 latches the detection signals of the operation buttons 81a to 81e when an input capture signal from the sound / lamp control microcomputer 100b is input, and relays the relay substrate 606 as a serial data system. , 607 to the sound / lamp control microcomputer 100b. The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b, 152b, and 153b when serial input data is input from the sound / lamp control microcomputer 100b. As a method, the signal is output to the sound / lamp control microcomputer 100b via the relay substrate 606.

  Further, the sound / lamp control microcomputer 100b outputs sound number data to the speech synthesis IC 173. The voice synthesizing IC 173 generates a voice or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  The signal for driving the lamp and the sound number data are communicated between the sound / lamp control microcomputer 100b, the lamp driver 352, and the speech synthesis IC 173 (a response signal is transmitted from the signal receiving side to the transmitting side). Communication).

  The symbol control board 80a is equipped with a symbol control microcomputer 100a including a symbol control CPU 101a and a RAM. The RAM may be externally attached. In the symbol control board 80a, the symbol control microcomputer 100a operates in accordance with a program stored in a built-in or external ROM (not shown). Further, the symbol control microcomputer 100a performs display control of the variable display device 9 using the LCD on the VDP (video display processor) 109 based on the effect control command received from the main board 31 via the relay board 77. Let it be done.

  The symbol control microcomputer 100a reads necessary data from a character ROM (not shown) in accordance with the effect control command received from the game control microcomputer 560. The character ROM stores character image data frequently used among images displayed on the variable display device 9, specifically, a person, a character, a figure, a symbol, or the like (including decorative designs) in advance. Is. The symbol control microcomputer 100 a outputs the data read from the character ROM to the VDP 109. The VDP 109 executes display control of the variable display device 9 based on data input from the symbol control microcomputer 100a.

  In this embodiment, the VDP 109 that performs display control of the variable display device 9 is mounted on the symbol control board 80a. The VDP 109 has an address space independent of the symbol control microcomputer 100a, and maps a VRAM therein. The VRAM is a buffer memory for expanding image data generated by the VDP. Then, the VDP 109 outputs the image data in the VRAM to the variable display device 9.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the symbol control board 80a (the signal is not passed in the direction from the symbol control board 80a to the relay board 77). The unidirectional circuit is installed. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 80 illustrates a diode.

  Further, the symbol control microcomputer 100 a transmits (transfers) an effect control command (a variation pattern command or a display result designation command) from the main board 31 to the sound / lamp control board 80 b via the input / output port 104.

  FIG. 81 shows a configuration example of the symbol control board 80a, the sound / lamp control board 80b, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605 in the second embodiment. FIG. The sound / lamp control microcomputer 100b of the sound / lamp control board 80b (specifically, the sound / lamp control CPU 101b) outputs a clock signal to the relay board 607 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the sound / lamp control microcomputer 100 b to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601. And each serial-parallel conversion IC616-619 converts the input serial data into parallel data, LEDLED125a-125f of each lamp provided in the game board 6, 126a-126f, 127a-127c, and each movable member To the motors 151a to 151c.

  Further, the relay board 607 is connected to the relay board 606 through a single wiring route in a bus type, and the serial data line 300 and the clock signal line 301 connected to each serial-parallel conversion IC 616 to 619 are connected to the board side. It is connected to the bus form on the IC substrate 601.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the sound / lamp control microcomputer 100b mounted on the board-side IC board 601 are connected to the input signal line, the clock signal line 301, and the input capture signal line 303 via the relay board 606. Are connected, and the sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input capture signal (latch signal) and outputs it to the sound / lamp control microcomputer 100b via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it.

  As shown in FIG. 81, the serial data and clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC boards 602 to 605, respectively. And each serial-parallel conversion IC611-615 converts the input serial data into parallel data, LED281a-281l of each lamp provided in the game frame 11, 282a-282f, 283a-283f, 82a-82d, 83.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81 a to 81 e provided on the game frame 11 is mounted on the frame side IC board 605. In this embodiment, the input IC 620 and the sound / lamp control microcomputer 100b mounted on the frame side IC board 605 are connected to the input signal line 302, the clock signal line 301, and the input capture signal line via the relay board 607. 303 is connected, and the sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the sound / lamp control microcomputer 100b outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the sound / lamp control microcomputer 100b via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data.

  In this embodiment, addresses are assigned in advance to the serial-parallel conversion ICs 611 to 619, and when the sound / lamp control microcomputer 100b outputs a control signal converted into serial data, the addresses are assigned. The added serial data is output. When each serial-parallel conversion IC 611-619 inputs serial data, it checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. To the LED of each lamp. If the addresses do not match, the LED of each lamp is not supplied.

  Next, the operation of the symbol control microcomputer 100a will be described. FIG. 82 is a flowchart showing main processing executed by the symbol control microcomputer 100a according to the second embodiment. When power supply to the gaming machine is started and the reset signal becomes high level, the symbol controlling microcomputer 100a starts main processing. In the main process, the symbol control microcomputer 100a first performs an initialization process for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval ( Step S781). Thereafter, the symbol controlling microcomputer 100a shifts to a loop process for confirming the monitoring of the timer interrupt flag (step S782). When a timer interrupt occurs, the symbol control microcomputer 100a sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the symbol control microcomputer 100a clears the flag (step S783) and executes the following symbol control process.

  A timer interrupt takes, for example, every 33 ms. That is, the symbol control process is activated every 33 ms, for example. In this embodiment, only the flag is set in the timer interrupt process, and the specific symbol control process is executed in the main process. However, the symbol control process may be executed in the timer interrupt process.

  In the symbol control process, the symbol control microcomputer 100a first analyzes the received effect control command (command analysis process: step S784). In this case, the symbol control microcomputer 100a performs the same processing as the command analysis processing (command analysis processing executed by the effect control microcomputer 100 shown in FIGS. 48 to 50) shown in the first embodiment. The effect control command is analyzed according to

  Next, the symbol control microcomputer 100a performs symbol control process processing (step S785). In this case, the symbol control microcomputer 100a performs processing according to the same processing as the effect control process shown in the first embodiment (the effect control process executed by the effect control microcomputer 100 shown in FIG. 51) ( However, only the part relating to the control of the variable display device 9 is executed.

  Then, the symbol controlling microcomputer 100a executes a process of updating the random number counter (step S786). Further, notification control process processing for performing notification using the variable display device 9 is executed (step S787). In this case, the symbol controlling microcomputer 100a executes the same processing as the notification processing using the variable display device 9 among the notification control process shown in the first embodiment.

  Further, the symbol control microcomputer 100a performs a process of sending (transferring) the effect control command received from the main board 31 to the sound / lamp control board 80b (command control process: step S788). Thereafter, the process returns to the process of checking the timer interrupt flag in step S782.

  In the command control process in step S788, the symbol control microcomputer 100a may transmit the effect control command received from the game control microcomputer 560 to the sound / lamp control microcomputer 100b as it is, or the received effect. The control command may be processed and transmitted to the sound / lamp control microcomputer 100b. For example, the symbol control microcomputer 100a may recreate the variation pattern command and the display result command into one effect control command, and transmit it to the sound / lamp control microcomputer 100b. In this case, for example, the design control microcomputer 100a newly creates an effect control command that can specify only the type and effect time of the effect to be executed during the variation of the decorative symbol based on the change pattern command and the display result command. It is generated and transmitted to the sound / lamp control microcomputer 100b. With this configuration, the number of commands transmitted from the symbol control microcomputer 100a to the sound / lamp control microcomputer 100b can be reduced.

  Next, the operation of the sound / lamp control microcomputer 100b will be described. FIG. 83 is a flowchart showing main processing executed by the sound / lamp control microcomputer 100b according to the second embodiment. When power supply to the gaming machine is started and the reset signal becomes high level, the sound / lamp control microcomputer 100b starts main processing. In the main process, the sound / lamp control microcomputer 100b first performs an initialization process for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval. This is performed (step S881). Thereafter, the sound / lamp control microcomputer 100b proceeds to a loop process for monitoring the timer interrupt flag (step S882). When a timer interrupt occurs, the sound / lamp control microcomputer 100b sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the sound / lamp control microcomputer 100b clears the flag (step S883) and executes the following sound / lamp control process.

  A timer interrupt takes, for example, every 33 ms. That is, the sound / lamp control process is started every 33 ms, for example. In this embodiment, only the flag is set in the timer interrupt process, and the specific sound / lamp control process is executed in the main process, but the sound / lamp control process is executed in the timer interrupt process. Also good.

  In the sound / lamp control process, the sound / lamp control microcomputer 100b first analyzes the effect control command received from the symbol control microcomputer 100a (command analysis process: step S884). In this case, the sound / lamp control microcomputer 100b is the same as the command analysis process (command analysis process executed by the effect control microcomputer 100 shown in FIGS. 48 to 50) shown in the first embodiment. The effect control command is analyzed in accordance with the process.

  Next, the sound / lamp control microcomputer 100b performs a sound / lamp control process (step S885). In this case, the sound / lamp control microcomputer 100b follows the same process as the effect control process shown in the first embodiment (the effect control process executed by the effect control microcomputer 100 shown in FIG. 51). The processing (however, only the part relating to the control of the LED 27a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of the speaker 27 and each lamp) is executed.

  Then, the sound / lamp control microcomputer 100b executes a process of updating the random number counter (step S886). Further, a notification control process for performing notification using the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of the lamps is executed (step S887). In this case, the sound / lamp control microcomputer 100b includes the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f of the lamps in the notification control process shown in the first embodiment. Processing similar to the notification processing using 283a to 283f is executed. Further, the data set in the command analysis process, sound / lamp control process process, and notification control process process is output to the serial output circuit 353, and the data received from the input ICs 620 and 621 is read from the serial input circuit 354. Output processing is executed (step S888). Thereafter, the process proceeds to step S882.

  As described above, according to this embodiment, the sound / lamp control microcomputer 100b uses the LED 125a to 125f, 126a to 126f, 126a to 126f of each lamp based on the effect control command transferred from the symbol control microcomputer 100a. Control signals for controlling 281a to 281l, 282a to 282f, and 283a to 283f are output in a serial signal system. Further, the serial-parallel conversion ICs 616 to 619 mounted on the panel side IC substrate 601 and the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605 are connected through one system wiring. At the same time, different address information is assigned in advance, and only the control signal with its own address information added is converted into a parallel signal system and output. Further, when the sound / lamp control microcomputer 100b outputs a control signal for controlling the serial-parallel conversion ICs 616 to 619 provided in the game board 6, an address that can specify the serial-parallel conversion ICs 616 to 619 is specified. A control signal with information added is output in a serial signal system. Further, when the sound / lamp control microcomputer 100b outputs a control signal for controlling the serial-parallel conversion ICs 611 to 615 provided in the game frame 11, an address that can identify the serial-parallel conversion ICs 611 to 615. A control signal with information added is output in a serial signal system. Therefore, similarly to the first embodiment, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In this embodiment, the pattern / control board 80a, the sound / lamp control board 80b, the board-side IC board 601, the frame-side IC boards 602-605, and the relay boards 606, 607 are connected as sound / lamp control. Although the case where the board 80b, the relay board 606, and the relay board 607 are connected to each other by a single wiring route in the bus type has been described, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601 are connected in series ( Even if the number of wires is reduced by connecting the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605 in series (daisy chain connection). Good.

  FIG. 84 is a block diagram showing another configuration example of the symbol control board 80a, the sound / lamp control board 80b, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605. . In the example shown in FIG. 84, the sound / lamp control microcomputer 100b (specifically, the sound / lamp control CPU 101b) of the sound / lamp control board 80b transmits the clock signal together with the serial data as the control signal to the relay board. To 606. The relay board 606 supplies the serial data and the clock signal input from the sound / lamp control microcomputer 100 b to the relay board 607 and the board-side IC board 601.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 619. As shown in FIG. 84, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 have serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board side IC substrate 601. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. 15 is input to the data latch unit 651 of the next serial-parallel conversion IC, so that serial data is sequentially sent to the serial-parallel conversion ICs 616 to 619. What is necessary is just to forward. The serial-parallel conversion ICs 616 to 619 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided on the game board 6. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 619 and the input IC 621.

  The relay board 607 supplies the serial data and the clock signal input from the production control microcomputer 100 to the frame side IC board 604 and the frame side IC board 605. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 614. As shown in FIG. 84, serial data signal lines are connected to each serial-parallel conversion ICs 611 to 614 mounted on the frame side IC substrates 602 to 604 in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 614 to the other serial-parallel conversion ICs 611 to 613 mounted on the frame side IC substrates 602 and 603. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. 15 is input to the data latch unit 651 of the next serial-parallel conversion IC, whereby serial data is sequentially sent to each serial-parallel conversion IC 611-614. What is necessary is just to forward. And each serial-parallel conversion IC611-614 converts the input serial data into parallel data, and supplies it to LED of each lamp provided in the game frame 11. FIG.

  The clock signal input to the frame side IC board 602 is branched on the frame side IC board 604 and input to the serial-parallel conversion IC 614 and also input to the frame side IC board 602. The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602, input to the serial-parallel conversion ICs 611 and 612, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 613. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  In addition, as in the example shown in FIGS. 78 and 79, as the LED of the lamp provided in the game frame 11 or the game board 6, an LED for gradation control (for example, a multi-color LED) is used to control the brightness. You may be able to do it.

  In this embodiment, as an example of controlling each presentation means using separate control boards, a case has been described in which a gaming machine includes a symbol control board 80a and a sound / lamp control board 80b. A plurality of control boards may be provided. For example, the gaming machine has a symbol / sound control board that controls the variable display device 9 and the speaker 27, and lamps that control the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of each lamp. And a control board. In this case, for example, the symbol / sound control microcomputer mounted on the symbol / sound control board first receives an effect control command from the game control microcomputer 560 and transfers (transmits) it to the lamp control board. Then, the lamp control microcomputer mounted on the lamp control board outputs the control signal as a serial data system based on the transferred effect control command, thereby allowing the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f are controlled.

  Further, for example, the gaming machine controls the variable display device 9 and the pattern / lamp control board for controlling the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of the lamps, and the speaker 27. And a sound control board. In this case, for example, the sound control microcomputer mounted on the sound control board first receives an effect control command from the game control microcomputer 560 and transfers (transmits) it to the symbol / lamp control board. Then, the symbol / lamp control microcomputer mounted on the symbol / lamp control board outputs a control signal as a serial data system based on the transferred presentation control command, thereby allowing the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f are controlled.

  Although the embodiments of the present invention have been described with reference to the drawings, the present invention is not limited to these embodiments, and modifications and additions within the scope of the present invention are included in the present invention. Needless to say.

  For example, in the said Example, the light guide distance induced | guided | derived from LED as a light emitter to the light emission display part via the light guide part of a light guide member is comprised from a light emitter, a light guide part, and a light emission display part, respectively. As an example in which the plurality of light emitting display means are configured to be different from each other, the case where the present invention is applied to the left and right frame light emitting units, the top frame light emitting unit, and the door frame left and right side light emitting units provided in the game frame 11 has been described. You may apply not only to a light emission part but to another light emission part.

  Moreover, in the said Example, in the right-and-left frame light emission part, the length of the light guide part provided in the inside of the side inner lens 457 as a light guide member is made different among several light emission display means, and thereby each light emission display part. However, in addition to such a configuration, the LED as the light emitter is orthogonal to the light irradiation direction from the position facing the light introduction surface to the position where the light emitter is disposed. You may make it arrange | position so that the separation distance to the direction to perform may each differ.

  Moreover, in the said Example, in the top frame light emission part, the separation distance to the direction orthogonal to the irradiation direction of the light from the opposing position which opposes a light introduction surface to the arrangement | positioning position of a light emitter for LED as a light emitter. However, in addition to such a configuration, the lengths of the light guides may be different.

  Moreover, in the said Example, although the spaced-apart distance of each light-emitting plate in each light-emitting plate 810a, 810b was different among several light emission display means in the left-right side light emission part of a door frame, it is light emission nearest to LED. The light guide distance to the plate may be different for each of the light emitting plates 810a and 810b.

  Moreover, in the said Example, in the left-right frame light emission part, the top-frame light emission part, and the door frame right-and-left side light emission part, the distance from the light emission surface of LED as each light-emitting body to a light introduction surface is several light emission display means. However, the plurality of light emitting display means may be different from each other.

  Moreover, in the said Example, although the 2nd convex part 1606, the front-surface walls 901c-901j, and light emission board 810a, 810b were described as an example of a light emission display part, the form of a light emission display part is light emission of a light-emitting body. However, the present invention is not limited to the second convex portion 1606, the front walls 901c to 901j, and the light emitting plates 810a and 810b.

  Moreover, in the said Example, in the left-right frame light emission part and the door frame right-and-left side light emission part, the light emission display part corresponding to a light-emitting body differs in the direction (for example, up-down direction) orthogonal to the light emission direction of a light-emitting body. However, it may be formed in front of the light emitter.

  In addition, the pachinko gaming machine of each of the above embodiments can be given a predetermined game value to a player mainly when the special symbol that is variably displayed on the variable display unit based on the start winning prize becomes a predetermined symbol. A pachinko machine that can be given a predetermined gaming value to a player when there is a prize in a predetermined area of an electric game that is released based on a start prize, or a start prize The present invention is applied even to a pachinko game machine in which a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the stop symbol of the symbol variably displayed becomes a predetermined symbol combination. it can. Furthermore, the present invention can also be applied to a slot machine that inserts game medals and sets the number of bets and plays a game, or a game machine that inserts game balls instead of game medals and sets the number of bets and plays games.

  The present invention is applied to a gaming machine such as a pachinko gaming machine that shifts to a specific gaming state advantageous to a player when a specific display result is derived and displayed on a variable display device.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front of a game frame. It is a front view which shows the front of a game board. It is explanatory drawing which shows operation | movement of the truck as a movable member. It is explanatory drawing which shows operation | movement of the beam as a movable member. It is explanatory drawing which shows operation | movement of the skeleton as a movable member. It is explanatory drawing which shows the state which opened the game frame. It is explanatory drawing which shows the back surface of a game board. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a relay board | substrate and an effect control board. FIG. 11 is a block diagram illustrating a configuration example of an effect control board, a relay board, a board side IC board, and a frame side IC board. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each input IC. It is a block diagram which shows the structure of each serial-parallel conversion IC. It is explanatory drawing which shows the example of the format of the serial data output from the microcomputer for production control. It is a timing diagram which shows the example of the input timing of the serial data and clock signal to serial-parallel conversion IC, and the output timing of parallel data. It is a block diagram which shows the structure of each input IC. It is a principal part enlarged front view which shows the front lower right part of a glass door frame. It is a principal part expansion perspective view which shows the attachment state of the side inner lens with respect to a glass door frame. It is AA sectional drawing of FIG. 21A is a sectional view taken along the line BB in FIG. 21, FIG. 21B is a sectional view taken along the line CC in FIG. 21, and FIG. 21C is a sectional view taken along the line DD in FIG. It is sectional drawing which shows the light guide state in a side inner lens. It is the schematic which shows the light emission state of a side inner lens. (A) is a cross-sectional view which shows a top frame light emission part, (b) is a principal part expanded sectional view of (a). (A) is a top view which shows an upper plate left side lens body, (b) is a front view which shows an upper plate left side lens body, (c) is a right view which shows an upper plate left side lens body. is there. It is AA sectional drawing of FIG.26 (b). (A) is an upper enlarged sectional view of the upper plate left side lens body, (b) is a lower enlarged sectional view of the upper plate left side lens body. It is an expanded sectional view which shows the light guide state in an upper plate left side lens body. It is the schematic which shows the light emission state of an upper plate left side lens body. It is an expanded sectional view which shows the light guide state in the upper plate left side lens body as a modification. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a 2 ms timer interruption process. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a starting port switch passage process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a fluctuation pattern setting process. It is a flowchart which shows a display result specific command transmission process. It is a flowchart which shows the special symbol change process. It is a flowchart which shows a special symbol stop process. It is a flowchart which shows a big hit end process. It is a flowchart which shows a small hit end process. It is a flowchart which shows an abnormal winning notification process. It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is explanatory drawing which shows the structural example of a command reception buffer. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows production control process processing. It is a flowchart which shows a fluctuation pattern command reception waiting process. It is a flowchart which shows a decoration design change start process. It is explanatory drawing which shows an example of the stop symbol of a decoration symbol. It is explanatory drawing which shows the structural example of process data. It is explanatory drawing which shows the example of the control content of the lamp performed according to process data, when each presentation control command is received. It is a flowchart which shows a process during decoration design change. It is a flowchart which shows a decoration design change stop process. It is a flowchart which shows a big hit display process. It is a flowchart which shows a big hit end process. It is explanatory drawing which shows the example of the alerting | reporting screen displayed on a variable display apparatus. It is explanatory drawing which shows the example of the aspect of the various error alerting | reporting performed in alerting | reporting control process processing. It is a flowchart which shows alerting | reporting control process processing. It is a flowchart which shows a notification start process. It is a flowchart which shows a notification start process. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is explanatory drawing which shows the structural example of the process table for error alerting | reporting. It is explanatory drawing which shows the example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is explanatory drawing which shows the other example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is explanatory drawing which shows the example of the motor control signal output as a serial data system in a game production. It is a flowchart which shows an example of a serial setting process. It is explanatory drawing which shows one structural example of the data storage area | region where the lamp control signal and motor control signal of an output object are set. It is a flowchart which shows the specific example of a serial input / output process. It is explanatory drawing which shows the example of the condition of the display effect in a variable display apparatus, the sound effect by a speaker, and the display effect by each lamp | ramp. It is a block diagram which shows the other structural example of an effect control board, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is explanatory drawing which shows the example of the pulse train supplied to LED when performing gradation control of LED. It is a block diagram which shows the structural example of the effect control board in the case of controlling brightness using LED of the lamp | ramp which performs gradation control, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is a block diagram which shows the circuit structural example of the relay board | substrate in 2nd Embodiment, a sound / lamp control board, and a symbol control board. It is a block diagram which shows the structural example of the symbol control board in 2nd Embodiment, a sound / lamp control board, a relay board, a board | substrate side IC board, and a frame side IC board. It is a flowchart which shows the main process which the microcomputer for symbol control in 2nd Embodiment performs. It is a flowchart which shows the main process which the microcomputer for sound / lamp control in 2nd Embodiment performs. It is a block diagram which shows the other structural example of a pattern control board, a sound / lamp control board, a relay board, a board | substrate side IC board, and a frame side IC board.

Explanation of symbols

1 Pachinko machine 8 Special symbol display 9 Variable display device 82a to 82d
560 Microcomputer for game control 100 Microcomputer for presentation control 125a to 125f Center decoration lamp (LED)
126a-126f Stage lamp (LED)
151, 152, 153 Movable members (carts, beams, skeletons)
151a, 152a, 153a Movable motor 151b, 152b, 153b Position sensor 281a-281l Top frame lamp (LED)
282a-282f Left frame lamp (LED)
283a-283f Right frame lamp (LED)
353 Serial output circuit 354 Serial input circuit 601 Board side IC board 602 to 605 Frame side IC board 606,607 Relay board 611 to 619 Serial-parallel conversion IC
620,621 Input IC

Claims (12)

A game frame that can be opened and closed with respect to the outer frame, and a game board that is attached to the game frame and includes a predetermined plate-like body and various parts that are attached to the plate-like body. A game machine
A plurality of light emitting display means provided in the game frame;
Game control means for controlling the progress of the game and transmitting an effect control command for controlling the electric parts for the effect,
Production control means for controlling the electrical parts for production in accordance with the production control command transmitted by the game control means;
With
The light-emitting display means includes a light-transmitting light guide member, a light-emitting body disposed behind the light-guide member, and a light-emitting display unit that emits light from the light-emitting body introduced into the light guide member. The distance from the light emitter to the light guide member is different between the plurality of light emitting display means,
The game control means includes command transmission means for transmitting an effect control command to the effect control means,
The effect control means, based on the effect control command transmitted from the game control means, an output means for outputting a control signal for controlling the effect electric parts including the light emitter in a serial signal system; Including
The board side serial-parallel conversion circuit provided in the game board and the game frame, which converts the control signal input from the output means from a serial signal system to a parallel signal system and outputs the converted signal to the electrical component for presentation. A frame-side serial-parallel conversion circuit provided;
The board-side serial-parallel conversion circuit outputs a control signal converted into a parallel signal system to an electrical part provided in the game board among the electrical parts for presentation,
The frame-side serial-parallel conversion circuit outputs a control signal converted into a parallel signal system to an electrical component provided in the game frame among the electrical components for presentation,
The panel-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit are connected through one line of wiring, and are assigned different address information in advance, and their own address information is added. Only the control signal is converted into a parallel signal system and output.
When the output means outputs a control signal for controlling an electrical component provided on the game board, a control signal to which address information that can identify the board-side serial-parallel conversion circuit is added in a serial signal system. When outputting and outputting a control signal for controlling an electrical component provided in the game frame, a control signal to which address information that can identify the frame side serial-parallel conversion circuit is added is output in a serial signal system. ,
A gaming machine characterized by that. A game frame that can be opened and closed with respect to the outer frame, and a game board that is attached to the game frame and includes a predetermined plate-like body and various parts that are attached to the plate-like body. A game machine
A plurality of light emitting display means provided in the game frame;
Game control means for controlling the progress of the game and transmitting an effect control command for controlling the electric parts for the effect,
Effect control means for controlling the electric parts for the effect in response to the effect control command transmitted by the game control means;
With
The light-emitting display means includes a light-transmitting light guide member, a light-emitting body disposed behind the light-guide member, and a light-emitting display unit that emits light from the light-emitting body introduced into the light guide member. The distance from the light emitter to the light guide member is different between the plurality of light emitting display means,
The effect control means includes a first effect control means for controlling at least one electric component among the electric parts for the effect, and an electric power controlled by the first effect control means for the electric component for the effect. Second effect control means for controlling an electrical component including the light emitter other than the component,
The game control means includes first command transmission means for transmitting the first effect control command to the first effect control means,
The first effect control means outputs a second effect control command that can specify the content of the first effect control command based on the fact that the first effect control command is transmitted. Second command transmission means for transmitting to the means,
The second effect control means outputs a control signal for controlling the electric parts for the effect in a serial signal system based on the second effect control command received from the first effect control means. Including output means,
The board side serial-parallel provided in the game board, which converts the control signal input from the output means of the second effect control means from a serial signal system to a parallel signal system and outputs it to the effect electrical parts. A frame side serial-parallel conversion circuit provided in the conversion circuit and the game frame;
The board-side serial-parallel conversion circuit outputs a control signal converted into a parallel signal system to an electrical part provided in the game board among the electrical parts for presentation,
The frame side serial-larel conversion circuit outputs a control signal converted into a parallel signal system to an electrical component provided in the game frame among the electrical components for the production,
The panel-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit are connected through one line of wiring, and are assigned different address information in advance, and their own address information is added. Only the control signal is converted into a parallel signal system and output.
When the output means outputs a control signal for controlling an electrical component provided on the game board, a control signal to which address information that can identify the board-side serial-parallel conversion circuit is added in a serial signal system. When outputting and outputting a control signal for controlling an electrical component provided in the game frame, a control signal to which address information that can identify the frame side serial-parallel conversion circuit is added is output in a serial signal system. ,
A gaming machine characterized by that. The panel side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit are connected via a single line of wiring using a connector.
The gaming machine according to claim 1 or 2, characterized in that. The game control means includes serial transmission means for transmitting the effect control command to the effect control means by a serial signal method.
A gaming machine according to any one of claims 1 to 3. The game control means includes an electrical component for input,
Latch means for latching an input signal input from the electrical component and outputting it in a parallel signal system;
A parallel-serial conversion circuit for converting the input signal output from the latch means into a serial signal system and outputting the converted signal;
A clock signal output means for outputting a clock signal commonly used for the panel side serial-parallel conversion circuit, the frame side serial-parallel conversion circuit and the parallel-serial conversion circuit;
Comprising
The gaming machine according to any one of claims 1 to 4, characterized in that. The output means outputs, as a control signal for controlling a light emission state of the light emitter, a signal in which a pulse amount is changed according to luminance when the light emitter is caused to emit light,
A gaming machine according to any one of claims 1 to 5, wherein At least one of the game board or the game frame is provided with a light emitter that adjusts the luminance and a light emitter that does not adjust the luminance, as the electrical component for the effect,
A panel-side serial-parallel conversion circuit or a frame-side serial-parallel conversion circuit that outputs a control signal to the light-emitting body that adjusts the brightness, and a panel-side serial-parallel conversion circuit that outputs a control signal to the light-emitting body that does not adjust the brightness Or the frame side serial-parallel conversion circuit is different,
A gaming machine according to any one of claims 1 to 6, wherein A variable display device that variably displays each of a plurality of types of identification information that can be identified, and that displays and displays a display result;
Game state transition means for shifting to a specific game state advantageous to the player when the specific display result is derived and displayed on the variable display device;
A variable winning ball apparatus that can change to an open state in the specific gaming state;
Detecting means for detecting a game ball won in the variable winning ball device and outputting a detection signal;
With
The game control means includes
Prior determination means for determining whether to shift to the specific gaming state before derivation display of the display result;
Variable display command transmission means for transmitting a variable display command capable of specifying a variable display start and variable display time of identification information in the variable display device based on the determination of the prior determination means;
Winning determination means for determining whether or not a detection signal from the detection means is input;
An abnormality notification command transmitting means for transmitting an abnormality notification command for instructing execution of abnormality notification based on the fact that the winning determination means inputs a detection signal in a gaming state other than the specific gaming state,
The effect control means starts variable display of identification information in the variable display device based on the variable display command transmitted by the variable display command transmission means, and the display result on the variable display device when the variable display time has elapsed. Variable display control means for deriving and displaying,
Abnormality notification means for executing abnormality notification by the effect device based on the abnormality notification command transmitted by the abnormality notification command transmission means,
The abnormality notification means can execute abnormality notification even when the variable display control means is executing variable display of identification information in the variable display device,
The output means, when executing the abnormality notification by the abnormality notification means, based on the abnormality notification command transmitted by the abnormality notification command transmission means, a control signal for controlling the electrical parts for production in a serial signal system Output,
The gaming machine according to any one of claims 1 to 7, characterized in that. The game frame is provided with a collective board on which a plurality of the frame side serial-parallel conversion circuits are mounted.
A gaming machine according to any one of claims 1 to 8, wherein The light guide member has a light introduction surface capable of introducing light from the light emitter into the light guide member;
The plurality of light-emitting display means have different separation distances in a direction orthogonal to the light irradiation direction from the facing position facing the light introduction surface to the arrangement position of the light emitter, respectively.
A gaming machine according to any one of claims 1 to 9, wherein: In the light guide member, the lengths of light guide paths for guiding light introduced from the light emitter to the light guide member to the light emitting display unit are different from each other in the plurality of light emitting display means.
The gaming machine according to any one of claims 1 to 10, wherein The light guide member includes a groove formed in a light guide path that guides light introduced from the light emitter to the light guide member to the light emitting display unit, and a width dimension of the groove is the plurality of light emitting displays. Each means different
The gaming machine according to claim 1, wherein:

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