JP2009212603A - Imaging apparatus and its control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance imaging quality without spoiling the feeling of operation. <P>SOLUTION: A control method of an imaging apparatus having a pixel array where a plurality of pixels each including a photoelectric conversion means are arranged in the row direction and the column direction includes a first read-out step for acquiring a first image signal from the pixel array during each frame period, a second read-out step for acquiring a second image signal from a part of the pixel array in such a state that an optical signal is not outputted from the photoelectric conversion means during each frame period, a step for creating a second image signal for one frame by composing the second image signals acquired at the second read-out step, and a step for correcting the first image signal acquired at the first read-out step by using the second image signal for one frame created at the creation step. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an imaging apparatus and a method for controlling the imaging apparatus.

  In recent years, imaging systems such as digital cameras and video cameras using imaging devices such as CCDs and CMOS sensors have become widespread. The imaging system includes a pixel array in which a plurality of pixels are arranged in a row direction and a column direction, and a plurality of output lines connected to the pixels in each column of the pixel array. Each pixel in the pixel array accumulates a signal according to the received light. The signal accumulated in each pixel is read out via the output line. Here, shading occurs in the signal accumulated in each pixel in the process of being read through the output line (vertical output line, horizontal output line) due to the resistance component or capacitance component of the output line. This shading depends on the length of the path from which the signal is read.

  In the image processing apparatus disclosed in Patent Document 1, data of a dark image that is read after charge accumulation is performed in the same manner as in the main photographing without exposing the image sensor. Then, the stored dark image data is removed from the main photographed image read out after the charge accumulation is performed with the image sensor exposed. Thereby, even when shading or noise is corrected, the shutter release time lag can be reduced. (See paragraphs [0004] and [0005] of Patent Document 1). It is also described that shading and noise components change according to temperature characteristics. In order to solve this problem, when obtaining an image, a dark image is output from some pixels, and data stored in advance is corrected using the dark image to correct shading and noise. Is described. (See paragraphs [0069] to [0072] of Patent Document 1 and FIG. 7).

Further, in the imaging apparatus disclosed in Patent Document 2, the correction is switched according to ISO conditions at the time of shooting, shooting conditions such as shutter speed, and environmental conditions such as ambient temperature. More specifically, a dark image is captured and the shading component of the captured image is corrected based on the dark image, or the shading component of the captured image is corrected based on one-dimensional correction data stored in advance. Thus, it is described that even when shading is corrected, an increase in the shutter release time lag is reduced as much as possible. (See paragraphs [0072] to [0094] of FIG. 4 and FIG. 5, etc.).
JP 2003-264736 A JP 2003-333434 A

  The imaging device may be used in an operation mode that involves an operation of capturing a moving image, such as an EVF mode that continuously displays captured moving images, or a moving image shooting mode that records captured moving images. An imaging device is required to achieve a predetermined frame rate by suppressing the frame period to a predetermined length or less when used in an operation mode involving an operation of capturing a moving image. In the imaging system, if the frame period is suppressed to a predetermined length or less, the accuracy of shading correction may be reduced when the shading varies with time.

  The image processing apparatus disclosed in Patent Document 1 performs correction using dark image data stored in advance, and therefore changes the dark image data stored in accordance with the ambient temperature at the time of actual photographing to perform correction. Even if it performed, the correction result with high precision was not necessarily obtained.

  In addition, the image pickup apparatus disclosed in Patent Document 2 may cause a shutter release time lag because a dark image is captured every time shooting conditions or environmental conditions change. . Further, when the photographing condition and the environmental condition are not changed, the correction using the one-dimensional correction data stored in advance is performed, so that a highly accurate correction result is not always obtained.

  An object of the present invention is to improve image quality without impairing the operational feeling.

  In order to solve such a problem, as a technical feature of the present invention, the imaging apparatus includes a pixel array in which a plurality of pixels each including a photoelectric conversion unit are arrayed in a row direction and a column direction, and each of the frame periods described above. First reading means for acquiring a first image signal from the pixel array, and second for acquiring a second image signal by reading a signal from a part of the pixel array in a state where no optical signal is output in each frame period. And a generating means for generating a second image signal for one frame by combining the second image signal acquired by the second reading means, and the first reading means. A correction unit that corrects the acquired first image signal using the second image signal for the one frame generated by the generation unit, and the second reading unit includes each frame. Hey, characterized in that reading the second image signals of different partial regions.

  Further, as another technical feature, there is provided a control method for an imaging apparatus having a pixel array in which a plurality of pixels each including a photoelectric conversion unit are arrayed in a row direction and a column direction. A first reading step for acquiring an image signal; and a second reading for acquiring a second image signal by reading the signal in a state where no light output is output from the photoelectric conversion means from a part of the pixel array during each frame period. A reading step, a generating step for generating a second image signal for one frame by combining the second image signals read in the second reading step, and the first reading step A correction step of correcting the first image signal read in step 1 by using the second image signal for the one frame generated in the generation step. And butterflies.

  According to the present invention, it is possible to improve image quality without impairing the operational feeling.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a block diagram showing the overall configuration of an imaging apparatus 100 according to the present invention. In the figure, reference numeral 110 denotes a photographing lens. The photographing lens is provided with a motor (not shown) and a mechanism for driving and focusing the motor according to the processing result of the distance measuring unit 142 described later.

  Reference numeral 111 denotes a lens driving unit that transmits information from the photographing lens 110 to the system control unit 150 and drives the photographing lens 110. The lens driving unit 111 includes a control signal generation unit, and motor driving such as a focus adjustment operation of the photographing lens 110 is performed by a pulse signal obtained by the control signal generation unit.

  Reference numeral 114 denotes an image sensor such as a CMOS image sensor that converts an optical image into an electric signal. In this embodiment, a CMOS image sensor is used as the image sensor. The internal configuration of the image sensor 114 will be described later with reference to FIG. Reference numeral 112 denotes a shutter that controls the exposure amount of the image sensor 114. The shutter 112 may be a mechanical shutter or a liquid crystal shutter that can be electrically shielded from light.

  Reference numeral 115 denotes a low-pass filter LPF for cutting an extra wavelength of light transmitted through the photographing lens 110 (an unnecessary wavelength that affects color reproduction), and is disposed between the photographing lens 110 and the image sensor 114. ing.

  Reference numeral 116 denotes an A / D converter that converts an analog signal output from the image sensor 114 into a digital signal, an analog front end unit (hereinafter referred to as AFE) including a clamp unit (offset adjustment unit), and a D / A converter. Called). Reference numeral 117 denotes a digital front end unit (hereinafter referred to as DFE) that receives digital output from each pixel via the AFE 116 and performs digital processing such as correction and rearrangement.

Reference numeral 118 denotes a timing generation unit (hereinafter referred to as TG) that supplies a clock signal and a control signal to the image sensor 114, AFE 116, and DFE 117, and is controlled by the system control unit 150. In detail, the TG 118 includes TG1 118-1 and TG2 118-2 that generate control signals TGsig1 and TGsig2 of a plurality of systems. The TG 118 can send signals (TGsig1 and TGsig2) to the display row and the observation row of the image sensor 114 during EVF display. (TGsig1 and TGsig2 may be asynchronous or synchronous.)
An image processing unit 120 performs predetermined pixel interpolation processing and color conversion processing on data from the DFE 117 or data from the memory control unit 122. The image processing unit 120 performs predetermined calculation processing using image data captured as necessary.

  A memory control unit 122 controls the AFE 116, the DFE 117, the timing generation unit 118, the image processing unit 120, the image display memory 124, and the memory 130. Data from the DFE 117 is written into the image display memory 124 or the memory 130 via the image processing unit 120 and the memory control unit 122 or directly via the memory control unit 122. In the image processing unit 120, the charge signal output from the image sensor 114 is corrected based on correction data stored in a memory 152, which will be described later, and each output signal is subjected to development processing such as color conversion. It is to be imaged.

  In addition, the image processing unit 120 according to the embodiment of the present invention includes a data calculation block 120-1 and can perform focus detection and brightness detection from an image. Furthermore, the control information to the lens driving unit 111 can be sent from the data detected by the data calculation block 120-1 to the lens driving unit 111 via the system control unit 150, and the focus adjustment operation of the photographing lens 110 can be performed.

  Reference numeral 124 denotes an image display memory. Reference numeral 128 denotes an image display unit composed of a TFT LCD. During the EVF operation, images are continuously displayed on the image display unit 128 (moving images are displayed), and the movement of the subject can be confirmed.

  Reference numeral 130 denotes a memory for storing captured still images and moving images, and has a storage capacity sufficient to store a predetermined number of still images and moving images for a predetermined time.

  A shutter control unit 140 controls the shutter 112. 142 is a distance measuring unit for performing AF (autofocus) processing, 144 is a thermometer for detecting the ambient temperature in the photographing environment and the temperature inside the camera (the vicinity of the image sensor, etc.), and 146 is an AE (automatic exposure) processing This is a photometric unit for performing

  The photometry unit 146 also has a flash photographing function in cooperation with the flash unit 148. Reference numeral 148 denotes a flash unit (hereinafter referred to as a strobe) that is used for photographing in the dark, and also serves as an AF auxiliary light projecting function.

  Reference numeral 150 denotes a system control unit that controls the entire imaging apparatus, and includes a CPU and the like. Reference numeral 152 denotes a memory for storing constants, variables, programs, and the like for operation of the system control unit 150, and preset shading correction data and the like are stored in the memory 152. Data from a data acquisition area at the time of a continuous imaging (moving image) operation described later is also sequentially stored in the memory 152.

  Reference numeral 156 denotes an electrically erasable / recordable nonvolatile memory such as an EEPROM in which a program and the like to be described later are stored.

  Reference numeral 160 denotes an operation unit including a main switch (startup switch) for inputting various operation instructions of the system control unit 150, a shutter switch, a mode setting dial for switching a shooting mode, and the like. These operation units include a shutter switch in which two switches (SW1 and SW2) are turned on stepwise when pressed. In the first stage (SW1 ON) of the shutter switch, operations such as AF (autofocus) processing, AE (automatic exposure) processing, AWB (auto white balance) processing, and EF (flash dimming) processing are performed. In the second stage (SW2 ON), exposure processing, development processing by calculation in the image processing unit 120 and the memory control unit 122 are performed, image data is read from the memory 130, compressed, and written to the recording medium 1200. The operation of a series of processing for recording processing is started. Note that the exposure process here is a process of writing a signal read from the image sensor 114 to the memory 130 via the AFE 116 and the memory control unit 122.

  Further, the operation unit 160 includes an EVF operation switch for continuously displaying the subject on the image display unit 128. Also, a mode setting dial that switches between various shooting modes (automatic shooting mode, program shooting mode, shutter speed priority shooting mode, aperture priority shooting mode, manual shooting mode, night scene shooting mode, astronomical shooting mode, portrait shooting mode, etc.) Is included. Also included is a single / continuous shooting switch for switching between single / continuous shooting. In addition, a continuous ranging operation setting switch that repeats AF processing and lens focusing operation continuously (usually a single ranging operation), an ISO sensitivity setting switch that sets shooting sensitivity (ISO sensitivity), and various systems A power switch for supplying power is included.

  182 is a power supply control unit composed of a battery detection unit, a DC-DC converter, and the like. 186 is a primary battery such as an alkaline battery and a lithium battery, a secondary battery such as a NiCd battery, a NiMH battery, and a Li battery, and an AC adapter. It is a power supply unit.

  1200 is a detachable recording medium such as a memory card or a hard disk.

  Next, the image sensor 114 will be described with reference to FIG. FIG. 2 is a configuration diagram of the image sensor 114.

  The image sensor 114 includes a pixel array PA, vertical scanning circuits 77a and 77b for selecting pixels, horizontal scanning circuits 76a and 76b, a first reading unit 71, and a second reading unit 72.

  The pixel array PA includes a plurality of unit pixels (one pixel) 60 arranged on the matrix [pixels 60 (1-1) to 60 (nm)]. Each unit pixel 60 includes a photoelectric conversion unit described later. That is, in the pixel array PA, a plurality of pixels are arrayed in the row direction and the column direction. The charge accumulation operation of each pixel is controlled by signals from the vertical scanning circuits 77a to 77b.

  The vertical scanning circuits 77a and 77b receive the first drive signal TGsig1 and the second drive signal TGsig2 from the timing generation unit 118, respectively.

  The vertical scanning circuit 77a supplies a transfer signal φTX and a reset signal φRES to the pixels in each row of the pixel array PA based on the first drive signal TGsig1. Thereby, the vertical scanning circuit 77a controls the charge accumulation time of each pixel of the pixel array PA. The vertical scanning circuit 77a supplies a selection signal φSEL to the pixels in each row of the pixel array PA based on the first drive signal TGsig1. Thereby, the vertical scanning circuit 77a selects a region to be read by the first reading unit 71 in the pixel array PA.

  The vertical scanning circuit 77b supplies the transfer signal φTX and the reset signal φRES to the pixels in each row of the pixel array PA based on the second drive signal TGsig2. Thereby, the vertical scanning circuit 77b controls the charge accumulation time of each pixel of the pixel array PA. The vertical scanning circuit 77b supplies the selection signal φSEL to the pixels in each row of the pixel array PA based on the second drive signal TGsig2. Thereby, the vertical scanning circuit 77b selects a partial region (a part of the pixel array) to be read by the second reading unit 72 in the pixel array PA.

  It is the switch group SWt_x_1, SWr_x_1, SWs_x_1, SWt_x_2, SWr_x_2, SWs_x_2 that sets which signal of the vertical scanning circuit 77a or 77b is used as a control signal for each horizontal signal line.

  That is, when the switch groups SWt_x_1, SWr_x_1, and SWs_x_1 are ON, SWt_x_2, SWr_x_2, and SWs_x_2 are in the OFF state. Accordingly, the vertical scanning circuit 77a supplies signals such as φTX, φRES, and φSEL to the pixels in each row via the horizontal signal lines based on the first drive signal TGsig1.

  When the switch groups SWt_x_2, SWr_x_2, and SWs_x_ are ON, 2SWt_x_1, SWr_x_1, and SWs_x_1 are in the OFF state. Thereby, the vertical scanning circuit 77b supplies signals such as φTX, φRES, and φSEL to the pixels in each row via the horizontal signal lines based on the second drive signal TGsig2.

  The switch group SWt_x_1, SWr_x_1, SWs_x_1, or SWt_x_2, SWr_x_2, SWs_x_2 is set to ON / OFF by communication from the system control unit 150 (not shown). Only one of SWt_x_1, SWr_x_1, SWs_x_1, SWt_x_2, SWr_x_2, and SWs_x_2 is turned on.

  Here, each of the vertical scanning circuits 77b includes a shift register. The vertical scanning circuit 77b selects the area to be read out by the first reading unit 71 and the partial area to be read out by the second reading unit 72 in succession, and selects them sequentially in units of rows. Works and works.

  The horizontal scanning circuits 76 a and 76 b both receive the first drive signal TGsig 1 and the second drive signal TGsig 2 from the timing generation unit 118. Based on the first drive signal TGsig1, the horizontal scanning circuits 76a and 67b output a signal output from a pixel in each column of the pixel array PA to a first vertical output line 67 (i_a) (i is a natural number) described later. Then, the data is read out to a first reading unit 71 described later. Further, the horizontal scanning circuits 76a and 67b are output from the pixels in each column of the pixel array PA to a second vertical output line 67 (i_b) (i is a natural number) described later based on the second drive signal TGsig2. The signal is read out to a second reading unit 72 described later.

  Here, the vertical output line 67 includes a first vertical output line 67 (i_a) (i is a natural number) and a second vertical output line 67 (i_b) (i is a natural number). The first vertical output line 67 (i_a) extends in parallel with the second vertical output line 67 (i_b) and has substantially the same length.

  The first readout unit 71 is driven by the first drive signal TGsig1 via the horizontal scanning circuits 76a and 76b, and reads out the first image signal from the pixel array PA in each frame period (first readout step). . Specifically, the first reading unit 71 includes an SN circuit 75 (i_1) (i is a natural number) and output amplifiers 74-1 and 74-2. The SN circuit 75 (i_1) is driven by the horizontal scanning circuits 76a and 76b based on the first drive signal TGsig1, and the N signal is output from a predetermined pixel to the first vertical output line 67 (i_a) at different timings. And S signal are read out. The S-N circuit 75 (i_1) calculates a difference between the N signal and the S signal to obtain a first image signal, and supplies the obtained first image signal to the output amplifiers 74-1 and 74-2. . The output amplifiers 74-1 and 74-2 amplify the first image signal supplied from the SN circuit 75 (i_1) and output it to the subsequent stage.

  The second readout unit 72 is driven by the second drive signal TGsig2 via the horizontal scanning circuits 76a and 76b. In a state where a noise signal is read out from each pixel, the second readout unit 72 is sequentially selected in units of frame periods among N partial areas in which the pixel array PA is divided into N (N is a natural number). A second image signal is read from the partial area (second reading step). Specifically, the second reading unit 72 includes an SN circuit 75 (i_2) (i is a natural number) and output amplifiers 74-3 and 74-4. The SN circuit 75 (i_2) is driven by the horizontal scanning circuits 76a and 76b based on the second drive signal TGsig2, and the N signal is output from a predetermined pixel to the second vertical output line 67 (i_b) at different timings. And S signal are read out. The SN circuit 75 (i_2) calculates a difference between the N signal and the S signal to obtain a second image signal, and supplies the obtained second image signal to the output amplifiers 74-3 and 74-4. . The output amplifiers 74-3 and 74-4 amplify the second image signal supplied from the SN circuit 75 (i_2) and output it to the subsequent stage.

  Note that the SN circuit 75 (k_1) and the SN circuit 75 (k_2) (k is an odd number) constitute an SN circuit block 75a. The SN circuit 75 (h_1) and the SN circuit 75 (h_2) (h is an even number) constitute an SN circuit block 75b.

  Next, the unit pixel 60 in the pixel array PA will be described with reference to FIG. FIG. 3 is a circuit configuration diagram of the unit pixel 60 in the pixel array PA.

  61 is a photoelectric conversion part. The photoelectric conversion unit 61 performs a photoelectric storage operation to store charges (image signals) corresponding to the optical image of the subject. The photoelectric conversion unit 61 is, for example, a photodiode (PD).

  Reference numeral 62 denotes a transfer switch (TX). The transfer switch 62 is, for example, a transistor, and is turned on at the timing when φTX supplied to the gate becomes active, and transfers the charge (image signal) accumulated in the photoelectric conversion unit 61 to the FD 64 described later.

  Reference numeral 64 denotes a floating diffusion (hereinafter referred to as FD). The FD 64 functions as a capacitor equivalently. The FD 64 holds the charge accumulated in the PD 61 and transferred via the transfer switch 62, and generates a voltage (signal) corresponding to the charge amount of the charge.

  Reference numeral 65 denotes an amplifier. For example, the amplifier 65 operates as a source follower, amplifies a voltage corresponding to the charge held by the FD 64, and outputs the amplified voltage to a vertical output line 67 described later. The FD 64 functions as an input unit of the amplifier 65.

  Reference numeral 66 denotes a row selection switch. The row selection switch 66 is, for example, a transistor. The row selection switch 66 is turned on at the timing when φSEL supplied to its gate becomes active, and outputs a voltage (signal) amplified by the amplifier 65 to a vertical output line 67 described later.

  Reference numeral 67 denotes the above-described vertical output line. The vertical output line 67 supplies the signal (voltage) output from the amplifier 65 to the first reading unit 71 or the second reading unit 72.

  63 is a reset switch. The reset switch 63 resets the FD 64. The reset switch 63 is, for example, a transistor, and is turned on at the timing when φRES supplied to the gate thereof becomes active, thereby setting the potential of the FD 64 to the reset level.

  FIG. 4 is a basic operation timing of the rolling accumulation operation, which is a movement during the moving image (continuous imaging) operation of the electronic viewfinder or the like of the image sensor of FIG. (A) is an output operation of the first image signal by the first readout unit 71, and (b) is an output operation at the time of data acquisition by the second readout unit 72 (output of the second image signal).

  First, the operation of (a) will be described. First, resetting of the pixel portion is started at the timing of T0. At T0, ΦRESa (n) to ΦTXa (n) are activated. This state is a state where the PD 61 and the FD 64 are reset. Subsequently, ΦTXa (n) and ΦRESa (n) are turned off at T1. At this stage, the charge accumulation operation to the PD 61 is started. Next, ΦRESa (n) is activated at T2 immediately before reading, and ΦRESa (n) is turned off at T3. That is, the dark current charge accumulated in the FD 64 during the accumulation operation is reset between T2 and T3.

  Subsequently, ΦSELa (n) is activated at T 4 and the output of the FD 64 starts to be transferred to the vertical output line 67.

  Next, ΦPTN (n) is activated between T5 and T6, and the noise component is read out from the potential of the FD 64 to the SN circuit 75. That is, reading is performed in a reset state without an optical signal.

  Next, ΦTXa (n) is activated between T7 and T8, and the charge accumulated in the photodiode 61 is transferred to the FD 64. That is, a period between T1 and T8 is an exposure period (charge accumulation period) as the imaging apparatus.

  Subsequently, ΦPTS (n) is activated between T8 and T9, and the signal component of the potential of the FD 64 is read to the SN circuit 75. That is, the optical signal stored in the photodiode 61 and transferred to the FD 64 is read.

  At the same time as turning off ΦSELa (n) at T10, a control signal is sent from the horizontal scanning circuit 76 to the SN circuit 75. Then, an operation of sequentially reading out a signal obtained by subtracting the noise output in the FD64 reset state from the accumulated charge of light to the output amplifier 74 in the SN circuit 75 is started.

  The above is an example of the accumulation-reading operation for one column in the horizontal direction with respect to the first output. Similarly, the next target row is ΦRESa (n + 1), ΦTXa (n + 1), ΦSELa (n + 1), ΦPTN (n + 1), ΦPTS. It is performed as (n + 1).

  Next, the operation (b) will be described. Basically, except for the operation of ΦTXb (n), the movement is the same as (a) (ΦRESa (n) = ΦRESb (n), ΦSELa (n) = ΦSELb (n)). The difference is that ΦTXb (n) is not activated between T7 and T8, and the charge accumulated in the photodiode 61 is not transferred to the FD 64.

  Therefore, ΦPTS (n) is activated between T8 and T9, and the signal for reading the potential of the FD 64 to the SN circuit 75 is not an optical signal (charge accumulated in the photodiode 61) but the FD 64 at the reset potential. Charge.

  That is, in the operation of (b), the light output of the photodiode 61 is not output, and is an output mode without an optical output that is an output of only the noise component of the circuit system.

  The above is an example of the reading operation for one column in the horizontal direction with respect to the second output. Similarly, the next target row is performed as ΦRESb (n + 1), ΦTXb (n + 1), and ΦSELb (n + 1).

  In addition, this operation | movement can also perform the separate operation | movement based on each of TGsig1 or TGsig2 simultaneously.

  FIG. 5A shows a divided state in the screen when one screen is divided into four and four data reading areas are provided. FIG. 5B is a timing chart in which the operation of the CMOS image sensor described in detail in FIG. 4 is simplified.

  Reset-accumulation-transfer-read for obtaining the first output (image output) for each row is performed and output using the vertical scanning circuit 77a, the SN circuit 75, and the horizontal scanning circuit 76, and for one frame. Read. After that, as the time until the start of the first output (image output) acquisition of the next frame, it is necessary to operate at a predetermined frame rate (for example, 30 fps) in order to perform stable continuous operation as the imaging apparatus system. There is adjustment time. A second output (data output) is obtained by using the frame rate adjustment time (frame rate adjustment period). As described with reference to FIG. 4B, the second output is an output with no optical output (noise level).

  Data for one frame cannot be obtained within the frame rate adjustment time. However, the number of data that can be acquired within the frame rate adjustment time (for example, a data reading area obtained by dividing the screen into four as shown in FIG. 5A) is set in advance. Then, the data is sequentially output by a shift register provided in the vertical scanning circuit 77b, and after outputting a predetermined area (for example, the data reading area 1 in FIG. 5A) in one frame, the point (area) where the output is completed. Latch. In the frame rate adjustment time in the next frame, the area following the point (area) [= latch point] output in the previous frame is scanned (for example, the data reading area 2 in FIG. 5A) to perform the second output. Get.

  Due to the above movement, while the first output (image output) outputs several frames, the second output (data output) outputs data for one frame and is stored in the memory 152.

  In other words, in the present embodiment, the second output is performed for each predetermined condition of the first output (the first output is every frame output).

  FIG. 6 is a schematic explanatory diagram regarding processing of data output for one frame stored in the memory 152. FIG. 6A shows data for one frame stored in the memory 152, and the first output has several frames. It is the output obtained across the two. Since the sampling timing of data is not the same even within one frame, it is affected differently by external noise and random noise. For this reason, it is difficult to make appropriate correction even if the data composition is simply corrected data for one frame.

  Accordingly, the data for one frame stored in the memory 152 and subjected to data synthesis is flattened to generate correction data as shown in FIG. There is no problem with the flattening processing, for example, moving average with surrounding pixels, low-pass filter processing, or median filter processing. Further, there is no problem with the flattening process, whether it is a hardware process using an electric circuit or a software process using a program. For flattening, the offset amount generated between the divided data is also removed by calculation.

  Note that the correction data in FIG. 6B is acquired at the time of the moving image operation which is the first shooting mode, and the correction data is created with the image size in the first operation mode. Therefore, the correction data can be used as correction data for the first output (image output) from the next frame in shooting in the first shooting mode.

  FIG. 6B illustrates the correction data used for the moving image (continuous shooting) operation that is the first shooting mode. However, in this operation, since it is a moving image, priority is given to speed, and pixel decimation and addition are usually performed, so there is not enough data for an image with a normal operation such as a still image in the second shooting mode. And the size will be different.

  Therefore, for the second shooting mode, as shown in FIG. 6C, interpolation processing of the data deficient area (for example, a thinning area) is performed on the correction data in FIG. Conversion data is converted to a size that matches the image size of the mode.

  The second shooting mode correction data may be used as correction data in the next second shooting mode.

  The correction data described here may not use the correction data stored in advance, but the correction data stored in the correction data stored in advance may be corrected in real time. There is no problem.

  The use of correction data is not necessarily limited. For example, even in the first shooting mode that is not used in the second shooting mode, the correction data acquired in real time is not used according to the detection result of the external temperature detection means (the use of the correction data is switched depending on the temperature detection result). ) Etc., there is no problem.

Further, as a correction method, a known method of calculating a difference between the main image and the black image may be used. (Since this is a well-known method, detailed description is omitted.)
In addition, regarding the timing of creating correction data from the second output, the data may always be acquired and corrected with the latest correction data. There is no problem even if it is updated by sampling at a predetermined timing (for example, at the start of EVF operation) or at a predetermined interval (for example, every 1 min).
(Second Embodiment)
Next, it is a figure which shows notionally the operation timing of the pixel of each row of the pixel array which concerns on 2nd Embodiment. Below, it demonstrates centering on a different part from 1st Embodiment, and abbreviate | omits description of the same part.

  In the second embodiment, the operation of the image sensor 114 is different from that of the first embodiment as shown in FIG. In FIG. 7, both the read row timing operation for the first image signal and the read row timing operation for the second image signal are shown.

  In the frame period FT1, the vertical scanning circuit 77b activates the selection signal φSEL to select one partial area among the n partial areas. The partial area is an area in which a plurality of non-readout areas (non-readout lines for the first image signal) for the first image signal excluding a plurality of readout areas (readout lines) from the pixel array PA are divided into n. is there. The vertical scanning circuit 77b sets the selected partial region RR1 as a partial region to be read by the second reading unit 72. In response to this, the pixels in the non-reading row corresponding to the first image signal in the partial region RR1 sequentially perform the second reading operation in a state where only the noise signal is read out. The second readout unit 72 sequentially reads out the second image signal via a plurality of output lines from the non-readout row for the first image signal in the partial region in the frame period FT1. The vertical scanning circuit 77b stores (latches) the pixel position selected last in the partial area (the position of the non-reading row with respect to the first image signal).

  The vertical scanning circuit 77b performs basically the same operation as that of the frame period FT1 in the frame periods FT2 and FT3, but performs different operations in the following points.

  That is, as shown in FIG. 7, the vertical scanning circuit 77b sequentially selects partial areas to be selected from the partial areas in units of frame periods. In the frame period (second frame period) FT2 subsequent to the frame period (first frame period) FT1, the vertical scanning circuit 77b selects the next partial region in accordance with the pixel position stored in the frame period FT1. Select the partial area to be. The vertical scanning circuit 77b reads the next read row (one in the partial region shown in FIG. 7) after the non-read row (the lowest read row in the partial region shown in FIG. 7) for the first image signal stored in the frame period FT1. Select the top read line). The vertical scanning circuit 77b sets the selected partial region RR2 as a partial region to be read by the second reading unit 72 in the frame period FT2.

In the frame period FT3 subsequent to the frame period FT12, the vertical scanning circuit 77b selects a partial area to be selected next in the area according to the pixel position stored in the frame period FT2. The vertical scanning circuit 77b performs the non-reading row (the partial region shown in FIG. 7) next to the non-reading row (the bottom non-reading row in the partial region shown in FIG. 7) for the first image signal stored in the frame period FT2. Select the top read line). The vertical scanning circuit 77b sets the selected partial region RR3 as a partial region to be read by the second reading unit 72 in the frame period.
(Third embodiment)
Next, an image sensor 314 according to the third embodiment will be described with reference to FIG. Below, it demonstrates centering on a different part from 1st Embodiment, and abbreviate | omits description of the same part.

  The image sensor 314 includes a decode signal generation unit 391, a vertical selection circuit 392, a horizontal selection circuit 395, and a column AD circuit block 98 instead of the vertical scanning circuits 77a and 77b and the horizontal scanning circuits 76a and 76b.

  The decode signal generation unit 391 receives a predetermined signal from the timing generation unit 118 (see FIG. 1), and receives a decode signal (row decode signal, column decode signal) for randomly accessing the predetermined pixel 60 in the pixel array PA. Generate. The decode signal generation unit 391 supplies the row decode signal to the vertical selection circuit 392 and supplies the column decode signal to the horizontal selection circuit 395.

  The vertical selection circuit 392 includes a vertical decoder 393 and a vertical drive circuit 394. The vertical decoder 393 receives the row decode signal from the decode signal generation unit 391 and decodes the row decode signal. The vertical decoder 393 supplies the decoded result to the vertical drive circuit 394. The vertical drive circuit 394 supplies an active transfer signal φTX, reset signal φRES, and selection signal φSEL to each pixel in a predetermined row in the pixel array PA in accordance with the decoded result.

  The horizontal selection circuit 395 includes a horizontal decoder 396 and a horizontal drive circuit 397. The horizontal decoder 396 receives the column decode signal from the decode signal generation unit 391 and decodes the column decode signal. The horizontal decoder 396 supplies the decoded result to the horizontal drive circuit 397. The horizontal drive circuit 397 supplies an active control signal to the column AD circuit 98 (j) (j is a natural number) connected to each pixel in a predetermined column in the pixel array PA according to the decoded result.

  In the column AD circuit block 98, the selected column AD circuit 98 (j) generates image data by A / D converting the image signal received from the pixel, and supplies the image data to the output circuit 99.

  In this way, any pixel 60 in the pixel array PA can be selected.

  In the third embodiment, an image sensor that can arbitrarily select both vertical and horizontal is described as an example. However, the present invention is not limited to this, and for example, the image sensor can be arbitrarily selected only in the vertical direction. There is no problem.

  In the third embodiment, an example in which a column AD circuit is used for output has been described. However, it should be clearly described that the present invention is not limited to this.

1 is a configuration diagram of an imaging apparatus according to an embodiment of the present invention. 1 is a configuration diagram of an image sensor 114 (first embodiment). FIG. The circuit block diagram of the unit pixel 60 in the pixel array PA. 6 is a timing chart illustrating the operation of pixels in a region to be read by the first reading unit. The timing chart which shows operation | movement of the pixel of the area | region which the 2nd read-out part should read. FIG. 3 is a diagram illustrating a region in a pixel array according to the first embodiment. The figure which shows notionally the timing of the operation | movement of the pixel of each row in the pixel array which concerns on 1st Embodiment. The figure which shows the process which produces | generates the data of the shading component for 1 frame. The figure which shows the process which produces | generates the data of the shading component for 1 frame. The figure which shows the process which produces | generates the data of the shading component for 1 frame. The figure which shows notionally the operation timing of the pixel of each row of the pixel arrangement | sequence in 2nd Embodiment. The block diagram of the image sensor 314 (3rd Embodiment).

Explanation of symbols

100 imaging device 114 imaging device 60 unit pixel

Claims (7)

A pixel array in which a plurality of pixels each including photoelectric conversion means are arranged in a row direction and a column direction;
First readout means for obtaining a first image signal from the pixel array in each frame period;
Second readout means for obtaining a second image signal by reading out a signal from a part of the pixel array in a state where an optical signal is not output from the photoelectric conversion means during each frame period;
Generating means for generating a second image signal for one frame by combining the second image signals acquired by the second reading means;
Correcting means for correcting the first image signal acquired by the first reading means using the second image signal for the one frame generated by the generating means;
The image pickup apparatus, wherein the second reading unit reads out second image signals of different partial areas in each frame. The imaging apparatus according to claim 1, wherein the second reading unit reads the second image signal in a frame rate adjustment period included in each frame period. The first reading unit is an imaging device that reads an image signal in a plurality of frames to obtain a moving image, and then reads the image signal to obtain a still image,
The second reading means reads out the signal from the partial area by thinning out the signal,
The generating means generates a second image signal for one frame by interpolating the second image signal read by the second reading means,
The imaging apparatus according to claim 1, wherein the correction unit corrects the still image obtained by the first reading unit. The imaging apparatus obtains a moving image by thinning out and acquiring image signals in a plurality of frames by the first reading unit, and then stationary by acquiring the image signals without thinning out the image signals. Get a picture
The imaging apparatus obtains a second image signal for one frame by obtaining the image signal of the pixels thinned out by the first read-out unit without being thinned out by the second read-out unit. The imaging apparatus according to claim 1, wherein a still image obtained by acquiring an image signal by the reading unit is corrected. In each frame period, a selection unit that continuously selects a region to be read by the first reading unit and a partial region to be read by the second reading unit in the pixel array,
The said selection means selects the partial area which the said 2nd reading means should read out sequentially among the said partial areas for every frame period, The Claim 1 characterized by the above-mentioned Imaging device. The selection means sequentially selects an area to be read by the first reading means and a partial area to be read by the second reading means in each frame period, in units of rows, and in the first frame period, The pixel position last selected in the partial area to be read by the second reading means is stored, and the pixel position stored in the first frame period is stored in the second frame period following the first frame period. 6. The imaging apparatus according to claim 5, wherein the partial area to be selected next is selected, and the selected area is selected as the partial area to be read by the second reading unit. A control method for an imaging apparatus having a pixel arrangement in which a plurality of pixels each including a photoelectric conversion means are arranged in a row direction and a column direction,
A first readout step of obtaining a first image signal from the pixel array in each frame period;
A second readout step of obtaining a second image signal by reading a signal from a part of the pixel array in a state where an optical signal is not output from the photoelectric conversion means in each frame period;
A generating step of generating a second image signal for one frame by combining the second image signals acquired in the second reading step;
And a correction step of correcting the first image signal acquired in the first reading step using the second image signal for the one frame generated in the generation step. Control method of imaging apparatus.

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