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JP2008235655A - Substrate and method for manufacturing substrate - Google Patents

Substrate and method for manufacturing substrate Download PDF

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Publication number
JP2008235655A
JP2008235655A JP2007074549A JP2007074549A JP2008235655A JP 2008235655 A JP2008235655 A JP 2008235655A JP 2007074549 A JP2007074549 A JP 2007074549A JP 2007074549 A JP2007074549 A JP 2007074549A JP 2008235655 A JP2008235655 A JP 2008235655A
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ink
substrate
ivh
hole
filled
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Yosuke Kato
陽祐 加藤
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Lincstech Circuit Co Ltd
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Hitachi AIC Inc
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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate having a highly reliable connectivity by eliminating corrosion of an etching solution. <P>SOLUTION: The substrate includes a laminate having a through-hole for an end face electrode and/or an IVH, and an ink insoluble in the etching solution filled in the through-hole and/or the IVH. The ink is filled up to the substrate more than once. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、電子機器等に使用される基板及びこの基板の製造方法に関する。   The present invention relates to a substrate used in an electronic device or the like and a method for manufacturing the substrate.

従来、プリント配線板の端面に端面電極を形成する方法は、基材の表裏両面に銅箔が積層されている銅張り積層板に、端面電極用スルーホール及び/又はIVHを穴あけし、次に銅めっきにてプリント配線板の表裏及び穴壁に導体を形成してからエッチング処理をして、指定されたランド形状に端面電極用のランドを形成し、その次にソルダーレジストを形成する。   Conventionally, the method for forming end face electrodes on the end face of a printed wiring board is to drill through holes for end face electrodes and / or IVH in a copper clad laminate in which copper foil is laminated on both front and back surfaces of a substrate, A conductor is formed on the front and back surfaces of the printed wiring board and the hole wall by copper plating, and then an etching process is performed to form a land for an end face electrode in a specified land shape, and then a solder resist is formed.

その後、必用に応じて、ニッケル・金めっきを施し、プリント配線板を完成させる。完成したプリント配線板は、電子部品を実装した後に、この端面電極用スルーホール及び/又はIVHのほぼ中央をプレス金型による打ち抜き加工、ルーター加工、ダイサー加工等の外形加工で切断され、プリント配線板の端面に端面電極を形成される。   Then, if necessary, nickel / gold plating is applied to complete the printed wiring board. The finished printed wiring board is mounted with electronic components, and then the through hole for the end face electrode and / or the center of the IVH is cut by outline processing such as punching with a press die, router processing, dicer processing, etc. An end face electrode is formed on the end face of the plate.

しかしながら、端面電極用のスルーホール及び/又はIVHの、ほぼ中央の位置を、プレス金型による打ち抜き加工、ルーター加工、ダイサー加工等で切断して、端面電極を形成すると、プレス金型による打ち抜き加工、ルーター加工、ダイサー加工等による切断の外形加工時に、機械的衝撃により端面電極部のランドやスルーホール及び/又はIVH導体が、剥離破壊やバリを生じ、電気的な接続信頼性が確保できない問題点がある。
より詳細に述べると、剥離破壊されたものは、電気接続がとれないので、全く使用できなくなる。バリを生じたものは、はんだ付けを行う際、端面電極にはんだがつかず、接続不良の原因になったり、バリが障害となって正しい位置に実装されなくなる。
また、金属切断時に発生する切断切粉は、飛散した場合、回路間に跨って固定されると、短絡原因になるので、できる限り発生量を少なくする必要がある。
However, if the end surface electrode is formed by cutting the through hole for the end face electrode and / or IVH at the almost central position by punching with a press die, router processing, dicer processing, etc., punching with the press die When cutting outer shape by router processing, dicer processing, etc., the land, through hole and / or IVH conductor of the end face electrode part may cause peeling failure or burrs due to mechanical impact, and electrical connection reliability cannot be secured There is a point.
More specifically, those that are peeled and broken cannot be used at all because they cannot be electrically connected. When the soldering is performed, the end face electrode is not soldered, and this may cause a connection failure, or the burr becomes an obstacle and cannot be mounted at the correct position.
In addition, when the cutting chips generated at the time of cutting the metal are scattered and fixed between the circuits, they cause a short circuit, and therefore it is necessary to reduce the generation amount as much as possible.

そこで、ランド部分での剥離破壊、バリの発生を無くし、全体での切断切粉発生量を抑えた基板として、端面電極用スルーホール及び/又はIVHと、このスルーホール及び/又はIVHの周囲に配置されるランドとを備え、スルーホール及び/又はIVHの周囲が、導電性のランド領域と、非導電性領域とを有する基板がある。
特開2006−229177号公報
Therefore, as a substrate that eliminates peeling breakage and burr generation at the land portion and suppresses the generation amount of cutting chips as a whole, the end face electrode through hole and / or IVH and the periphery of the through hole and / or IVH There is a substrate that includes a land to be disposed and has a conductive land region and a non-conductive region around a through hole and / or IVH.
JP 2006-229177 A

しかしながら、このような基板の製造工程において、スルーホール及び/又はIVHの穴壁の導体をエッチング液から保護するために、スルーホール及び/又はIVH内にエッチング液に不溶なインクを充填するが、そのインクに熱硬化型(溶剤含有)を用いた場合、インク硬化後の体積減少によって表面に凹みが発生してしまい、エッチング液の侵食によって断線の原因となってしまう。   However, in the manufacturing process of such a substrate, in order to protect the through hole and / or the conductor of the hole wall of the IVH from the etching solution, ink that is insoluble in the etching solution is filled in the through hole and / or IVH. When a thermosetting type (containing a solvent) is used for the ink, a dent is generated on the surface due to the volume reduction after the ink is cured, and an etching solution erosion causes disconnection.

図1を用いてより詳細に述べると、図1(a)にて、充填直後ではインクに凹みは無いが、インクが溶剤を含有しているため、硬化後溶剤が気化することで体積が減少し、図1(b)に示すように、凹みが発生する。
その後、図1(c)に示すように、研磨によって表面の余分なインクを除去し、図1(d)に示すように、ドライフィルム5をラミネートすると、凹みがドライフィルム5とインクとの間に隙間を発生し、露出した導体部が侵食してきたエッチング液によって溶解し、カケ・断線7が発生してしまう。
Referring to FIG. 1 in more detail, in FIG. 1 (a), there is no dent in the ink immediately after filling, but since the ink contains a solvent, the volume is reduced by the evaporation of the solvent after curing. Then, as shown in FIG. 1B, a dent is generated.
Thereafter, as shown in FIG. 1 (c), excess ink on the surface is removed by polishing, and as shown in FIG. 1 (d), when the dry film 5 is laminated, a dent is formed between the dry film 5 and the ink. A gap is generated in the film, and the exposed conductor is dissolved by the eroded etchant, resulting in chipping and disconnection 7.

本発明は、エッチング液の侵食を排除し、接続信頼性の高い基板を提供することを目的とする。   It is an object of the present invention to provide a substrate with high connection reliability by eliminating etching solution erosion.

本発明は、以下のものに関する。
(1)端面電極用スルーホール及び/又はIVHを有する積層体と、スルーホール及び/又はIVH内に充填されるエッチング液に不溶なインクとを備え、上記インクが複数回に分けて充填される基板。
(2)項(1)において、インクの充填が、2回である基板。
(3)項(1)又は(2)において、インクの充填が、前に充填されたインクの硬化度が2H以上となった後に、再充填を行う基板。
(4)項(1)乃至(3)の何れかにおいて、インクが、熱硬化型である基板。
(5)以下の工程(a)〜(g)にて製造される基板の製造方法。
(a)多層基板にスルーホール及び/又はIVHを形成する工程
(b)工程(a)にて形成したスルーホール及び/又はIVHに導電性のめっき層を形成する工程
(c)スルーホール及び/又はIVH内にインクを充填する工程
(d)先に充填したインクを硬化させた後に再度インクを充填する工程
(e)基板表面の余分なインクを研磨によって除去する工程
(f)多層基板の表裏面に回路を形成する工程
(g)インクを剥離する工程
The present invention relates to the following.
(1) A laminate having through-holes for end face electrodes and / or IVH and ink insoluble in an etching solution filled in the through-holes and / or IVH are provided, and the ink is filled in a plurality of times. substrate.
(2) The substrate according to item (1), wherein the ink is filled twice.
(3) In the item (1) or (2), the substrate that is refilled after the ink is filled after the degree of curing of the previously filled ink is 2H or more.
(4) The substrate according to any one of items (1) to (3), wherein the ink is a thermosetting type.
(5) A method for manufacturing a substrate manufactured in the following steps (a) to (g).
(A) Step of forming a through hole and / or IVH in the multilayer substrate (b) Step of forming a conductive plating layer on the through hole and / or IVH formed in step (a) (c) Through hole and / or Alternatively, the step of filling the ink into the IVH (d) the step of refilling the ink after curing the previously filled ink (e) the step of removing excess ink on the substrate surface by polishing (f) the surface of the multilayer substrate Step of forming circuit on back side (g) Step of peeling ink

本発明によれば、穴壁の導体を保護するために、充填するインクを複数回に分けて充填することで、硬化後のインク表面の凹みがなくなり、エッチング液の侵食による断線を生じることがなく、接続信頼性の高い基板を提供できる。   According to the present invention, in order to protect the conductor on the hole wall, the ink to be filled is filled in a plurality of times, so that there is no dent on the ink surface after curing, and disconnection due to etching solution erosion may occur. In addition, a substrate with high connection reliability can be provided.

本発明にて述べるスルーホールは、後に切断されて、端面電極とするものであり、その形状は貫通孔である。このスルーホールは壁面に導電性金属を配してあり、この導電性金属をめっきにより形成することができる。   The through hole described in the present invention is cut later to form an end face electrode, and the shape thereof is a through hole. The through hole has a conductive metal disposed on the wall surface, and the conductive metal can be formed by plating.

本発明にて述べるIVHは後に切断されて、端面電極とするものであり、その形状は有底の穴である。このIVHは、壁面および穴底に導電性金属を配してあり、この導電性金属をめっきにより形成することができる。   The IVH described in the present invention is cut later to form an end face electrode, and its shape is a bottomed hole. In this IVH, a conductive metal is disposed on the wall surface and the bottom of the hole, and this conductive metal can be formed by plating.

スルーホール及びIVHの周囲には、ランドを形成することができ、このランドを導電性のランド領域と、非導電性領域とを有するようにすることができる。
ランド領域は、導電性金属により形成され、具体的には、めっき、金属箔等により形成される。そして、このランド領域は他の回路との電気的接続を行うことに使用される。
非導電性領域は、導電性金属を有さない領域であり、初めから導電性金属を配さないようにするか、一旦銅箔配置又はめっき銅を付着させた後に、エッチングにより金属部分を溶かし、非導電性領域を形成しても良い。
A land can be formed around the through hole and the IVH, and the land can have a conductive land region and a non-conductive region.
The land region is formed of a conductive metal, specifically, plating, metal foil, or the like. This land area is used for electrical connection with other circuits.
The non-conductive region is a region that does not have a conductive metal. Do not place a conductive metal from the beginning, or once the copper foil is placed or plated copper is deposited, the metal part is melted by etching. A non-conductive region may be formed.

本発明にて述べる基板は、スルーホールのみ、IVHのみ、又は、スルーホール及びIVHを備えるものであり、多層構造を有している。
より具体的に述べると、銅張り積層板にプリント配線板の端面に電極を形成するための端面電極用スルーホール及びIVH、部品挿入用スルーホール、またはプリント配線板の層間を電気的に導通させる接続スルーホール及びIVH等を有し、その穴の壁面および穴底に、導電性金属を配してあり、この導電性金属をめっきにより形成することができる。
The substrate described in the present invention has only a through hole, only IVH, or includes a through hole and IVH, and has a multilayer structure.
More specifically, the through-holes for the end face electrodes and IVH for forming electrodes on the end face of the printed wiring board on the copper-clad laminate are electrically connected between the through holes for component insertion or the printed wiring board. It has a connection through hole, IVH, and the like, and a conductive metal is disposed on the wall surface and bottom of the hole, and this conductive metal can be formed by plating.

本発明にて述べるインクは、回路形成時に使用するエッチング液に対し、非溶解性のものであれば良く、その材質等に特に制限されるものではない。
具体的には、この穴埋めインクはドライフィルムの現像液である炭酸ソーダ(NaCO)には溶解されず、エッチング液(塩化鉄・塩化銅など)に耐性があり、苛性ソーダ(NaOH)で溶解し剥離されるものが好ましい。
また、この穴埋めインクには、熱硬化型とUV硬化型があるが、熱硬化型のインクのほうが研磨性、インク剥離性に優れているため好ましい。
The ink described in the present invention is not particularly limited to the material and the like as long as it is insoluble in the etching solution used for circuit formation.
Specifically, this ink for filling holes is not dissolved in sodium carbonate (Na 2 CO 3 ), which is a dry film developer, and is resistant to etching solutions (iron chloride, copper chloride, etc.), and caustic soda (NaOH). What melt | dissolves and peels is preferable.
In addition, the hole-filling ink includes a thermosetting type and a UV curable type, and the thermosetting type ink is preferable because it has excellent polishing properties and ink peeling properties.

インクの充填は、複数回であれば特に制限されるものではなく、2回、3回、4回、5回等、任意に選択することができるが、作業効率を考えると、2回であることが好ましい。インクの充填方法は、特に制限されないが、具体的には、スクリーン印刷、ロールコートによるものがあり、インクを充填する基板の板厚、穴径、穴数等の条件によって使い分けることが好ましい。   The filling of the ink is not particularly limited as long as it is performed a plurality of times, and can be arbitrarily selected such as 2, 3, 4, 5, etc., but it is twice in consideration of work efficiency. It is preferable. The ink filling method is not particularly limited, and specifically, there are screen printing and roll coating, and it is preferable to use properly depending on conditions such as the plate thickness, hole diameter, and number of holes of the substrate to be filled with ink.

インクの再充填、即ち、初回に充填した後の次回以降の充填は、先に充填したインクが、硬化した後に行われるが、先に充填したインクの硬化は、鉛筆硬度にて述べる2H以上であることが好ましい。これは、2H未満であると、インクの大部分が未硬化であり、2回目以降の充填時に最初に塗布したインクが転写されてしまうためである。
インクの充填回数と充填量の関係は、特に制限されないが、最初の充填で硬化後のインク量が必要インク量の約8割以上充填されることが好ましく、2回目以降の充填で硬化による体積減少によって発生した残りの不足分を塗布することが望ましい。
The refilling of the ink, that is, the subsequent filling after the first filling is performed after the previously filled ink is cured, but the curing of the previously filled ink is 2H or more described in pencil hardness. Preferably there is. This is because if it is less than 2H, most of the ink is uncured, and the first applied ink is transferred during the second and subsequent fillings.
The relationship between the number of ink fillings and the filling amount is not particularly limited, but it is preferable that the amount of ink after curing is filled by about 80% or more of the required ink amount in the first filling, and the volume due to curing in the second and subsequent fillings. It is desirable to apply the remaining deficit caused by the reduction.

以下、本発明の実施例について図面を用いて説明する。
図2は、本発明の1実施例である基板の製造方法を説明する工程図である。
図2(a)に示すように、まずコア材にMCL−BE−67G(H)(日立化成工業株式会社製 商品名)、絶縁層にMCL−BE−67G(H)(日立化成工業株式会社製 商品名)を用いて、その両側に厚さ12μmの銅箔を重ね、積層プレス機にて、摂氏190度、圧力3.0MPaにて2時間、加熱・加圧し、銅張り積層板Aを得た。
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 2 is a process diagram for explaining a substrate manufacturing method according to an embodiment of the present invention.
As shown in FIG. 2A, first, the core material is MCL-BE-67G (H) (trade name, manufactured by Hitachi Chemical Co., Ltd.), and the insulating layer is MCL-BE-67G (H) (Hitachi Chemical Industry Co., Ltd.). Product name), a 12 μm thick copper foil is stacked on both sides, and heated and pressurized at 190 degrees Celsius and 3.0 MPa for 2 hours with a laminating press, and a copper-clad laminate A is obtained. Obtained.

その後、銅張り積層板Aを用いて、プリント配線板加工を行った。
まず、銅張り積層板Aにプリント配線板の端面に電極を形成するための端面電極用スルーホール1及びIVH2と、部品挿入用穴、またはプリント配線板の層間を電気的に導通させる接続穴を銅張り積層板に穴あけをする。
Thereafter, using the copper-clad laminate A, printed wiring board processing was performed.
First, through holes 1 and IVH2 for forming electrodes on the end face of the printed wiring board on the copper-clad laminate A, and connection holes for electrically connecting the parts insertion holes or the layers of the printed wiring board. Drill holes in copper-clad laminates.

次に、図2(b)に示すように、プリント配線板全面にパネル銅めっきを行い、銅めっき3を形成する。   Next, as shown in FIG. 2B, panel copper plating is performed on the entire surface of the printed wiring board to form a copper plating 3.

その次に、図2(c)に示すように、スクリーン印刷法若しくはロールコート法にてアルカリ可溶型の熱硬化型穴埋めインク4(山栄化学株式会社製 商品名SER−490BNH)をプリント配線板の端面に電極を形成するための端面電極用スルーホール1及びIVH2に充填する。   Next, as shown in FIG. 2 (c), an alkali-soluble thermosetting hole-filling ink 4 (trade name SER-490BNH, manufactured by Yamaei Chemical Co., Ltd.) is printed by a screen printing method or a roll coating method. The end face electrode through holes 1 and IVH 2 for forming electrodes on the end face of the plate are filled.

図2(d)に示すように、インクを110℃、40分以上で硬化させ、充填されたインクの硬化度が2H以上となった後、インク表面の凹みに再度インク4を充填し110℃、40分以上で硬化させる。   As shown in FIG. 2 (d), the ink was cured at 110 ° C. for 40 minutes or more, and after the degree of cure of the filled ink was 2H or more, the ink 4 was again filled with the ink 4 at 110 ° C. Curing in 40 minutes or more.

次に、図2(e)に示すように、基板表面を研磨し、余分なインクを除去し表面を平滑にする。インクを複数回に分けて充填することで、硬化後のインク表面の凹みがなくなり、研磨後インク表面が平滑となり、インクとドライフィルムの密着性が向上する。   Next, as shown in FIG. 2 (e), the substrate surface is polished to remove excess ink and smooth the surface. By filling the ink in a plurality of times, dents on the ink surface after curing are eliminated, the surface of the ink after polishing becomes smooth, and the adhesion between the ink and the dry film is improved.

図2(f)に示すように、その後ドライフィルム5(ニチゴー・モートン株式会社製 商品名 ALPHTO NT225)をラミネートし、端面電極用のランド部と表裏の導体回路部を露光する。
その後、炭酸ソーダ(NaCO)にて現像を行い、塩化第二鉄(FeCl)にてエッチング処理を行い、導体回路を形成する。
上記の回路形成において、外層導体に設ける端面電極用スルーホール1及びIVH2のランドはスルーホール1及びIVH2の周囲が導電性のランド領域と、非導電性領域とを有する。
また、このスルーホール1及びIVH2のランドはインクとドライフィルムの密着性が良好であるため、エッチング液の侵食による断線を生じることがない。
As shown in FIG. 2 (f), a dry film 5 (trade name ALPHTO NT225 manufactured by Nichigo Morton Co., Ltd.) is then laminated, and the land portions for the end face electrodes and the conductor circuit portions on the front and back sides are exposed.
Thereafter, development is performed with sodium carbonate (Na 2 CO 3 ), and etching is performed with ferric chloride (FeCl 3 ) to form a conductor circuit.
In the circuit formation described above, the end surface electrode through-holes 1 and IVH2 lands provided in the outer layer conductor have a conductive land region and a non-conductive region around the through-holes 1 and IVH2.
Further, since the land of the through holes 1 and IVH2 has good adhesion between the ink and the dry film, no disconnection occurs due to the etching solution erosion.

次に、図2(g)に示すように、ドライフィルム5とアルカリ可溶型穴埋めインク4を苛性ソーダ(NaOH)にて剥離する。   Next, as shown in FIG. 2G, the dry film 5 and the alkali-soluble ink filling ink 4 are peeled off with caustic soda (NaOH).

その後、図2(h)に示すように、ソルダーレジスト6を形成してから、図2(i)に示すように、ニッケル・金めっきを形成しプリント配線板を完成させる。
完成したプリント配線板に電子部品を実装した後、ダイサー加工にてプリント配線板の外形を切断すると同時に、端面電極用スルーホール1及びIVH2のほぼ中央を切断し、プリント配線板の端面と端面電極スルーホール1及びIVH2を形成する。
このようにして完成した基板は、エッチング液の侵食を排除し、接続信頼性の高いものとなる。
Then, after forming the solder resist 6 as shown in FIG.2 (h), as shown in FIG.2 (i), nickel and gold plating are formed and a printed wiring board is completed.
After mounting the electronic components on the completed printed wiring board, the outer shape of the printed wiring board is cut by dicer processing, and at the same time, the center of the through hole 1 for the end face electrode and IVH2 is cut, and the end face and end face electrode of the printed wiring board Through holes 1 and IVH2 are formed.
The substrate thus completed eliminates etching solution erosion and has high connection reliability.

従来例である基板の製造方法を示す工程図である。It is process drawing which shows the manufacturing method of the board | substrate which is a prior art example. 本発明の基板の製造方法を示す工程図である。It is process drawing which shows the manufacturing method of the board | substrate of this invention.

符号の説明Explanation of symbols

1…スルーホール、2…IVH、3…銅めっき、4…インク、5…ドライフィルム、6…ソルダーレジスト、7…カケ・断線 DESCRIPTION OF SYMBOLS 1 ... Through hole, 2 ... IVH, 3 ... Copper plating, 4 ... Ink, 5 ... Dry film, 6 ... Solder resist, 7 ... Crack, disconnection

Claims (5)

端面電極用スルーホール及び/又はIVHを有する積層体と、スルーホール及び/又はIVH内に充填されるエッチング液に不溶なインクとを備え、上記インクが複数回に分けて充填される基板。   A substrate comprising a laminate having through-holes for end face electrodes and / or IVH and ink insoluble in an etching solution filled in the through-holes and / or IVH, and the ink is filled in a plurality of times. 請求項1において、インクの充填が、2回である基板。   2. The substrate according to claim 1, wherein the ink is filled twice. 請求項1又は2において、インクの充填が、前に充填されたインクの硬化度が2H以上となった後に、再充填を行う基板。   3. The substrate according to claim 1 or 2, wherein the ink is refilled after the previously filled ink has a curing degree of 2H or more. 請求項1乃至3の何れかにおいて、インクが、熱硬化型である基板。   4. The substrate according to claim 1, wherein the ink is a thermosetting type. 以下の工程(a)〜(g)にて製造される基板の製造方法。
(a)多層基板にスルーホール及び/又はIVHを形成する工程
(b)工程(a)にて形成したスルーホール及び/又はIVHに導電性のめっき層を形成する工程
(c)スルーホール及び/又はIVH内にインクを充填する工程
(d)先に充填したインクを硬化させた後に再度インクを充填する工程
(e)基板表面の余分なインクを研磨によって除去する工程
(f)多層基板の表裏面に回路を形成する工程
(g)インクを剥離する工程
The manufacturing method of the board | substrate manufactured in the following processes (a)-(g).
(A) Step of forming a through hole and / or IVH in a multilayer substrate (b) Step of forming a conductive plating layer on the through hole and / or IVH formed in step (a) (c) Through hole and / or Alternatively, the step of filling the ink into the IVH (d) the step of refilling the ink after curing the previously filled ink (e) the step of removing excess ink on the substrate surface by polishing (f) the surface of the multilayer substrate Step of forming circuit on back surface (g) Step of peeling ink
JP2007074549A 2007-03-22 2007-03-22 Substrate and method for manufacturing substrate Pending JP2008235655A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013537365A (en) * 2010-09-09 2013-09-30 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド Semiconductor chip device having a polymer filler groove
JP2015225930A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode
JP2015225927A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode
JP2015225928A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode
JP2015225929A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05218617A (en) * 1992-02-07 1993-08-27 Sumitomo Cement Co Ltd Manufacture of printed wiring board and printed wiring board
JPH10126055A (en) * 1996-10-24 1998-05-15 Goou Kagaku Kogyo Kk Manufacture of printed wiring board having through hole
JPH11317578A (en) * 1998-04-30 1999-11-16 Ngk Spark Plug Co Ltd Manufacture of wiring board
JP2006156879A (en) * 2004-12-01 2006-06-15 Hitachi Aic Inc Wiring board formed with end-face electrode

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05218617A (en) * 1992-02-07 1993-08-27 Sumitomo Cement Co Ltd Manufacture of printed wiring board and printed wiring board
JPH10126055A (en) * 1996-10-24 1998-05-15 Goou Kagaku Kogyo Kk Manufacture of printed wiring board having through hole
JPH11317578A (en) * 1998-04-30 1999-11-16 Ngk Spark Plug Co Ltd Manufacture of wiring board
JP2006156879A (en) * 2004-12-01 2006-06-15 Hitachi Aic Inc Wiring board formed with end-face electrode

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013537365A (en) * 2010-09-09 2013-09-30 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド Semiconductor chip device having a polymer filler groove
JP2015225930A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode
JP2015225927A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode
JP2015225928A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode
JP2015225929A (en) * 2014-05-27 2015-12-14 株式会社伸光製作所 Method for manufacturing printed wiring board having end face electrode

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