JP2008268155A - Thermal type infrared solid-state imaging element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain suppression of temperature drift due to the variation in element temperature and an offset distribution by voltage drop in the driving line, by carrying out a feedback of an output of a reference picture element, in a thermal type infrared solid-state imaging element, and to prevent decrease in the manufacturing yield and increase in cost, even if defective pixels are produced in reference pixels. <P>SOLUTION: With respect to the output of the reference pixels, if they are defective pixels, they are not made to be reflected in the feedback signal by a defective decision circuit by using a voltage comparison circuit. Alternatively, an averaging circuit averages the output of a plurality of the reference pixels. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a thermal infrared solid-state imaging device that detects a temperature change caused by incident infrared rays using a two-dimensionally arranged semiconductor sensor, and more particularly, a thermal type that outputs an electrical signal from a semiconductor sensor after integration processing by a signal processing circuit. The present invention relates to an infrared solid-state imaging device.

  In a general thermal infrared solid-state imaging device, pixels having a heat insulating structure are two-dimensionally arranged and an infrared image is captured by utilizing the change in pixel temperature due to incident infrared rays. In the case of an uncooled thermal infrared solid-state image sensor, the temperature sensor that constitutes the pixel uses a bolometer such as polysilicon, amorphous silicon, silicon carbide, vanadium oxide, or a semiconductor element such as a diode or a transistor It has been known. In particular, semiconductor elements such as diodes are advantageous in making the characteristics of each pixel uniform because variations in electrical characteristics and temperature dependence are very small, such as solids.

  In the thermal infrared solid-state imaging device, the pixels are two-dimensionally arranged, connected by a drive line for each row, and connected by a signal line for each column. Each drive line is selected in turn by the vertical scanning circuit and the switch, and the pixel is energized from the power source through the selected drive line. The output of the pixel is transmitted to the differential integration circuit via the signal line, integrated and amplified for a certain time by the differential integration circuit, and then sequentially output to the output terminal by the horizontal scanning circuit and the switch (for example, non-patent document) 1).

  In these thermal infrared solid-state imaging devices, a voltage drop in the drive line affects the voltage input to the integration circuit in addition to the voltage across the pixel. However, since the amount of voltage drop in the drive line differs for each pixel column, the output of the integration circuit also varies for each pixel column, and an offset distribution due to the resistance of the drive line occurs in the captured image. In addition, the response of the thermal infrared solid-state imaging device to infrared light, that is, the change in the voltage across the pixel is much smaller than the voltage drop component in the drive line. For this reason, there is a problem that the amplifier is saturated due to the voltage drop distribution due to the drive line, and the necessary amplification cannot be ensured.

  In addition, since the response of the pixel includes a response due to a change in element temperature in addition to the response of infrared light, there is also a problem that the element output drifts with a change in element temperature. In other words, it is ideal that the pixel is completely insulated and only the temperature change due to infrared absorption is detected, but since the pixel's heat insulation structure has a finite thermal resistance, the ambient temperature changes during the detection operation. Then the output will also change. Since the output fluctuation due to the change in the environmental temperature is indistinguishable from the change in the incident infrared ray, the measurement accuracy of the infrared ray is lowered, and stable image acquisition cannot be performed.

In order to solve such a problem, Patent Document 1 adopts the following configuration in a thermal infrared solid-state imaging device. In addition to the two-dimensionally arranged pixel array, a reference pixel column configured by excluding the heat insulation structure and / or the infrared absorption structure is further provided. The output of the reference pixel varies depending on the temperature change of the entire element. When a reference pixel is selected, a power supply voltage is applied to the reference pixel and the first constant current source connected in series. On the other hand, a bias voltage is applied to the second constant current source. The differential integration circuit outputs the difference between the voltages across the two constant current sources. The output value is held by a sample and hold circuit, compared with a reference voltage, a bias voltage corresponding to the difference is generated, and fed back as an input voltage of the differential integration circuit. By using the differential integration circuit in the output reading and the feedback mechanism of the temperature variation of the output voltage of the reference pixel, the output signal of the reference pixel column is always operated to have a constant voltage value. As a result, the offset distribution due to the voltage drop in the drive line and the temperature drift due to the element temperature variation, which are the conventional problems, are solved. The plurality of constant current sources 20 are connected in parallel by a bias line 19 substantially parallel to the drive line 3. In addition, bias lines that connect a plurality of second constant current sources are provided so as to generate substantially the same voltage drop as drive lines connected to pixels in one row, thereby suppressing offset distribution due to voltage fluctuations in the drive lines. To do.
JP 2005-214039 A Ishikawa et al., “Low-cost 320x240 uncooled IRFPA using conventional silicon IC process”, Part of the SPIE Conference on Infrared Technology and Applications XXV, 1999 4 Monthly issue, Vol. 3698, pages 556 to 564

  However, in the conventional thermal infrared solid-state imaging device, if the reference pixel is a defective pixel due to foreign matter contamination or other factors in the manufacturing process, the output of the abnormal defective pixel is detected as a difference between the detection of the pixel output. Feedback to the dynamic integration circuit. For this reason, an output failure occurs in units of one or a plurality of lines in the pixel output, and the captured image is displayed as noise or image unevenness. When such a defective pixel occurs, an output failure occurs in units of rows, which may cause a decrease in manufacturing yield, which is a cause of cost increase.

  It is an object of the present invention to suppress offset distribution due to voltage drop in a drive line and temperature drift due to element temperature fluctuation, and prevent pixel output failure even if the reference pixel is a defective pixel. It is to provide a thermal infrared solid-state imaging device.

  A first thermal infrared solid-state imaging device according to the present invention has a heat insulating structure and an infrared absorption structure, and includes a plurality of photosensitive pixels including at least one or more diodes connected in series, and a plurality of reference pixels. A pixel area provided with a two-dimensional matrix of pixels, a plurality of drive lines in which one pole of the photosensitive pixel and the reference pixel are connected in common for each row, and one of the plurality of drive lines is selected as a power source A vertical scanning circuit to be connected and a second constant current source arranged in parallel to each of the plurality of drive lines so as to generate a voltage drop substantially the same as that of the plurality of drive lines and provided for each column are connected in common. A bias line to which a bias voltage is fed back, and a plurality of signal lines in which the other poles of the photosensitive pixel and the reference pixel are connected in common for each column, each of which has one of a plurality of first constant current sources. Connected Are provided for each column of the signal line, the photosensitive pixel and the reference pixel, and the voltage between both ends of the first constant current source and the second constant current source is input, and the difference between the both end voltages is integrated for a certain period of time. Selected by the plurality of differential integration circuits to be output, a horizontal scanning circuit for selecting one of the output signals of the plurality of differential integration circuits and leading to the output terminal, the vertical operation circuit, and the horizontal scanning circuit A sample hold circuit that samples and holds the output signal of the differential integration circuit for the reference pixel, and whether or not the selected reference pixel is a defective pixel based on the output signal held in the sample hold circuit And when determining that the pixel is not a defective pixel, the defect determination circuit that outputs the output signal, and the bias according to a difference between the output signal output from the sample hold circuit and a reference voltage It generates a pressure, and a bias voltage generation circuit to be fed back to the bias line.

  A second thermal-type infrared solid-state imaging device according to the present invention has a heat insulating structure and an infrared absorption structure, and includes a plurality of photosensitive pixels including at least one or more diodes connected in series, and a plurality of reference pixels. A pixel area provided with a two-dimensional matrix of pixels, a plurality of drive lines in which one pole of the photosensitive pixel and the reference pixel are connected in common for each row, and one of the plurality of drive lines is selected as a power source A vertical scanning circuit to be connected and a second constant current source arranged in parallel to each of the plurality of drive lines so as to generate a voltage drop substantially the same as that of the plurality of drive lines and provided for each column are connected in common. A bias line to which a bias voltage is fed back, and a plurality of signal lines in which the other poles of the photosensitive pixel and the reference pixel are connected in common for each column, each of which has one of a plurality of first constant current sources. Connected Are provided for each column of the signal line, the photosensitive pixel and the reference pixel, and the voltage between both ends of the first constant current source and the second constant current source is input, and the difference between the both end voltages is integrated for a certain period of time. Selected by the plurality of differential integration circuits to be output, a horizontal scanning circuit for selecting one of the output signals of the plurality of differential integration circuits and leading to the output terminal, the vertical operation circuit, and the horizontal scanning circuit A sample and hold circuit that samples and holds the output signal of the differential integration circuit for the plurality of reference pixels, an average circuit that averages the plurality of output signals held in the sample and hold circuit, and an output from the average circuit A bias voltage generation circuit that generates the bias voltage according to a difference between the average signal and a reference voltage to be fed back to the bias line.

  In the first thermal infrared solid-state imaging device, the offset distribution due to the voltage drop in the drive line and the temperature drift due to the device temperature fluctuation are suppressed, and if it is a defective pixel, it is adopted as a feedback signal if it is a defective pixel. Therefore, no defective image output occurs even if the reference pixel is a defective pixel. Therefore, it is possible to provide a low-cost, high-stability thermal infrared solid-state imaging device without causing a decrease in manufacturing yield.

  In the second thermal infrared solid-state imaging device, since the reference voltages of a plurality of reference pixels are averaged and fed back, the influence can be minimized even if a minute output defect exists in the reference pixel.

Embodiment 1 FIG.

  FIG. 1 is a circuit diagram of a thermal infrared solid-state imaging device according to Embodiment 1 of the present invention. A large number of photosensitive pixels 1 are two-dimensionally arranged in the pixel area. Further, as the reference pixel 12, a pixel having substantially the same structure as that of the photosensitive pixel 1 is provided except that either one or both of the heat insulation structure and the infrared absorption structure is not provided. The reference pixel 12 may be provided by excluding the heat insulating structure and / or the infrared absorbing structure from a part of the photosensitive pixels in the pixel area. In the example of FIG. 1, one column of reference pixels 12 is arranged as one column at the left end of the pixel area. Each photosensitive pixel 1 includes one diode having an infrared absorption structure and a heat insulation structure or a plurality of diodes connected in series. Each reference pixel 12 is configured by excluding a heat insulating structure and / or an infrared absorption structure. The reference pixel preferably has substantially the same structure as the photosensitive pixel except that either one or both of the heat insulating structure and the infrared absorption structure is not provided. Therefore, the reference pixel changes substantially according to a temperature change of the entire element. Output a reference signal.

  In a two-dimensional array of a plurality of pixels composed of a photosensitive pixel 1 and a reference pixel 12, a drive line 3 is commonly connected to one pole of one row of photosensitive pixels and a reference pixel, and one column of photosensitive pixels 1 or The signal line 5 is commonly connected to the other pole of the reference pixel 12. That is, the pixels are connected by the drive line 3 for each row and connected by the signal line 5 for each column. A first group of constant current sources (constant current means) 2 is connected to the end of each signal line 5. When the drive line 3 is selected in turn by the vertical scanning circuit 4, the switch 5 'is closed, and the voltage from the power source 6 passes through the switch 5' and the drive line 3, and the pixels 1 and 12 and the constant current source. 2 in series. On the other hand, a second group of constant current sources (constant current converting means) 20 for supplying substantially the same current as the constant current source 2 are arranged in the vicinity of the constant current source 2 in each column of the pixels 1 and 12. The plurality of constant current sources 20 are connected in parallel by a bias line 19 substantially parallel to the drive line 3. Further, as will be described later, a bias voltage is input to the bias line 19 via the low-pass filter 18. The bias line 19 has substantially the same resistance value as that of the drive line 3 so as to generate almost the same voltage drop as that of the drive line 3. The bias line 19 only needs to generate a voltage drop substantially the same as that of the drive line 3, and does not necessarily have the same resistance as that of the drive line 3. Therefore, a bias voltage is applied to the constant current source 2. When the current value of the constant current source 2 is different from that of the constant current source 20, the bias line 19 and the drive line 3 may have different resistances accordingly. A differential amplification integration circuit 7 is provided for each column of the two-dimensional array of pixels, and the voltage across the constant current source 2 (the reference pixel or the photosensitive pixel) is connected to the minus side terminal and the plus side terminal of the differential amplification integration circuit 7. Voltage) and the voltage across the constant current source 20 (bias voltage) are input, the difference between the two voltages is integrated and amplified for a certain period of time and output. When the plurality of horizontal selection switches 9 are sequentially turned on by the horizontal scanning circuit 8, the output signal (pixel output) of the selected differential integration circuit 7 is output to the outside via the output amplifier 11. Is output. The above-described configuration is known in a conventional thermal infrared solid-state imaging device.

  In this circuit configuration, the voltage across the constant current source 2 connected to the reference pixels 12 in one column is read as a reference signal. This reference signal is read out in the same manner as a normal pixel 1 signal. That is, the voltage across the current source 2 connected to the reference pixel 12 and the voltage across the current source 20 connected to the bias line 19 adjacent thereto are respectively the negative side and the positive side of the differential integration circuit 7. Is integrated and amplified. Then, an output signal corresponding to the reference pixel 12 is read for each line of normal image reading by the switch 9 driven by the horizontal drive circuit 8, and an output signal 10 is output via the amplifier 11.

  In this circuit configuration, almost the same voltage drop as the drive line 3 occurs in the bias line 19, so that the voltage drop in the drive line 3 is canceled from the output, and the offset distribution derived from the drive line 3 is removed. . That is, the difference between the reference signal and the voltage of the bias line is taken, the difference signal is compared with a predetermined reference voltage, a bias voltage corresponding to the difference is generated, and fed back to the bias line. As a result, it is possible to automatically correct the bias line voltage variation due to manufacturing variation or the like while changing the bias line voltage according to the reference signal (depending on the element temperature).

  Note that a voltage at a predetermined position on the bias line 19 is input to the plus side terminal of each differential integration circuit 7. Here, the “predetermined position” on the bias line is a fixed position on the bias line 19. The position is not limited to a specific position. Since the voltage at a predetermined position on the bias line is taken out in order to monitor the voltage level of the entire bias line, monitoring the voltage at any position does not affect the principle of the invention.

  Next, feedback of bias voltage will be described. The output of the reference pixel 12 (the output signal of the amplifier 11) is fed back to the bias line 19 as a bias signal through a path described below. The output signal of the amplifier 11 is first supplied to the first sample hold circuit 13. The sample hold timing signal is input to the sample hold circuit 13 so that the sample hold operation is performed at the timing when the output signal of the column of the reference pixel 12 is output. The output signal of the first sample and hold circuit 13 is input to the defect determination circuit 23 and the second sample and hold circuit 25.

  The defect determination circuit 23 compares the reference voltage with a voltage comparison circuit to determine whether or not there is a defect. Here, a defective pixel of the thermal infrared solid-state imaging device is considered. As described above, a case where a minute change in the voltage drop of the diode in the pixel 1 is used as a temperature sensor, an output integrated by the integration circuit is taken out, and the readout circuit as a whole is a non-inverted output. For example, when the voltage drop of the diode becomes extremely low due to some defect factor in the manufacturing process such as a wiring short between the diode terminals, the input voltage of the integration circuit becomes significantly higher than the voltage level during normal operation. The final output voltage is the highest level voltage in the dynamic range of the readout circuit, and is output white in the captured image, resulting in a so-called “white spot defect”. On the other hand, if the voltage drop of the diode becomes extremely high due to some defect factor in the manufacturing process, for example, the wire breakage of the diode, the input voltage of the integration circuit becomes significantly lower than the voltage level during normal operation, and as a result The final output voltage of the circuit is the lowest level voltage in the dynamic range of the readout circuit, and is output black in the captured image, resulting in a so-called “black spot defect”. For example, if the power supply voltage is 10 V and the dynamic range of the readout circuit is 2 to 8 V, the output voltage is 8 V for “white spot defect” and the output voltage is 2 V for “black spot defect”. Further, when reading a normal pixel, the output voltage is not close to the maximum level voltage 8V or the minimum level voltage 2V in the dynamic range of the readout circuit, such as a voltage range of 3 to 7V. Focusing on this, if it is checked whether the output voltage of the reference pixel is lower than the first reference voltage such as 2.5 V and exceeds the second reference voltage such as 7.5 V, the reference pixel is “black point”. Whether it is a “defect” or a “white point defect” can be determined. Therefore, the defect determination circuit 23 uses a voltage comparison circuit, compares the signal reflecting the output of the reference pixel with the first reference voltage, and determines whether the reference pixel is a defective pixel.

  FIG. 2 shows an example of the black spot defect determination circuit 101 that determines whether or not it is a “black spot defect”. Here, the voltage comparison circuit 100 is assumed to be a circuit that outputs a high level as a digital output when the positive input has a higher voltage than the negative input. As for the actual circuit configuration of the voltage comparison circuit, it is not necessary to determine a minute voltage difference, and therefore various types of general voltage comparison circuits can be used. For example, in the document “CMOS analog circuit design technology” (supervised by Iwata, Trikeps), pages 84 to 90, circuit examples of various voltage comparison circuits (comparators) are shown. The first reference voltage may be set to a voltage sufficiently higher than the voltage level output when the pixel has a black spot defect. In the case described above, the first reference voltage may be set to 2.5V, for example. FIG. 3 shows an example of the white point defect determination circuit 102 that determines whether or not it is a “white point defect”. The second reference voltage may be set to a voltage sufficiently lower than the voltage level output when the pixel has a white spot defect. In the case described above, the second reference voltage may be set to 7.5V, for example. FIG. 4 shows an example of the defect determination circuit 103 that determines whether the defect is a black spot defect or a white spot defect. A voltage comparison circuit 100 that determines a black defect and a voltage comparison circuit 100 that determines a white defect are provided in parallel, and their outputs are output via an AND circuit 104.

  When the defect determination circuit 23 determines that the reference pixel is not defective, the defect determination circuit 23 outputs a high level as a digital output, and the output signal is input to an AND circuit 27 that is a selection circuit. The second sample hold timing signal is input to the other input of the AND circuit 27. The second sample and hold timing signal is a signal obtained by delaying the sample and hold timing by an arbitrary interval as compared with the first sample and hold timing signal. The output of the AND circuit 27 is input as a control signal for the second sample and hold circuit 25. Thereby, when the defect determination circuit 23 determines that the reference pixel is not defective, the defect determination circuit 23 outputs a high level as a digital output. For this reason, the second sample hold timing signal is input as a control signal of the second sample hold circuit 25 without changing the clock waveform, and the output of the first sample hold circuit 13 at the timing of the second sample hold timing signal. Sample and hold the voltage. Therefore, the output of the reference pixel is reflected. On the other hand, when it is determined by the defect determination circuit that the reference pixel is defective, the defect determination circuit outputs a low level as a digital output, so that the low level is input as a control signal for the second sample and hold circuit 25, The operation of sample-holding the output voltage of the first sample-and-hold circuit 13 is not performed, and the output of the previous reference pixel is reflected and not updated. The output of the second sample and hold circuit 25 is input to the minus side terminal of the bias generation circuit (basically a subtraction circuit) 14 and a bias corresponding to the difference from the reference voltage 15 input to the plus side input terminal. A voltage is generated. The generated bias voltage is input to the bias line 19 via the low-pass filter 16, the buffer amplifier 17, and the low-pass filter 18.

  Note that the reference voltage 15 of the bias generation circuit 14 may be a certain voltage and is not limited to a specific voltage value. That is, the reference voltage 15 serves as a reference for automatically correcting the feedback bias voltage to a constant voltage. Therefore, if the reference voltage 15 is a certain voltage and is selected so that the output signal of the differential integration circuit falls within the dynamic range of the subsequent circuit, what kind of voltage is it? Does not affect the principle of the invention.

  Here, the subtraction polarity of the differential integration circuit 7 and the subtraction polarity of the bias generation circuit 14 are selected in a direction in which the change of the output signal corresponding to the reference pixel 12 is suppressed. That is, when the voltage of the bias line 19 (the voltage of the current source 20 connected to the bias line 19) is input to the plus side of the differential integration circuit 7, the output of the differential integration circuit 7 is the bias generation circuit 14 It is input on the minus side of. Conversely, when the voltage of the bias line 19 is input to the negative side of the differential integration circuit 7, the output of the differential integration circuit 7 is input to the positive side of the bias generation circuit 14. As a result, the bias generation circuit 14 changes the voltage of the bias line 19 in a direction to reduce the difference according to the difference between the sampled and held signal and the reference signal 15.

  Therefore, in the present embodiment as well, as in the element of Patent Document 1, the voltage variation of the bias line due to the manufacturing variation is automatically corrected. For this reason, the element output (reference voltage of the image signal) corresponding to the reference pixel 12 is corrected. (Corresponding to the level) becomes substantially constant without being affected by the manufacturing variation of the DC offset component in the circuit, and the dynamic range over in the subsequent circuit inside and outside the element due to the characteristic variation for each element can be prevented. In addition, the voltage of the bias line 19 not only simulates the voltage drop of the drive line 3 due to the current source for each column but also changes to reflect the element temperature drift information by the reference pixel 12, so Offset distribution suppression and temperature drift suppression due to voltage drop are also realized.

  That is, the negative side terminal of the differential integration circuit 7 corresponding to the normal pixel 1 has (a) a voltage drop component of the drive line 3, (b) a pixel signal change component of the pixel 1 due to environmental temperature, and (c) an incident infrared ray. While the output change component of the pixel 1 is input, the positive side terminal of the differential integration circuit 7 includes (a ′) a voltage drop component at the bias line 19 and (b ′) a reference signal change component due to the environmental temperature. Entered. (A) The voltage drop component of the drive line 3 is canceled by (a ′) the voltage drop component of the bias line 19, and (b) the pixel signal change component of the pixel 1 due to the environmental temperature is (b ′) due to the environmental temperature. Since it is canceled by the reference signal change component, the differential integration circuit 7 performs (c) subtraction processing leaving only the output change of the pixel 1 due to incident infrared rays.

  Conventionally, when a defective pixel exists in a reference pixel configured by excluding a heat insulating structure and / or an infrared absorption structure due to contamination by foreign matters in the manufacturing process or other factors, the output of the defective pixel that is not normal is 2 The output is fed back to the output of the two-dimensional pixel, an output defect occurs in the unit of one or more lines in the output of the two-dimensional pixel, and it is displayed as noise or image unevenness in the picked-up image, causing a decrease in the manufacturing yield. There was a problem of increasing the cost. In this embodiment, as described above, this problem can be further solved while maintaining the same effect as that of Patent Document 1 and the element. In other words, when the defect determination circuit 23 is used and the reference pixel 12 in a certain row is a defective pixel such as “black spot defect” or “white spot defect” in the reference pixel column, it is not updated as a feedback target signal, and the previous row The output of the reference pixel 12 is fed back as it is. This suppresses offset distribution due to voltage drop in the drive line and temperature drift due to element temperature fluctuation as in the past, and feeds back the output of the defective pixel even when there is a defective pixel in the reference pixel. Since no image output failure occurs in units of rows, no image output failure occurs, a decrease in yield can be avoided, and a new effect that cost reduction is realized can be obtained.

Hereinafter, each component of the thermal infrared solid-state imaging device according to the present embodiment will be described in detail.
First, the differential integration circuit 7 will be described. FIG. 5 shows a configuration example of the differential integration circuit 7. This circuit is the same as the differential integration circuit (Japanese Patent Laid-Open No. 2002-188959) previously disclosed by the present inventor, and has an effect that the configuration is simplified compared to a general configuration using an operational amplifier. . The differential integration circuit 7 is connected to a differential voltage / current conversion amplifier 125 in which the voltage across the constant current source 2 and the voltage across the constant current source 20 are connected to the input side, and to the output side of the differential voltage / current conversion amplifier 125. And a reset transistor 127 connected so as to periodically reset the integration capacitor 126 to the voltage Vref. The differential voltage-current conversion amplifier 125 is connected without negative feedback, and the product (= time constant) of its output impedance and the capacitance C _i of the integration capacitor 125 is at least five times the integration time T _i. It is set to be. A sample and hold circuit 128 including a sample and hold transistor 45, a sample and hold capacitor 47, and a reset transistor 46 is connected to the input terminal of the integration capacitor 126. The integrated output is sampled by the sample hold circuit 128 and output through the buffer 129. In the differential integration circuit 7 of FIG. 5, the integration circuit is configured using the differential voltage-current conversion amplifier 125 in a state where no negative feedback is performed, and thus the circuit configuration is simplified.
JP 2002-188959 A

  Next, the low-pass filters 16 and 18 will be described. The low-pass filters 16 and 18 cut out the noise corresponding to the output corresponding to the reference pixel 12, the sample hold circuit 13, the bias generation circuit 14, and the like, and extract only the temperature drift component. In general, in an infrared detector aiming at high S / N, the noise of the power supply system is sufficiently reduced by the power supply circuit, and the noise from the detection unit becomes the main noise component of the apparatus. The output of the bias generation circuit 14 is included as a noise component generated in the reference pixel 12, but the noise component of the reference pixel 12 and the noise component of the pixel 1 are uncorrelated. For this reason, the noise in the output from the differential integration circuit 7 is √2 times that in the case where only the output of the pixel 1 is integrated. On the other hand, changes in the output of the detection unit due to changes in the environmental temperature and changes in the power supply voltage due to fluctuations in the power supply circuit characteristics due to changes in the environmental temperature are generally gradual over the order of seconds. Therefore, the band of the line through which the bias voltage passes may be sufficiently narrower than the band necessary for the signal line for detecting infrared rays. Therefore, if low-pass filters 16 and 18 are inserted on a line that feeds back from the amplifier 11 to the input terminal of the differential integration circuit 7 so as to pass only the temperature drift component, an increase in noise due to the differential can be suppressed. Note that a typical value of the noise bandwidth for a pixel of such an infrared solid-state image sensor is several KHz, and therefore the cut-off frequency may be determined to be 1/100 or less. From the standpoint of element temperature fluctuation, the fluctuation period is fast and on the order of seconds, so a band of several Hz is sufficient. In the present embodiment, the low-pass filters 16 and 18 are inserted before and after the buffer 17, but only one of them may be used.

  6A and 6B show circuit configuration examples of the low-pass filters 16 and 18. FIG. The configuration shown below can be used for both the low-pass filters 16 and 18. The low-pass filter in FIG. 6A uses a passive element, and uses a resistor or reactance 130 and a capacitor 131. As a filter (= low-pass filter 18) inserted on the rear side of the buffer amplifier 17, a reactance having no DC voltage drop is desirable. On the other hand, as a filter (= low-pass filter 16) provided on the front side of the buffer amplifier 17, it is desirable to use a resistor that can easily obtain characteristics as a filter. The resistor 130 may be replaced with the internal resistance of the power supply circuit 6 or the internal resistance of the buffer amplifier 17. The low-pass filter in FIG. 6B is an integrating circuit using an operational amplifier 132, a resistor 137, and a capacitor 138, which are active elements. Since this circuit configuration is also generally used as a low-pass filter, a detailed description will be given. Description is omitted.

  The low-pass filters 16 and 18 are not limited to those illustrated in FIGS. 6A and 6B, and other filters (for example, switched capacitor circuits) can be used. Further, the low-pass filters 16 and 18 may be provided only on either the front side or the rear side of the buffer amplifier 17, but in this case, the front filter (= filter 16) of the buffer amplifier 17 may be left. preferable. This is because a large current flows to the rear side of the buffer amplifier 17, and a voltage drop at the filter causes a fluctuation of the bias voltage.

  Next, the structure of the photosensitive pixel 1 will be described. 7A and 7B are a cross-sectional view and a perspective view schematically showing a structural example of the pixel 1 in the thermal infrared solid-state imaging device according to the present embodiment. In the pixel 1, a PN junction diode 902 serving as a temperature sensor is supported by two long support legs 1101 on a hollow portion 1103 provided on the silicon substrate 1102, and the electrode wiring 1104 of the diode 902 is supported by the support legs. 1101 is embedded. A plurality of PN junction diodes 902 are preferably connected in series in order to increase sensitivity. The hollow portion 1103 increases the thermal resistance between the diode 902 and the silicon substrate 1102 to form a heat insulating structure. In this example, the diode 902 is formed on the SOI layer of the SOI substrate, and the buried oxide film under the SOI layer is a part of the structure that supports the hollow structure. In addition, the infrared absorption structure 1106 that is in thermal contact with the diode portion has a structure that protrudes above the support leg 1101 so that infrared rays incident from above can be efficiently absorbed. In FIG. 7B, in order to make the structure of the lower part easier to understand, it is drawn excluding the infrared absorption structure in the front part of the figure.

  When infrared rays are incident on the pixel 1, the infrared rays are absorbed by the infrared absorption structure 1106, the temperature of the pixel 1 is changed by the heat insulation structure, and the forward voltage characteristics of the diode 902 serving as a temperature sensor are changed. By reading the amount of change in the forward voltage characteristic of the diode 902 with a predetermined detection circuit, an output signal corresponding to the amount of incident infrared rays can be extracted. The thermal infrared solid-state imaging device has a structure in which a large number of pixels 1 are two-dimensionally arranged and accessed in order. In such an element, the uniformity of characteristics between pixels is important, but the forward voltage of the diode and its temperature dependence have very little variation between solids, and a diode is used as a temperature sensor for a thermal infrared imaging device. Is particularly effective in achieving uniformity of characteristics. In the present invention, the infrared absorption structure may be any structure that absorbs infrared rays incident on the element and causes the temperature sensor to rise in temperature, and is not limited to the above form. Moreover, in this invention, the heat insulation structure should just be a structure which prevents the temperature change of the temperature sensor by infrared absorption, and is not limited to said hollow structure.

Next, the reference pixel 12 and the reference signal output circuit that outputs a reference signal will be described. The heat insulation structure and / or the infrared absorption structure is excluded from a part of the pixels in the pixel area to obtain the reference pixel 12. By using the reference pixel 12, it is possible to prevent the deviation of characteristics due to a slight difference in manufacturing conditions, and to simulate the temperature response characteristics of the pixel 1 with higher accuracy. In that case, it is preferable to provide the reference pixel on one horizontal or vertical side of the pixel area so that the signal of the reference pixel does not appear in the captured image. In the present embodiment, one row of reference pixels 12 is configured by excluding the heat insulation structure and / or the infrared absorption structure from the left one column of pixels in the pixel area. Except for eliminating one or both of the heat insulation structure and the infrared absorption structure, a pixel having substantially the same structure as that of the pixel 1 is used as the reference pixel 12, so that only a variation (temperature drift) due to a change in element temperature can be detected. . If the sensitivity to infrared absorption falls to a necessary level, either the heat insulation structure or the infrared absorption structure may be left. The reference pixel 12 is driven with a constant current by the power source 6 and the constant current source 2, and outputs the voltage across the constant current source 2 as a reference signal V _pr . That is, the reference pixel 12, the power source 6, and the constant current source 2 constitute a reference signal output circuit. By outputting a reference signal by the reference pixel 12, the response characteristic of the pixel 1 with respect to the element temperature can be accurately simulated, and highly accurate temperature drift correction can be performed. Of course, it is possible to use a thermistor instead of a reference pixel in the reference signal output circuit.

  Next, the sample hold circuit 13 and the like will be described. The configuration of the sample hold circuit such as the sample hold circuit 13 is not particularly limited, and for example, the same configuration as the sample hold circuit 128 shown in FIG. 5 can be used. FIG. 8 shows another example of the sample and hold circuit 13. FIG. 8 is a well-known example using the operational amplifier 133, and a sample and hold switch 135 is connected to the sample and hold capacitor 134. A clock is supplied to the gate of the sample hold switch 135 at the output timing of the reference pixel 12, and the switch is opened.

  FIG. 9 shows a circuit in the case where the outputs of a plurality of reference pixels 12 are averaged and sampled and held. In this circuit example, a low-pass filter 136 as shown in (a) or (b) of FIG. 6 is provided before the circuit of FIG. Since the reference pixels to be averaged are output continuously with respect to time, the time constant of the filter may be set so that the output change with respect to time is suppressed.

  Needless to say, in the present embodiment, the first sample hold circuit 13, the defect determination circuit 23, the second sample hold circuit 25, the AND circuit 27, the bias generation circuit 14, and the low-pass filters 16, 18 are used. The buffer amplifier 17 may be provided on the same chip as the pixel 1 or may be provided outside the chip. The function of the buffer amplifier 18 may be included in the bias generation circuit 14. In addition, the connection configuration of the positive and negative inputs of the differential integration circuit 7 and the bias generation circuit 14 is not limited to this example as long as the change in the output of the buffer amplifier 11 corresponding to the reference pixel 12 is suppressed. For example, in FIG. 1, the directions of plus and minus side inputs may all be reversed. Only one of them may be reversed, and the buffer amplifier 17 may include an inverting amplifier.

Embodiment 2. FIG.
FIG. 10 is a circuit diagram showing a thermal infrared solid-state imaging device according to Embodiment 2 of the present invention. The basic configuration is the same as that of the first embodiment, but a plurality of sample and hold circuits are connected to the output signal 10. Here, a case where the number of sample and hold circuits is two will be described as an example. A first sample hold circuit 13 and a second sample hold circuit 21 are connected to the output signal 10. The first sample hold circuit 13 receives the third sample hold timing signal so that the sample hold operation is performed at the timing when the output signal of the odd-numbered row of the reference pixel column is output as the output signal 10. The second sample and hold circuit 21 receives the fourth sample and hold timing signal so that the output signal of the even-numbered row of the reference pixel column performs the sample and hold operation at the timing when the output signal 10 is output. . The output signals of the first sample hold circuit 13 and the second sample hold circuit 21 are respectively input to the analog signal averaging circuit 22, and the average value circuit 22 causes the first sample hold circuit 13 and the second sample hold circuit to be input. The average voltage value of the 21 output signals is output to the bias generation circuit 14. The average voltage value of the sample-and-hold voltage value of the output signal in the odd-numbered row of the reference pixel column and the sample-and-hold voltage value of the output signal in the even-numbered row of the reference pixel column that are output by the averaging circuit 22 Specifically, a bias voltage corresponding to the difference is generated. The generated bias voltage is input to the bias line 19 via the low-pass filter 16, the buffer amplifier 17, and the low-pass filter 18.

  As the average circuit, any analog signal average circuit may be used in addition to the average circuit 104 using the switched capacitor circuit as shown in FIG. The averaging circuit 104 shown in FIG. 6 includes an operational amplifier 105 and three capacitors 106, 107, and 108. The capacitance value C2 of the capacitor 106 is twice the capacitance value C1 of the capacitors 107 and 108. Produced.

  In this embodiment, in providing a thermal infrared solid-state imaging device, an average value of a plurality of reference pixels (for example, an output voltage of an odd-numbered reference pixel column and a reference of an even-numbered row using a plurality of sample and hold circuits) By feeding back the output voltage of the pixel) to the differential integration circuit, it is possible to minimize the influence of the defective pixel even in the case of a defective pixel with a minute output voltage abnormality. This does not cause a decrease in manufacturing yield. Further, as in the past, offset distribution due to voltage drop in the drive line and temperature drift due to element temperature fluctuation are suppressed. As a result, image output failure does not occur, yield reduction can be avoided, and cost reduction is realized.

Embodiment 3 FIG.
FIG. 12 is a circuit diagram showing a thermal infrared solid-state imaging device according to Embodiment 3 of the present invention. The basic configuration is the same as that of the first embodiment, but a plurality of sample and hold circuits are connected to the output signal 10. Here, the case where the number is two will be described as an example. That is, the first sample hold circuit 13 and the second sample hold circuit 21 are connected to the output signal 10. The first sample hold circuit 13 receives the third sample hold timing signal so that the sample hold operation is performed at the timing when the output signal of the odd-numbered row of the reference pixel column is output to the output signal 10. The second sample and hold circuit 21 receives the fourth sample and hold timing signal so that the output signal of the even-numbered row of the reference pixel column performs the sample and hold operation at the timing when the output signal 10 is output. The

  The output signal of the first sample hold circuit 13 is input to the first defect determination circuit 23 and the third sample hold circuit 25. The first defect determination circuit 23 determines whether the output signal of the odd-numbered row of the reference pixel column obtained from the output signal of the first sample hold circuit 13 is a “black spot defect” or a “white spot defect”. . The configuration of the defect determination circuit 23 is the same as that in the first embodiment. When the first defect determination circuit 23 determines that the output signal of the odd-numbered row of the reference pixel column is not “black spot defect” or “white spot defect”, the first defect determination circuit 23 outputs the digital output. The high level is output to the first AND circuit 27. The fifth sample hold timing signal is input to the other input of the first AND circuit 27. If the output of the first defect determination circuit 23 is at a high level, the fifth sample hold timing signal is input as a control signal for the third sample hold circuit 25 without changing the clock waveform. The third sample and hold circuit 25 samples and holds the output voltage of the first sample and hold circuit 13 at the timing of the fifth sample and hold timing signal. Here, the fifth sample hold timing signal is a signal obtained by delaying the sample hold timing by an arbitrary interval as compared with the third sample hold timing signal described above. Therefore, the output signal of the odd-numbered row of the reference pixel column is reflected. On the other hand, when the first defect determination circuit 23 determines that the output signal of the odd-numbered row of the reference pixel column is a “black spot defect” or a “white spot defect”, the defect determination circuit 23 is set to Low by digital output. In order to output the level, the low level is input as the control signal of the third sample and hold circuit 25, and the operation of sample and holding the output voltage of the first sample and hold circuit 13 is not performed, and the output of the previous reference pixel is reflected. Will not be updated.

  The output signal of the second sample and hold circuit 21 is input to the second defect determination circuit 24 and the fourth sample and hold circuit 26. The second defect determination circuit 24 determines whether the output signal of the even-numbered row of the reference pixel column obtained from the output signal of the first sample hold circuit 13 is a “black spot defect” or a “white spot defect”. . When the second defect determination circuit 24 determines that the output signal of the even-numbered row of the reference pixel column is not “black spot defect” or “white spot defect”, the second defect determination circuit 24 outputs the digital output. The high level is output to the second AND circuit 28. The sixth sample hold timing signal is input to the other input of the second AND circuit 28. If the output of the second defect determination circuit 24 is at a high level, the sample hold timing signal 6 is input as a control signal for the fourth sample hold circuit 26 without changing the clock waveform. The fourth sample and hold circuit 26 samples and holds the output voltage of the second sample and hold circuit 21 at the timing of the sixth sample and hold timing signal. Here, the sixth sample and hold timing signal is a signal obtained by delaying the sample and hold timing by an arbitrary period as compared with the above-described fourth sample and hold timing signal. Therefore, the output signal of the even-numbered row of the reference pixel column is reflected. On the other hand, when the second defect determination circuit 24 determines that the output signal of the even-numbered row of the reference pixel column is a “black spot defect” or a “white spot defect”, the defect determination circuit outputs a low level as a digital output. Therefore, the low level is input as the control signal of the fourth sample and hold circuit 26, and the operation of sampling and holding the output voltage of the second sample and hold circuit 21 is not performed, and the output of the previous reference pixel is reflected. It will not be updated.

  The outputs of the third and fourth sample and hold circuits 25 and 26 are input to the averaging circuit 22, and an average voltage value is output. The signal is the negative terminal of the bias generation circuit (basically a subtraction circuit) 14. And a bias voltage corresponding to the difference is generated. The generated bias voltage is input to the bias line 19 via the low-pass filter 16, the buffer amplifier 17, and the low-pass filter 18.

  In this embodiment, by feeding back the average value of the reference outputs of a plurality of reference pixels, it becomes possible to minimize the influence of defective pixels accompanied by a minute output voltage value defect. Thus, it is possible to feed back the output of the defective pixel accompanied by the defect, and to obtain a new effect of avoiding an increase in cost without causing a decrease in yield due to a defect that causes an image output defect in units of rows. Specifically, if the reference pixel in a certain row is a defective pixel such as “black spot defect” or “white spot defect” using a defect determination circuit, the previous reference pixel output is not updated as a feedback target signal. The signal is maintained as it is. As a result, the output of defective pixels is fed back, yield reduction due to defects that cause image output defects in units of rows does not occur, and an increase in cost can be avoided.

  As described above, in the thermal infrared solid-state imaging device of the present embodiment, the offset distribution due to the voltage drop in the drive line and the temperature drift due to the device temperature fluctuation are suppressed, and the output defect is prevented by the pixel defect. Further, even when a defective pixel having a minute output voltage abnormality exists in the reference pixel column, no image output defect occurs. Thereby, cost reduction is realized without causing a decrease in manufacturing yield.

1 is a circuit block diagram showing a thermal infrared solid-state imaging device according to Embodiment 1 of the present invention. It is a circuit block diagram which shows the example of the black spot defect determination circuit used for this invention. It is a circuit block diagram which shows the example of the white spot defect determination circuit used for this invention. It is a circuit block diagram which shows the example of the defect determination circuit used for this invention. It is a circuit diagram which shows an example of the differential integration circuit used for this invention. It is a circuit diagram which shows the example of the low-pass filter used for this invention. It is sectional drawing (a) and a perspective view (b) which show the example of the pixel structure of the thermal type infrared solid-state image sensor concerning this invention. It is a circuit diagram which shows the example of the sample hold circuit used for this invention. It is a circuit diagram which shows another example of the sample hold circuit used for this invention. It is a circuit block diagram which shows the thermal type infrared solid-state image sensor by Embodiment 2 of this invention. It is a circuit block diagram which shows the example of the average circuit used for this invention. It is a circuit block diagram which shows the thermal type infrared solid-state image sensor by Embodiment 3 of this invention.

Explanation of symbols

  1 pixel, 2 first group constant current source, 3 drive line, 4 vertical drive circuit, 7 differential integration circuit, 8 horizontal drive circuit, 12 reference pixel, 13 first sample and hold circuit, 14 bias generation circuit, 16 And 18 Low-pass filter, 17 Buffer amplifier, 20 Second group constant current source, 21 Second sample and hold circuit, 22 Average circuit, 23 First defect determination circuit, 24 Second defect determination circuit, 25 3 sample and hold circuit, 26 fourth sample and hold circuit, 27 first AND circuit, 28 second AND circuit.

Claims (6)

A pixel area having a two-dimensional matrix of pixels each including a plurality of photosensitive pixels having a heat insulating structure and an infrared absorption structure and including at least one or more diodes connected in series; and a plurality of reference pixels;
A plurality of drive lines that commonly connect one pole of the photosensitive pixel and the reference pixel for each row;
A vertical scanning circuit for selecting one of the plurality of drive lines and connecting to a power source;
A second constant current source arranged in parallel to each of the plurality of drive lines so as to generate a voltage drop substantially the same as that of the plurality of drive lines is provided in common for each column, and a bias voltage is fed back. A bias line;
A plurality of signal lines in which the other poles of the photosensitive pixel and the reference pixel are commonly connected for each column, each of which is connected to one of a plurality of first constant current sources;
Provided for each column of the photosensitive pixel and the reference pixel, a voltage across the first constant current source and the second constant current source is input, a difference between the voltage across the terminals is integrated for a certain time and output. A differential integration circuit;
A horizontal scanning circuit that selects one of the output signals of the plurality of differential integration circuits and guides it to an output terminal;
A sample and hold circuit that samples and holds the output signal of the differential integration circuit for the reference pixel selected by the vertical operation circuit and the horizontal scanning circuit;
A defect determination circuit that determines whether or not the selected reference pixel is a defective pixel based on an output signal held in the sample and hold circuit, and outputs the output signal when it is determined that the selected pixel is not a defective pixel When,
A thermal infrared solid-state imaging device comprising: a bias voltage generating circuit that generates the bias voltage according to a difference between the output signal output from the sample and hold circuit and a reference voltage and feeds back to the bias line.   The defect determination circuit includes a voltage comparison circuit that compares an output signal held in the sample and hold circuit with a reference voltage, and whether or not the reference pixel is a defective pixel based on a comparison result by the voltage comparison circuit. The thermal infrared solid-state imaging device according to claim 1, wherein A plurality of the defect determination circuits, a plurality of the sample hold circuits, and an average circuit that averages the output signals of the plurality of defect determination circuits,
The sample hold circuit samples and holds the output signal of the differential integration circuit for a plurality of the reference pixels,
The defect determination circuit determines whether or not the reference pixel is a defective pixel for one of the plurality of output signals held by the sample and hold circuit, and determines that the reference pixel is not a defective pixel. 3. The thermal infrared solid-state imaging device according to claim 1, wherein an output signal is output and the output signal is averaged by the averaging circuit. A pixel area having a two-dimensional matrix of pixels each including a plurality of photosensitive pixels having a heat insulating structure and an infrared absorption structure and including at least one or more diodes connected in series; and a plurality of reference pixels;
A plurality of drive lines that commonly connect one pole of the photosensitive pixel and the reference pixel for each row;
A vertical scanning circuit for selecting one of the plurality of drive lines and connecting to a power source;
A second constant current source arranged in parallel to each of the plurality of drive lines so as to generate a voltage drop substantially the same as that of the plurality of drive lines is provided in common for each column, and a bias voltage is fed back. A bias line;
A plurality of signal lines in which the other poles of the photosensitive pixel and the reference pixel are commonly connected for each column, each of which is connected to one of a plurality of first constant current sources;
Provided for each column of the photosensitive pixel and the reference pixel, a voltage across the first constant current source and the second constant current source is input, a difference between the voltage across the terminals is integrated for a certain time and output. A differential integration circuit;
A horizontal scanning circuit that selects one of the output signals of the plurality of differential integration circuits and guides it to an output terminal;
A sample and hold circuit that samples and holds the output signal of the differential integration circuit for the plurality of reference pixels selected by the vertical operation circuit and the horizontal scanning circuit;
An averaging circuit that averages a plurality of the output signals held in the sample and hold circuit;
A thermal infrared solid-state imaging device comprising: a bias voltage generation circuit that generates the bias voltage according to a difference between the average signal output from the average circuit and a reference voltage, and feeds back to the bias line.   5. The reference pixel according to claim 1, wherein the reference pixel has substantially the same structure as the photosensitive pixel except that either one or both of a heat insulating structure and an infrared absorption structure is not provided. The thermal infrared solid-state imaging device described.   6. The thermal infrared solid-state imaging device according to claim 1, wherein the reference pixels constitute one column of the two-dimensional matrix.

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