JP2008134216A - Drive unit, physical quantity measuring instrument, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a drive unit capable of shortening an oscillation start-up time by restraining disturbance in the oscillation of an oscillator to the minimum to start up efficiently the oscillation, a physical quantity measuring instrument and electronic equipment using the same. <P>SOLUTION: This drive unit for exciting the oscillator with drive vibration by forming an oscillation loop with the oscillator, when measuring a physical quantity using an output signal with a synchronization-detected detection signal output from the oscillator, based on the exciting drive vibration onto the oscillator and the physical quantity to be measured, includes a current-voltage converter for converting a current flowing in the oscillator into a voltage, a gain control amplifier for controlling an oscillation amplitude in the oscillation loop to excite the oscillator with the drive vibration, and a bypass filter provided between the current-voltage converter and the gain control amplifier in the oscillation loop, a reference potential of the bypass filter is changed to excite the oscillator with the drive vibration, and the reference potential is thereafter fixed to excite the oscillator with the drive vibration. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a drive device for exciting drive vibration in a vibrator, and a physical quantity measuring device using the drive device, for example, a vibratory gyroscope and an electronic apparatus.

  A so-called gyroscope includes a rotation type and a vibration type depending on a detection method of a force acting on an object. Among them, the vibration type gyroscope is advantageous for downsizing and cost reduction from the viewpoint of components and the like. Among such vibrating gyroscopes, a vibrating gyro sensor that detects an angular velocity acting on an object includes a piezoelectric vibrating gyro sensor that excites a crystal or a piezoelectric element that is advantageous for reliability and downsizing. The piezoelectric vibration type gyro sensor utilizes the fact that when an angular velocity is applied to a vibrating object, a Coriolis force is generated in a direction perpendicular to the vibration.

  The vibration gyro sensor is applied to a wide range of applications, such as camera shake detection of video cameras and digital cameras, GPS (Global Positioning System) position detection of car navigation systems, and attitude detection of aircraft and robots.

  In such applications, the vibratory gyro sensor is driven by a battery. Therefore, it is necessary to reduce the power consumption of the vibration type gyro sensor as much as possible and to extend the battery life. In this case, it is preferable that the power supply to the vibration type gyro sensor is stopped during a period when the angular velocity is not detected, and the power is supplied from the battery only during the period when the vibration type gyro sensor is used. Therefore, it is necessary to perform normal operation in a short time after the vibration type gyro sensor is activated.

A technique for shortening the start-up time of such a vibration type gyro sensor is disclosed in Patent Document 1, for example. Patent Document 1 discloses a technique in which an oscillation amplitude is increased by an amplifier even immediately after startup by a configuration in which a CR oscillation circuit or a ring oscillator is added in an oscillation loop.
JP 2004-286503 A

  By the way, in order to stably detect the angular velocity acting on the vibrator, the vibratory gyro sensor drive device needs to vibrate (oscillate) the vibrator at a constant resonance frequency. In addition, the vibrator needs to oscillate in a short time to start normal operation. Furthermore, in order to extend the life of the battery at a low cost, it is preferable to configure the circuit with a small size and low power consumption.

  On the other hand, for example, when the vibrator is formed of quartz having a high Q value and the vibrator is vacuum-sealed in a package, the driving Q value of the vibrator becomes very high. Therefore, when driving vibration is excited in the vibrator, there is a problem that the time (start-up time) until the signal from the vibrator is stabilized becomes long.

  Here, in the technique of Patent Document 1, if the oscillation is performed at a frequency close to the driving frequency of the crystal resonator, the element areas of the capacitors and resistors of the CR oscillation circuit are increased. For this reason, there is a problem that the vibration gyroscope (vibration gyro sensor) is increased in size and cost. Further, in the technique of Patent Document 1, since it is once activated at a different frequency at the time of activation, it is difficult to draw in the driving frequency of a crystal resonator having a high Q value. For this reason, there is a problem that the time until stable oscillation is further increased under the influence of manufacturing variations.

  In the technique of Patent Document 1, energy of a signal from a CR oscillation circuit or the like is injected into the vibrator regardless of whether the vibrator is oscillating. In this case, since energy is applied at a predetermined fixed frequency regardless of the resonance frequency of the vibrator, the signal of the CR oscillation circuit becomes an obstacle to steady oscillation as it approaches the steady oscillation of the vibrator. Therefore, in order to shorten the start-up time for causing the oscillator to oscillate steadily, energy is injected into the oscillation loop so that it does not interfere with the oscillation of the oscillator greatly away from the steady oscillation condition of the oscillation loop including the oscillator. There is a need.

  The present invention has been made in view of the technical problems as described above, and the object of the present invention is to start oscillation by efficiently starting oscillation while minimizing the disturbance of oscillation of the vibrator. It is an object of the present invention to provide a driving device capable of shortening time, a physical quantity measuring device using the same, and an electronic apparatus.

In order to solve the above problems, the present invention
A drive device for forming an oscillation loop with a vibrator and exciting drive vibration in the vibrator,
A current-voltage converter for converting a current flowing through the vibrator into a voltage;
A comparator that excites driving vibration in the vibrator based on a signal converted into the voltage value based on a given voltage value;
A high-pass filter provided between the current-voltage converter and the comparator in the oscillation loop,
The present invention relates to a driving apparatus that excites drive vibration in the vibrator by exciting the drive vibration in the vibrator after changing the reference potential of the high-pass filter and then driving the vibrator in the vibrator by fixing the reference potential.

The present invention also provides
When measuring a physical quantity using an output signal obtained by synchronously detecting a detection signal output from the vibrator based on a drive vibration excited by the vibrator and a physical quantity to be measured, an oscillation loop is formed with the vibrator. A drive device for exciting drive vibration to the vibrator,
A current-voltage converter for converting a current flowing through the vibrator into a voltage;
A gain control amplifier that controls the oscillation amplitude in the oscillation loop to excite drive vibration in the vibrator;
A high-pass filter provided between the current-voltage converter and the gain control amplifier in the oscillation loop,
The present invention relates to a driving apparatus that excites drive vibration in the vibrator by exciting the drive vibration in the vibrator after changing the reference potential of the high-pass filter and then driving the vibrator in the vibrator by fixing the reference potential.

  In any one of the above inventions, a high-pass filter that can function as phase adjusting means in the oscillation loop is used. At the time of oscillation start-up, energy is injected into the vibrator due to the change in the reference potential of the high-pass filter, and the oscillation start-up time of the vibrator can be reduced. As a result, even if there is an input offset voltage of the comparator or gain control amplifier or an input offset voltage of the gain control amplifier, the vibrator can be reliably started to oscillate at high speed.

  In addition, in the oscillation start-up process, the fluctuating high-pass filter reference potential is modulated to the resonance frequency of the vibrator, and does not deviate significantly from the steady oscillation condition of the oscillation loop. Therefore, energy can be injected into the oscillation loop without hindering the oscillation of the vibrator, so that the oscillation can be started up efficiently.

In the drive device according to the present invention,
A comparator that generates a reference signal for the synchronous detection based on a signal in the oscillation loop;
At the time of oscillation start to change the reference potential of the high-pass filter, drive vibration to the vibrator in an oscillation loop including the current-voltage converter, the high-pass filter, the comparator and the vibrator,
In the oscillation steady state, drive vibration can be excited in the vibrator in an oscillation loop including the current-voltage converter, the high-pass filter, the gain control amplifier, and the vibrator.

  In general, in the oscillation loop, the vibrator passes only the resonance frequency of white noise in the oscillation loop. As a result, only the signal component of the resonance frequency is amplified and oscillation starts. That is, in a general oscillation circuit, oscillation is started by amplifying only the resonance frequency component of the vibrator from the intrinsic noise (particularly white noise) in the oscillation loop. However, intrinsic noise changes greatly due to variations in temperature conditions, power supply conditions, and process conditions. Therefore, the time from the start of oscillation to the steady state of oscillation also greatly changes due to variations in temperature conditions, power supply conditions, and process conditions. On the other hand, according to the present invention, by varying the reference potential of the high-pass filter, it is possible to reliably start oscillation of the vibrator regardless of variations in temperature conditions, power supply conditions, and process conditions. Thus, the time from the start of oscillation until the oscillation reaches a steady state can be reliably shortened.

In the drive device according to the present invention,
In the state set to the first operation mode for performing the normal operation, the reference potential is changed to excite the driving vibration in the vibrator, and then the reference potential is fixed and the driving vibration is applied to the vibrator. Excited,
In a state where the second operation mode for performing the sleep operation is set, driving vibration is excited in the vibrator in an oscillation loop including the current-voltage converter, the high-pass filter, the comparator, and the vibrator. Can do.

  According to the present invention, the first and second operation modes are provided, and the oscillation loop is switched in the state set to the first operation mode. Further, in the state set in the second operation mode, it is not necessary to operate the circuit portion that performs oscillation control in the first operation mode. Therefore, both low power consumption in the second operation mode and high-speed oscillation start-up when the second operation mode is canceled can be achieved.

In the drive device according to the present invention,
A gain control circuit for controlling the gain of the gain control amplifier based on a current flowing through a vibrator in the oscillation loop;
In the state set to the second operation mode, the operations of the gain control amplifier and the gain control circuit can be set to the disabled state without setting the operation of the comparator to the disabled state.

  In the present invention, in the state where the first operation mode is set, at the time of oscillation start-up, the oscillation start-up is speeded up by changing the reference potential of the high-pass filter. Is controlled. As a result, it is possible to realize synchronous detection processing and faster oscillation start-up. Further, in the state set to the second operation mode, the oscillation state is maintained in the oscillation loop, and the operations of the gain control amplifier and the gain control circuit are stopped. As a result, it is possible to achieve both low power consumption in the second operation mode and high-speed oscillation start-up when the second operation mode is canceled.

In the drive device according to the present invention,
The reference potential of the high-pass filter may be changed only for a predetermined period that is started based on the switching timing from the second operation mode to the first operation mode.

  According to the present invention, when switching from the second operation mode to the first operation mode, energy is injected into the vibrator by changing the reference potential of the high-pass filter, and the oscillation start-up time of the vibrator can be shortened. . Also in this case, since the reference potential of the high-pass filter is modulated to the resonance frequency of the vibrator, it does not deviate greatly from the steady oscillation condition of the oscillation loop. Therefore, energy can be injected into the oscillation loop without hindering the oscillation of the vibrator, so that the oscillation can be started up efficiently.

In the drive device according to the present invention,
The polarity of the output of the gain control amplifier and the polarity of the output of the comparator may be the same.

  According to the present invention, it is not necessary to add a circuit for inverting the polarity, and an increase in circuit scale can be suppressed.

In the drive device according to the present invention,
A reference potential fluctuation circuit for supplying one voltage level selected from a plurality of voltage levels to the high-pass filter as the reference potential when starting oscillation;
A pulse generation circuit for generating a switching pulse for selecting a voltage level to be output as the reference potential,
The pulse generation circuit is
The switching pulse can be output for a predetermined period.

  According to the present invention, the reference potential of the high-pass filter can be changed with a simple configuration.

In the drive device according to the present invention,
The start timing of the predetermined period is
The start timing of the power-on reset of the said drive apparatus may be sufficient.

In the drive device according to the present invention,
The end timing of the predetermined period is
It may be a timing at which it is detected that a signal in the oscillation loop exceeds a predetermined threshold level, or a timing at which a predetermined number of counts is detected based on the start timing of the predetermined period.

  According to any one of the above-described inventions, in order to specify the start timing or end timing of the predetermined period for changing the reference potential of the high-pass filter, the circuit necessary for controlling the oscillation amplitude in the oscillation loop is used. Alternatively, since the circuit for detecting the level in the oscillation loop itself can be omitted, an increase in circuit scale can be suppressed. In particular, if the start timing of a predetermined period for generating a signal necessary for the modulation circuit can be clarified, it is possible to improve the usability of the user. Furthermore, for example, the length of the predetermined period can be determined by counting a given reference clock based on the start timing, so that, for example, a circuit for detecting the oscillation amplitude can be omitted, and the circuit scale can be reduced. become.

In the drive device according to the present invention,
The pulse generation circuit is
A power-on reset circuit for generating a power-on reset signal;
A switching pulse generation circuit that generates one or a plurality of pulses based on the power-on reset signal within a predetermined period,
The switching pulse generating circuit is
Each delay unit has a plurality of delay units that generate pulses based on the input signal, and outputs a logical OR operation result of the pulses generated by each delay unit,
Based on the change timing of the power-on reset signal, the switching pulse can be output during a period until the change timing of the detection result signal indicating that the signal in the oscillation loop has exceeded a predetermined threshold level.

  According to the present invention, a circuit for changing the reference potential of the high-pass filter can be simplified.

In the drive device according to the present invention,
The fluctuation amplitude of the reference potential during the period of changing the reference potential is
It may be larger than the amplitude of the input offset voltage of the comparator or the gain control amplifier.

  According to the present invention, it is possible to reliably increase the speed of oscillation startup.

In the drive device according to the present invention,
The high pass filter is
A capacitive element inserted between the output of the current-voltage converter and the input of the comparator or the input of the gain control amplifier;
The reference potential may be supplied to one end, and the other end may include a resistance element connected to the input of the comparator or the input of the gain control amplifier.

In the drive device according to the present invention,
When the capacitance value of the capacitive element is C, the resistance value of the resistive element is R, and the fluctuation amplitude of the reference potential is ΔV,
Vx which is an input offset voltage of the comparator or an input offset voltage of the gain control amplifier may be smaller than ΔV / ((1+ (ω × C × R) ² ) ^1/2 .

  According to any one of the above inventions, the oscillation start-up can be surely speeded up while simplifying the circuit.

In the drive device according to the present invention,
When the reference potential in the steady oscillation state is V0,
In the period for changing the reference potential,
The reference potential is
The voltage may be a voltage obtained by alternately switching a voltage V4 having a higher potential than V0 and a voltage V3 having a lower potential than V0.

In the drive device according to the present invention,
When the reference potential in the steady oscillation state is V0,
In the period for changing the reference potential,
The reference potential is
A potential obtained by alternately switching V0 and a voltage V4 having a higher potential than V0 may be used.

In the drive device according to the present invention,
When the reference potential in the steady oscillation state is V0,
In the period for changing the reference potential,
The reference potential is
A potential obtained by alternately switching V0 and a voltage V3 having a lower potential than V0 may be used.

  According to any one of the above-described inventions, the configuration of the circuit for changing the reference potential of the high-pass filter can be simplified, and the oscillation state can be quickly stabilized in the oscillation steady state after the oscillation starting process. .

The present invention also provides
A physical quantity measuring device for measuring a physical quantity corresponding to a detection signal output from the vibrator based on a drive vibration excited by the vibrator and a physical quantity to be measured,
A vibrator,
Any one of the drive devices described above for exciting drive vibration to the vibrator;
A detection device that detects an output signal corresponding to the physical quantity based on the detection signal,
The detection device is
The present invention relates to a physical quantity measuring device including a synchronous detector that synchronously detects the detection signal based on an output of a comparator that generates a reference signal for the synchronous detection based on a signal in the oscillation loop.

  According to the present invention, a drive device that can reduce the oscillation start-up time by efficiently starting the oscillation while minimizing the hindrance to the oscillation of the resonator is applied, and without increasing the circuit scale, It is possible to provide a physical quantity measuring device that prevents destruction and achieves downsizing and low power consumption.

In the physical quantity measuring device according to the present invention,
The detection device is
A phase shifter for adjusting the phase between the output of the comparator and the detection signal may be included.

  According to the present invention, the phase adjustment can be performed according to the phase change during the detection process of the minute detection signal. As a result, it is possible to achieve both the high-accuracy phase adjustment and the prevention of the circuit scale increase. it can.

The present invention also provides
The present invention relates to an electronic device including the physical quantity measuring device described above.

  According to the present invention, it is possible to contribute to downsizing and low power consumption of an electronic device that performs a given process using a measurement result of a physical quantity. In addition, according to the present invention, it is possible to provide an electronic device including a drive device that can prevent the destruction of the vibrator and reduce the oscillation start-up time without increasing the circuit scale.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

1. FIG. 1 shows a block diagram of a configuration example of an oscillation drive circuit as a drive device in the present embodiment. The oscillation drive circuit as a drive device in the present embodiment measures a physical quantity using an output signal obtained by synchronously detecting a detection signal output from the vibrator based on the drive vibration excited by the vibrator and the physical quantity to be measured. Used for

  The oscillation drive circuit 10 is provided with first and second connection terminals TM1 and TM2 (electrodes, pads), and the oscillator 12 is provided between the first and second connection terminals outside the oscillation drive circuit 10. Has been inserted. An excitation unit 14 is attached to the vibrator 12, and the excitation unit 14 is connected to the oscillation drive circuit 10 to form an oscillation loop. First, oscillation starts when the gain of the driver in the oscillation drive circuit 10 is large (gain is greater than 1). At this point, the only input to the driver is noise. This noise includes a wide range of waves including the natural resonance frequency of the target drive vibration. This noise is input to the vibrator 12.

  The vibrator 12 is made of, for example, a piezoelectric single crystal as will be described later. Due to the frequency filter action of the vibrator 12, a signal containing a lot of waves of the target natural resonance frequency is output, and this signal is input to the driver. By repeating such an operation in the oscillation loop, the ratio of the signal of the target natural resonance frequency is increased, and the amplitude of the input signal to the driver is increased.

  In the steady oscillation state, for example, the output current from the vibrator 12 is converted into a voltage value by the current-voltage converter 30, and an AGC (Auto Gain Control) circuit (gain control circuit in a broad sense) 40 based on this voltage value. To control the oscillation amplitude in the oscillation loop. That is, the current-voltage converter 30 converts the current flowing through the vibrator into a voltage. The AGC circuit 40 controls the oscillation amplitude in the oscillation loop based on the current flowing through the vibrator in the oscillation loop. As a result, the gain (loop gain) while the signal goes around the oscillation loop becomes 1, and in this state, the vibrator 12 stably oscillates.

  Stable oscillation of the vibrator is indispensable for measuring physical quantities. This is because if the amplitude of the drive signal oscillating in the vibrator is not constant, the value of the output signal to be output from the vibrator will not be constant, and accurate measurement cannot be performed.

  Further, in order to reduce the power consumption of the system including the vibrator and the oscillation drive circuit, it is indispensable to increase the oscillation start-up speed of the vibrator. This is because by quickly obtaining stable oscillation, oscillation can be started only when necessary, and the operation period during which power is consumed wastefully can be shortened.

  In the present embodiment, the oscillation drive circuit 10 includes a gain control amplifier (hereinafter referred to as GCA) 20 or a comparator 50 as a driver. The gain of the GCA 20 is controlled by the AGC circuit 40, but can function as a comparator. More specifically, in the oscillation loop including the oscillator 12, when oscillation starts, energy is injected into the oscillator 12 in the oscillation loop including the comparator 50, and oscillation continues in the oscillation loop including the GCA 20 in the oscillation steady state. Let

  More specifically, in the present embodiment, the oscillation drive circuit 10 is provided with a comparator 50 in parallel with the GCA 20. The oscillation drive circuit 10 includes a first switch element SW1 inserted between the output of the GCA 20 and the second connection terminal TM2, and the first switch element SW1 is ON / OFF controlled by a switch control signal SWCTL. The Further, the oscillation drive circuit 10 includes a second switch element SW2 inserted between the output of the comparator 50 and the second connection terminal TM2, and the second switch element SW2 is controlled to be turned on / off by a switch control signal SWCTL #. Is done. The switch control signal SWCTL # is an inverted signal of the switch control signal SWCTL. The oscillation drive circuit 10 can output the output of the comparator 50 as a synchronous detection clock as a reference signal for synchronous detection.

  Here, in the oscillation loop including the current-voltage converter 30, the comparator (GCA 20 or the comparator 50), and the vibrator 12, the phase is ideally shifted by 180 degrees between the current-voltage converter 30 and the comparator. However, in actuality, it is delayed by several degrees due to manufacturing variations and the like. Therefore, it is desirable to provide means for advancing the phase in the oscillation loop. In this embodiment, a high pass filter (hereinafter referred to as “High Pass Filter”) is provided between the output of the current-voltage converter 30 and the input of the comparator in the oscillation loop. HPF) 60 is provided.

  By the way, in order to shorten the oscillation start time, a method using the output of the GCA 20 or the output of the comparator 50 can be considered. In this case, the output level of the GCA 20 may not change due to the input offset voltage of the GCA 20, or the output level of the comparator 50 may not change due to the input offset voltage of the comparator 50. Therefore, even if there is an input offset voltage of the GCA 20 or the comparator 50, it is necessary for the vibrator 12 to surely start high-speed oscillation.

  Therefore, in the present embodiment, in the oscillation starting process, the output level of the GCA 20 or the comparator 50 is surely changed by changing the reference potential of the HPF 60, and the reference potential of the HPF 60 is fixed in the normal oscillation state. Continue oscillation in the oscillation loop. In other words, the oscillation drive circuit 10 adjusts the phase so that the oscillation condition in the oscillation loop is satisfied by the HPF 60, and speeds up the oscillation start by changing the reference potential of the HPF 60. Here, the reference potential of the HPF 60 is a potential supplied to a passive element or an active element constituting the HPF 60 separately from the oscillation signal in the oscillation loop, and is a potential for obtaining an output voltage by the filter function of the HPF 60. be able to. The HPF 60 is a primary HPF composed of passive elements.

  By so doing, energy is injected into the vibrator 12 due to fluctuations in the reference potential of the HPF 60 at the time of starting oscillation, and the oscillation starting time of the vibrator 12 can be shortened. In addition, in the oscillation start-up process, the fluctuating reference potential of the HPF 60 is modulated to the resonance frequency of the vibrator 12 and does not deviate greatly from the steady oscillation condition of the oscillation loop. Therefore, energy can be injected into the oscillation loop without hindering the oscillation of the vibrator, so that the oscillation can be started up efficiently.

  Generally, in the oscillation loop, the vibrator 12 passes only the resonance frequency among the white noise in the oscillation loop. As a result, only the signal component of the resonance frequency is amplified and oscillation starts. That is, in a general oscillation circuit, oscillation is started by amplifying only the resonance frequency component of the vibrator 12 from intrinsic noise (particularly white noise) in the oscillation loop. However, intrinsic noise changes greatly due to variations in temperature conditions, power supply conditions, and process conditions. Accordingly, the time from the start of oscillation to the steady state of oscillation also greatly changes due to variations in temperature conditions, power supply conditions, and process conditions. However, according to the present embodiment, it is possible to reliably start the oscillation of the vibrator 12 regardless of changes in the temperature condition, the power supply condition, and the process condition, and the oscillation is started and the oscillation becomes a steady state. It is possible to reliably reduce the time until.

  In the present embodiment, the oscillation drive circuit 10 can further include a reference potential fluctuation circuit 70 and a pulse generation circuit 80 in order to vary the reference potential of the HPF 60. The reference potential variation circuit 70 varies the reference potential VBH of the HPF 60. The reference potential fluctuation circuit 70 supplies one voltage level selected from a plurality of voltage levels to the HPF 60 as a reference potential at the time of oscillation start-up. The pulse generation circuit 80 generates a switching pulse PSW for selecting a voltage level to be output as the reference potential of the HPF 60.

  FIG. 2 is an explanatory diagram of the reference potential VBH of the HPF 60 and the switching pulse PSW.

  In the oscillation starting process, the pulse generation circuit 80 generates the switching pulse PSW and causes the reference potential fluctuation circuit 70 to change the reference potential VBH of the HPF 60. In the steady oscillation state, the pulse generation circuit 80 fixes the switching pulse PSW and causes the reference potential fluctuation circuit 70 to fix the reference potential VBH of the HPF 60. Thus, the pulse generation circuit 80 can output the switching pulse only for a predetermined period.

  The HPF 60 may be composed of only passive elements or may be composed of only active elements. Alternatively, the HPF 60 may be configured by combining a passive element and an active element. For example, the HPF 60 in FIG. 1 can be a primary HPF, but the present invention is not limited to the HPF order.

  In FIG. 1, the GCA 20 and the comparator 50 are switched in the oscillation starting process and the oscillation steady state, but the present invention is not limited to this. For example, in FIG. 1, the GCA 20 and the first switch element SW1, or the comparator 50 and the second switch element SW2 may be omitted.

1.1 Sleep Mode The oscillation drive circuit 10 according to the present embodiment includes a normal mode (first operation mode in a broad sense) for performing a normal operation as an operation mode and a sleep operation in order to reduce power consumption. A sleep mode (second operation mode in a broad sense) for performing is provided. Therefore, a sleep mode setting register 90 is provided inside or outside the oscillation drive circuit 10. Control data is set in the sleep mode setting register 90 by a control circuit (not shown) that controls the oscillation drive circuit 10. The oscillation drive circuit 10 operates in an operation mode corresponding to the control data set in the sleep mode setting register 90. For example, when “0” is set in the sleep mode setting register 90, the oscillation drive circuit 10 operates in the normal mode. For example, when “1” is set in the sleep mode setting register 90, the oscillation drive circuit 10 operates in the sleep mode.

  The sleep control signal SLEEP corresponding to the control data set in the sleep mode setting register 90 is supplied to the GCA 20, the AGC circuit 40, and the pulse generation circuit 80. When operating in the sleep mode, the operations of the GCA 20 and the AGC circuit 40 are stopped. In this embodiment, when operating in the sleep mode, the current-voltage converter 30 and the comparator 50 operate without being set to the disabled state (the enabled state is maintained).

  The AGC circuit 40 includes a full wave rectifier 42, an oscillation detector 44, and an integrator 46. The full-wave rectifier 42 converts the voltage value converted by the current-voltage converter 30 into a voltage value as a DC signal. The oscillation detector 44 detects whether or not the oscillation loop including the vibrator 12 is in an oscillation state based on the voltage value converted by the full-wave rectifier 42, and the switch control signal SWCTL # (or switch control) is detected as the detection result. Signal SWCTL). For example, the oscillation detector 44 compares the voltage value converted by the full wave rectifier 42 with a given reference voltage value, and generates the switch control signal SWCTL # (or the switch control signal SWCTL) based on the comparison result. . Further, the integrator 46 generates a control signal VCTL for performing oscillation control in the oscillation loop by the GCA 20 based on the integration result of the voltage value converted by the full wave rectifier 42. For example, the integrator 46 integrates the voltage value converted by the full-wave rectifier 42 to obtain the level of the DC component, compares the level with a given reference signal level, and controls the control signal based on the comparison result. Generate VCTL. For example, the high-potential side power supply voltage of the circuit (output circuit) in the output stage (final stage) of the GCA 20 is controlled based on the control signal VCTL.

  More specifically, the sleep control signal SLEEP is supplied to the full-wave rectifier 42, the oscillation detector 44, and the integrator 46. When the sleep mode is designated by the sleep control signal SLEEP, the operations of the full-wave rectifier 42, the oscillation detector 44, and the integrator 46 are stopped. When the normal mode is designated by the sleep control signal SLEEP, the full-wave rectifier 42, the oscillation detector 44, and the integrator 46 are operated.

  In the present embodiment, in the state where the sleep mode setting register 90 is set to the normal mode, the oscillator 12 is activated by controlling the first and second switch elements SW1 and SW2 at the time of oscillation activation, and the oscillation is performed. In the steady state, the first switch element SW1 is turned on and the second switch element SW2 is turned off, and the oscillation amplitude control is performed in the oscillation loop including the vibrator 12 and the GCA 20. Further, in this embodiment, in the state where the sleep mode is set by the sleep mode setting register 90, the oscillation is continued in the oscillation loop including the vibrator 12 and the comparator 50. At this time, the AGC circuit 40 monitors the oscillation state and controls the oscillation amplitude of the GCA 20.

  3A and 3B are timing waveform diagrams of the sleep control signal SLEEP and the switch control signals SWCTL and SWCTL #.

  3A shows a timing waveform diagram during operation in the normal mode, and FIG. 3B shows a timing waveform diagram during operation in the sleep mode.

  In FIG. 3A, when the sleep control signal SLEEP is at L level, the oscillation drive circuit 10 operates in the normal mode. At this time, in the oscillation starting process such as immediately after the power is turned on, the oscillation detector 44 of the AGC circuit 40 detects that the voltage value obtained by converting the current signal from the vibrator 12 is lower than a given reference voltage value. The detector 44 generates an H level switch control signal SWCTL # (L level switch control signal SWCTL). As a result, the first switch element SW1 is set to the off state and the second switch element SW2 is set to the on state. At this time, as an operational characteristic of the comparator 50, when the level of the input signal of the comparator 50 exceeds a given threshold, the input signal is amplified with a very large gain, and the gain in the oscillation loop is made larger than 1. it can. As a result, in the oscillation starting process, in the oscillation loop including the vibrator 12 and the comparator 50, the oscillation in the oscillation loop is such that the gain in the oscillation loop is greater than 1 and the phase in the oscillation loop is 360 × n (n is an integer). Drive vibration is excited in the child 12.

  Thereafter, when the oscillation detector 44 detects that the voltage value obtained by converting the current signal from the vibrator 12 is higher than a given reference voltage value, the oscillation detector 44 detects that the L level switch control signal SWCTL # (H level switch control signal SWCTL) is generated. As a result, the first switch element SW1 is set to the on state, and the second switch element SW2 is set to the off state. At this time, based on the control signal VCTL from the AGC circuit 40, the oscillation amplitude in the oscillation loop is controlled by the GCA 20 and the gain in the oscillation loop is controlled to be unity. As a result, the oscillation start-up process ends and the oscillation steady state is entered. In this oscillation steady state, in the oscillation loop including the oscillator 12 and the GCA 20, drive vibration is excited in the oscillator 12 so that the gain in the oscillation loop is 1 and the phase in the oscillation loop is 360 × n. .

  That is, in this embodiment, based on the detection result of the oscillation detector 44, the oscillation loop formed by the vibrator 12 and the comparator 50 can be switched to the oscillation loop formed by the vibrator 12 and the GCA 20. . More specifically, in the oscillation detector 44, the above switching control is performed on the condition that the DC voltage obtained by converting the current flowing through the vibrator 12 has reached a given threshold voltage. By doing so, the switching detection of the switch element can be performed by diverting the signal detection result from the vibrator 12 that is generally used for performing the oscillation control of the oscillation loop, so that the circuit scale is increased so much. Therefore, high-speed oscillation start can be realized.

  In FIG. 3B, when the sleep control signal SLEEP is at the H level, the oscillation drive circuit 10 operates in the sleep mode. At this time, the oscillation detector 44 generates the H-level switch control signal SWCTL # (L-level switch control signal SWCTL) regardless of whether the oscillation startup process is immediately after the power is turned on or the oscillation steady state. As a result, the first switch element SW1 is set to the off state and the second switch element SW2 is set to the on state. That is, the same state of the oscillation starting process in the normal mode shown in FIG. At this time, as described above, when the level of the input signal of the comparator 50 exceeds a given threshold, the input signal is amplified with a very large gain as the operation characteristic of the comparator 50, and the gain in the oscillation loop is set to 1. Can be larger. As a result, in the oscillation starting process, in the oscillation loop including the vibrator 12 and the comparator 50, the oscillation in the oscillation loop is such that the gain in the oscillation loop is greater than 1 and the phase in the oscillation loop is 360 × n (n is an integer). Drive vibration is excited in the child 12. In this way, in the sleep mode, the operation of the AGC circuit 40 can be stopped to reduce power consumption. In the sleep mode, since the oscillation state is continued in the oscillation loop used in the oscillation start process in the normal mode, high-speed oscillation start can be realized when the sleep mode is shifted to the normal mode. Therefore, it is possible to provide a drive device that can shorten the oscillation start-up time without increasing the circuit scale when operable in a so-called sleep mode.

  In addition, when shifting from the sleep mode to the normal mode, the switch control signal SWCTL (or the switch control signal SWCTL #) may be used to reliably and faster start oscillation. In this case, the start timing of the predetermined period in which the pulse generation circuit 80 outputs the switching pulse PSW is the switching timing from the sleep mode to the normal mode, and the reference potential VBH of the HPF 60 only during the predetermined period starting with the switching timing as a reference. Fluctuates. By doing so, the oscillation start-up time can be reliably shortened even when returning from the sleep mode. At this time, the reference potential VBH is modulated to the resonance frequency of the vibrator 12, and does not deviate greatly from the steady oscillation condition of the oscillation loop. Therefore, energy can be injected into the oscillation loop without hindering oscillation of the vibrator. Therefore, it is possible to efficiently start oscillation.

1.2 Current Limiting Function When the oscillation amplitude in the oscillation loop is controlled as in the present embodiment, the current flowing through the vibrator 12 varies. If the current flowing through the vibrator 12 becomes excessive (for example, the current exceeds a given threshold), the vibrator 12 may be destroyed. In particular, when the operation of the AGC circuit 40 is disabled in the sleep mode as in the present embodiment, the amplitude of the oscillation signal in the oscillation loop is not controlled, and the current flowing through the vibrator 12 becomes excessive. There is a possibility that.

  Therefore, in the present embodiment, the comparator 50 has a current limiting function. This current limiting function can be referred to as a limiter function for controlling so that the current flowing through the vibrator 12 does not exceed a given value, for example.

  Here, as a comparative example, for example, a method of inserting a protective resistor in the oscillation loop without operating the AGC circuit is conceivable. However, this method has a problem that, first, the gain in the oscillation loop decreases in the steady oscillation state, and the power consumption increases. Furthermore, there is a problem that the resistance value accuracy of the protective resistor is low and the oscillation margin cannot be increased.

  On the other hand, by providing the above-described current limiting function, the amplitude of the oscillation signal in the oscillation loop falls within a given amplitude even during the operation in the sleep mode. Thus, it is possible to reduce the power consumption without setting the enable state and avoid the situation where an excessive current flows into the vibrator 12.

  Further, when the oscillation drive circuit 10 includes the AGC circuit 40 that controls the gain of the GCA 20 based on the oscillation signal in the oscillation loop, the operation of the comparator 50 is set to a disabled state in the state set to the sleep mode. The operation of the GCA 20 and the AGC circuit 40 can be set to the disabled state without being performed (in the state set to the enabled state). At this time, since the operation of the AGC circuit 40 is not set to the enabled state, it is possible to reduce the power consumption and to avoid a situation where an excessive current flows into the vibrator 12.

  Further, in the present embodiment, in the normal mode oscillation steady state, the output of the comparator 50 is output as a clock for synchronous detection. In this way, when measuring the physical quantity using the output signal obtained by synchronously detecting the detection signal output from the vibrator 12 based on the drive vibration excited by the vibrator 12 and the physical quantity to be measured, the circuit scale is reduced. Synchronous detection processing and faster oscillation start-up can be realized without increasing it.

  It is preferable to increase the gain of the comparator 50 as much as possible. By doing so, the loop gain in the oscillation loop formed in the oscillation starting process can be increased, and the oscillation starting time can be shortened. In addition, the clock accuracy of the synchronous detection clock output in the steady oscillation state can be improved.

  In addition, it is preferable that the polarity (inverted and non-inverted) of the operational amplifier constituting the GCA 20 is the same as the polarity of the operational amplifier constituting the comparator 50. By doing so, even if the oscillation loop is switched by the first and second switch elements SW1 and SW2, it is not necessary to add a circuit for inverting the polarity, and an increase in circuit scale can be suppressed.

1.3 Specific Configuration Example FIG. 4 shows a circuit diagram of a configuration example of the oscillation drive circuit 10 of FIG.

  In FIG. 4, the same parts as those in FIG.

  The current-voltage converter 30 includes an operational amplifier OP1, a feedback capacitor C1, and a feedback resistor R1. A given reference voltage VR0 is supplied to the non-inverting input terminal (+) of the operational amplifier OP1, and the first connection terminal TM1 is electrically connected to the inverting input terminal (−).

  The full wave rectifier 42 includes operational amplifiers OP2 and OP3 and resistors R2 and R3. The operational amplifier OP2 and the resistors R2 and R3 function as an inverting circuit. The operational amplifier OP3 functions as a comparator that compares the output voltage of the current-voltage converter 30 with the reference voltage VR0. Full-wave rectifier 42 includes a switch element provided on the output side of operational amplifier OP2, and a switch element that bypasses the input and output of full-wave rectifier 42. Both switch elements are exclusively turned on and off based on the output signal of the operational amplifier OP3. When the sleep control signal SLEEP is at the H level, the operation of each operational amplifier is stopped by stopping or limiting the operation current of each operational amplifier of the operational amplifiers OP2 and OP3. On the other hand, when the sleep control signal SLEEP is at the L level, each operational amplifier is operated by generating an operating current of each operational amplifier of the operational amplifiers OP2 and OP3.

  The oscillation detector 44 includes a low pass filter (hereinafter referred to as LPF) and an operational amplifier OP4. The LPF includes a resistor R4 and a capacitor C2. The resistor R4 is inserted in series between the LPF input and output. One end of the capacitor C2 is electrically connected to the output node of the LPF. A reference voltage VR1 is supplied to the other end of the capacitor C2. The cutoff frequency of this LPF is 1 / (2π × C2 × R4). The output node of the LPF is connected to the inverting input terminal of the operational amplifier OP4. A resistor R5 is inserted as a feedback resistor between the output of the operational amplifier OP4 and the non-inverting input terminal. The reference voltage VR1 is supplied to the non-inverting input terminal of the operational amplifier OP4 through the resistor R6. The output signal of the operational amplifier OP4 is output as the switch control signal SWCTL #. When the sleep control signal SLEEP is at the H level, the operation of the operational amplifier OP4 is stopped by stopping or limiting the operation current of the operational amplifier OP4. When the sleep control signal SLEEP is at the L level, the operational amplifier OP4 is operated by generating an operation current of the operational amplifier OP4.

  The integrator 46 includes an operational amplifier OP5, resistors R7 and R8, and a capacitor C3. The capacitor C3 is connected as a feedback capacitor of the operational amplifier OP5. The resistor R8 is inserted as a feedback resistor for the operational amplifier OP5. The resistor R7 is inserted between the inverting input terminal of the operational amplifier OP5 and the output node of the full-wave rectifier 42. In the integrator 46, the effects of the input voltage offset and the input current offset are reduced by the resistors R7 and R8, and gain adjustment is performed. The reference voltage VR2 is supplied to the non-inverting input terminal of the operational amplifier OP5. An LPF function is provided by the capacitor C3 and the resistor R8 of the integrator 46, and the cutoff frequency is 1 / (2π × C3 × R8). The output signal of the operational amplifier OP5 is supplied to the GCA 20 as the control signal VCTL. When the sleep control signal SLEEP is at the H level, the operation of the operational amplifier OP5 is stopped by stopping or limiting the operation current of the operational amplifier OP5. When the sleep control signal SLEEP is at the L level, the operational amplifier OP5 is operated by generating an operation current of the operational amplifier OP5.

  Here, the current flowing through the vibrator 12 in the oscillation starting process is Id, and the current flowing through the vibrator 12 in the steady oscillation state is Id ′. In consideration of smoothing by the current-voltage converter 30, the reference voltage VR2 can be expressed as the following equation.

VR2 = (Id × R1 × 2 / π) + VR0 (1)
Here, R1 means the resistance value of the feedback resistor of the current-voltage converter 30. Similarly, the reference voltage VR1 can be expressed as the following equation.

VR1 = (Id ′ × R1 × 2 / π) + VR0 (2)
Since Id ′ <Id, VR2> VR1. Moreover, it is preferable to have the following relationship with respect to the reference voltage VR0.

VR0 <VR1 <VR2 (3)
When the sleep control signal SLEEP is at the H level, the operation of the GCA 20 is stopped by stopping or limiting the operation current of the GCA 20. When the sleep control signal SLEEP is at the L level, the GCA 20 is operated by generating an operating current of the GCA 20.

  The HPF 60 is supplied with a capacitor (capacitance element) CH inserted between the output of the current-voltage converter 30 and the input of the GCA 20 or the input of the comparator 50, and the reference potential VBH from the reference potential fluctuation circuit 70 is supplied to one end. A primary HPF including a resistor (resistive element) RH to which the input of the GCA 20 or the input of the comparator 50 is connected at the other end.

  By the way, in the present embodiment, the HPF 60 is inserted between the output of the current-voltage converter 30 and the input of the GCA 20 or the input of the comparator 50 so that the output of the current-voltage converter 30 is supplied to the full-wave rectifier 42. Is done. By doing so, the AGC circuit 40 (the full-wave rectifier 42, the oscillation detector 44, and the integrator 46) can be prevented from having the influence of changing the reference potential of the HPF 60.

  The reason can be considered as follows. Considering the reference potential fluctuation circuit 70 as a reference, considering that the output impedance of the operational amplifier OP1 included in the current-voltage converter 30 is very small, the current-voltage converter 30 and the GCA 20 (or the comparator 50) in the oscillation loop are The resistors RH and the capacitor CH are connected as shown in FIG. That is, the fluctuation of the reference potential from the reference potential fluctuation circuit 70 is absorbed on the current-voltage converter 30 side, and the influence on the full-wave rectifier 42 is almost eliminated. On the other hand, since the GCA 20 or the comparator 50 is connected to the reference potential fluctuation circuit 70 via the LPF composed of the resistor RH and the capacitor CH, only the low frequency component of the reference potential changed by the reference potential fluctuation circuit 70 in a pulse shape. Communicated. For this reason, in the GCA 20 and the comparator 50, the input fluctuates at a low frequency. On the other hand, for example, when a given signal is given to the signal in the oscillation loop on the input side of the current-voltage converter 30, the influence affects the full-wave rectifier 42, the oscillation detector 44, and the integrator 46. End up. As described above, according to the present embodiment, it is possible to avoid affecting the AGC circuit 40 by changing the reference potential of the HPF 60. Therefore, according to the present embodiment, it is possible to avoid the occurrence of malfunction of the AGC circuit 40 due to the change in the reference potential of the HPF 60.

  Below, the detailed structural example of each part is demonstrated.

1.3.1 GCA
6A and 6B are circuit diagrams of configuration examples of the GCA 20 in FIG.

  6A shows a configuration example when the GCA 20 is configured using a P-type differential amplifier, and FIG. 6B shows a configuration when the GCA 20 is configured using an N-type differential amplifier. An example is shown. 6A and 6B, the sleep control signal SLEEP # is an inverted signal of the sleep control signal SLEEP.

  In FIG. 6A, the current I0 generated by the current source is supplied as the operating current I0 ′ of the P-type differential amplifier by two current mirror circuits. One gate of the P-type differential transistor pair of the P-type differential amplifier is supplied with the voltage of the output node of the current-voltage converter 30 as the input signal IN. A reference voltage VR0 is supplied to the other gate of the P-type differential transistor pair of the P-type differential amplifier. The output voltage of the P-type differential amplifier is supplied to the output buffer. The output signal of the output buffer is supplied to one end of the first switch element SW1.

  Here, in the two current mirror circuits and the P-type differential amplifier, the high-potential side power supply voltage is the voltage VDD and the low-potential side power supply voltage is the voltage AGND. On the other hand, the output buffer is an inverter circuit composed of a P-type output transistor and an N-type output transistor. The voltage AGND is supplied to the source of the N-type transistor of the output buffer, and the control signal VCTL from the AGC circuit 40 is supplied to the source of the P-type transistor. Therefore, the output voltage of the output buffer can be changed by changing the control signal VCTL.

  In FIG. 6B, the current I1 generated by the current source is supplied as the operating current I1 ′ of the N-type differential amplifier by the two current mirror circuits. The voltage at the output node of the current-voltage converter 30 is supplied as an input signal IN to one gate of the N-type differential transistor pair of the N-type differential amplifier. A reference voltage VR0 is supplied to the other gate of the N-type differential transistor pair of the N-type differential amplifier. The output voltage of the N-type differential amplifier is supplied to the output buffer. The output signal of the output buffer is supplied to one end of the first switch element SW1.

  Here, in the two current mirror circuits and the N-type differential amplifier, the high potential side power supply voltage is the voltage VDD and the low potential side power supply voltage is the voltage AGND. On the other hand, the output buffer is an inverter circuit composed of a P-type output transistor and an N-type output transistor. The voltage AGND is supplied to the source of the N-type transistor of the output buffer, and the control signal VCTL from the AGC circuit 40 is supplied to the source of the P-type transistor. Therefore, the output voltage of the output buffer can be changed by changing the control signal VCTL.

  In FIGS. 6A and 6B, the substrate bias effect can be prevented by applying the control signal VCTL as the substrate potential of the P-type output transistor of the output buffer.

  In FIGS. 6A and 6B, a current control transistor is provided in series with the current source. In FIG. 6A, the current source transistor is a P-type transistor, and the sleep control signal SLEEP is supplied to the gate of the transistor. In FIG. 6B, the current source transistor is an N-type transistor, and the sleep control signal SLEEP # is supplied to the gate of the transistor. 6A and 6B, when the sleep control signal SLEEP becomes H level, the source and drain of the current control transistor are electrically disconnected, and the current of the current source is changed to the current mirror circuit. Not supplied. Therefore, based on the sleep control signal SLEEP, the operation of the GCA 20 can be set to a disabled state (stopped).

1.3.2 Comparator Next, the configuration of the comparator 50 (particularly, the configuration for realizing the current limiting function of the comparator 50) will be described. The comparator 50 is supplied with a power supply voltage VDD as a high potential side power supply and with an analog power supply voltage AGND as a low potential side power supply. At this time, the current limiting function of the comparator 50 is a function that limits the current in the current path to at least one of the high potential side power source and the low potential side power source.

  FIG. 7 shows a circuit diagram of a configuration example of the comparator 50 of FIG.

  In FIG. 7, the current I2 generated by the current source is supplied as the operating current of the P-type differential amplifier by the two current mirror circuits, and is also supplied as the drain current I2 ′ of the P-type output drive transistor. One gate of the P-type differential transistor pair of the P-type differential amplifier is supplied with the voltage of the output node of the current-voltage converter 30 as the input signal IN. A reference voltage VR0 is supplied to the other gate of the P-type differential transistor pair of the P-type differential amplifier. The output voltage of the P-type differential amplifier is supplied as the gate voltage of the N-type output drive transistor.

  A P-type output drive transistor and an N-type output drive transistor are connected in series between the power supply voltage VDD and the analog power supply voltage AGND, and the voltage at the connection node (the drain of the P-type output drive transistor) is output. The voltage is supplied to one end of the second switch element SW2.

  With such a configuration, in the comparator 50 of FIG. 7, the current drive capability on the high potential side of the output voltage OUT is limited by the current I2 ′. For example, in comparison with the configuration in which the same signal is supplied to the gates of the P-type output transistor and the N-type output transistor constituting the output buffer shown in FIGS. 6A and 6B, the current on the high potential side in FIG. It can be seen that the driving ability is limited.

  The configuration of the comparator 50 is not limited to the configuration shown in FIG.

  FIG. 8 is a circuit diagram showing another configuration example of the comparator 50 shown in FIG.

  In FIG. 8, the current I3 generated by the current source is supplied as the operating current of the N-type differential amplifier by the two current mirror circuits and also supplied as the drain current I3 ′ of the N-type output drive transistor. The voltage at the output node of the current-voltage converter 30 is supplied as an input signal IN to one gate of the N-type differential transistor pair of the N-type differential amplifier. A reference voltage VR0 is supplied to the other gate of the N-type differential transistor pair of the N-type differential amplifier. The output voltage of the N-type differential amplifier is supplied as the gate voltage of the P-type output drive transistor.

  A P-type output drive transistor and an N-type output drive transistor are connected in series between the power supply voltage VDD and the analog power supply voltage AGND, and the voltage at the connection node (the drain of the N-type output drive transistor) is output. The voltage is supplied to one end of the second switch element SW2.

  With such a configuration, in the comparator 50 of FIG. 8, the current drive capability on the high potential side of the output voltage OUT is limited by the current I3 ′. For example, in comparison with the configuration in which the same signal is supplied to the gates of the P-type output transistor and the N-type output transistor constituting the output buffer shown in FIGS. 6A and 6B, the current on the high potential side in FIG. It can be seen that the driving ability is limited.

  7 and 8, the current path current to either the high potential side power supply or the low potential side power supply is limited. However, the current path current to both the high potential side power supply and the low potential side power supply is limited. You may make it restrict | limit.

  FIG. 9 is a circuit diagram showing still another configuration example of the comparator 50 shown in FIG.

  9, the comparator 50 can include an operational amplifier OP10, an analog control logic unit 120, and an output circuit unit 122. The operational amplifier OP10 functions as a comparator, and outputs a comparison result signal CRES obtained by comparing the output signal of the current-voltage converter 30 with the reference voltage VR0. The analog control logic unit 120 generates control signals S, XS, XH, and H for controlling the output circuit unit 122 based on the comparison result signal CRES generated by the operational amplifier OP10. Based on the control signals S, XS, XH, and H from the analog control logic unit 120, the output circuit unit 122 generates an output signal while limiting the current from the high potential side power source or the current to the low potential side power source. To do.

  FIG. 10A shows a circuit diagram of a configuration example of the analog control logic unit 120 in FIG. FIG. 10B shows a timing chart of an operation example of the analog control logic unit 120 in FIG.

  The analog control logic unit 120 generates the control signals S and H based on the comparison result signal CRES so that the change timings are not the same. The control signal XS is an inverted signal of the control signal S. The control signal XH is an inverted signal of the control signal H. In FIG. 10A, the comparison result signal CRES and its inverted signal are each one input signal of the 2-input 1-output NOR circuit. The other input signal of the first NOR circuit is a signal obtained by delaying the output signal of the second NOR circuit, and the other input signal of the second NOR circuit is delayed by the output signal of the first NOR circuit. Signal. With this configuration, the control signal H rises due to the fall of the control signal S, and the control signal S rises due to the fall of the control signal H.

  As a result, the control signals S and H are generated so that the periods of the H level are non-overlapping. Similarly, the control signals XS and XH are generated so that the periods of the L level are non-overlapping.

  FIG. 11 shows a configuration example of the output circuit unit 122 of FIG.

  The output circuit unit 122 includes first and second transfer gates, a first current source to which the power supply voltage VDD is supplied at one end and the first transfer gate is connected to the other end, and a second transfer gate at one end. And a second current source to which the other end of the analog power supply voltage AGND is supplied. The first current source generates a current I4. The second current source generates a current I5. The first and second transfer gates are connected in series, and the voltage at the connection node is output as the output voltage OUT of the comparator 50.

  A control signal XS is supplied to the gate of the P-type transistor constituting the transfer gate connected to the first current source, and a control signal S is supplied to the gate of the N-type transistor. A control signal XH is supplied to the gate of the P-type transistor constituting the transfer gate connected to the second current source, and a control signal H is supplied to the gate of the N-type transistor.

  With such a configuration, the first and second transfer gates are controlled so as not to be turned on simultaneously. When the first transfer gate is on, the second transfer gate is off, and the output voltage OUT changes in a state where the current is limited by the current I4 of the first current source. Similarly, when the second transfer gate is on, the first transfer gate is turned off, and the output voltage OUT changes in a state where the current is limited by the current I5 of the second current source.

1.3.3 Reference Potential Fluctuation Circuit and Pulse Generation Circuit Next, configuration examples of the reference potential fluctuation circuit 70 and the pulse generation circuit 80 in FIG. 4 will be described.

  FIG. 12 shows a configuration example of the reference potential fluctuation circuit 70 of FIG.

  FIG. 12 shows a configuration example of the HPF 60 and the reference potential fluctuation circuit 70 so that the connection relationship with the HPF 60 becomes clear.

  In the reference potential fluctuation circuit 70, voltages VR0, VR3, and VR4 generated inside or outside the oscillation driving circuit 10 are supplied. Here, as shown in FIG. 13, the voltage VR0 is a voltage that becomes the reference potential of the HPF 60 in the steady oscillation state. The voltage VR4 is a voltage on the high potential side when the reference potential of the HPF 60 is changed. The voltage VR3 is a voltage on the low potential side when the reference potential of the HPF 60 is changed. That is, when VR3 <VR0 <VR4 and the reference potential of the HPF 60 in the steady oscillation state is V0, the reference potential VBH is higher than the voltage V0 and the voltage V0 during the period of changing the reference potential VH. This is a potential obtained by alternately switching a lower potential voltage V3. As a result, when shifting from the oscillation start-up process to the oscillation steady state, the reference potential of the HPF 60 can be quickly stabilized at the voltage VR0 regardless of the fluctuation process.

  The fluctuation amplitude of the reference potential of the HPF 60 by the reference potential fluctuation circuit 70 is determined by the voltage between the voltage VR4 and the voltage VR3. As described above, the output level of the GCA 20 or the comparator 50 may not change due to the input offset voltage of the GCA 20 or the comparator 50. Therefore, it is necessary to reliably change the outputs of the GCA 20 and the comparator 50 in order to surely speed up the oscillation start. Therefore, the fluctuation amplitude of the reference potential of the HPF 60 by the reference potential fluctuation circuit 70 is the amplitude of the input offset voltage of the GCA 20 or the comparator 50 (or the amplitude of at least one of the input offset voltage of the GCA 20 and the input offset voltage of the comparator 50). It is desirable to be larger.

  More specifically, the reference potential VBH output from the reference potential fluctuation circuit 70 is supplied to the GCA 20 or the comparator 50 through the LPF having the configuration shown in FIG. When the capacitance value of the capacitor CH is C and the resistance value of the resistor RH is R, the transfer function of the LPF in FIG.

Vout / Vin = 1 / (1 + j × ω × C × R) (4)
In the equation (4), j indicates an imaginary axis on the complex plane, and ω is each frequency. If Vin is (V4−V3) and Vin = ΔV, Vout may be larger than the input offset voltage Vx of the GCA 20 or the comparator 50. Therefore, the relationship between Vx and the equation (4) is expressed by the following equation.

Vx <Vout = ΔV / ((1+ (ω × C × R) ² ) ^1/2 (5)
That is, it is desirable that the input offset voltage of the GCA 20 or the input offset voltage Vx of the comparator 50 is smaller than ΔV / ((1+ (ω × C × R) ² ) ^1/2 . Regardless of the offset voltage or the input offset voltage of the comparator 50, the output of the GCA 20 or the comparator 50 can be changed, so that the oscillation start-up can be speeded up reliably.

  Such voltages VR0, VR3, and VR4 can be voltages generated by resistance division from the power supply voltage VDD and other voltages. By doing so, at least one of the voltages VR0, VR3, and VR4 can be easily changed, and a more reliable oscillation can be realized by absorbing manufacturing variations and oscillation environment changes.

  In the oscillation starting process, the reference potential fluctuation circuit 70 that generates the reference potential VBH as shown in FIG. 13 can include selectors 72 and 74, for example. The selector 72 selects and outputs one of the voltages VR3 and VR4 based on the switching pulse PSW from the pulse generation circuit 80. The selector 74 outputs the voltage VR0 or the selection output of the selector 72 as the reference potential VBH based on the switch control signal SWCTL.

  FIG. 14 is a block diagram showing a configuration example of the pulse generation circuit 80 shown in FIG.

  The pulse generation circuit 80 includes a power-on reset circuit 400, a switching pulse generation circuit 410, and a switch control circuit 420.

  The power-on reset circuit 400 generates a power-on reset signal POR as shown in FIG. That is, the power-on reset circuit 400 performs a power-on reset so that the power-on reset circuit 400 becomes active when the power supply voltage reaches a given threshold level in the process from immediately after power-on until the high-potential side of the power supply voltage reaches the voltage VDD. A signal POR is generated. As the configuration of such a power-on reset circuit 400, a known circuit can be employed.

  The switching pulse generation circuit 410 generates a pulse signal PLSA having one or a plurality of pulses based on the power-on reset signal POR and the sleep control signal SLEEP from the power-on reset circuit 400 within a predetermined period. At this time, the switching pulse generation circuit 410 can output the delay signal DLY that becomes H level only during the above-described period.

  16A to 16D are explanatory diagrams of the switching pulse generation circuit 410 in FIG. FIG. 16A is a block diagram of a configuration example of the switching pulse generation circuit 410 in FIG. FIG. 16B is a circuit diagram and a timing diagram of a configuration example of the delay unit in FIG. FIG. 16C is an example of the timing of the delay unit in FIG. FIG. 16D is a timing diagram of an operation example of the switching pulse generation circuit 410 in FIG.

  As shown in FIG. 16A, the switching pulse generation circuit 410 includes a plurality of delay units. Each delay unit generates one pulse based on the input signal. The first-stage delay unit receives a signal of a negative OR operation result of the power-on reset signal POR and the sleep control signal SLEEP. The output of the final delay unit is output as a delay signal DLY. The pulses generated in each delay unit are logically ORed and output as a pulse signal PLSA.

  As shown in FIG. 16B and FIG. 16C, the delay unit delays the input signal IN by the inverter array, and generates an output signal OUT that becomes an input of the next-stage delay unit. The pulse signal PLS output from each delay unit is generated by the input and output of the first-stage inverter circuit in the inverter train, and is output, for example, as a falling edge detection pulse of the input signal IN. The pulse signal PLSA is generated by performing an OR operation on the pulse signals PLS of each delay unit. The output signal OUT falls with a delay of a delay time due to the inverter row with reference to the falling edge of the input signal IN.

  By performing a logical sum operation of the delay units as shown in FIGS. 16B and 16C, the operation is started with reference to the falling edge of the power-on reset signal POR as shown in FIG. 16D. Within a predetermined period, a pulse signal PLSA having pulses of the number of delay units is generated.

  Returning to FIG. 14, the description will be continued. 14 includes a sleep control signal SLEEP, a switch control signal SWCTL # (or switch control signal SWCTL) from the oscillation detector 44, a power-on reset signal POR from the power-on reset circuit 400, and a switching pulse generation. The delay signal DLY and the pulse signal PLSA from the circuit 410 are input. The switch control circuit 420 generates a switching pulse PSW having one or a plurality of pulses within a predetermined period based on the switch control signal SWCTL, the power-on reset signal POR, the delay signal DLY, and the pulse signal PLSA. The switch control circuit 420 can fix the logic level of the switching pulse PSW based on the sleep control signal SLEEP.

  FIG. 17A shows a circuit diagram of a configuration example of the switch control circuit 420 in FIG. FIG. 17B) shows a timing chart of an operation example of the switch control circuit 420 in FIG.

  The switch control circuit 420 includes an RS flip-flop 422 and a selector 424 that is selectively controlled based on an output signal of the RS flip-flop 422. As a set input of the RS flip-flop 422, a signal of a negative OR operation result of the power-on reset signal POR and the sleep control signal SLEEP is input, and a delay signal DLY is input as a reset input of the RS flip-flop 422. The selector 424 receives the switch control signal SWCTL (switch control signal SWCTL #) from the oscillation detector 44 and the pulse signal PLSA from the switching pulse generation circuit 410, and the switch control signal SWCTL is output from the RS flip-flop 422. Alternatively, the pulse signal PLSA is selectively output. The output signal of the selector 424 is output as the switching pulse PSW. When the sleep control signal SLEEP is at H level, an H level switching pulse PSW is output. When the sleep control signal SLEEP is at L level, the output signal of the selector 424 is output as the switching pulse PSW.

  Therefore, when the power-on reset signal POR falls, the output signal of the RS flip-flop 422 is set, and the selector 424 selectively outputs the pulse signal PLSA. When the sleep control signal SLEEP is at the L level, the pulse signal PLSA is output as the switching pulse PSW. Eventually, when the delay signal DLY falls, the output signal of the RS flip-flop 422 is reset, and the selector 424 selectively outputs the switch control signal SWCTL. Also at this time, when the sleep control signal SLEEP is set to the L level, the switch control signal SWCTL is output as the switching pulse PSW.

  With the configuration as described above, the pulse generation circuit 80 uses the falling edge (change timing) of the power-on reset signal POR as a reference, and the switch control signal SWCTL indicating that the signal in the oscillation loop has exceeded a predetermined threshold level. A switching pulse PSW (a signal having a given frequency) having one or a plurality of pulses can be output during a period until the falling edge (change timing) of the first pulse.

  In addition, it becomes possible to improve a user's usability by clarifying a start timing like this embodiment. Further, for example, the length of the predetermined period can be determined by counting a given reference clock based on the start timing, so that the oscillation detector 44 for detecting the oscillation amplitude can be omitted, for example, and the circuit scale can be reduced. You will also be able to.

  Although FIGS. 14 to 17A and 17B have been described assuming that pulses of the number of delay units are generated in a fixed manner, the present invention is not limited to this. The number of clocks output from the oscillation circuit may be counted based on the change timing of the power-on reset signal POR, and the output from the oscillation circuit may be output as the switching pulse PSW during a period until the count reaches a predetermined count value. . In this case, the end timing of the predetermined period in which the pulse generation circuit 80 outputs the switching pulse PSW is the timing at which it is detected that a predetermined count has been counted based on the start timing of the predetermined period.

1.4 Modification In FIG. 12, the reference potential fluctuation circuit 70 generates a reference potential VBH that fluctuates between a voltage VR4 on the high potential side and a voltage VR3 on the low potential side around the voltage VR0 when oscillation starts. However, the present invention is not limited to this.

  18A and 18B show a configuration example of a reference potential fluctuation circuit in a modification of the present embodiment.

  When the behavior of the input offset voltage deviation or the like is known in advance due to manufacturing variation of the GCA 20 or the comparator 50, the reference potential fluctuation circuit 70 alternately switches the voltage VR0 and the voltage VR4 when starting oscillation. The reference potential VBH switched to the voltage VR3 may be generated, or the reference potential VBH may be generated by alternately switching the voltage VR3 and the voltage VR0.

  FIG. 18A shows an example in which the reference potential fluctuation circuit 70 generates a reference potential VBH in which the voltage VR0 and the voltage VR4 are alternately switched when oscillation starts. In this case, the reference potential fluctuation circuit 70 outputs the voltage VR4 or the voltage VR0 as the reference potential VBH based on the selection control signal in which the switching pulse PSW from the pulse generation circuit 80 is masked by the switch control signal SWCTL.

  FIG. 18B shows an example in which the reference potential fluctuation circuit 70 generates a reference potential VBH in which the voltage VR3 and the voltage VR0 are alternately switched when oscillation starts. In this case, the reference potential fluctuation circuit 70 outputs the voltage VR3 or the voltage VR0 as the reference potential VBH based on the selection control signal in which the switching pulse PSW from the pulse generation circuit 80 is masked by the switch control signal SWCTL.

2. FIG. 19 shows a block diagram of a configuration example of a vibration gyro sensor to which the oscillation drive circuit according to the present embodiment or a modification thereof is applied.

  19, the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  The vibration type gyro sensor (physical quantity measuring device in a broad sense) 100 includes an oscillation circuit 200 and a detection circuit (a detection device in a broad sense) 300. The oscillation circuit 200 includes the vibrator 12 and the oscillation drive circuit 10. The oscillation drive circuit 10 is for exciting the drive vibration unit 12 a of the vibrator 12.

  At the time of starting oscillation in the normal mode, the output of the comparator 50 is input to the oscillation drive circuit 10 as noise. This noise passes through the drive vibration unit 12a of the vibrator 12 and is subjected to frequency selection, and then a part of the signal that has passed through the drive vibration unit 12a is extracted and input to the full-wave rectifier 42 to be converted into amplitude. A signal having this amplitude is input to the oscillation detector 44 to generate a switch control signal SWCTL #. At the time of oscillation start-up, the amplitude of the signal that has been subjected to frequency selection through the vibrator 12a is small, and the oscillation detector 44 outputs a switch control signal SWCTL # as shown in FIG.

  Immediately after starting oscillation in the normal mode, the amplitude of the signal that has passed through the vibrator 12a and has undergone frequency selection increases, and the switch control signal SWCTL becomes H level. As a result, the oscillation loop is switched so that the amplitude of the signal that has passed through the vibrator 12a and has undergone frequency selection is controlled by the GCA 20. Thereafter, when most of the noise is cut in the drive vibration unit 12a and the output from the full-wave rectifier 42 is relatively small, the gain in the GCA 20 is increased and the loop gain becomes 1 while making a round of the oscillation loop. Like that. As time elapses, the output from the full-wave rectifier 42 increases, so the gain in the GCA 20 is decreased so that the loop gain becomes 1.

  In the sleep mode, the control is performed in the same manner as the oscillation starting process in the normal mode.

  When the oscillation state of the drive signal is stabilized, detection of signals from the drive detection units 12b and 12c of the vibrator 12 is started. That is, the detection signals (AC) from the vibrator drive detection units 12 b and 12 c are amplified using the AC amplifiers 312 A and 312 B of the AC amplifier circuit 310, and the outputs from the amplifiers 312 A and 312 B are added by the adder 314. .

  The output of the adder 314 is passed through the phase shifter 320 to obtain a phase shift signal. The phase of the phase shift signal is deviated from the phase of the synchronous detection clock that is the output of the comparator 50 of the oscillation drive circuit 10 by a predetermined angle, for example, 90 degrees. The phase shift signal and the synchronous detection clock from the oscillation drive circuit 10 are input to the synchronous detector 330, and the output signal from the vibrator 12 is detected. As a result, in the output signal after detection, the unnecessary leakage signal should be eliminated or at least reduced. In this way, by performing the phase adjustment between the synchronous detection clock and the detection signal in the detection circuit 300, the phase adjustment can be performed in accordance with the phase change during the detection process of the minute signal. This makes it possible to achieve both phase adjustment and prevention of an increase in circuit scale.

  The detected output signal is input to the low-pass filter 340, smoothed, and then input to the zero point adjuster 350. The output of the zero point adjuster 350 is taken out as an output signal corresponding to a physical quantity to be measured (for example, angular velocity).

  The vibration gyro sensor 100 of FIG. 19 is preferably mounted on an electronic device such as a video camera, a digital camera, a car navigation system, an aircraft, or a robot.

  Note that the present invention is not limited to the vibrator 12 in the present embodiment. Examples of the material constituting the vibrator 12 include a constant elastic alloy such as Elinvar and a ferroelectric single crystal (piezoelectric single crystal). Examples of such single crystals include quartz, lithium niobate, lithium tantalate, lithium niobate-lithium tantalate solid solution, lithium borate, and langasite. The vibrator 12 is preferably hermetically sealed in the package. The atmosphere in the package is preferably dry nitrogen or vacuum.

  The physical quantity to be measured in the present invention is not limited to the angular velocity as in the present embodiment. When the vibration state of the vibrator is changed due to the influence of the physical quantity on the vibrator during driving vibration, the physical quantity that can be detected through the detection circuit from the change in the vibration state is targeted. . As such a physical quantity, in addition to the angular velocity applied to the vibrator, acceleration and angular acceleration are particularly preferable. Moreover, an inertial sensor is preferable as the detection device.

The circuit block diagram of the structural example of the oscillation drive circuit in this embodiment. Explanatory drawing of the reference potential and switching pulse of HPF. FIGS. 3A and 3B are timing charts of examples of the sleep control signal and the switch control signal in FIG. FIG. 2 is a diagram showing a circuit example of the oscillation drive circuit of FIG. 1. The figure which shows the example of the equivalent circuit seeing on the basis of the reference electric potential fluctuation circuit. 6A and 6B are circuit diagrams of configuration examples of the GCA. FIG. 5 is a circuit diagram of a configuration example of the comparator in FIG. 4. FIG. 5 is a circuit diagram of another configuration example of the comparator in FIG. 4. FIG. 5 is a circuit diagram of still another configuration example of the comparator of FIG. FIG. 10A is a circuit diagram of a configuration example of the analog control logic unit of FIG. FIG. 10B is a timing diagram of an operation example of the analog control logic unit in FIG. The figure which shows the structural example of the output circuit part of FIG. FIG. 2 is a diagram of a configuration example of a reference potential fluctuation circuit in FIG. 1. Explanatory drawing of a switching pulse. The block diagram of the structural example of the pulse generation circuit of FIG. FIG. 15 is an explanatory diagram of the power-on reset circuit in FIG. 14. FIGS. 16A to 16D are explanatory diagrams of the switching pulse generation circuit of FIG. 17A to 17B are explanatory diagrams of the switch control circuit of FIG. 18A and 18B are diagrams showing a configuration example of a reference potential fluctuation circuit according to a modification of the present embodiment. The block diagram of the structural example of the vibration type gyro sensor in this embodiment.

Explanation of symbols

10 oscillation drive circuit, 12 transducers, 12a drive oscillation unit,
12b, 12c drive detection unit, 14 excitation means, 20 GCA,
30 current-voltage converter, 40 AGC circuit, 42 full-wave rectifier,
44 oscillation detector, 46 integrator, 50 comparator, 60 HPF,
70 reference potential fluctuation circuit, 72, 74 selector, 80 pulse generation circuit,
90 sleep mode setting register, 100 vibration type gyro sensor,
120 analog control logic unit, 122 output circuit unit, 200 oscillation circuit,
300 detection circuit, 310 AC amplifier circuit, 312A, 312B AC amplifier,
314 adder, 320 phase shifter, 330 synchronous detector, 340 LPF,
350 0-point adjuster, 400 power-on reset circuit,
410 switching pulse generation circuit, 420 switch control circuit, DLY delay signal,
PLSA, PLS pulse signal, POR power-on reset signal,
PSW switching pulse, SW1 to SW3, first to third switch elements,
SLEEP sleep control signal, SWCTL, SWCTL # switch control signal,
VBH reference potential, VCTL control signal

Claims (19)

When measuring a physical quantity using an output signal obtained by synchronously detecting a detection signal output from the vibrator based on a drive vibration excited by the vibrator and a physical quantity to be measured, an oscillation loop is formed with the vibrator. A drive device for exciting drive vibration to the vibrator,
A current-voltage converter for converting a current flowing through the vibrator into a voltage;
A gain control amplifier that controls the oscillation amplitude in the oscillation loop to excite drive vibration in the vibrator;
A high-pass filter provided between the current-voltage converter and the gain control amplifier in the oscillation loop,
A drive apparatus characterized by exchanging drive vibration to the vibrator by changing a reference potential of the high-pass filter, and then exciting drive vibration to the vibrator by fixing the reference potential. In claim 1,
A comparator that generates a reference signal for the synchronous detection based on a signal in the oscillation loop;
At the time of oscillation start to change the reference potential of the high-pass filter, drive vibration to the vibrator in an oscillation loop including the current-voltage converter, the high-pass filter, the comparator and the vibrator,
In a steady oscillation state, a driving device excites driving vibration in the vibrator in an oscillation loop including the current-voltage converter, the high-pass filter, the gain control amplifier, and the vibrator. In claim 2,
In the state set to the first operation mode for performing the normal operation, the reference potential is changed to excite the driving vibration in the vibrator, and then the reference potential is fixed and the driving vibration is applied to the vibrator. Excited,
In a state where the second operation mode for performing the sleep operation is set, driving vibration is excited in the vibrator in an oscillation loop including the current-voltage converter, the high-pass filter, the comparator, and the vibrator. A drive device characterized by the above. In claim 3,
A gain control circuit for controlling the gain of the gain control amplifier based on a current flowing through a vibrator in the oscillation loop;
In the state set to the second operation mode, the operations of the gain control amplifier and the gain control circuit are set to a disabled state without setting the operation of the comparator to a disabled state. Drive device. In any one of Claims 1 thru | or 4,
A driving device that changes the reference potential of the high-pass filter only for a predetermined period that is started with reference to the switching timing from the second operation mode to the first operation mode. In any one of Claims 1 thru | or 5,
The drive device characterized in that the polarity of the output of the gain control amplifier is the same as the polarity of the output of the comparator. In any one of Claims 1 thru | or 6.
A reference potential fluctuation circuit for supplying one voltage level selected from a plurality of voltage levels to the high-pass filter as the reference potential when starting oscillation;
A pulse generation circuit for generating a switching pulse for selecting a voltage level to be output as the reference potential,
The pulse generation circuit is
A drive device that outputs the switching pulse only for a predetermined period. In claim 7,
The start timing of the predetermined period is
The drive device according to claim 1, wherein the drive device has a power-on reset start timing. In claim 7 or 8,
The end timing of the predetermined period is
It is a timing at which it is detected that a signal in the oscillation loop exceeds a predetermined threshold level, or a timing at which a predetermined number of counts is detected based on a start timing of the predetermined period, To drive. In any of claims 7 to 9,
The pulse generation circuit is
A power-on reset circuit for generating a power-on reset signal;
A switching pulse generation circuit that generates one or a plurality of pulses based on the power-on reset signal within a predetermined period,
The switching pulse generating circuit is
Each delay unit has a plurality of delay units that generate pulses based on the input signal, and outputs a logical OR operation result of the pulses generated by each delay unit,
The switching pulse is output during a period until a change timing of a detection result signal indicating that a signal in the oscillation loop exceeds a predetermined threshold level with reference to a change timing of the power-on reset signal. To drive. In any one of Claims 1 thru | or 10.
The fluctuation amplitude of the reference potential during the period of changing the reference potential is
A driving apparatus characterized by being larger than an amplitude of an input offset voltage of the comparator or the gain control amplifier. In any one of Claims 1 thru | or 11,
The high pass filter is
A capacitive element inserted between the output of the current-voltage converter and the input of the comparator or the input of the gain control amplifier;
A driving device comprising: a resistance element having one end supplied with the reference potential and the other end connected to the input of the comparator or the input of the gain control amplifier. In claim 12,
When the capacitance value of the capacitive element is C, the resistance value of the resistive element is R, and the fluctuation amplitude of the reference potential is ΔV,
Vx which is an input offset voltage of the comparator or an input offset voltage of the gain control amplifier is smaller than ΔV / ((1+ (ω × C × R) ² ) ^1/2 . In any of claims 11 to 13,
When the reference potential in the steady oscillation state is V0,
In the period for changing the reference potential,
The reference potential is
A driving device characterized in that a voltage V4 having a higher potential than V0 and a voltage V3 having a lower potential than V0 are alternately switched. In any of claims 11 to 13,
When the reference potential in the steady oscillation state is V0,
In the period for changing the reference potential,
The reference potential is
A driving device characterized in that it is a potential obtained by alternately switching V0 and a voltage V4 having a higher potential than V0. In any of claims 11 to 13,
When the reference potential in the steady oscillation state is V0,
In the period for changing the reference potential,
The reference potential is
A driving device characterized in that it is a potential obtained by alternately switching V0 and a voltage V3 having a lower potential than V0. A physical quantity measuring device for measuring a physical quantity corresponding to a detection signal output from the vibrator based on a drive vibration excited by the vibrator and a physical quantity to be measured,
A vibrator,
The drive device according to any one of claims 1 to 16, wherein drive vibration is excited in the vibrator;
A detection device that detects an output signal corresponding to the physical quantity based on the detection signal,
The detection device is
A physical quantity measuring apparatus comprising: a synchronous detector that synchronously detects the detection signal based on an output of a comparator that generates a reference signal for the synchronous detection based on a signal in the oscillation loop. In claim 17,
The detection device is
A physical quantity measuring apparatus comprising a phase shifter for adjusting a phase between the output of the comparator and the detection signal.   An electronic apparatus comprising the physical quantity measuring device according to claim 17 or 18.

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