JP2008020235A - Defect inspection device and defect inspection method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a defect inspection device and a defect inspection method capable of performing defect inspection at high speed, suppressing cost increase. <P>SOLUTION: An image taking part 21 generates two-dimensional image information. A DWT processing part 22 generates reduced image information having a reduced image size by discrete wavelet transformation. A defect detection part 25 extracts a defect on an inspection object by using the reduced image information. Since a defect is extracted by using the reduced image information wherein a frequency component is maintained, while reducing the image size furthermore than an image corresponding to original image information, high-speed defect inspection can be performed by suppressing cost increase. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a defect inspection apparatus and a defect inspection method for inspecting a defect such as an FPD (Flat Panel Display) substrate represented by an LCD (Liquid Crystal Display) and a PDP (Plasma Display Panel) or a semiconductor wafer.

  Semiconductor wafers and FPD substrates are manufactured through a number of processes. In order to increase the manufacturing yield, substrate inspection (defect inspection) for determining whether or not to proceed to the next step is very important in each step. For substrate inspection, for example, information indicating the state of the substrate, such as image information acquired from a CCD sensor, is input, the presence / absence of a defect, information about the defect (position, size, type), a certain section on the substrate or the substrate In many cases, the inspection is performed using a defect inspection apparatus that outputs information on whether or not to proceed to the next process (for example, a die or a chip in a semiconductor wafer).

  Recently, there is a strong tendency for inspection objects to become finer and larger. For example, while the diameter of a semiconductor wafer is mainly 300 mm, the process rule has been miniaturized to several tens of nanometers, and the minimum resolution of detected defects is required to be smaller. In addition, regarding FPD substrates, the glass substrates that serve as bases are 2 m or more in both vertical and horizontal directions, and the size of the inspection has become wider.

  In such a situation, in the substrate inspection, “a minute defect that affects a fine pattern must be detected” and “a large substrate must be inspected without degrading the conventional throughput. Is a big issue. Detecting minute defects on the inspection object can be realized by reducing the resolution of the input information compared to the conventional method. However, if the inspection object becomes large, the input information becomes large, and the inspection throughput increases. Getting worse. Even if a CPU that performs high-speed processing (or a computer equipped with a CPU) is simply introduced into the inspection apparatus, it depends heavily on the performance of parts other than the CPU and does not necessarily perform high-speed processing.

  Therefore, the following method has been proposed as a high-speed defect inspection method when a large amount of input information, particularly a high-definition image (an image having a small resolution and a large size) is used as input information. In Patent Document 1, a semiconductor wafer that is an inspection object is imaged to acquire image information, and the image information is divided into a predetermined size based on cells or dies that represent sections of the semiconductor wafer, and then each piece of divided image information is divided. A method has been proposed in which test results are integrated in parallel by a plurality of processors. This method is a method for speeding up the system by dividing image information relating to one inspection object and performing inspection by a plurality of processing systems.

Further, Patent Document 2 proposes an inspection method in which a Fourier component is applied to image information of an inspection object to extract a frequency component, and a defect is detected by comparison with a frequency component of reference image information when there is no defect. Yes. This method is a method of increasing the speed by processing the input information, in which a frequency component in the image information of the inspection object is extracted and inspected.
JP 2004-259228 A JP 2003-123073 A

  Each of the above conventional techniques has the following problems. In the technique described in Patent Document 1, it is possible to provide an overlapped portion in image division, a method of inspection processing for each divided image (realization of a parallel processing system, or a plurality of inspections generated in the overlapping portion) For the integration of results, etc., a device for speeding up is required. In addition, a system suitable for parallel processing (such as a CPU) is desired, and the cost is expected to increase.

  Further, in the technique described in Patent Document 2, in order to know the position on the image of the defect detected from the frequency component information obtained by the Fourier transform, it is necessary to perform an inverse Fourier transform. It takes time and effort. For these reasons, in the prior art, it is a big problem to suppress the increase in cost and labor at the time of inspection.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a defect inspection apparatus and a defect inspection method capable of performing defect inspection at high speed while suppressing an increase in cost.

  The present invention has been made in order to solve the above-described problems. An image generation unit that captures an inspection object and generates two-dimensional image information; and an image size that is smaller than an image corresponding to the image information. A defect inspection apparatus comprising: reduced image generation means for generating reduced image information obtained from the image information; and defect extraction means for extracting defects on the inspection object using the reduced image information. is there.

  Further, the present invention captures an inspection object and generates two-dimensional image information, and generates reduced image information obtained by reducing an image size from an image corresponding to the image information from the image information. And a step of extracting defects on the inspection object using the reduced image information.

  According to the present invention, the defect is extracted using the reduced image information whose image size is reduced as compared with the image corresponding to the original image information. Therefore, it is possible to perform the defect inspection at a high speed while suppressing an increase in cost. Is obtained.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In order to perform high-speed defect inspection without complicating the inspection method, it is desirable to detect defects by extracting only information necessary for inspection from input information. Defect detection does not necessarily require the entire high-definition image information. For example, a plurality of adjacent pixels are converted into one pixel (thinned to be converted into a representative pixel, average luminance of adjacent pixels, etc.) It is considered that high-speed defect inspection can be realized by reducing the amount of information by extracting only necessary information based on the spatial frequency.

  However, it is desirable to reduce the information amount while maintaining the accuracy of the defect detection because the information of the defect itself may be lost if the information amount is simply reduced, thereby deteriorating the accuracy of the defect detection. . In the following embodiments, various methods for reducing the amount of information while maintaining the accuracy of defect detection will be described.

(First embodiment)
First, a first embodiment of the present invention will be described. In the present embodiment, the present invention is applied to an inspection apparatus that performs an automatic macro inspection in a photolithography process of a semiconductor wafer. The photolithography process mainly includes a process of using a coater for applying a resist, a stepper for baking (exposure) of a pattern, and a developer for developing, and is a process of transferring a circuit pattern to the resist.

  FIG. 1 shows a configuration of a substrate inspection apparatus 1 (defect inspection apparatus) that performs a macro inspection on a semiconductor wafer to which a circuit pattern is transferred in a photolithography process. The substrate inspection apparatus 1 performs defect inspection (defect detection, defect classification, determination of pass / fail of the entire chip and substrate, etc.) when a substrate (semiconductor wafer) to be inspected (not shown) is inserted, and generates an inspection result The inspection result information to be output is output.

  When performing a macro inspection, first, illumination light is applied with the substrate tilted, and the reflected light is received by a one-dimensional line sensor to obtain image information. Specifically, two-dimensional “image information” is generated by arranging the one-dimensional image information sequentially acquired from the line sensor while moving the substrate transport system or imaging system such as a stage “relatively”. . Then, defect inspection is performed on the two-dimensional image information.

  This defect inspection is performed by the following information transmission. The apparatus control unit 11 has a function of performing internal control of the substrate inspection apparatus 1. First, the apparatus control unit 11 receives control information aa including information indicating that a substrate to be inspected is loaded into the substrate inspection apparatus 1. Receive. The control information aa is output from, for example, a manufacturing process management apparatus (not shown) that manages the entire manufacturing process of the semiconductor wafer.

  Upon receiving the control information aa, the apparatus control unit 11 issues an instruction to prepare for substrate loading to the illumination system control unit 13, the imaging sensor control unit 14, and the stage control unit 17. The apparatus control unit 11 handles bidirectional information such as illumination control information cc with the illumination system control unit 13, imaging sensor control information dd with the imaging sensor control unit 14, and stage control information ee with the stage control unit 17. Each of these control units prepares for defect inspection of the substrate, and sends information indicating that “inspection preparation is complete” to the apparatus control unit 11.

  Upon receiving the notification of “inspection preparation completion” from each control unit, the apparatus control unit 11 provides the illumination system control unit 13, the imaging sensor control unit 14, and the stage control unit 17 for acquiring image information. Instruct to perform processing. Specifically, the illumination system control unit 13 designates the illumination light amount or the like by the illumination information ff to the illumination unit 15 and irradiates the substrate with illumination light. Further, the stage control unit 17 outputs the stage drive information hh to the inspection stage 18, so that the inspection stage 18 on which the substrate to be inspected is mounted can be moved in the one-dimensional direction in which the pixels of the imaging sensor 16 are arranged. Drive in the vertical direction. The stage drive information hh includes information such as initial speed, acceleration, and arrival speed during driving.

  Then, the imaging sensor control unit 14 instructs the imaging sensor 16 to perform imaging using the imaging information gg, and generates image information for one line. The imaging information gg includes information such as the exposure time and gain at the time of imaging and the line transfer timing. The image information for one line acquired by the image sensor 16 is sent as line image information kk to the image processing unit 19 which is a main part of the present invention.

  While the image information is acquired, the manufacturing process / product information acquisition unit 12 obtains the inspection object information bb including information on the current inspection object, for example, information such as the manufacturing process and the product, as “information necessary for the inspection”. Receive from manufacturing process management device. The manufacturing process / product information acquisition unit 12 converts the inspection object information bb into information that can be used in the subsequent defect inspection, for example, information on the product is designed for semiconductor wafer design information (wafer chip and shot size, interval, For example, a vertical / horizontal arrangement position). The converted information is sent to the image processing unit 19 as inspection manufacturing process / product information mm.

  When the image processing unit 19 recognizes that the acquisition / storage of the line image information kk has been completed, the image processing unit 19 sends information indicating “image information acquisition completion” to the apparatus control unit 11 as the image storage control information nn. Upon receiving the information, the apparatus control unit 11 outputs control information indicating that image acquisition is complete to the illumination system control unit 13, the image sensor control unit 14, and the stage control unit 17, and completes the operation for image acquisition.

  Then, the apparatus control unit 11 sends information indicating “start image inspection” to the image processing unit 19 as image storage control information nn. The image processing unit 19 performs processing described later and outputs inspection result information pp. By sending the inspection result information pp to the manufacturing process management apparatus, the manufacturing process management apparatus recognizes that the inspection of the substrate on the inspection stage 18 has been completed, and performs processing for completion of the inspection, such as discharging the substrate. The board inspection apparatus 1 is instructed.

  Next, the configuration and operation of the image processing unit 19 will be described with reference to FIG. The image capturing unit 21 acquires / stores the line image information kk, and when imaging is completed (acquisition / acquisition of image information for a predetermined number of lines is completed), Image storage control information nn indicating that is sent to the apparatus control unit 11. Subsequently, when the image storage control information nn indicating “image inspection start” is received from the apparatus control unit 11, the inspection process is started.

  At this time, the image capturing unit 21 combines the image information of each line to generate two-dimensional image information related to the inspection board. The image capturing unit 21 also performs image processing related to correction of the imaging system, such as noise removal processing, shading correction for correcting brightness, and distortion correction for correcting geometric distortion, with respect to the line image information kk. Do.

  The 2D image information generated by the image capturing unit 21 is sent to the DWT processing unit 22 as 2D image information rr. The DWT processing unit 22 generates reduced scale image information ss in which the image scale (image size, in other words, the number of pixels constituting the image) is reduced by a discrete wavelet transform (hereinafter referred to as DWT) described later. Output. The reduced scale image information ss is not limited to information for forming one image, but includes information for forming a plurality of images according to frequency components.

  The reduced scale image information ss output from the DWT processing unit 22 is sent to the inspection frequency image selection unit 23. The inspection frequency image selection unit 23 determines whether the subsequent processing is performed on the reduced scale image information ss constituting the image or the scale is reduced again, and selects necessary image information. As for the selection criteria, the inspection process / product information mm output from the production process / product information acquisition unit 12 includes the order to be subjected to the subsequent processing (here, the number of times reduced by the DWT process). 1 or more frequency components are set, and image information is selected based on the set contents.

  The image information selected as described above is output as selected image information tt. The selected image information tt is not limited to one image information. In addition, it is possible to distinguish whether the target of the selected image information tt is image information sent again to the DWT processing unit 22 in the subsequent processing or image information to be inspected. Information representing the subsequent processing is output as switch switching information uu.

  The switch 24 receives the switch switching information uu and determines the destination of the selected image information tt. If the contents of the switch switching information uu indicate processing in the DWT processing unit 22 again, the switch 24 outputs the selected image information tt to the DWT processing unit 22 again as the reduced two-dimensional image information yy. Switch. The DWT processing unit 22 receives the input of the reduced two-dimensional image information yy and performs DWT processing again on the reduced two-dimensional image information yy. On the other hand, if the content of the switch switching information uu indicates the start of the defect inspection process, the switch 24 switches the output destination so as to send the selected image information tt to the defect detection unit 25 as the inspection target image information ww.

  The defect detection unit 25 performs defect detection processing on the inspection target image information ww. The defect detection unit 25 also receives the inspection manufacturing process / product information mm output from the manufacturing process / product information acquisition unit 12. Here, the inspection manufacturing process / product information mm includes design information (for example, chip / die size, adjacent chip / die spacing, number of chips / die, multiple chips / die) regarding the semiconductor wafer to be inspected. Number of shots, wafer diameter, etc.), reference image information registered for defect detection at the time of prior inspection condition (recipe) setting (information of an image obtained by imaging an inspection object having no defect), wafer An ID number for identification is included.

  In particular, the reference image information has the same order (same image scale) and the same frequency component as the inspection target image information ww so that appropriate defect detection can be performed. In the present embodiment, a known method is used in which the reference image information and the inspection target image information ww are compared and a different portion is detected as a defect. The result of the defect detection process is output as defect detection information xx. The defect detection information xx includes the presence / absence of a defect in the inspection object image information ww, the position of the defect on the image, the area, the ferret diameter (width / height of the circumscribed rectangle of the defect), the perimeter ( The length of the outline of the defect), the roundness (a numerical value expressed by comparing the complexity of the defect shape with the circle), and the like.

  The defect classification / determination unit 26 includes defect detection information xx output from the defect detection unit 25, two-dimensional image information rr output from the image capture unit 21, and inspection output from the manufacturing process / product information acquisition unit 12. In response to the input of the manufacturing process / product information mm, the classification of the detected defect and the non-defective / defective product determination regarding the inspection object are performed. In the defect classification process, in addition to the defect detection information xx, two-dimensional image information rr that is information of the original image of the inspection is used. That is, a portion corresponding to a defect in the defect detection information xx is analyzed in more detail using the two-dimensional image information rr, and an accurate classification is performed.

  The defect classification processing in this embodiment is based on the rule for determining the classification contents (those stored in advance), not only the defect feature amount (not only the feature amount indicated by the defect detection information xx) but also the two-dimensional image information rr. Among them, the matching degree of each rule is calculated from the feature amount calculated from the location corresponding to the defect), and the classification of the rule that maximizes the matching degree is applied. This rule uses, for example, a defect area and a ferret diameter as a feature representing a classification “scratch”, and when the area is small and the ferret diameter is long (one diameter is longer than the other), The content of “scratches” is quantified. The smaller the defect area and the longer the ferret diameter (the ratio of the vertical and horizontal ferret diameters is larger or smaller than 1), the greater the degree of conformity of “scratches”.

  The classification process is not limited to this method. For example, the contents disclosed in Japanese Patent Application Laid-Open No. 2003-168114 (the classification accuracy is determined by excluding those in which the classification type is determined for a certain defect from the defect information. And the like (which applies a classification rule using fuzzy inference) may be used. The number of classification contents to be determined is not limited to one, and a plurality of classification contents may exist depending on the degree of fitness. It should be noted that the rules for determining the classification contents can be updated (adding new rules, modifying or deleting existing rules) in order to cope with the contents of inspection and changes with time of the board.

  In addition, the non-defective / defective product determination process for the inspection object is based on the defect detection information xx, the classification content determined immediately before, the wafer design information included in the manufacturing process / product information mm for inspection, etc. The non-defective product / defective product for each chip / die is determined, and the non-defective product / defective product as the inspection substrate is determined.

  Each chip / die is determined according to the presence / absence of a defect, or when there is a defect, according to a condition (threshold value, etc.) for discriminating a good / defective product set in advance from a feature amount, classification content, or the like. The condition is, for example, when the defect area is 20% or more of the chip / die size or the classification content is critical to the function of the chip / die (such as shot defocus). For example, the chip / die is regarded as a defective product. By this determination, whether or not the subsequent processing is possible for the chip / die which is a preset inspection region is determined.

  In addition, regarding the wafer, based on the determination result of each chip / die, if the chip / die determined to be defective is a preset condition, for example, 10% or more of all chips / dies, it is defective. If not, the determination is made according to a condition such as determining a non-defective product. Based on this determination, whether or not a subsequent process can be performed on the wafer that is the inspection object is determined.

  FIG. 3 shows a state of determination regarding the chip / die. FIG. 3A shows an image of wafer image information 31 obtained by imaging the wafer 31a to be inspected, and 32 chips / dies 32 are arranged. The diameter of the wafer 31a is 300 mm, and the size of the chip / die 32 is 40 mm long × 40 mm wide.

  There are three defects 33a, 33b, 33c on the wafer 31a. Of these, the defect 33a extends over six chips / dies, and most of the four chips / dies are filled with defects. According to the above-mentioned criteria for determining good / defective chip / die (defective if the defect area is 20% or more of the chip / die size), the four chips / dies that are mostly filled with defects are not acceptable. Judged as good.

  On the other hand, a chip / die having a slight defect 33a and a chip / die having defects 33b and 33c are determined as non-defective products according to the above-mentioned non-defective / defective product determination conditions because the defect area is small. The The chip / die determination result map 34 in FIG. 3B shows the determination result of non-defective / defective products of each chip / die. In the chip / die determination result map 34, the non-defective product determination is indicated as “◯” and the defective product determination is indicated as “x” for each chip / die.

  Further, by integrating the chip / die determination results, it is possible to determine whether the wafer 31a is good or defective. According to the above-mentioned criteria for determining good / defective wafers (defective products if 10% or more of all chips / dies), 4 chips / dies out of 32 are defective products, that is, the ratio of defective products is 12.5%. Therefore, the wafer 31a is determined as a defective product.

  When the defect classification / determination process in the defect classification / determination unit 26 ends, inspection result information pp is generated and output from the defect classification / determination unit 26. The inspection result information pp includes all information related to the inspection result. This includes not only defect detection information xx on defect characteristics, classification / judgment results, but also inspection time, unique ID of inspection device, wafer identification ID number obtained from inspection manufacturing process / product information mm (inspected) Substrate (wafer) unique ID) and the like are also included.

  FIG. 4 shows the format of the contents of the inspection result information pp related to the wafer 31a in FIG. In FIG. 4, the inspection end time, the inspection apparatus ID, the wafer ID, the number of defects, and the wafer determination result are set as items common to the substrate inspection. Also, as information on each defect, the defect position, defect area, defect ferret diameter, defect classification content, suitability of classification content, chip / die position (Index) corresponding to the defect, and chip / die determination result Is set according to the number of defects.

  Here, the defect position and the chip / die position (Index) are shown in a coordinate system with the upper left as the origin. In the notation of the format of FIG. 4, one row is information related to one defect, but there is a defect 33a for a defect straddling a plurality of chips / dies, for example, the defect 33a of FIG. The position of the chip / die and each determination result are expressed as separate lines (on the other hand, duplicate information is not output). Similarly, when there are a plurality of classification contents (the degree of matching of the contents “not applicable” is the highest) as in the case of the defect 33c, the respective classification contents are represented as separate lines.

  Next, a detailed operation procedure of the substrate inspection apparatus 1 according to the present embodiment will be described. FIG. 5 shows a processing procedure inside the substrate inspection apparatus 1 and inside the image processing unit 19. The process shown in FIG. 5 is a process that is performed from the state in which the substrate has already been carried into the substrate inspection apparatus 1 to immediately before the substrate that has been inspected is unloaded from the substrate inspection apparatus 1.

  First, according to an instruction (inspection preparation instruction) from the apparatus control unit 11, the illumination system, the imaging system, and the stage are ready for inspection (step S11). Upon completion of inspection preparation (inspectable state) for the illumination system, the imaging system, and the stage, the apparatus control unit 11 places the inspection substrate to be inspected on the inspection stage 18, and the inspection stage 18 is flat. While driving in the direction (direction perpendicular to the one-dimensional direction in which the pixels of the image sensor 16 are arranged), control for acquiring inspection image information is performed (step S12).

  When the apparatus control unit 11 is notified that imaging of the entire wafer as the inspection substrate has been completed (image information from the image sensor 16 is sent to the image processing unit 19), an instruction from the apparatus control unit 11 The image capturing unit 21 generates two-dimensional image information rr (Step S13). Subsequently, the DWT processing unit 22 receives the two-dimensional image information rr (or reduced reduced two-dimensional image information yy), performs DWT processing, and outputs one or more reduced scale image information ss having a frequency component designated in advance. Generate (step S14).

  The inspection frequency image selection unit 23 receives the reduced scale image information ss, selects reduced scale image information to be used in the subsequent processing, and outputs it as selected image information tt (step S15). The switch 24 checks whether or not the reduced scale image information output as the selected image information tt is a defect inspection target (step S16). If the reduced scale image information is subject to defect inspection (Yes in step S16), the process proceeds to step S18, and if not (in the case of No in step S16), the process proceeds to step S17.

  In step S16, if the reduced scale image information is not the object of defect inspection, the switch 24 sets the selected image information tt so that the DWT process can be applied to the selected image information tt determined in step S16. The reduced two-dimensional image information yy is set (step S17). Thereafter, the process proceeds to step S14, and DWT processing is performed on the reduced two-dimensional image information yy.

  In step S16, if the reduced scale image information is a defect inspection target, the switch 24 sets the reduced scale image information as inspection target image information ww in accordance with an instruction from the apparatus control unit 11. The defect detection unit 25 performs defect detection processing on the inspection target image information ww using reference image information including the same order (the number of executions of the DWT process and the reduction scale are the same) and the same frequency component as the inspection target image information ww. Then, defect detection information xx is generated (step S18).

  The defect classification / determination unit 26 performs defect classification processing on the defects detected in the defect detection processing using the original two-dimensional image information rr together with the defect detection information xx generated in step S18 (step S19). Further, the defect classification / determination unit 26 uses the defect detection information xx, the two-dimensional image information rr, the defect feature amount information obtained in step S19, the defect classification result, and the like to obtain a chip / die unit and a wafer. A non-defective / defective product determination process is performed for each unit (step S20).

  After the non-defective / defective product judgment process, in addition to various information (features, classification results, good / defective product judgment results) related to the defects generated so far, the inspection time, inspection device ID, and inspection board In addition to inspection information such as an ID of a wafer, the defect classification / determination unit 26 generates inspection result information pp according to the format shown in FIG. 4 (step S21). Finally, the inspection result information pp is output from the defect classification / determination unit 26 and transmitted to the manufacturing process management apparatus, and a substrate inspection end process (preparation for substrate unloading, etc.) is performed (step S22). The process of FIG. 5 relates to one inspection substrate, and by repeating this, the substrate is sequentially inspected.

  Next, details of processing performed by the DWT processing unit 22 will be described. The DWT processing unit 22 performs multi-resolution analysis of an image by discrete wavelet transform (DWT). FIG. 6 shows an example in which the wafer image information 31 shown in FIG. 3 (the image of the wafer 31a having three defects) is targeted. The multi-resolution analysis of the image by the discrete wavelet transform means that the original image information is low frequency component image information, horizontal high frequency component image information, vertical high frequency component image information, diagonal high frequency component image information, This is a method of converting into four kinds of reduced scale image information having different frequency components.

  The generated reduced scale image information can be further applied to multiresolution analysis. Furthermore, reversible conversion that completely restores image information before conversion from the reduced scale image information of each converted frequency component is also possible. Multi-resolution analysis is also called a pyramid algorithm because it can convert the resolution without changing the dimension of the image, and is used in JPEG 2000 image compression technology.

  When multi-resolution analysis is performed on the wafer image information 31 by discrete wavelet transform, the image information 31-LL1 of the low frequency component, the image information 31-HL1 of the high frequency component in the horizontal direction, and the image information 31 of the high frequency component of the vertical component Four types of image information are generated: -LH1, image information 31-HH1 of the high-frequency component of the diagonal component. The state of the image before and after conversion is shown in FIG. Each of the converted images has a width and height that are halves of the original image with respect to the scale of the image, and is positioned as a primary frequency component image.

  Since the image information 31-HL1 is a high frequency component in the horizontal direction, a portion having a strong contrast in the horizontal direction is brightened, and since the image information 31-LH1 is a high frequency component in the vertical direction, the contrast in the vertical direction is high. Strong areas become brighter. On the other hand, since the image information 31-HH1 is a high frequency component in the diagonal direction, for example, a corner (corner) in a rectangular figure becomes bright.

  Further, when multi-resolution analysis is performed on the low-frequency component image information 31-LL1 by discrete wavelet transform, the low-frequency component image information 31-LL2 and the horizontal high-frequency component are obtained as secondary frequency component image information. Four types of reduced scale image information are generated: component image information 31-HL2, vertical high-frequency component image information 31-LH2, and diagonal high-frequency component image information 31-HH2.

  Both of these are 1/2 in width and height with respect to the image information 31-LL1 of the low frequency component in terms of the image scale, that is, both the width and height are 1/4 with respect to the original image. . At this time, in the image information 31-LL2 of the low frequency component, information on the defect 33b and the defect 33c (a defect having a very small area with respect to the original image) existing in the lower right of the wafer 31a is lost. There is a possibility that it cannot be detected. However, in the image information 31-HL2 of the high-frequency component in the horizontal direction and the image information 31-LH2 of the high-frequency component of the vertical component, there is a high possibility that these defects remain in a detectable state.

  FIG. 8 shows an example of defect detection by image comparison using reduced scale image information for each frequency component generated by the multiresolution analysis described above. Here, the reference image information 41 used for defect detection is also generated as reduced scale image information based on the above-described method in advance inspection condition (recipe) setting. That is, when the primary frequency component image is used for defect detection, the low-frequency component image information 41-LL1, the horizontal high-frequency component image information 41-HL1, and the vertical component high-frequency component image are used as reference image information. One or more of the four types of reduced scale image information, that is, the information 41-LH1 and the image information 41-HH1 of the high-frequency component of the diagonal component are held.

  Also for the wafer image information 31, frequency component images (image information 31-LL1, 31-HL1, 31-LH1, 31-HH1) of the same order as the reference image information are generated. Then, after alignment (matching) with the reference image information is performed, images having the same frequency component as the reference image information are compared. Then, as a defect detection result, low frequency component image information 51-LL1, horizontal high frequency component image information 51-HL1, vertical high frequency component image information 51-LH1, diagonal component high frequency component image information Four types of results, 51-HH1, are obtained (actually, it is obtained for the frequency component held as reference image information). If all the frequency components are used, the processing time is not much different from the comparison between the original images. For example, the horizontal and vertical high frequency components are examined, or the secondary frequency components are generated from the primary low frequency components. If it is used, the processing time for defect detection can be greatly reduced.

  As shown in FIG. 8, the defect 33b and the defect 33c can be detected in the same manner as the defect 31a. However, in the case of a defect that is even smaller than the defect 33c, it may be possible that the low-frequency component cannot be detected. In addition, if the secondary frequency component shown in FIG. 6 is to be used, the defect 31c is not observed in the low frequency component, so that the defect may be overlooked. On the other hand, in the high-frequency component, the “contour” of the portion that seems to be a defect is detected rather than the entire defect. This is the same even when a secondary frequency component is used.

  Here, as a feature of the present embodiment, with regard to defect detection, by using as little information as possible, it is devoted to finding a “possibly suspected defect”, and for the detected defect, the original image information Is used to investigate in detail, "What is it really a defect? If it is a defect, what are the characteristics and what type?" The process of calculating and classifying feature amounts is performed when a defect exists, but defect detection is performed for all inspection objects, so reducing this time can reduce the inspection time throughput. It is reflected in.

  As described above, in the present embodiment, reduced-scale image information in which the image size (image scale) is reduced as compared with the image corresponding to the original image information is generated by using multiresolution analysis based on discrete wavelet transform. Then, by performing defect detection by comparing the reduced scale image information with the reference reduced scale image information for comparison, the inspection time can be reduced as compared with the case of performing defect inspection on the original two-dimensional image information, Defect inspection can be performed at high speed. In addition, even for defect inspection using high-definition image information with low resolution, a complicated system configuration that requires cost is unnecessary, and an increase in cost can be suppressed.

  In addition, in order to generate a plurality of reduced scale image information by paying attention to the frequency component of the two-dimensional image information, for example, information on a defect having a high frequency component such as a foreign object or a scratch, and information on a defect having a strong low frequency component such as film unevenness Can be obtained as separate reduced-scale image information. Furthermore, since the reduced scale image information depends on the frequency component, the “quality” (= defect detection capability) equivalent to that when performing defect inspection using the original two-dimensional image information can be maintained. .

  The multi-resolution analysis is an analysis method represented by the discrete wavelet transform described in the present embodiment. The image information is decomposed into a high-frequency component and a low-frequency component, and the obtained high-frequency component or low-frequency component is further converted into a high-frequency component. A process of resolving information into a high frequency component and a low frequency component is repeatedly performed, such as decomposing into a component and a low frequency component. Thereby, the reduced scale image information divided | segmented from the viewpoint of the high frequency component and the low frequency component can be obtained. Further, since the frequency component can be repeatedly decomposed, it is possible to obtain reduced scale image information with a further reduced scale, thereby further reducing the inspection time.

  Further, in the present embodiment, reference image information (captured inspection object having no defect) is generated by the same method as the reduced scale image information of the inspection object used in defect inspection, and the resolution of both is the same. Become. As a result, even when the scale is reduced, it is possible to perform a defect inspection that maintains the same defect detection accuracy and accuracy as when the original image information was used.

  In addition, detailed defect inspection can be performed by making the inspection result information the feature amount related to the defect detected in the defect inspection, the classification result indicating what the defect is, and the pass / fail judgment result regarding the inspection area and inspection object. It can be carried out.

  In the present embodiment, four types of reduced scale image information are generated by one DWT process of the DWT processing unit 22. When the defect detection unit 25 performs the process of extracting defects on the inspection object individually for each reduced scale image information, the defect inspection is performed using each reduced scale image information generated for each frequency component. By doing this, inspection for high-frequency component defects such as scratches and foreign matter and inspection for low-frequency component defects such as film unevenness can be performed in separate processing systems, and the frequency component of the reduced scale image information Test result information specialized in information can be obtained.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. Hereinafter, only different points from the first embodiment will be described. FIG. 9 shows the configuration of the image processing unit 19 in the substrate inspection apparatus 1 according to the present embodiment. The difference from the first embodiment (FIG. 2) is that a density morphology processing unit 61 is provided in place of the DWT processing unit 22.

  The light and shade morphology processing unit 61 performs light and dark morphology processing described later on the two-dimensional image information rr, and outputs the processing result as inspection target image information ww. The manufacturing process / product information mm for inspection input together with the two-dimensional image information rr includes settings related to morphological calculations (information on the number of expansion / contraction operations, information to be output after processing, etc.) set as inspection conditions in advance. It is.

  Hereinafter, the light and shade morphology process in this embodiment will be described. FIG. 10 shows a light and shade morphology process for one-dimensional image information, and the original image information in FIG. 10A has light and dark information. For example, if the size of the filter in the morphological operation is 3 pixels, Dilation is an operation that replaces each pixel with the maximum luminance among the 3 pixels in the filter, and Erosion is similarly 3 in the filter. This is an operation for replacing the pixel with the minimum luminance.

  By repeating the morphological operation, the effect of expansion / contraction increases. For example, when the number of morphological operations is 3, the result of the Dilation operation with respect to FIG. 10A is as shown in FIG. 10B, and the information in the dark portion disappears at the same time as the bright portion information spreads. Similarly, the result of the erosion (shrinkage) calculation is as shown in FIG. 10C, and the information on the dark part spreads and the information on the bright part disappears.

  When the scale conversion for reducing the information of FIGS. 10A to 10C to 1/2 is performed, the information is as shown in FIGS. 10D to 10F, respectively. The information in FIG. 10 (a) is as shown in FIG. 10 (d), and the information disappears due to the reduction in scale in both the bright and dark portions. On the other hand, the information in FIG. 10B is as shown in FIG. 10E, and is information in which the bright portion is maintained. Further, the information in FIG. 10C is as shown in FIG. 10F, and is information in which the dark part is maintained. That is, by using the information shown in FIGS. 10E and 10F, it is possible to generate reduced scale image information that maintains the contrast of the original image.

  11 to 13 are obtained by applying the same calculation as in FIG. 10 to two-dimensional image information (wafer image information) obtained by imaging a wafer. When the scale conversion for reducing the image information of FIG. 11A to 1/2 is performed, the image information is as shown in FIG. Comparing FIG. 11 (a) and FIG. 11 (b), the white defect 65a barely remains, but the small black defect 65b has disappeared.

  On the other hand, when scale conversion which reduces to 1/2 is performed on the image information in FIG. 12A (the image information in FIG. 11A subjected to Dilation operation), FIG. As shown in FIG. 11B, the white defect 66a maintains a sufficient size as compared with the white defect 65a in FIG. Further, when scale conversion is performed to reduce the image information of FIG. 13A (the image information of FIG. 11A is subjected to Erosion calculation) to 1/2, FIG. As shown in FIG. 11B, the small black defect 67b disappeared in FIG. 11B is maintained. By using the image information of FIG. 12B and FIG. 13B, the amount of information is reduced by half compared to the original image information (FIG. 11A), and the contrast is changed to the original image. It can be maintained in the same state.

  Next, a detailed operation procedure of the substrate inspection apparatus 1 according to the present embodiment will be described. FIG. 14 shows a processing procedure inside the board inspection apparatus 1 and inside the image processing unit 19 according to the present embodiment. Steps S31 to S33 and steps S37 to S40 are the same as steps S11 to S13 and steps S19 to S22 shown in FIG.

  The light and shade morphology processing unit 61 performs the light and shade morphology operation on the two-dimensional image information rr generated by the image capturing unit 21 by the number of repetitions set in the inspection manufacturing process / product information mm, and obtains intermediate information. Generate (step S34). The intermediate information is information on a Dilation calculation result shown in FIG. 12A, information on an Erosion calculation result shown in FIG.

  Subsequently, the light and shade morphology processing unit 61 generates reduced scale image information that is a defect inspection target from the intermediate information, and outputs this as inspection target image information ww (step S35). The defect detection unit 25 performs defect detection processing based on chip / die unit comparison on the inspection target image information ww output from the density morphology processing unit 61 in accordance with an instruction from the apparatus control unit 11, and detects defect detection information. xx is generated (step S36). Other processing is as described above.

  In FIG. 14, one inspection target image information ww generated by repeating the density morphological operation for a preset number of repetitions is a target for defect inspection, but a plurality of inspections with different numbers of repetitions of the density morphological operation are performed. The target image information ww may be generated and may be a target for defect inspection.

  Here, FIG. 15 shows an example of defect detection based on chip / die unit comparison. For the wafer image information 71, inspection chip / die information 72 as an inspection unit is generated. The inspection chip / die information 72 is generated from the wafer image information 71 based on the wafer design information, and a plurality of chip / die areas in the wafer image information 71 are taken out and averaged. The area (area consisting of average luminance and distributed luminance) is used as inspection chip / die information 72. At this time, since it is considered that the wafer image information 71 includes a defect, not only the average luminance of a plurality of chip / die regions but also the distributed luminance is used.

  The density morphology processing unit 61 performs density density processing and 1/2 reduction scale conversion on the wafer image information 71 to generate image information (Dilation image information 73a, Erosion image information 73b) for defect inspection. Thereafter, the inspection area is set so that only the chip / die on the wafer is set as the inspection area (the chip / die area is set by alignment from the wafer design information), and the inspection area image information (Dilation image information 74a is set). , Erosion image information 74b) is generated.

  With respect to the generated inspection area image information, inspection chip / die information 72 is generated from its own chip / die area, and the defect detection unit 25 converts the inspection chip / die information 72 and the inspection area image information into chip / die information. Defect detection processing for comparison in units of dies is performed, and defect detection result information 75a and 75b is generated. Here, in defect detection result information 75a from Dilation, white defect 76a in wafer image information 71 is set as white defect 77a, and in defect detection result information 75b from Erosion, minute black defect 76b in wafer image information 71 is set as black defect 77b. Each can be detected appropriately.

  As described above, in the present embodiment, the reduced-scale image is generated by generating the information that maintains the frequency component of the original two-dimensional image information even if the scale is reduced by using the density morphological operation, and reducing the generated information. Generate information. As a result, reduced scale image information is obtained in which minute defects that remain in normal reduction (such as averaging of adjacent pixels) remain.

  By performing defect detection using the reduced-scale image information, it is possible to perform defect inspection at a high speed while suppressing an increase in cost compared to the case of performing defect inspection on the original two-dimensional image information. Further, since the reduced scale image information depends on the frequency component, the “quality” (= defect detection capability) equivalent to the case where defect inspection is performed using the original two-dimensional image information can be maintained. . Furthermore, it is not necessary to separately prepare reference information by performing defect detection by chip / die comparison of the wafer itself.

(Third embodiment)
Next, a third embodiment of the present invention will be described. Hereinafter, only portions different from the first and second embodiments will be described. FIG. 16 shows the configuration of the image processing unit 19 in the substrate inspection apparatus 1 according to the present embodiment. The difference from the first embodiment (FIG. 2) is that a block dividing unit 81, a block corresponding pixel information determining unit 82, and a switch 83 are provided in place of the DWT processing unit 22.

  The block division unit 81 performs division processing on the two-dimensional image information rr into a plurality of blocks described later, and outputs the processing result as block division image information zz. The block corresponding pixel information determination unit 82 determines corresponding pixel information of each block indicated by the block divided image information zz, and outputs the result as inspection target candidate image information aaa. One pixel of the image corresponding to the inspection target candidate image information aaa corresponds to one block of the block divided image information zz, and the luminance of each pixel is determined based on the average value of the luminance of the pixels in the block.

  The switch 83 determines whether to output the inspection target candidate image information aaa as the inspection target image information ww, or whether to output the reduced two-dimensional image information yy and perform the process of the block dividing unit 81 again. Judgment is made from switch switching information included in the inspection manufacturing process / product information mm. In this embodiment, the switch 83 can independently determine whether or not to output the inspection target image information ww and whether or not to output the reduced two-dimensional image information yy for processing by the block dividing unit 81 again. Like that. That is, a plurality of pieces of image information with different reduction scales are set as inspection targets.

  Hereinafter, the block division process will be described with reference to FIGS. 17 and 18. Here, with respect to one piece of image information, 2 × 2 pixels adjacent to each other are defined as one block, and the luminance information when the block is defined as one pixel is calculated from the luminance information of the 2 × 2 pixels. That is, an image with a 2 × 2 pixel block as one pixel is a reduced image whose scale is halved both vertically and horizontally with respect to the original image.

  Here, when determining the luminance information from the 2 × 2 block image, as shown in FIG. 17A, an operation for replacing the average luminance of the four pixels with the luminance information of the block corresponding pixel (general averaging) Then, it is expected that, for example, a minute defect having a size of only one pixel or two pixels will be at a level where the difference from the surroundings is not understood (= cannot be recognized as a defect). On the other hand, as shown in FIG. 17B, in the operation of replacing the luminance information of the pixel having the largest difference from the average of the luminance of the four pixels as the luminance information of the block corresponding pixel, a portion where the contrast is locally high In order to leave the contrast as it is, it is possible to generate a reduced image while leaving a minute defect that disappears in the method of FIG.

  That is, if the average luminance of a plurality of pixels is determined as the luminance of the pixels of the reduced scale image information as it is, reduced scale image information in which the high frequency component is weakened (in contrast, the low frequency component is maintained) can be obtained. On the other hand, if the variance between the average luminance and the luminance of the pixels in the block is observed, the variance increases in the block containing the high-frequency component of the minute defect. If attention is paid to this point, the pixel can be determined so as to have the information of the high frequency component, and the reduced scale image information in which the high frequency component is maintained can be obtained.

  When this is applied to the two-dimensional image information shown in FIG. 18A as an actual inspection image, the image of FIG. 18B obtained by the averaging operation of FIG. 17A is totally blurred. The image becomes a slight image, and the minute black defect 91 in FIG. 18A disappears due to the influence of averaging. On the other hand, the image of FIG. 18C obtained by the calculation of FIG. 17B maintains the contrast of the original image, and as a result, the minute black defect 91 in FIG. Compared with averaging, a reduced image suitable for defect detection can be obtained.

  Next, a detailed operation procedure of the substrate inspection apparatus 1 according to the present embodiment will be described. FIG. 19 shows a processing procedure inside the board inspection apparatus 1 and inside the image processing unit 19 according to the present embodiment. Steps S41 to S43 and Steps S49 to S52 are equivalent to Steps S11 to S13 and Steps S19 to S22 shown in FIG. 5, and Step S48 is equivalent to Step S36 of FIG. Omitted.

  The block division unit 81 generates the two-dimensional image information generated by the image capture unit 21 based on the setting information (block size, number of repetitions, etc.) of the block division process set in the inspection manufacturing process / product information mm. Block division of rr is performed, and block division image information zz is generated (step S44). The block-corresponding pixel information determination unit 82 calculates the average luminance for each block, performs the process of determining the luminance information of the pixel corresponding to the block by the above-described method using the calculation result, and inspects candidate image information aaa is output (step S45).

  The switch 83 checks whether or not there is an instruction to perform the processing in the block dividing unit 81 again as the reduced two-dimensional image information yy for the inspection target candidate image information aaa (step S46). If there is an instruction to perform the process in the block division unit 81 again (Yes in Step S46), the process proceeds to Step S47, and if not (No in Step S46), the process proceeds to Step S48.

  In step S46, when there is an instruction to perform the process again in the block division unit 81, the switch 83 checks the inspection target so that the block division processing can be applied to the inspection target candidate image information aaa output in step S45. Candidate image information aaa is set as reduced two-dimensional image information yy (step S47). Thereafter, the process proceeds to step S44, and block division processing is performed on the reduced two-dimensional image information yy. On the other hand, in step S46, when there is no instruction to perform the process in the block dividing unit 81 again, the switch 83 sets the inspection target candidate image information aaa as the inspection target image information ww. Other processing is as described above.

  In FIG. 19, it is possible to generate a plurality of inspection target candidate image information aaa having different image scales according to the number of repetitions of steps S44 to S45, and any of them can be a defect inspection target. Is possible.

  As described above, in the present embodiment, when dividing a two-dimensional image into blocks, luminance information that can maintain contrast using the average luminance in the block is used as luminance information of the block. Thereby, the reduced scale image information without losing the local contrast (= small defect) can be obtained.

  By performing defect detection using the reduced-scale image information, it is possible to perform defect inspection at a high speed while suppressing an increase in cost compared to the case of performing defect inspection on the original two-dimensional image information. Further, since the reduced scale image information depends on the frequency component, the “quality” (= defect detection capability) equivalent to the case where defect inspection is performed using the original two-dimensional image information can be maintained. .

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to these embodiments, and includes design changes and the like without departing from the gist of the present invention. . For example, although the substrate inspection method is macro inspection, it is not limited to macro inspection, and it is also applicable to inspection such as micro inspection using a microscope, especially micro inspection using high resolution and high definition images. be able to. Further, although a semiconductor wafer is used as a substrate, the present invention can be similarly applied to an FPD substrate.

It is a block diagram which shows the structure of the board | substrate inspection apparatus by the 1st Embodiment of this invention. It is a block diagram which shows the structure of the image process part with which the board | substrate inspection apparatus by the 1st Embodiment of this invention is provided. It is a schematic diagram which shows the mode of the chip / die determination in the 1st Embodiment of this invention. It is a reference figure which shows the format of the test result information in the 1st Embodiment of this invention. It is a flowchart which shows the procedure of operation | movement of the board | substrate inspection apparatus by the 1st Embodiment of this invention. It is a schematic diagram which shows the example of the multi-resolution analysis of the image by the discrete wavelet transform in the 1st Embodiment of this invention. It is a schematic diagram which shows the example of the image information produced | generated by the discrete wavelet transform in the 1st Embodiment of this invention. It is a schematic diagram which shows the example of the defect detection by the image comparison using the reduced scale image information for every frequency component in the 1st Embodiment of this invention. It is a block diagram which shows the structure of the image process part with which the board | substrate inspection apparatus by the 2nd Embodiment of this invention is provided. It is a schematic diagram for demonstrating the light and shade morphology process in the 2nd Embodiment of this invention. It is a schematic diagram which shows the image produced | generated by the light and shade morphology process in the 2nd Embodiment of this invention. It is a schematic diagram which shows the image produced | generated by the light and shade morphology process in the 2nd Embodiment of this invention. It is a schematic diagram which shows the image produced | generated by the light and shade morphology process in the 2nd Embodiment of this invention. It is a flowchart which shows the procedure of operation | movement of the board | substrate inspection apparatus by the 2nd Embodiment of this invention. It is a schematic diagram which shows the example of the defect detection in the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the image process part with which the board | substrate inspection apparatus by the 3rd Embodiment of this invention is provided. It is a reference diagram showing a method for determining a block corresponding pixel in the third embodiment of the present invention. It is a schematic diagram which shows the example of the image information produced | generated in the 3rd Embodiment of this invention. It is a flowchart which shows the procedure of operation | movement of the board | substrate inspection apparatus by the 3rd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Board | substrate inspection apparatus, 11 ... Apparatus control part, 12 ... Manufacturing process / variety information acquisition part, 13 ... Illumination system control part, 14 ... Imaging sensor control part, 15 ... Illumination unit, 16 ... imaging sensor (image generation means), 17 ... stage control unit, 18 ... inspection stage, 19 ... image processing unit, 21 ... image capture unit (image generation means) ), 22... DWT processing unit (reduced image generation means), 23... Frequency image selection unit for inspection, 24, 83... Switch, 25. ..Defect classification / determination unit (defect extraction means), 61... Shade morphology processing unit, 81... Block division unit, 82.

Claims (11)

Image generating means for imaging a test object and generating two-dimensional image information;
Reduced image generation means for generating, from the image information, reduced image information in which the image size is reduced from the image corresponding to the image information;
Defect extraction means for extracting defects on the inspection object using the reduced image information;
A defect inspection apparatus comprising:   The defect inspection apparatus according to claim 1, wherein the reduced image generation unit generates the reduced image information by discrete wavelet transform.   2. The defect according to claim 1, wherein the reduced image generation unit generates the reduced image information by reducing an image size of the image information generated by performing a light and shade morphology process on the image information. Inspection device.   The reduced image generation means divides an image corresponding to the image information into predetermined blocks, associates pixels of the image corresponding to the reduced image information with the block, and sets the luminance of the pixels to pixels within the block. The defect inspection apparatus according to claim 1, wherein the reduced image information is generated by making a determination based on an average value of the luminances.   The reduced image generation means determines the luminance of the pixel of the image corresponding to the reduced image information as the luminance that maximizes the difference from the average value among the luminances of the pixels in the block corresponding to the pixel. The defect inspection apparatus according to claim 4.   The reduced image generation means generates first reduced image information from the image information, and uses the first reduced image information obtained by reducing the image size as compared with the image corresponding to the first reduced image information. 6. The defect inspection apparatus according to claim 1, wherein the defect inspection apparatus is generated from reduced image information.   The defect extraction unit compares the reduced image information with reference image information having the same image size as the reduced image information generated by the reduced image generation unit, and extracts defects on the inspection object. The defect inspection apparatus according to any one of claims 1 to 6.   The defect extraction means, when a predetermined periodic pattern is formed on the inspection object, sets the inspection area corresponding to the periodic pattern as a unit, and image information of the inspection area that is different in the reduced image information The defect inspection apparatus according to claim 1, wherein defects on the inspection object are extracted.   When two or more pieces of the reduced image information are generated by the reduced image generating unit, the defect extracting unit performs processing for extracting defects on the inspection object individually for each of the reduced image information. The defect inspection apparatus according to claim 1, wherein the defect inspection apparatus is performed.   As a result of defect extraction by the defect extraction means, the position of the defect in the image corresponding to the image information, the area, the ferret diameter, the perimeter, the circularity, the classification result, the possibility of subsequent processing for a preset inspection region is determined. The defect inspection apparatus according to claim 1, comprising at least one of a determination result to be displayed and a determination result to indicate whether or not a subsequent process is possible for the inspection object. Imaging a test object to generate two-dimensional image information;
Generating reduced image information with a reduced image size from the image information than the image corresponding to the image information;
Extracting defects on the inspection object using the reduced image information;
A defect inspection method comprising:

Images