JP2008090693A - Ic card and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an IC card in which a plurality of chips are mounted like a function processing unit and a memory unit, and having high stress resistance, and to provide its manufacturing method. <P>SOLUTION: A first chip 6 and a second chip 7 each performing a predetermined signal processing are mounted by making their active surfaces opposed to one another so as to sandwich an antenna substrate 2, and the active surfaces of both chips are electrically connected by contacting a bump 22 with a bump 23 at the opposing surfaces. The other bump 26 of the first chip 6 is electrically connected to an antenna connection terminal 27, thereby the first chip 6 and an antenna wiring 4 are electrically connected. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an IC card and a method for manufacturing the same.

  Due to recent advances in semiconductor technology, miniaturization of portable communication devices or data communication devices has been remarkable, and IC cards are one of such miniaturized communication devices. At present, high-performance IC cards equipped with a payment function and the like have been put into practical use.

  Such a high-functional IC card is configured to have a large-capacity memory unit for recording various kinds of information including personal information such as a user's face photograph and fingerprints. On the other hand, since the personal information is information that requires strict handling, the IC card is usually equipped with a function processing unit that performs encryption processing and the like. That is, a high-function IC card is configured to include a large-capacity memory unit and a function processing unit, and by mounting them on one chip, the chip area increases compared to the conventional one.

  By the way, as for the IC card, there are both a contact type interface having a connection terminal and a non-contact type interface having no connection terminal as conventional forms of information exchange with a reader / writer device. Although it was necessary to use a compatible IC card, recently, with the expansion of the usage of IC cards, an IC card applicable to both interfaces, that is, an IC card applicable to a plurality of systems, is available. It has been demanded. When mounting such an IC card, it is necessary to mount a plurality of function processing units inside the card in order to support reader / writer devices of different systems. The chip area is expected to increase further.

  An IC card is a semiconductor device that is likely to be carried by a user at all times, and has a property that it is easily subjected to various stresses such as bending stress, torsional stress, and impact stress in an actual use environment. As the chip area increases, the chip mounted in the IC card is more susceptible to these various stresses, and the size thereof tends to increase. When such stress increases, there is a risk of causing problems such as chip damage and the failure of the IC card function.

  As described above, since the IC card has a characteristic that it is easily subjected to various stresses from the outside, various methods for protecting the chip mounted inside the IC card from the external stress have been conventionally provided (for example, patents). Reference 1 and Patent Reference 2).

JP 2005-4429 A JP 2005-234684 A

  According to the methods of Patent Document 1 and Patent Document 2, a reinforcing plate for protecting an IC chip is provided, and the IC chip is sealed with a resin layer or an adhesive layer to reduce impact stress on the IC chip from the reinforcing material. Thus, an IC card with increased resistance to external stress can be realized.

  However, for the IC card whose chip area is increased by mounting the function processing unit and the memory unit on one chip, the methods described in Patent Documents 1 and 2 do not provide an IC card having sufficient stress resistance. It may not be possible.

  In view of the above problems, an object of the present invention is to provide an IC card having a high stress resistance by mounting a plurality of chips such as a function processing unit and a memory unit, and a manufacturing method thereof.

  In order to achieve the above object, an IC card according to the present invention is an IC comprising a plurality of semiconductor chips for performing predetermined signal processing and antenna wires on an antenna substrate, and both surfaces of the antenna substrate are covered with a protective sheet. A first chip and a second chip of the plurality of semiconductor chips are mounted so that active surfaces face each other across the antenna substrate, and the active surfaces of both chips are electrically connected to the opposing surfaces. A first feature is that one of the first chip and the second chip is electrically connected to both ends of the antenna line.

  According to the first characteristic configuration of the IC card according to the present invention, since the active surfaces of the chips face each other inward, the active surfaces are bent, twisted or impact stressed from the outside. It becomes difficult to be affected by various stresses such as. Further, since the chip area can be reduced as compared with a configuration in which a plurality of chips are mounted on one chip, the amount of external stress can be reduced not only on the active surface but also on the entire chip. . This can prevent damage to the chip and ensure operational stability.

  In addition, since the active surface of the chip does not face outward, a connection point for electrically connecting both active surfaces can be interposed between the chips, so that the connection point is difficult to access from the outside. be able to. For this reason, it is difficult to steal signal information exchanged between both chips from the outside. Therefore, for example, even an IC card in which personal information or the like is recorded inside the chip is configured such that the personal information or the like cannot be easily stolen from the outside, so that the security of the card can be improved.

  In addition to the first characteristic configuration, the IC card according to the present invention has a configuration in which the first chip and the second chip each include an impact relaxation member on a surface opposite to the active surface. Is the second feature.

  According to the second characteristic configuration of the IC card according to the present invention, the impact applied to the chip from the outside is absorbed and alleviated by the impact mitigating member. Therefore, even when an impact is applied to the IC card from the outside, the impact is mitigated by the impact mitigating members formed on both surface sides of the IC card. The influence of the impact on the active surface of the chip formed on the opposite surface can be greatly suppressed.

  In addition to the first or second characteristic configuration, the IC card according to the present invention is characterized in that the first chip and the second chip are electrically connected by flip chip mounting. Features.

  According to the third characteristic configuration of the IC card according to the present invention, the opposed active surfaces can be electrically connected by a short connection means, and an increase in the thickness of the IC card can be suppressed. Further, as compared with the electrical connection by wire bonding mounting, the signal line does not come out of the chip, it becomes difficult to steal signals exchanged between the chips, and the security is improved.

  Further, in addition to any one of the first to third characteristic configurations, the IC card according to the present invention includes any one of the first chip and the second chip and the antenna line by flip chip mounting. The fourth characteristic is that they are electrically connected.

  According to the fourth characteristic configuration of the IC card according to the present invention, the antenna connection terminal electrically connected to the antenna line is provided on the antenna substrate, and the terminal and the active surface of any one of the chips are provided. By facing each other and electrically connecting them by flip chip mounting, the opposed active surfaces can be electrically connected by a short connecting means, and an increase in the thickness of the IC card can be suppressed. it can.

  The IC card according to the present invention is characterized in that, in addition to any one of the first to fourth characteristic configurations, the active surface of the second chip is completely covered by the first chip. It is characterized by.

  According to the fifth characteristic configuration of the IC card according to the present invention, access from the outside to the active surface of the second chip can be made more difficult. Accordingly, when a memory unit having various information recorded thereon is mounted on the second chip, it becomes difficult to access the information recorded in the memory unit from the outside, and the security of the IC card is increased. Will improve.

  Further, the IC card according to the present invention is characterized in that, in addition to the fifth characteristic configuration, the second chip has a memory unit for storing data.

  In addition to the sixth feature configuration, the IC card according to the present invention is configured such that the memory unit is a non-volatile memory, and the second chip is connected to the first chip when power is supplied. When a connection confirmation signal for confirming the electrical connection of the first chip is transmitted to the first chip and a response signal to the connection confirmation signal cannot be received from the first chip within a predetermined time, the memory section automatically receives the connection confirmation signal. A seventh feature is that it has a function of erasing recorded information.

  According to the seventh characteristic configuration of the IC card according to the present invention, even when the memory part in the second chip is exposed by intentionally applying an external impact to the IC card, the memory part When power is supplied from the outside to read information recorded in the memory, a connection confirmation signal is transmitted from the second chip to the first chip, and a response signal from the first chip is received even after a predetermined time has elapsed. After confirming that the information is not deleted, various information recorded in the memory section is automatically deleted, so that the information recorded in the memory section can be prevented from being stolen by a third party, and the security can be improved. Can be secured.

  The IC card according to the present invention, in addition to any one of the fifth to seventh features, is covered by the second chip in a surface facing the second chip. An eighth feature is that electrical connection points with both ends of the antenna line are formed in an unbroken region.

  According to the eighth characteristic configuration of the IC card according to the present invention, the occupied area occupied by the laminated chip formed by laminating the first chip and the second chip on the antenna substrate is defined as the chip area of the first chip. The chip area of the entire laminated chip can be made as small as possible. As a result, the amount of external stress on the entire chip can be reduced.

  Further, in the IC card according to the present invention, in addition to any one of the fifth to eighth characteristic configurations, the first chip includes a metallic reinforcing member on a surface opposite to the active surface. This is the ninth feature.

  According to the ninth characteristic configuration of the IC card according to the present invention, since the surface opposite to the active surface is reinforced by the metallic material, particularly, the resistance to impact stress from the outside is improved. In addition, it has a heat dissipation effect that dissipates heat generated by signal processing in the first chip, and the temperature rise in the chip and the entire IC card can be suppressed. Furthermore, it has the effect of protecting the chip by shielding electromagnetic waves and light applied from the outside, and increasing electromagnetic resistance and light resistance. In particular, when a microprocessor that performs various signal processing is mounted on the first chip, a metal member is formed on the non-active surface side opposite to the active surface of the first chip. Has the effect of dispersing the heat generation.

  In addition to the first chip, the second chip may have a metal reinforcing member on the surface opposite to the active surface.

  In addition to any one of the first to ninth feature configurations, the IC card according to the present invention is configured such that the first chip and the second chip are arranged at the center of the substrate on the plane of the antenna substrate. It is a tenth feature that it is arranged in a region excluding both on a line passing through the part and parallel to a side constituting the substrate and on a diagonal line constituting the substrate.

  By adopting a laminated chip configuration as in the device of the present invention, the chip area can be reduced as compared with a configuration in which a plurality of chips are mounted on one chip. A chip (the above-mentioned laminated chip) can be disposed on a region excluding a portion that is particularly susceptible to bending stress or torsional stress on the card. In general, since an IC card is carried by a user, it is easily subject to bending stress and torsional stress. This stress passes through the center of the card and is parallel to the card side, and the center of the card. Therefore, the stress resistance of the chip and its active surface can be improved by mounting the laminated chip on the area other than the area.

  An IC card manufacturing method according to the present invention is an IC card manufacturing method having any one of the first to tenth feature configurations described above, wherein an antenna is provided on the active surface side surface of the first chip. A first step of forming bumps for connection and inter-chip connection, and bumps for inter-chip connection on the active surface side surface of the second chip, and after completion of the first step, the first chip And a second step of temporarily attaching a thermosetting resin to the bump forming surface for each of the second chips, and after the second step, the first chip and the second chip are made to face the bump forming surfaces. And a third step of forming a laminated chip in which both chips are electrically connected by the inter-chip connection bumps, and after the completion of the third step, the antenna line, and the antenna line and the Electrical connection with the first chip Antenna connection terminals are attached, and the antenna connection bumps included in the first chip by attaching the multilayer chip to an antenna substrate having a gap portion in which the multilayer chip can be attached, and thermocompression bonding, and A fourth step of electrically connecting the antenna connection terminals; and a fifth step of sandwiching and laminating both sides of the antenna substrate on which the multilayer chip is mounted with the protective sheet after completion of the fourth step. It is characterized by that.

  According to the feature of the IC card manufacturing method according to the present invention, an IC card having high stress resistance and security can be effectively manufactured.

  According to the configuration of the present invention, an IC card having a plurality of chips and having high stress resistance can be realized.

  Hereinafter, an embodiment of an IC card according to the present invention (hereinafter referred to as “the present invention apparatus” as appropriate) and a manufacturing method thereof (hereinafter referred to as “the present invention method” as appropriate) will be described with reference to FIGS. I will explain. First, the configuration of the apparatus of the present invention will be described below with reference to FIGS. 1 and 2, and then the method of the present invention will be described with reference to FIGS.

[Description of Configuration of Invention Device]
The device of the present invention includes a memory unit (which may be composed of a nonvolatile semiconductor memory) for storing information therein, and is recorded in the memory unit by being connected to a reader / writer device. The information is read out, and new information is written or updated in the memory unit. That is, the device of the present invention includes a memory unit for storing information, and a function processing unit for performing various signal processes including processing for reading and writing information between the reader / writer device. Prepare inside.

  FIG. 1 is a schematic configuration diagram of the apparatus of the present invention. FIG. 1A is a schematic plan view of the IC card 1 according to the present invention device in a state in which a protective sheet covering both surfaces (upper and lower surfaces) of the antenna substrate 2 is removed. FIG. 1B is a schematic cross-sectional view taken along line X1-X2 in FIG. 1A in the overall configuration of the IC card 1 including the protective sheets 15 and 16. FIG.1 (c) is the enlarged view to which a part of FIG.1 (b) was expanded.

  As shown in FIG. 1B, the device 1 of the present invention is configured by covering the antenna substrate 2 and protective sheets 15 and 16 on both side surfaces sandwiching the antenna substrate 2. Further, as shown in FIG. 1A, on the antenna substrate 2, an antenna wire 4 formed in a circular shape that circulates on the surface of the substrate, and a laminate connected to both ends of the antenna wire 4. Chip 3 is mounted. The antenna wire 4 is formed in a circular shape on one surface of the antenna substrate 2, and both ends of the antenna wire 4 intersect the antenna wire 4 by jumper wires 5 on the surface opposite to the antenna wire forming surface. Connected without. In FIG. 1A, the jumper wire 5 is indicated by a broken line to indicate that the jumper wire 5 is a surface opposite to the surface on which the antenna wire 4 is formed.

  The device 1 of the present invention has a configuration in which a first chip 6 and a second chip 7 which are a plurality of semiconductor chips face each other with the antenna substrate 2 interposed therebetween. Both of these chips are configured such that surfaces on which elements are formed (hereinafter referred to as “active surfaces”) face each other, and both active surfaces are electrically connected. Further, the first chip 6 is electrically connected to both ends of the antenna wire 4.

  In the device 1 of the present invention, the first chip 6 has the function processing unit, and the second chip 7 has the memory unit. When the antenna line 4 receives an electrical signal from the reader / writer device, the received signal is given to the first chip 6. The function processing unit mounted on the first chip 6 performs predetermined processing according to the received signal. At this time, when reading the information stored in the memory unit, an electrical signal is given from the first chip 6 to the second chip 7 and the information recorded in the memory unit on the second chip 7 is stored. The data is read out and transmitted to the reader / writer device via the antenna line 4. When writing information to the memory unit, information to be written is transmitted as an electrical signal from the reader / writer device, and after the signal is converted into predetermined write information on the function processing unit, Information is written to the memory unit on the second chip 7.

  The first chip 6 has a reinforcing member 12 made of a metal material such as stainless steel or 42 alloy (iron-nickel alloy) on the side opposite to the active surface (hereinafter referred to as “inactive surface”). Therefore, the reinforcing member 12 improves the strength against various external stresses such as bending, twisting, and impact. The first chip 6 and the reinforcing member 12 are bonded and fixed by a urethane-based or silicon-based adhesive tape 11. In addition to fixing the reinforcing member, the adhesive tape 11 also has a function as an impact reducing member that reduces external impact on the first chip 6. Similarly to the first chip 6, the second chip 7 is also strong against external stress by the reinforcing member 14 (which may be the same material as the reinforcing member 12) via the adhesive tape 13 (which may be the same material as the adhesive tape 11). Has been improved. In the following, the laminated structure including the first chip 6, the adhesive tape 11, and the reinforcing member 12 is referred to as a “first laminated portion”, and the second chip 7, the adhesive tape 13, and the reinforcing member 14 are referred to. The stacked structure that is configured is referred to as a “second stacked portion”.

  As shown in FIG. 1C, the first laminated portion and the second laminated portion are integrated by a thermosetting resin 29 provided between the laminated portions to form the laminated chip 3. Further, as described above, the active surfaces of the first chip 6 and the second chip 7 are opposed to each other, and both are electrically connected. This electrical connection is formed by the bumps 23 included in the first chip 6 and the bumps 22 included in the second chip 7 coming into contact with each other. The bumps 23 are electrically connected to the active surface of the first chip 6 via the substrate electrode 24. Similarly, the bumps 22 are connected to the active surface of the second chip 7 via the substrate electrode 21. Has electrical connection. The substrate electrodes 21 and 24 are made of, for example, copper (Cu), and the bumps 22 and 23 are made of, for example, gold (Au). Hereinafter, the bumps 22 and 23 are appropriately referred to as “chip-to-chip connection bumps”.

  Further, the first chip 6 includes a bump 26 for forming an electrical connection with the antenna substrate 2 in addition to the bump 23. The bump 26 is electrically connected to the first chip 6 through the substrate electrode 25. An antenna connection terminal 27 that is electrically connected to the antenna line 4 is formed on the antenna substrate 2, and the antenna connection terminal 27 and the bump 26 are brought into contact with each other, so The chip 6 is electrically connected. The first chip 6 and the antenna substrate 2 are integrated by a thermosetting resin 33 so that the bumps 26 and the antenna connection terminals 27 can be stably maintained in contact with each other.

  By comprising in this way, the active surface of both the chips | tips with which this invention apparatus 1 is provided face each other inside, and it becomes difficult to receive the influence by various external stresses. In particular, when the function processing unit and the memory unit are mounted on different chips, and these chips are stacked with the antenna substrate 2 interposed therebetween, the function processing unit and the memory unit are mounted on the same chip. Since the chip area can be reduced in comparison, external stress on the chip is reduced.

  In addition, by providing a silicon-based or urethane-based impact mitigating member on the inactive surface side of the chip, stress applied to the IC card from the outside is absorbed, so that the influence of the stress on the chip can be suppressed. it can. Furthermore, by providing a metallic reinforcing member in addition to the impact mitigating member, the impact stress resistance from the outside is particularly improved, and it has a heat dissipation effect that dissipates heat generated with signal processing in the chip, Temperature rise in the chip can be suppressed. Furthermore, it has the effect of protecting the chip by shielding electromagnetic waves and light applied from the outside, and increasing electromagnetic resistance and light resistance.

  Further, the active surfaces of both chips are opposed to each other, and the active surfaces are electrically connected to each other by bumps, so that the electrical connection point between both chips is difficult to access from the external region of the device 1 of the present invention. . In the case where the function processing unit and the memory unit are mounted on the same chip and these are connected by a signal line, the signal line goes out of the chip. However, since the connection point connecting the function processing unit and the memory unit is formed inside the apparatus by using the configuration of the present invention, the connection point is accessed from the outside. It becomes difficult to steal signal information exchanged between both chips from the outside. For this reason, according to the structure of this invention apparatus, security property can be improved.

  Further, at this time, the upper region of the mounting position of the memory unit included in the second chip 7 is completely covered by the first chip 6, thereby making it difficult to directly access the memory unit from the outside. The effect of preventing the information recorded in the department from being stolen can be expected, and the security can be further improved.

  Further, when both chips are mounted on one substrate surface with the active surfaces facing each other, for example, the second chip (memory portion) is formed on the substrate surface side in order to make access from outside difficult. If the first chip is disposed so as to completely cover the second chip, the distance between the first chip and the antenna line (or antenna connection terminal) is increased. Accordingly, in order to form an electrical connection between the two, a bump large enough to bring the first chip into contact with the antenna line is required. For this reason, the thickness of the whole apparatus increases. On the other hand, as in the device of the present invention, the configuration in which both chips are opposed to each other with the antenna substrate interposed therebetween is compared with the configuration in which both chips are mounted on one substrate surface of the antenna substrate with the active surface facing each other. As a result, the bump size for forming the electrical connection can be reduced, thereby reducing the thickness of the entire IC card. In addition, since the bump size can be reduced compared to the case where both chips are mounted on one substrate surface side, the area of the portion where no bump exists can be reduced, thereby improving the internal airtightness. Therefore, mixing of impurities such as moisture and dust is suppressed, and stable operation is ensured.

  Furthermore, since the chip area can be reduced by adopting the configuration of the device 1 of the present invention, the chip (on the above-mentioned area) except for the part that is particularly susceptible to bending stress or torsional stress on the IC card. Multilayer chip) can be arranged.

  FIG. 2 is a plan view for explaining the arrangement position of the laminated chip 3 on the antenna substrate 2. In particular, since an IC card has a character carried by a user, it is easily subject to bending stress and torsional stress. This stress passes through the center of the card (antenna substrate) and is parallel to the card side (in FIG. 2). Tend to concentrate on the area on the line segment L7-L8, corresponding to the line segment L1-L2, and the area on the diagonal line of the card (corresponding to the line segment L3-L4, corresponding to the line segment L5-L6). is there. Since the chip area of the present invention device 1 can be reduced as described above, the area other than the stress concentration area, that is, each of the areas A1 to A8 in FIG. (Shaded triangle area in FIG. 2). At this time, it is particularly preferable from the viewpoint of stress resistance that a distance of about 1 to 2 mm is provided from each side of the card and each line segment constituting the stress concentration region.

[Description of the method of the present invention]
Hereinafter, the manufacturing method for manufacturing the above-described device of the present invention will be described with reference to the drawings for each manufacturing process and the flowchart of the manufacturing process. 3 to 5 are plan views or cross-sectional views for each manufacturing process, and FIG. 6 is a flowchart showing the manufacturing process of the method of the present invention. Each step in the following sentence represents each step in the flowchart shown in FIG. Note that the plan view and the cross-sectional view are schematically shown, and the actual scale does not necessarily coincide with the drawing.

  FIG. 3 is a plan view and a back view of the antenna substrate 2 for each process. First, as shown in FIG. 3A, a gap is formed in a predetermined region of the antenna substrate 2 having a thickness of about 50 μm made of an insulating material such as polyester film, polyimide film, PET (Polyethylene terephthalate), or PET-G (Polyethylene terephthalate Glycol). 31 and 32 are formed (step # 1). The gap portion 31 is an area for mounting the laminated chip 3 in a later step, and the gap portion 32 provides adhesion when the protective sheets 15 and 16 are laminated from both surfaces of the substrate 2 in the later step. It is the space | gap provided in order to raise.

  Next, as shown in FIG. 3B, a circular antenna wire 4 having a loop of two or more turns is obtained by attaching a copper foil or an aluminum foil to one side of the antenna substrate 2 and then performing an etching process. Form. Then, an antenna connection terminal 27 for forming an electrical connection between the laminated chip 3 to be mounted in the subsequent process and the antenna line 4 is formed, and the antenna connection terminal 27 and the outer end 34 of the antenna line 4 are formed. Are electrically connected by a caulking connection, spot welding, or soldering method via a jumper wire 5 on the surface opposite to the surface on which the antenna wire 4 is formed so as not to intersect the antenna wire 4. (Step # 2). As the jumper wire 5, a general connection material is used as a semiconductor module package such as copper, 42 alloy, and aluminum. FIG. 3C is a back view of FIG. 3B viewed from the back side.

  After the antenna wire 4 and the jumper wire 5 are thus formed on the antenna substrate 2, the process proceeds to the step of mounting the laminated chip 3 in the gap portion 31. First, in the following, the manufacturing process of the laminated chip 3 attached to the antenna substrate 4 will be described, and then the process of attaching the laminated chip will be described.

  FIG. 4 is a cross-sectional view of a chip for each process when the laminated chip 3 is formed. First, as shown in FIG. 4A, substrate electrodes 24 and 25 (which may be copper electrodes) are formed on the first chip 6 having a thickness of about 50 to 100 μm on which a functional processing unit such as a microprocessor is mounted. Bumps 23 or 26 (may be gold bumps) having a height of about 10 to 30 μm are formed on the substrate electrodes, which are formed on the active surface side of the first chip 6 (step # 4). The bump 23 forms an electrical connection with the second chip 7 in a later process, and the bump 26 forms an electrical connection with the antenna line 4 in a later process.

  Similarly to the first chip 6, the substrate electrodes 21 and the bumps 22 are formed on the second chip 7 on which the memory unit is mounted (step # 5). The bump 22 is brought into contact with the bump 23 in a later step, thereby forming an electrical connection between the first chip 6 and the second chip 7. It is assumed that the second chip 7 has a smaller chip area than the first chip 6.

  Next, as shown in FIG. 4 (c), the thickness of the first chip 6 on the non-active surface opposite to the active surface is interposed via a urethane or silicon adhesive tape 11 having a thickness of about 50 to 100 μm. A reinforcing member 12 made of a metal material such as stainless steel of about 50 μm or 42 alloy (iron-nickel alloy) is attached (step # 6). Similarly, as shown in FIG. 4D, the reinforcing member 14 is attached to the non-active surface of the second chip 7 via the adhesive tape 13 (step # 7). The adhesive tape 13 may be the same material as the adhesive tape 11, and the reinforcing member 14 may be the same material as the reinforcing member 12.

  Next, as shown in FIG. 4E, a thermosetting resin 29 containing conductive particles is temporarily attached to the active surface side of the second chip 7 (step # 8).

  Then, as shown in FIG. 4F, the active surface of the second chip 7 on which the thermosetting resin 29 is temporarily attached to the active surface side and the active surface of the first chip 6 are opposed to each other, and the bump 22 In a state where the first and second chips 23 are in contact with each other, the first chip 6 (first stacked portion) is heated from the side to be thermocompression bonded to form the stacked chip 3 (step # 9). Thereby, an electrical connection is formed between the active surface of the first chip 6 and the active surface of the second chip 7.

  Next, a process of mounting the laminated chip 3 formed in this way on the antenna substrate 2 will be described below. FIG. 5 is a schematic cross-sectional configuration diagram of the antenna substrate 2 taken along the line segment X1-X2 in FIG.

  As shown in FIG. 5A, through each step of Step # 1 to Step # 3, a gap portion 31 for mounting the laminated chip 3 and a thermosetting resin 33 for fixing the laminated chip 3 are obtained. It is formed on the antenna substrate 2. Under this state, as shown in FIG. 5B, the laminated chip 3 is mounted in the gap 31 so that the first chip 6 and the second chip 7 sandwich the antenna substrate 2, and the first chip 6 Bumps (antenna connection bumps) formed on the antenna contact terminal 27 are brought into contact with each other and heated from the antenna connection terminal 27 side, whereby the first chip 6 (with the integrated chip 3) and the antenna connection terminal are heated. 27 is thermocompression bonded (step # 10). As a result, an electrical connection between the active surface of the first chip 6 and the antenna line 4 is formed.

  Then, as shown in FIG. 5C, the antenna substrate 2 is laminated with the protective sheet by sandwiching both surfaces of the antenna substrate 2 integrated with the laminated chip 3 between the protective sheets 15 and 16 and performing heat treatment ( Step # 11). Thus, the IC card 1 according to the present invention having high stress resistance and security can be manufactured.

[Another embodiment]
Another embodiment will be described below.

  <1> In the above-described embodiment, the device 1 of the present invention is configured to include the two chips of the first chip 6 and the second chip 7, but the number of chips included is not limited to two. The apparatus of the present invention has a configuration in which at least two chips out of a plurality of chips included in the apparatus are mounted on the antenna substrate 2 so that the active surfaces of both chips face each other with the antenna substrate 2 interposed therebetween as described above. Within the scope of the configuration.

  <2> In the above-described embodiment, the adhesive tape serving as an impact reducing member and the metallic reinforcing member are formed on the inactive surfaces of both the first chip 6 having a large chip area and the second chip 7 having a small chip area. However, if there is a large difference in the chip area between the first chip 6 and the second chip 7, the reinforcing member formed on the inactive surface of the second chip 7 when the IC card is bent In this case, the impact relaxation member is formed on the inactive surfaces of the two chips because the bending strength is increased by the pressure, and a strong stress may be applied to the first chip 6 in the region not covered with the second chip 7. At the same time, the reinforcing member may be formed only on the inactive surface of the first chip 6 having a high calorific value.

  <3> According to the configuration of the device 1 of the present invention, the active surfaces of the two chips are opposed to each other, and the memory unit is covered with the first chip 6, thereby making it difficult to access the memory unit from the outside. Can be increased. However, for example, when a third party cleaves the card itself to expose the memory unit, it is not possible to make it difficult to access the memory unit from the outside even with the configuration of the device 1 of the present invention.

  Therefore, when the memory part is exposed by a third party due to an external impact in this way, the information is stolen by activating an erasing unit that automatically erases the information recorded in the memory part, for example. It can be set as the structure which has the function to prevent. That is, the first chip 6 and the second chip 7 always have an electrical connection relationship. However, if the card is damaged or cleaved due to, for example, an external impact, the electrical connection between the two chips is lost. Since it may not be maintained, it is possible to further enhance security by adopting a configuration that automatically deletes the information in the memory unit when recognizing that the electrical connection between the two chips cannot be confirmed. It is.

  FIG. 7 is a flowchart showing an operation procedure of the second chip 7 when the second chip 7 has the automatic erasing function. First, the second chip 7 is in a standby state until the first chip 6 and other external power are supplied (step # 21). When power is supplied to the second chip 7 (Yes in Step # 21), first, a connection confirmation signal for confirming electrical connection is given to the first chip 6 (Step # 22). When the first chip 6 receives the connection confirmation signal, it gives a response signal to that effect to the second chip 7 and only when the second chip 7 correctly receives the response signal from the first chip 6 (steps). In step # 23, normal processing such as writing or reading is performed (step # 26), and if a response signal is not received even after a predetermined time has elapsed (Yes in step # 24), the memory is automatically stored. The erasing means for erasing the information recorded in the section is activated (step # 25). With this configuration, for example, even when a third party cleaves the device 1 of the present invention and tries to steal only the information recorded in the memory unit in the second chip 7, it is recorded in the memory unit. When power is supplied from the outside to the second chip 7 to read information, a connection confirmation signal is automatically transmitted to the first chip 6 by the second chip 7 and the first chip 6 even if a predetermined time has elapsed. After confirming that no response signal is received, the erasure means is automatically activated to erase various information recorded in the memory unit. Therefore, the information recorded in the memory unit is stolen by a third party. Can be prevented, and higher security can be secured. The connection confirmation signal in step # 22 may be transmitted only once when power is supplied, or intermittently or continuously transmitted a plurality of times until a predetermined time in step # 24. It doesn't matter if it is done.

Schematic configuration diagram of an IC card according to the present invention Plan view for explaining the arrangement position of the laminated chip on the antenna substrate Schematic plan view and back view of antenna substrate for each process Chip schematic cross-sectional view for each process when forming a multilayer chip Cross-sectional schematic configuration diagram of antenna substrate for each process The flowchart which shows the manufacturing process of the IC card based on this invention The flowchart which shows the operation | movement procedure in case this invention apparatus has an automatic deletion function

Explanation of symbols

1: IC card according to the present invention 2: Antenna substrate 3: Multilayer chip 4: Antenna wire 5: Jumper wire 6: First chip 7: Second chip 11: Adhesive tape (impact mitigation member)
12: Reinforcement member 13: Adhesive tape (impact mitigation member)
14: Reinforcing member 15: Protective sheet 16: Protective sheet 21: Substrate electrode 22: Bump 23: Bump 24: Substrate electrode 25: Substrate electrode 26: Bump 27: Antenna connection terminal 29: Thermosetting resin 31: Gap 32: Cavity 33: Thermosetting resin 34: Antenna wire outer end

Claims (11)

An IC card comprising a plurality of semiconductor chips for performing predetermined signal processing and an antenna line on an antenna substrate, and both surfaces of the antenna substrate are covered with a protective sheet,
The first chip and the second chip of the plurality of semiconductor chips are mounted so that the active surfaces face each other across the antenna substrate, and the active surfaces of the two chips are electrically connected to each other on the facing surface,
Any one of the first chip and the second chip is electrically connected to both end portions of the antenna line.   2. The IC card according to claim 1, wherein the first chip and the second chip are configured to include an impact relaxation member on a surface opposite to the active surface. 3.   The IC card according to claim 1 or 2, wherein the first chip and the second chip are electrically connected by flip chip mounting.   4. The device according to claim 1, wherein any one of the first chip and the second chip and the antenna line are electrically connected by flip chip mounting. 5. IC card.   The IC card according to any one of claims 1 to 4, wherein the active surface of the second chip is completely covered by the first chip.   6. The IC card according to claim 5, wherein the second chip has a memory unit for storing data. The memory unit is composed of a non-volatile memory;
The second chip is
When power is supplied, a connection confirmation signal for confirming electrical connection with the first chip is transmitted to the first chip;
7. The information processing apparatus according to claim 6, further comprising a function of automatically deleting information recorded in the memory unit when a response signal to the connection confirmation signal cannot be received from the first chip within a predetermined time. IC card. The first chip is
6. An electrical connection point with both ends of the antenna line is formed in a region that is not covered by the second chip in a surface facing the second chip. 8. The IC card according to any one of items 7.   The IC card according to any one of claims 5 to 8, wherein the first chip includes a metallic reinforcing member on a surface opposite to the active surface. The first chip and the second chip are:
2. The antenna substrate according to claim 1, wherein the antenna substrate is disposed in a region excluding both on a line passing through a central portion of the substrate and parallel to a side constituting the substrate and on a diagonal line constituting the substrate. Item 10. The IC card according to any one of Items 9. It is a manufacturing method of IC card given in any 1 paragraph of Claims 1-10,
A first step of forming bumps for antenna connection and inter-chip connection on the active surface side surface of the first chip, and bumps for inter-chip connection on the active surface side surface of the second chip, respectively. When,
After the first step, a second step of temporarily attaching a thermosetting resin to the active surface for each of the first chip and the second chip;
After completion of the second step, the first chip and the second chip are thermocompression-bonded with the active surfaces facing each other, whereby a laminated chip in which both chips are electrically connected by the inter-chip connection bumps. A third step of forming;
After completion of the third step, an antenna wire and an antenna connection terminal for electrical connection between the antenna wire and the first chip are attached, and the antenna substrate having a gap portion to which the multilayer chip can be attached. A fourth step of electrically connecting the antenna connection bump and the antenna connection terminal included in the first chip by attaching the laminated chip and thermocompression bonding;
And a fifth step of laminating both sides of the antenna substrate on which the multilayer chip is mounted with the protective sheet after the fourth step is completed.