JP2008053761A - Semiconductor device, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method, both of which improve reliability and productivity of a semiconductor chip mounting line without thermally fusing an insulation layer to a heating tool and stage. <P>SOLUTION: In the semiconductor device and its manufacturing method, a semiconductor chip is mounted on a COF flexible printed wiring board having: a wiring pattern which is formed by patterning a conductive layer laminated on at least one side of an insulation layer and is mounted with a semiconductor chip; and a releasing layer which is provided on the surface of the insulation layer, the surface being opposite to the mounting side of the semiconductor chip. The releasing layer is formed by one of the processings of applying a releasing agent application liquid to raw materials of a COF laminate film, applying the releasing agent application liquid at a cleaning process before patterning of the conductive layer, or applying the releasing agent application liquid before a photolithography process, and the releasing layer is formed by heating after applying the releasing agent application liquid. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device in which an electronic component (semiconductor chip) such as an IC or LSI is mounted on a flexible printed wiring board such as a COF film carrier tape and a COF flexible printed circuit (FPC), and a manufacturing method thereof.

With the development of the electronics industry, the demand for printed wiring boards for mounting electronic components such as ICs (integrated circuits) and LSIs (large scale integrated circuits) has increased rapidly. There is a demand for higher functionality, and as a method for mounting these electronic components, recently TAB (Tape Automated Bonding) tape, T-BGA (Ball Grid Array) tape, ASIC tape,
A mounting method using a film carrier tape for mounting an electronic component such as an FPC (flexible printed circuit) is employed. In particular, in the electronic industry using a liquid crystal display element (LCD) such as a personal computer, a cellular phone, etc., for which high definition, thinning, and a reduction in the frame area of a liquid crystal screen are desired. ing.

  Further, COF (chip-on-film) in which a bare semiconductor chip is directly mounted on a flexible printed wiring board has been put into practical use as a mounting method for performing higher-density mounting in a smaller space.

Since the flexible printed wiring board used for this COF does not have a device hole, a laminated film in which a conductor layer and an insulating layer are laminated in advance is used. When the IC chip is directly mounted on the wiring pattern, for example, Then, positioning is performed via an inner lead or a positioning mark that is visible through the insulating layer, and the IC chip and the wiring pattern, that is, the inner lead are joined by a heating tool in this state (for example, Patent Document 1). Etc.).
JP 2002-289651 A (FIGS. 4 to 6, paragraphs [0004], [0005], etc.)

  Mounting of such a semiconductor chip is performed in a state where the insulating layer is in direct contact with the heating tool. In this state, the heating tool is heated to a considerably high temperature, so that the insulating layer is fused to the heating tool. There are problems that the production apparatus is stopped and that the tape is deformed. In addition, when fused with the heating tool, there is a problem that the heating tool is contaminated and the reliability and productivity are hindered.

Such fusion of the heating tool becomes a problem when a semiconductor chip is mounted on a COF film carrier tape without a device hole or an FPC for COF.
In view of such circumstances, the present invention provides a semiconductor device that improves the reliability and productivity of a semiconductor chip mounting line without an insulating layer being thermally fused to a heating tool or a stage, and a method for manufacturing the same. Is an issue.

A semiconductor device of the present invention is formed by patterning a conductor layer laminated on at least one surface of an insulating layer, and a wiring pattern on which a semiconductor chip is mounted, and a side of the insulating layer on which the semiconductor chip is mounted; Is a semiconductor device in which the semiconductor chip is mounted on a flexible printed wiring board for COF having a release layer provided on the opposite surface,
The release layer is
Is it a release layer formed by applying a release agent coating liquid to the raw material of the laminated film for COF,
It is a release layer formed by applying a release agent coating liquid in the cleaning process before patterning of the conductor layer, or
A release layer formed by applying a release agent coating solution prior to the photolithography process,
It is characterized by being formed by applying the release agent coating solution and then heating.

  In such an embodiment, the heating tool comes into contact with the release layer at the time of mounting the semiconductor chip, but the two do not come into close contact with each other, and there is no problem that the heating tool or the like becomes dirty due to thermal fusion with the insulating layer.

In another aspect of the present invention, in the above aspect, the release layer is made of a silicone compound.
In such an embodiment, since the release layer that comes into contact with the heating tool is made of a silicone-based compound, thermal fusion or the like is reliably prevented.

Another aspect of the present invention is characterized in that a silicone compound or silicon is present in a continuous or intermittent island form in the projected region of the semiconductor chip.
In this aspect, after mounting the semiconductor chip, a silicone compound or silicon derived from the release layer is observed on the opposite side of the insulating layer onto which the semiconductor chip is projected.

In another aspect of the present invention, the release layer is formed of a release agent containing at least one selected from a siloxane compound, a silane compound, and silica sol.
In such an embodiment, the release layer that comes into contact with the heating tool is formed by a release agent containing a siloxane compound, a silane compound, or silica sol, thereby reliably preventing thermal fusion or the like.

Another aspect of the present invention is that the release layer is formed by applying a solution of the release agent and heat-treating it.
In such an embodiment, a release layer that reliably prevents thermal fusion is formed by a coating method.

The other aspect which concerns on this invention exists in the said flexible printed wiring board for COF being a COF film carrier tape.
In such an embodiment, when the semiconductor chip is mounted on the COF film carrier tape, the heating tool comes into contact with the release layer, but the two do not come into close contact with each other, and heat insulation and the insulating layer are generated, so that the heating tool is contaminated. Does not occur.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a semiconductor layer on a COF flexible printed wiring board having a wiring pattern formed by patterning a conductor layer laminated on at least one surface of an insulating layer; In a method for manufacturing a semiconductor device comprising a step of mounting a chip,
A step of forming a release layer on the surface of the insulating layer opposite to the side on which the semiconductor chip is mounted, the release layer,
Form by applying a release agent coating solution to the raw material of the laminated film for COF,
Form by applying a release agent coating liquid in the cleaning process before patterning the conductor layer,
Or
Formed by applying a release agent coating solution before the photolithography process,
It is characterized by being formed by applying a release agent coating solution and then heating.

According to the above method, the heating tool comes into contact with the release layer at the time of mounting the semiconductor chip, but the two do not come into close contact with each other, and there is no problem that the heating tool and the like are soiled due to thermal fusion with the insulating layer.

Another aspect of the present invention is to heat a heating tool that directly contacts the release layer to 200 ° C. or higher when the semiconductor chip is mounted.
According to such an aspect, the heating tool heated to 200 ° C. or higher is in contact with the release layer when the semiconductor chip is mounted, but the two are not in close contact with each other, and heat fusion occurs between the insulating layer and the heating tool. The problem of getting dirty does not occur.

In another aspect of the present invention, the release layer is made of a silicone compound.
According to this, since the release layer that comes into contact with the heating tool is made of a silicone compound, thermal fusion or the like is reliably prevented.

In another aspect of the present invention, a silicon compound or silicon may be present continuously or intermittently in an island shape in the projected area of the semiconductor chip.
In this aspect, after mounting the semiconductor chip, a silicone compound or silicon resulting from the release agent is observed on the opposite side of the insulating layer onto which the semiconductor chip is projected.

According to another aspect of the present invention, the release layer is formed of a release agent containing at least one selected from a siloxane compound, a silane compound, and silica sol.
According to this aspect, the release layer that comes into contact with the heating tool is formed by the release agent containing the siloxane compound, the silane compound, or the silica sol, thereby reliably preventing thermal fusion or the like.

Another aspect of the present invention is that the release layer is formed by applying a solution of the release agent and heat-treating it.
Another aspect of the present invention is that the flexible printed wiring board for COF is a COF film carrier tape.

  According to this aspect, when the semiconductor chip is mounted on the COF film carrier tape, the heating tool comes into contact with the release layer, but the two do not come into close contact with each other, and the heat-bonding with the insulating layer occurs and the heating tool and the like become dirty. The problem does not occur.

  The semiconductor device of the present invention can prevent the heating tool or the stage and the insulating layer from being thermally fused at the time of mounting the semiconductor chip by providing a release layer made of a specific silicone compound on the flexible printed wiring board. It is possible to improve the reliability and productivity of the semiconductor chip mounting line.

Next, the semiconductor device and the manufacturing method thereof according to the present invention will be specifically described.
A COF flexible printed wiring board such as a COF film carrier tape or COF FPC used in the semiconductor device of the present invention has a conductor layer and an insulating layer, and the semiconductor device of the present invention is used for this COF film carrier tape or COF. The electronic component is mounted on a flexible printed wiring board for COF such as FPC.

As a laminated film of a conductor layer and an insulating layer used in such a flexible printed wiring board for COF, a laminated film obtained by sputtering an adhesion reinforcing layer such as nickel on an insulating film such as a polyimide film and then performing copper plating is exemplified. Can do. In addition, examples of the laminated film include a casting type in which a polyimide film is laminated on a copper foil by a coating method, and a thermocompression type laminated film in which an insulating film is thermocompression bonded to the copper foil via a thermoplastic resin or a thermosetting resin. be able to. Any of these may be used in the present invention.

  The flexible printed wiring board for COF used in the present invention is obtained by providing a release layer on the insulating layer opposite to the conductor layer of the laminated film described above. Such a release layer only needs to be formed of a material that does not adhere to the heating tool when the semiconductor chip is mounted and is not thermally fused by such heating. But you can. For example, it is preferable to use a silicone release agent, an epoxy release agent, a fluorine release agent, or the like.

  Such a release layer is preferably composed of a silicone compound, an epoxy compound or a fluorine compound, but is particularly composed of a silicone compound, that is, a compound having a siloxane bond (Si—O—Si bond). It is good to form. This is because the release layer made of a silicone compound can be formed relatively easily, and even if transferred to the semiconductor device mounting surface, it does not easily adversely affect the adhesiveness of the mold resin after mounting the semiconductor chip.

  Here, as the release agent for forming the release layer composed of a silicone compound, particularly a compound having a siloxane bond, a silicone release agent can be mentioned, specifically, disiloxane, trisiloxane and the like. It contains at least one selected from siloxane compounds.

  Further, as a preferable release agent, it is preferable to use a release agent containing a compound that changes to a silicone compound by a reaction after coating, that is, a silane compound such as monosilane, disilane, or trisilane, or a silica sol compound.

  Furthermore, as a particularly preferable release agent, an alkoxysilane compound which is a kind of silane compound, or a silazane compound such as hexamethyldisilazane or perhydropolysilazane having a Si—NH—Si structure which is a precursor of a siloxane bond is used. The mold release agent to contain can be mentioned. These become compounds having a siloxane bond by coating or by reacting with moisture in the air after coating. For example, for silazane compounds, the Si—NH—Si structure remains. It may be.

Thus, a release layer made of a silicone compound formed by applying a release agent and then changing by a reaction is particularly preferable.
Such various release agents generally contain an organic solvent as a solvent, but an aqueous solution type or an emulsion type may be used.

  Specific examples include silicone-based oils mainly composed of dimethylsiloxane, methyltri (methylethylketoxime) silane, toluene, silicone-based resin SR2411 composed of ligroin (trade name: manufactured by Toray Dow Corning Silicone), silazane, Examples thereof include a silicone resin SEPA-COAT (trade name: manufactured by Shin-Etsu Chemical Co., Ltd.) containing synthetic isoparaffin and ethyl acetate as components. Moreover, Colcoat SP-2014S (trade name: manufactured by Colcoat Co., Ltd.) containing a silane compound can be used. Furthermore, examples of the release agent containing silica sol include Colcoat P and N-103X (trade name: manufactured by Colcoat Co., Ltd.). In addition, the particle diameter of the silica contained in a silica sol is 0.005-0.008 micrometer [50-80 (angstrom)], for example.

Here, in terms of the effect of having a releasability of not being in close contact with a heating tool during mounting of a semiconductor chip and not being thermally fused by such heating, a release agent containing a silazane compound is used as a silicone compound. It is particularly preferable to provide a release layer comprising As an example of the mold release agent containing such a silazane compound, a silicone resin SEPA-COAT (trade name: manufactured by Shin-Etsu Chemical Co., Ltd.) containing silazane, synthetic isoparaffin, and ethyl acetate can be given.

  The method for forming such a release layer is not particularly limited, and the release agent or a solution thereof may be applied by spraying, dipping, roller application, or the like, or the release layer formed on the base film is transferred. It may be. In any case, in order to prevent peeling between the insulating layer and the release layer, the bonding force between the two may be increased by heat treatment or the like. Further, the release layer is not necessarily provided uniformly as a whole, and may be provided in an island shape at intervals. For example, when transferring to a COF film carrier tape, it is continuously or intermittently island-shaped corresponding to a region between sprocket holes described later or a region where a semiconductor chip (IC) is mounted in a later process. It may be provided.

  In addition, since the release layer only needs to be provided by the time of semiconductor mounting, it may be provided after the conductor layer is provided, or may be provided in advance on the insulating layer where the conductor layer is not provided. You may make it provide simultaneously when providing. Of course, it is not always necessary to provide the conductor layer before patterning, and it may be provided after the conductor layer is patterned.

For example, it is preferable to use the transfer method when the conductive layer is provided after the conductive layer is provided, or when the conductive layer is provided in advance on the insulating layer. In addition, when the conductor layer is provided after patterning, it is preferable to use a coating method, but of course, the present invention is not limited to this. The conductor layer may be provided by an application method at an initial stage before patterning the conductor layer. It may be provided by a transfer method after patterning.
In the semiconductor device of the present invention, a semiconductor chip is mounted on the COF flexible printed wiring board manufactured as described above. The mounting method is not particularly limited. For example, the COF flexible printed wiring board is positioned on the semiconductor chip mounted on the chip stage, and the semiconductor chip is mounted by pressing the heating tool against the COF flexible printed wiring board. To do. At this time, the heating tool is heated to 200 ° C. or more at least, or 350 ° C. or more in some cases, but since a release layer is formed on the insulating layer, heat fusion may occur between the two. There is no.

  Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. In the following embodiment, a COF film carrier tape will be described as an example, but it goes without saying that the same can be applied to a COF FPC.

FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment. As shown in the figure, the COF film carrier tape 20 has a conductor layer 11 made of copper foil and an insulating layer 12 made of polyimide film, and a wiring pattern 21 obtained by patterning the conductor layer 11 and the width of the wiring pattern 21. And sprocket holes 22 provided on both sides in the direction. The wiring pattern 21 is continuously provided on the surface of the insulating layer 12, and is on the opposite side of the insulating layer 12 from the wiring pattern 21, that is, on the side opposite to the side on which the semiconductor chip 30 is mounted. Is provided with a release layer 13. Furthermore, a solder resist layer 23 is formed on the wiring pattern 21 by applying a solder resist material coating solution by a screen printing method. A semiconductor chip 30 is mounted thereon, and bumps 31 of the semiconductor chip 30 are formed. The inner leads of the wiring pattern 21 are joined. Note that the wiring pattern may be formed on both surfaces of the insulating layer (2-metal COF film carrier tape). In this case, a release agent is applied only to a region where the heating tool contacts or a transfer separation is performed. A release layer may be formed by transferring the mold layer.

Hereinafter, the COF film carrier tape used for the semiconductor device of the present invention will be described based on examples.
FIG. 2 shows a COF film carrier tape 20 according to an embodiment, and FIG. 3 shows one manufacturing process thereof.

  As shown in FIGS. 2A, 2B, and 3, the COF film carrier tape 20 of the present embodiment is a laminated film for COF comprising a conductor layer 11 made of a copper layer and an insulating layer 12 made of a polyimide film. The wiring pattern 21 obtained by patterning the conductor layer 11 and the sprocket holes 22 provided on both sides in the width direction of the wiring pattern 21 are manufactured. The wiring pattern 21 is continuously provided on the surface of the insulating layer 12. Furthermore, a solder resist layer 23 formed by applying a solder resist material coating solution by a screen printing method is provided on the wiring pattern 21.

  Here, as the conductor layer 11, gold, silver, or the like can be used in addition to copper, but a copper layer is generally used. Further, as the copper layer, any of a copper layer formed by vapor deposition or plating, an electrolytic copper foil, a rolled copper foil, or the like can be used. The thickness of the conductor layer 11 is generally 1 to 70 μm, preferably 5 to 35 μm.

On the other hand, as the insulating layer 12, polyester, polyamide, polyethersulfone, liquid crystal polymer, or the like can be used in addition to polyimide, and it can be obtained by polymerization of pyromellitic dianhydride and 4,4′-diaminodiphenyl ether. It is preferable to use wholly aromatic polyimide. The thickness of the insulating layer 12 is generally 12.5 to 125 μm, preferably 12.5 to 75 μm, and more preferably 12.5 to 50 μm.
Here, the laminated film for COF is formed by, for example, applying a polyimide precursor resin composition containing a polyimide precursor or varnish on the conductor layer 11 made of copper foil to form a coating layer, drying the solvent, and winding the film. Then, heat treatment is performed in a curing furnace purged with oxygen and imidized to form the insulating layer 12. However, the present invention is not limited to this.

  On the other hand, the release layer 13 can be formed using a silicone release agent containing a silazane compound or a release agent comprising silica sol. It is preferable that the release layer 13 is firmly bonded to the insulating layer 12 by heat treatment after providing a release agent by coating or the like. In addition, the thickness of the release layer 13 is 0.1-1 micrometer, for example.

  Such a COF film carrier tape of the present invention is used for, for example, a semiconductor chip mounting process or a mounting process of an electronic component on a printed circuit board while being transported, and is COF mounted. Since the transparency is 50% or more, the wiring pattern 21 (for example, inner lead) can be image-recognized by a CCD or the like from the insulating layer 12 side, and further, the wiring pattern of the mounted semiconductor chip or printed circuit board can be recognized. Therefore, mutual alignment can be satisfactorily performed by image processing, and electronic components can be mounted with high accuracy.

Next, one manufacturing method of the above-described COF film carrier tape will be described with reference to FIG.
As shown in FIG. 3A, a COF laminated film 10 is prepared, and as shown in FIG. 3B, a sprocket hole 22 is formed through the conductor layer 11 and the insulating layer 12 by punching or the like. . The sprocket hole 22 may be formed on the surface of the insulating layer 12 or may be formed on the back surface of the insulating layer 12. Next, as shown in FIG. 3C, for example, a negative photoresist material coating solution is applied over the region where the wiring pattern 21 on the conductor layer 11 is formed using a general photolithography method. The photoresist material coating layer 30 is formed by coating. Of course, a positive photoresist material may be used. Furthermore, after positioning the insulating layer 12 by inserting a positioning pin into the sprocket hole 22, the photoresist material coating layer 30 is patterned by exposing and developing through the photomask 31, and FIG. A wiring pattern resist pattern 32 as shown in d) is formed. Next, by using the wiring pattern resist pattern 32 as a mask pattern, the conductor layer 11 is dissolved and removed with an etching solution, and further, the wiring pattern resist pattern 32 is dissolved and removed with an alkaline solution or the like, so that FIG. A wiring pattern 21 is formed as shown in FIG. Subsequently, after performing a plating process such as tin plating on the entire wiring pattern 21 as required, the release layer 13 is applied to the surface of the insulating layer 12 on the wiring pattern 21 side by a coating method as shown in FIG. It is formed on the opposite surface. The release layer 13 may be simply applied and dried. However, in order to improve the release effect of not thermally fusing with the heating tool, it is preferable to perform heat treatment. Here, as heating conditions, for example, the heating temperature is 50 to 200 ° C., preferably 100 to 200 ° C., and the heating time is 1 minute to 120 minutes, preferably 30 minutes to 120 minutes. Next, as shown in FIG. 3G, the solder resist layer 23 is formed using, for example, a screen printing method. Then, if necessary, a metal plating layer is applied to the inner lead and the outer lead that are not covered with the solder resist layer 23. A metal plating layer is not specifically limited, What is necessary is just to provide suitably according to a use, and tin plating, tin alloy plating, nickel plating, gold plating, gold alloy plating, etc. are given.

  In the embodiment described above, the release layer 13 is formed before the solder resist layer 23 is provided after the resist pattern 32 for wiring pattern is dissolved and removed with an alkaline solution or the like. However, the solder resist layer 23 is provided. The release layer 13 may be formed after the subsequent solder resist manufacturing process. When the release layer 13 is formed in this manner, the release layer 13 is not exposed to an etching solution, a photoresist stripping solution, or the like, and thus there is an advantage that the release effect is high.

Thus, the release layer of the present invention is preferably formed after the photolithography process for forming the wiring pattern 21 and before the bonding with the semiconductor chip. This is because the release layer may be dissolved in the photoresist layer peeling step. Therefore, it is preferable to provide the release layer 13 immediately after the completion of the photoresist process, after the plating process, or after the solder resist layer 23 is formed. Of course, it may be performed before the photolithography process.
Further, the release layer may be formed by a transfer method. As an example, a COF film carrier tape may be manufactured as described above using a laminated film 10A for COF as shown in FIG. In the laminated film for COF shown in FIG. 4, first, a polyimide precursor resin composition containing a polyimide precursor and a varnish is applied on the conductor layer 11 made of copper foil (FIG. 4A), and the coating layer 12 a is applied. Form (FIG. 4 (b)), dry the solvent and wind up. Next, it is heat-treated in a curing furnace and imidized to form the insulating layer 12 (FIG. 4C). Next, the release layer 13a formed on the transfer film 14 serving as a base material is brought into close contact with the side opposite to the conductor layer 11 of the insulating layer 12 (FIG. 4D), and after heat treatment, The transfer film 14 is peeled off to obtain a COF laminated film 10A having a release layer 13A (FIG. 4E). Here, as transfer conditions, for example, the heating temperature is 15 to 200 ° C., the load by the roller or press is 5 to 50 kg / cm ² , and the treatment time is 0.1 seconds to 2 hours. As heating conditions, for example, the heating temperature is 50 to 200 ° C., preferably 100 to 200 ° C., and the heating time is 1 minute to 120 minutes, preferably 30 minutes to 120 minutes. Of course, the release layer 13A may be formed in such a post-photolithography process by such a transfer method. Here, examples of the material of the transfer film 14 include PET (polyethylene terephthalate), PI (polyimide), and liquid crystal polymer. The thickness of the transfer film 14 is, for example, 15 to 100 μm, preferably 20 to 75 μm.

The semiconductor device of the present invention is manufactured by mounting a semiconductor chip 30 on the COF film carrier tape 20 manufactured as described above, as shown in FIG. That is, the semiconductor chip 30 is placed on the chip stage 41 and the COF film carrier tape 20 is conveyed. In this state, after positioning at a predetermined position, the upper clamper 42 is lowered and the lower clamper 43 is raised to fix the COF film carrier tape 20, and in this state, the heating tool 45 is lowered to press and heat the tape. The inner lead of the COF film carrier tape 20 is further pressed against the bumps 31 of the semiconductor chip 30 for a predetermined time to join them together. Note that after the bonding, resin sealing is performed to obtain a semiconductor device.

The temperature of the heating tool 45 varies depending on conditions such as pressing time and pressure, but is 200 ° C. or higher, preferably 350 ° C. or higher. In the present invention, since the release layer 13 is provided on the contact surface of the COF film carrier tape 20 with the heating tool 45 even when the temperature of the heating tool 45 is increased as described above, the heating tool 45 and the heat fusion are bonded. There is nothing to do. That is, according to the present invention, the temperature of the bonding condition can be sufficiently increased, so that sufficient bonding strength can be ensured. Conversely, in order to obtain a certain bonding strength, the heating time is increased to shorten the crimping time. There is an advantage that you can.
(Reference Examples 1a to 1d)
Various commercially available polyimide base films, Esperflex (trade name: manufactured by Sumitomo Metal Mining; Example 1a), Espanex (trade name: manufactured by Nippon Steel Chemical Co., Ltd .; Example 1b), Neofrex (trade name) : Mitsui Chemicals Co., Ltd .; Example 1c) and Upicel (trade name: Ube Industries, Ltd .; Example 1d) were used to pattern the conductor layer of the laminated film for COF by the photoresist method, and the entire wiring pattern was plated with tin After that, SR2411 (trade name: manufactured by Toray Dow Corning Silicone Co., Ltd.), which is a silicone resin (containing a silane compound), is applied to the base film and heated at 125 ° C. for 1 hour to form a release layer. The manufactured COF film carrier tape was manufactured.

Further, using these COF film carrier tapes, the semiconductor chip is mounted by pressing against the release layer side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C., and then encapsulating the resin. It was. The chip stage temperature was fixed at 450 ° C. (the same applies hereinafter).
(Reference Examples 2a to 2d)
Various commercially available polyimide base films similar to Reference Examples 1a to 1d, Esperflex (trade name: manufactured by Sumitomo Metal Mining Co .; Example 2a), Espanex (trade name: manufactured by Nippon Steel Chemical Co., Ltd .; Examples 2b), the conductive layer of the laminated film for COF using Neoprex (trade name: manufactured by Mitsui Chemicals; Example 2c) and Iupicel (trade name: manufactured by Ube Industries, Ltd .; Example 2d) was patterned by a photoresist method. After tin plating is applied to the entire wiring pattern, SEPA-COAT (trade name: manufactured by Shin-Etsu Chemical Co., Ltd.), which is a silicone resin (containing silazane), is applied to the base film and heated at 125 ° C. for 1 hour. A COF film carrier tape having a release layer was produced.

Further, using these COF film carrier tapes, the semiconductor chip is mounted by pressing against the release layer side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C., and then encapsulating the resin. It was.
(Comparative Examples 1a to 1d, 2a to 2d)
The same COF film carrier tape was used as Comparative Examples 1a to 1d and 2a to 2d except that no release layer was provided in Reference Examples 1a to 1d and 2a to 2d.

Furthermore, using these COF film carrier tapes, the semiconductor tool was mounted by pressing against the opposite side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C., and then sealed with a resin to obtain a semiconductor device. .
(Test Example 1)
The semiconductor is pressed against the release layer side while changing the heating tool temperature in the range of 260 to 440 ° C. during the manufacture of the semiconductor devices of Reference Examples 1a to 1d, 2a to 2d and Comparative Examples 1a to 1d and 2a to 2d. The chip was mounted and adhesion to the heating tool was observed. The results are shown in Table 1.

As a result, the reference examples 1a to 1d and the reference examples 2a to 2d showed a remarkable adhesion preventing effect as compared with the comparative examples 1a to 1d and 2a to 2d having no release layer.
Moreover, there was no difference in the injection state of the underfill material (resin) for resin sealing depending on the presence or absence of the release layer.

(Reference Examples 3a to 3d)
Various commercially available polyimide base films similar to Reference Examples 1a to 1d, Esperflex (trade name: manufactured by Sumitomo Metal Mining Co .; Reference Example 3a), Espanex (trade name: manufactured by Nippon Steel Chemical Co., Ltd .; Reference Example 3b), a conductive layer of a COF laminated film using Neoprex (trade name: manufactured by Mitsui Chemicals; Reference Example 3c) and Iupicel (trade name: manufactured by Ube Industries; Reference Example 3d) is patterned by a photoresist method. After tin plating is applied to the entire wiring pattern, SRX310 (product name: manufactured by Toray Dow Corning Silicone) is applied to the base film and heated at 125 ° C. for 1 hour to form a release layer. The manufactured COF film carrier tape was manufactured.

Furthermore, using these COF film carrier tapes, the heating tool temperature was changed in the range of 260 ° C. to 400 ° C. and pressed against the release layer side to mount a semiconductor chip to obtain a semiconductor device.
(Comparative Examples 3a to 3d)
The same COF film carrier tape was used as Comparative Examples 3a to 3d except that the release layer was not provided in Reference Examples 3a to 3d.

Furthermore, using these COF film carrier tapes, a semiconductor chip was mounted by pressing against the opposite side while changing the heating tool temperature in the range of 260 ° C. to 400 ° C. to obtain a semiconductor device.
(Test Example 2)
A heating tool is mounted by pressing against the release layer side while changing the heating tool temperature in manufacturing the semiconductor devices of Reference Examples 3a to 3d and Comparative Examples 3a to 3d in the range of 260 ° C to 400 ° C. And the adhesion temperature was measured. The results are shown in Table 2.

  As a result, the reference examples 3a to 3c were remarkably effective as compared with the comparative examples 3a to 3c. Note that although Reference Example 3d was different from Comparative Example 3d, the effect was not significant. However, the heating and fusing temperature varies depending on the heating tool, the type of semiconductor chip to be mounted, the use of the mounted product, etc., and is generally about 200 to 350 ° C., which is effective in increasing the adhesion temperature. is there.

(Examples 4a to 4h)
The coating time of SEPA-COAT (trade name: manufactured by Shin-Etsu Chemical Co., Ltd.) was applied to the raw material of the laminated film for COF and dried for 3 hours or more to form a release layer (Example 1a). 125 instead of drying A release layer was formed by heat treatment at 1 ° C. for 1 hour (Example 1b), applied in a cleaning process before patterning of the conductor layer and dried for 3 hours or more to form a release layer (Example 1c), instead of drying A release layer was formed by heat treatment at 125 ° C. for 1 hour (Example 1d). After developing a photoresist for patterning the conductor layer, it was applied and dried for 3 hours or more to form a release layer (Reference Example 1e). ), A COF film carrier tape was produced in the same manner as in Reference Example 1a except that a release layer was formed by heat treatment at 125 ° C. for 1 hour instead of drying (Reference Example 1f).

Furthermore, using these COF film carrier tapes, the semiconductor chip was mounted by pressing against the release layer side while changing the heating tool temperature in the range of 340 ° C. to 490 ° C. to obtain a semiconductor device.
(Test Example 3)
While changing the heating tool temperature in manufacturing the semiconductor devices of Examples 1a to 1f in the range of 340 ° C. to 490 ° C., the semiconductor chip is mounted by pressing against the release layer side, and the adhesion to the heating tool is observed. Then, the attached temperature was measured. The results are shown in Table 3.

(Reference Examples 5a to 5e)
After changing the dilution ratio of SEPA-COAT (trade name: manufactured by Shin-Etsu Chemical Co., Ltd.) and patterning the conductor layer in the same manner as in Reference Example 4a to Reference Example 4e, the photoresist was peeled off, tin-plated, and then applied. A release layer was formed by drying for more than an hour, and a release layer was formed by heat treatment at 125 ° C. for 1 hour instead of drying (Reference Examples 5a to 5e). In this case, a silicone resin diluted with ethyl acetate was diluted 2 times, 3 times, 5 times, 10 times from the original dilution ratio, but the release layer thickness (calculated value) in this case was calculated. did.

Furthermore, using these COF film carrier tapes, a semiconductor chip was mounted by pressing against the release layer side while changing the heating tool temperature in the range of 320 ° C. to 460 ° C. to obtain a semiconductor device.
(Test Example 4)
While changing the heating tool temperature in manufacturing the semiconductor devices of Reference Examples 5a to 5e in the range of 320 ° C. to 460 ° C., the semiconductor chip is mounted by pressing against the release layer side, and the adhesion to the heating tool is observed. The attached temperature was measured. The results are shown in Table 4.

  As a result, the adhesion preventing effect was particularly remarkable in Examples 5a to 5c in which the release layer exceeded 0.05 μm or more, preferably 0.1 μm.

(Reference Example 1)
A polyimide layer with a thickness of 40 μm is formed as an insulating layer on an ultra-low roughness copper foil with a thickness of 9 μm as a conductor layer by a coating method. A release layer composed of a 1 μm silicone compound was provided to obtain a laminated film for COF of Reference Example 1. In addition, after transferring the release layer made of the silicone compound, heat treatment was performed at 120 ° C.

Furthermore, the conductor layer of this laminated film for COF was patterned, and the semiconductor chip was mounted by pressing against the release layer side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C. to obtain a semiconductor device.
(Reference Example 2)
A laminated film for COF of Reference Example 2 was prepared in the same manner except that the heat treatment was not performed after the release layer was transferred in Reference Example 1.

Furthermore, the conductor layer of this laminated film for COF was patterned, and the semiconductor chip was mounted by pressing against the release layer side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C. to obtain a semiconductor device.
(Reference Example 3)
A laminated film for COF of Reference Example 3 was prepared in the same manner as in Reference Example 1, except that a silicone compound formed using SEPA-COAT (trade name: manufactured by Shin-Etsu Chemical Co., Ltd.) was transferred to form a release layer. .

Furthermore, the conductor layer of this laminated film for COF was patterned, and the semiconductor chip was mounted by pressing against the release layer side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C. to obtain a semiconductor device.
(Comparative Example 4)
A laminated film for COF was prepared in the same manner as in Reference Example 1 except that no release layer was provided.
Furthermore, the conductor layer of this laminated film for COF was patterned, and the semiconductor chip was mounted by pressing against the opposite side while changing the heating tool temperature in the range of 260 ° C. to 440 ° C. to obtain a semiconductor device.
(Test Example 5)
While changing the heating tool temperature in the manufacture of the semiconductor devices of Reference Examples 1 to 3 and Comparative Example 4 in the range of 260 ° C. to 440 ° C., the semiconductor chip is mounted by pressing against the release layer side. Adhesion was observed. The results are shown in Table 5.

  As a result, in Comparative Example 4, adhesion occurred when the temperature exceeded 300 ° C., but in Reference Example 2, when the temperature exceeded 320 ° C., the adhesion was improved to the extent that partial adhesion occurred. In Reference Examples 1 and 3, No adhesion occurred until the temperature exceeded 400 ° C. Although Reference Example 2 was different from Comparative Example 4 but the effect was not significant, the heat-fusion temperature differs depending on the heating tool, the type of semiconductor chip to be mounted, the use of the mounted product, etc. In some cases, the temperature is about 200 to 350 ° C., which is effective in increasing the adhesion temperature.

(Reference Examples 9a to 9c)
Esperflex (trade name: manufactured by Sumitomo Metal Mining Co., Ltd.), silica sol Colcoat P (trade name: manufactured by Colcoat Co .; Reference Example 9a), Colcoat N-103X (trade name: manufactured by Colcoat Co., Ltd.) as a release agent Reference Example 9b), using a silane compound-based Colcoat SP-2014S (trade name, manufactured by Colcoat Co., Ltd .; Reference Example 9c), after applying tin plating to the entire wiring pattern, a release agent was applied to the base film, A COF film carrier tape having a release layer formed by drying at a heating temperature of 120 ° C. for 60 minutes was produced.
Further, using these COF film carrier tapes, a semiconductor chip was mounted by pressing against the release layer side while changing the heating tool temperature in the range of 440 ° C. to 480 ° C. to obtain a semiconductor device.
(Test Example 6)
While changing the heating tool temperature in the manufacture of the semiconductor devices of Reference Examples 9a to 9c in the range of 440 ° C. to 480 ° C., the semiconductor chip is mounted by pressing against the release layer side, and the adhesion to the heating tool is observed Then, the attached temperature was measured. The results are shown in Table 6.
As a result, in Reference Examples 9a to 9c, remarkable effects were recognized in the same manner as in the above-described examples.

(Test Example 7)
A semiconductor chip was mounted on the COF film carrier tape produced in Examples 2a, 8 and 9a with a heating tool temperature of 400 ° C. to obtain a semiconductor device. Further, a semiconductor device was obtained by mounting a semiconductor chip on the COF film carrier tape produced in Comparative Example 2a at a heating tool temperature of 280 ° C. Then, the insulating layer on the heating tool contact side of each of these semiconductor devices was observed with an Auger electron spectrometer (SAM).
As a result, at least the projected area of the semiconductor chip on the surface of the insulating layer provided with the release layer of the semiconductor devices of Examples 2a, 8 and 9a is caused by the release agent in a continuous or intermittent island shape. However, Si was not observed on the surface of the insulating layer of Comparative Example 2a. Since the Si compound contained in the insulating layer is observed as a lump, it can be distinguished from the Si component distributed on the surface of the insulating layer.

As described above, in the semiconductor device of the present invention, by providing the release layer made of a specific silicone compound on the flexible printed wiring board, the heating tool or the stage and the insulating layer are thermally fused when the semiconductor chip is mounted. This is advantageous in that the reliability and productivity of the semiconductor chip mounting line can be improved.

It is sectional drawing of the semiconductor device which concerns on one Embodiment of this invention. It is a schematic block diagram which shows the COF film carrier tape used for one Embodiment of this invention, Comprising: (a) is a top view, (b) is sectional drawing. It is sectional drawing which shows an example of the manufacturing method of the COF film carrier tape used for one Embodiment of this invention. It is sectional drawing of the laminated | multilayer film for COF used for other embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device used for one Embodiment of this invention.

Explanation of symbols

10, 10A COF laminated film 11 Conductor layer 12 Insulating layer 13, 13A Release layer 20 COF film carrier tape 21 Wiring pattern 22 Sprocket hole 23 Solder resist layer 30 Semiconductor chip 31 Bump

Claims (13)

A wiring pattern formed by patterning a conductor layer laminated on at least one surface of an insulating layer and mounting a semiconductor chip, and a surface of the insulating layer opposite to the side on which the semiconductor chip is mounted A semiconductor device in which the semiconductor chip is mounted on a flexible printed wiring board for COF having a release layer provided;
The release layer is
Is it a release layer formed by applying a release agent coating liquid to the raw material of the laminated film for COF,
It is a release layer formed by applying a release agent coating liquid in the cleaning process before patterning of the conductor layer, or
A release layer formed by applying a release agent coating solution prior to the photolithography process,
A semiconductor device formed by applying the release agent coating solution and then heating. 2. The semiconductor device according to claim 1, wherein the release layer is made of a silicone compound.   2. The semiconductor device according to claim 1, wherein the silicon compound or silicon is present in a projected area of the semiconductor chip in a continuous or intermittent island shape.   4. The semiconductor according to claim 1, wherein the release layer is formed of a release agent containing at least one selected from a siloxane compound, a silane compound, and silica sol. apparatus.   2. The semiconductor device according to claim 1, wherein the release layer is formed by applying a solution of the release agent and heat-treating the release layer.   The semiconductor device according to any one of claims 1 to 5, wherein the COF flexible printed wiring board is a COF film carrier tape. A step of mounting the semiconductor chip on a flexible printed wiring board for COF formed by patterning a conductor layer laminated on at least one surface of an insulating layer and having a wiring pattern on which the semiconductor chip is mounted. In the device manufacturing method,
A step of forming a release layer on the surface of the insulating layer opposite to the side on which the semiconductor chip is mounted, the release layer,
Form by applying a release agent coating solution to the raw material of the laminated film for COF,
Form by applying a release agent coating liquid in the cleaning process before patterning the conductor layer,
Or
Formed by applying a release agent coating solution before the photolithography process,
A method of manufacturing a semiconductor device, wherein the semiconductor device is formed by heating after applying a release agent coating solution.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the heating tool that directly contacts the release layer when the semiconductor chip is mounted is heated to 200 ° C. or higher. 8. The method for manufacturing a semiconductor device according to claim 7, wherein the release layer is made of a silicone compound.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the silicon compound or silicon is present in a projected area of the semiconductor chip in a continuous or intermittent island shape. 8. The method for manufacturing a semiconductor device according to claim 7, wherein the release layer is formed of a release agent containing at least one selected from a siloxane compound, a silane compound, and silica sol.   8. The method for manufacturing a semiconductor device according to claim 7, wherein the release layer is formed by applying a solution of the release agent and heat-treating the release layer.   13. The method for manufacturing a semiconductor device according to claim 7, wherein the COF flexible printed wiring board is a COF film carrier tape.

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