JP2007206594A - Electro-optical apparatus and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electro-optical apparatus in which the level differences, in response to the positions of an outer circuit connection terminal produced on a substrate are reduced. <P>SOLUTION: The outer circuit connecting terminal 102e, which is a part of a relay line 91e formed on the same layer with relay lines 91d, 91f, is connected to the relay line 91e connected electrically to a ground voltage line 93a. Thus, positions along height direction of the outer circuit connection terminals 102d, 102e and 102f to which an image signal, a second electric source signal VSSX and a counter electrode voltage LCCOM are respectively supplied can be unified. Accordingly, the turbulence of a rubbing roller due to the differences of etching depths of the plurality of outer circuit connection terminals 102, that is, hair turbulence of cloth material of the rubbing roller which may occur upon rubbing almost can be removed to permit virtually homogeneous rubbing. As a result, rubbing stripes in image display can be restrained or prevented from occurring due to the turbulence of the rubbing roller. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an electro-optical device such as a liquid crystal device and a manufacturing method thereof, and a technical field of an electronic apparatus such as a liquid crystal projector including the electro-optical device.

  In this type of electro-optical device, a display electrode such as a pixel electrode, a data line driving circuit for driving the electrode, a circuit unit such as a scanning line driving circuit, and the like are provided along the edge of one side. A plurality of external circuit connection terminals are arranged. Further, a plurality of signal wirings for supplying a plurality of types of signals from the plurality of external circuit connection terminals to a circuit unit such as a scanning line driving circuit and a data line driving circuit are provided on the substrate.

  Regarding such signal wiring, for example, in Patent Document 1, in addition to the original wiring, the number of processes is increased by forming an additional wiring from the same film as the conductive film in the pixel, that is, by forming a redundant wiring structure. A device has been devised to reduce the resistance of the wiring without making it.

Japanese Patent Laid-Open No. 2002-229061

  Even in the case where a wiring is formed using a plurality of conductive films as in Patent Document 1, it is preferable that all input terminals for connecting the wiring and the external circuit are formed of the same film.

  At that time, for a wiring routed by a film different from the terminal, it is necessary to form a contact hole in order to connect the wiring film and the terminal film.

  However, depending on the structure of the electro-optical device, when the contact hole is formed, the dielectric film constituting the storage capacitor formed in the pixel may have to be etched.

  At this time, if the contact hole is formed directly in the dielectric film constituting the storage capacitor by etching or the like, the characteristics of the dielectric film are adversely affected, making it difficult to function as a normal storage capacitor. There is a problem.

  The present invention has been made in view of the above-described problems, and includes an electro-optical device having a structure for connecting a terminal and a wiring formed of a layer different from the terminal, and an electronic apparatus including the electro-optical device. The issue is to provide.

  In order to solve the above problem, an electro-optical device according to a first aspect of the present invention includes a plurality of pixel electrodes arranged in a pixel region on a substrate, and a lower layer than the plurality of pixel electrodes through an interlayer insulating film. A storage capacitor in which a lower electrode, a dielectric film, and an upper electrode are sequentially stacked, and a conductive film formed around the pixel region, the first layer being in the same layer as the upper electrode. A first conductive film, a second conductive film in the same layer as the lower electrode, and a third conductive film disposed on a lower layer side than the second conductive film and electrically connected to the second conductive film And a relay layer that is formed on the upper side of the first conductive film in the peripheral region and electrically connects the first conductive film and the second conductive film, and the first to third conductive films A terminal portion formed of at least one conductive film.

  In the electro-optical device according to the first aspect of the present invention, a plurality of pixel electrodes are arranged in a matrix, for example, in the pixel region on the substrate. That is, in the pixel region, for example, a plurality of data lines and a plurality of scanning lines are formed vertically and horizontally, and pixel electrodes are provided corresponding to the intersections of these data lines and scanning lines. Each pixel electrode is electrically connected to the data line and the scanning line via, for example, a pixel switching element electrically connected thereto. Here, the “pixel region” means a region where a plurality of pixel electrodes are arranged in a plan view on the substrate, that is, a region for displaying an image by a plurality of pixel electrodes. The “image display area” according to the form is an example or a typical example.

  When the electro-optical device configured as described above is operated, each scanning line is selected by supplying a scanning signal, for example, on the substrate. For example, when the pixel switching element is turned on by supplying a scanning signal from the selected scanning line, an image signal is supplied to the pixel electrode via the data line and the pixel switching element. As a result, an applied voltage is applied between the pixel electrode and the counter electrode, for example, facing the pixel electrode and maintained at a predetermined potential. As a result, in the electro-optical device, the alignment state of an electro-optical material such as liquid crystal sandwiched between the pixel electrode and the counter electrode is changed to modulate light incident from the light source and display an image in the pixel region. Is done. At this time, the storage capacitor improves the potential holding characteristics of the pixel electrode, and enables high contrast when displaying an image.

  The first conductive film is disposed on the extending portion of the dielectric film, and the second conductive film is disposed on the lower layer side than the dielectric film. The first conductive film and the second conductive film are electrically connected to each other by a relay layer described later. The third conductive film is formed on the lower layer side of the second conductive film, and is electrically connected to the second conductive film. Therefore, the first conductive film, the second conductive film, and the third conductive film are electrically connected to each other, and the terminal portion is formed on the layer in which any one of these conductive films is formed. Is provided.

  The terminal portion is formed of, for example, an interlayer insulating film in a peripheral region where one conductive film selected from the first, second, and third conductive films, for example, according to the design of the electro-optical device, is located around the pixel region. It is an exposed part. Accordingly, a terminal portion such as an external circuit connection terminal for connecting the first, second and third conductive films to an external circuit can be provided in any one of the layers in which these conductive films are formed. In addition, it is possible to unify the positions along the height direction of the plurality of terminal portions provided in the peripheral region (that is, the thickness direction of the substrate). More specifically, for example, the second conductive film or the third conductive film electrically connected to the first conductive film is not formed between the first conductive film without forming terminal portions such as external circuit connection terminals from the first conductive film. A portion exposed from the insulating film can be a terminal portion. In other words, since the first conductive film, the second conductive film, and the second conductive film are electrically connected to each other, the terminal portion for connecting each of the conductive films to the external circuit is designed according to the design. It can be provided in the same layer as any one of the first, second and third conductive films. For example, by selecting one conductive film in accordance with the position of the other terminal portion, a plurality of external circuit connections The position of terminals such as terminals can be unified.

  Therefore, the etching depth by, for example, etching for forming terminal portions such as a plurality of external circuit connection terminals can be made uniform, and the etching depth of the plurality of external circuit connection terminals that can occur during the rubbing process can be adjusted. The difference, that is, the disturbance of the rubbing roll due to the level difference generated on the substrate (that is, the disturbance of the cloth of the rubbing roll cloth) can be reduced. As a result, it is possible to reduce the occurrence of rubbing streaks when displaying an image due to disturbance of the rubbing roll, and it is possible to improve the image quality.

  The relay layer electrically connects the first conductive film and the second conductive film. Therefore, when opening a contact hole for electrically connecting the first conductive film to the second conductive film, for example, photoetching or the like is performed to extend the dielectric film disposed below the first conductive film. In addition, there is no interlayer insulating film directly on the extension portion (in other words, the surface on the upper layer side of the extension portion of the dielectric film is exposed to the atmosphere or atmosphere, that is, the dielectric film is exposed. State)). That is, for example, photoetching or the like is performed on the extended portion of the dielectric film through the interlayer insulating film that is to be laminated in the region where the first conductive film is not formed, thereby causing deterioration of the characteristics of the dielectric film. Instead, a contact hole for electrically connecting the first conductive film to the second conductive film (that is, a contact hole for electrically connecting the relay layer to the second conductive film) can be formed. Therefore, for example, photoetching for opening the contact hole is performed on the extended portion of the dielectric film, thereby adversely affecting the characteristics of the dielectric film constituting the storage capacitor electrically connected to the pixel electrode. Can be suppressed or prevented. Thereby, it is possible to suppress a decrease in the potential holding characteristic of the storage capacitor, and it is possible to suppress or prevent the image quality from deteriorating, for example, the contrast in the image display is reduced.

  In addition, in the present invention, in particular, since the first conductive film, the second conductive film, and the third conductive film are located in different layers, the first conductive film, the second conductive film, and the third conductive film Each of the wirings and the like that are electrically connected to each other has a portion that overlaps at least partly when viewed from the direction along the normal of the substrate surface on the substrate. Therefore, even when the conductive films such as a plurality of signal wirings are not short-circuited in a certain region when the substrate is viewed from the normal direction, these signal wirings are provided in the same layer in the peripheral region. Each terminal part is electrically connected. That is, it is possible to wire more signal wirings while ensuring a relatively wide wiring width for each one. Accordingly, it is possible to reduce the size of the entire substrate, that is, the entire electro-optical device by reducing the peripheral region while ensuring a wide pixel region.

  Each of the plurality of signal wirings is formed of, for example, different conductive films corresponding to the type of signal among the plurality of conductive films. Here, the “signal type” includes a signal corresponding to the content of an image for displaying an image such as an image signal, and a power source for driving a driving circuit arranged in a pixel portion or a peripheral region. .

  As described above, according to the electro-optical device according to the first aspect of the present invention, the substrate size can be reduced, the electro-optical device can be downsized, and the image quality caused by the rubbing unevenness can be reduced. Can be suppressed. In addition, it is possible to suppress the deterioration of the characteristics of the dielectric film, and it is possible to display a higher quality image.

  In an aspect of the electro-optical device according to the first aspect of the present invention, the peripheral region includes another terminal portion different from the terminal portion, and the other terminal portion includes the one conductive film. The other conductive film which is the same film may be a portion exposed from the interlayer insulating film.

  According to this aspect, it is possible to unify the positions along the height direction of the plurality of terminal portions provided in the peripheral region. Therefore, the level | step difference which arises on a board | substrate according to the position of a terminal part can be reduced, and the fall of the image quality resulting from a rubbing nonuniformity can be suppressed.

  In another aspect of the electro-optical device according to the first aspect of the present invention, the one conductive film is the first conductive film, and in the terminal portion, the first conductive film is exposed from the interlayer insulating film. The part may be

  According to this aspect, compared with the case where the portion where the second conductive film or the third conductive film is exposed to the interlayer insulating film is used as the terminal portion, the step generated between the relay layer and the terminal portion can be relatively reduced, and the rubbing unevenness can be achieved. Can be reduced more effectively.

  In order to solve the above problem, an electro-optical device according to a second aspect of the present invention includes a plurality of pixel electrodes arranged in a pixel region on a substrate, and a lower layer than the plurality of pixel electrodes through an interlayer insulating film. A storage capacitor in which a lower electrode, a dielectric film, and an upper electrode are sequentially stacked, and a conductive film formed around the pixel region, the first layer being in the same layer as the upper electrode. 1 conductive film, a second conductive film in the same layer as the lower electrode, and an upper layer side of the first conductive film, and electrically connecting the first conductive film and the second conductive film And a terminal portion formed on at least one of the first conductive film and the second conductive film.

  According to the electro-optical device according to the second aspect of the present invention, the characteristic of the dielectric film interposed between the first conductive film and the second conductive film is reduced as in the electro-optical device according to the present invention described above. The position along the height direction of the terminal portion can be unified. It is possible to suppress deterioration in image quality due to uneven rubbing and to suppress deterioration in the characteristics of the dielectric film, and to display a higher quality image. In addition, the substrate size can be reduced, and the electro-optical device can be reduced in size.

  In an aspect of the electro-optical device according to the second aspect of the present invention, the peripheral region includes another terminal portion different from the terminal portion, and the other terminal portion is the same film as the conductive film. The other conductive film may be a portion exposed from the interlayer insulating film.

  According to this aspect, the positions along the height direction of the plurality of terminal portions provided in the peripheral region can be unified. Therefore, the level | step difference which arises on a board | substrate according to the position of a terminal part can be reduced, and the fall of the image quality resulting from a rubbing nonuniformity can be suppressed.

  In another aspect of the electro-optical device according to the first and second aspects of the present invention, the relay layer may be the same film as the pixel electrode.

  According to this aspect, the relay layer can be formed in parallel with the formation of the pixel electrode, and the relay layer can be formed by a simple manufacturing process. The “same film” means films formed on the same occasion in the manufacturing process and are the same kind of film. The “same film” does not mean that it is continuous as a single film, but basically, it is sufficient if the film parts of the same film are separated from each other. . Therefore, the purpose is not to require that the pixel electrode and the relay layer are continuous as a single film, but basically, it is sufficient to use film parts that are separated from each other in the same film.

  In another aspect of the electro-optical device according to the first and second inventions of the present invention, the relay layer is electrically connected to the first conductive film through a first contact hole opened in the interlayer insulating film. And may be electrically connected to the second conductive film through a second contact hole opened through the interlayer insulating film and the extending portion.

  According to this aspect, the first conductive film is electrically connected to the first conductive film, for example, via the first contact hole opened in the interlayer insulating film on the first conductive film, and the first conductive film It is electrically connected to the second conductive film through a second contact hole opened through the interlayer insulating film on the conductive film and the extending portion of the dielectric film. Therefore, the first conductive film and the second conductive film can be reliably electrically connected by the relay layer through the first and second contact holes. In particular, in the manufacturing stage where the extended portion of the dielectric film is exposed, it is possible to achieve vertical conduction through the dielectric film without having to go through a state of etching the dielectric film.

  In another aspect of the electro-optical device according to the first and second aspects of the present invention, the electro-optical device includes a sealing material that bonds the substrate and the counter substrate disposed opposite to the substrate, and the relay layer includes the peripheral layer You may form in the outer side of the sealing area | region where the said sealing material is arrange | positioned among area | regions.

  According to this aspect, the first conductive film and the second conductive film are electrically connected by the relay layer with little or no hindrance to the image display by the relay layer and with little or no increase in the substrate size. Can be relayed to.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device of the present invention.

  According to the electronic apparatus according to the present invention, since the electro-optical device according to the present invention described above is provided, a projection display device, a mobile phone, an electronic notebook, a word processor, and a viewfinder type capable of high-quality display. Alternatively, various electronic devices such as a monitor direct-view video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. In addition, as an electronic apparatus according to the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  Such an operation and other advantages of the present invention will become apparent from the embodiments described below.

  Embodiments of an electro-optical device according to first and second inventions of the present invention and an electronic apparatus including such an electro-optical device will be described below with reference to the drawings. In the following embodiments, a TFT active matrix driving type liquid crystal device with a built-in driving circuit, which is an example of the electro-optical device according to the first and second inventions of the present invention, will be described as an example.

<First Embodiment>
First, an embodiment of an electro-optical device according to the first invention of the present invention will be described with reference to FIGS.

  The overall configuration of the liquid crystal device 1 according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the configuration of the liquid crystal device 1 according to the present embodiment, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the liquid crystal device 1 according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are disposed to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are surrounded by an image display region 10a as an example of the “pixel region” according to the present invention. They are bonded to each other by a sealing material 52 provided in a sealing region 52a located in the area.

  In FIG. 1, a light-shielding frame light-shielding film 53 that defines the frame area of the image display region 10 a is provided on the counter substrate 20 side in parallel with the inside of the seal region 52 a where the sealing material 52 is disposed. In the peripheral region, the data line driving circuit 101 and the external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region 52 a where the sealing material 52 is disposed. The sampling circuit 7 is provided so as to be covered with the frame light-shielding film 53 on the inner side of the seal region 52a along the one side. The scanning line driving circuit 104 is provided outside the seal region 52a along two sides adjacent to the one side. Further, a plurality of wirings 105 are provided along the remaining one side of the TFT array substrate 10 in order to connect the two scanning line driving circuits 104 provided on both sides of the image display region 10a. On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  On the TFT array substrate 10, lead wires 90 are formed for electrically connecting the plurality of external branch connection terminals 102 to the data line driving circuit 101, the scanning line driving circuit 104, the vertical conduction terminal 106, and the like. ing.

  In FIG. 2, on the TFT array substrate 10, a laminated structure in which wiring such as a pixel switching TFT (Thin Film Transistor) as a driving element, a scanning line, and a data line is formed. In the image display area 10a, a pixel electrode 9a is provided in an upper layer of wiring such as a pixel switching TFT, a scanning line, and a data line. A light shielding film 23 is formed on the surface of the counter substrate 20 facing the TFT array substrate 10. A counter electrode 21 made of a transparent material such as ITO is formed on the light shielding film 23 so as to face the plurality of pixel electrodes 9a. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  Next, a main configuration of the liquid crystal device 1 will be described with reference to FIG. FIG. 3 is a plan view showing a configuration of a main part of the liquid crystal device 1 according to the present embodiment.

  In FIG. 3, a liquid crystal device 1 includes a TFT array substrate 10 made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and a counter substrate 20 (see FIG. 2) opposed to each other via a liquid crystal layer. The voltage applied to the pixel electrodes 9a arranged in a partitioned manner is controlled to modulate the electric field applied to the liquid crystal layer 50 (see FIG. 2) for each pixel. Thereby, the amount of transmitted light between the two substrates is controlled, and the image is displayed in gradation. This liquid crystal device employs a TFT active matrix driving method, and a plurality of pixel electrodes 9a arranged in a matrix and a plurality of scanning lines 11a arranged in a matrix and a plurality of scanning lines 11a are arranged in the pixel display region 10a of the TFT array substrate 10. A data line 6a is formed, and a pixel portion corresponding to the pixel is constructed. In the peripheral area of the image display area 10a, a drive circuit such as the data line drive circuit 101, an external circuit connection terminal 102, and an electrostatic protection circuit 410 are formed. The specific configuration of the electrostatic protection circuit 410 includes, for example, various types of existing static electricity such as a diode-connected TFT or a type in which the routing wiring 90 is connected to a power supply wiring or the like via a diode. An electric protection circuit can be adopted.

  Further, a plurality of lead wirings 90 including an image signal line 91 for supplying the image signals VID1 to VID6 and a ground potential line 93 for supplying the second power sources VSSX and VSSY which are power sources of the ground potential are provided in an external circuit. The connection terminal 102 is routed to a driving circuit such as the data line driving circuit 101.

  The image signal line 91 and the counter electrode potential line 99 are connected to the ground potential line via a discharge resistor 700 which is higher in resistance than the conductive film constituting the image signal line 91, the counter electrode potential line 99 and the ground potential line 93, respectively. 93a is electrically connected.

  A counter electrode 21 is formed on the counter substrate 20 (see FIG. 2) so as to face the pixel electrode 9a. The lead wiring 90 includes a counter electrode potential line 99 for supplying the counter electrode potential LCCOM to the counter electrode 21. A vertical conduction terminal 106 for electrically connecting the counter electrode potential line 99 and the counter electrode 21 to each other is formed on the TFT array substrate 10, and between the TFT array substrate 10 and the counter substrate 20 (see FIG. 2). In addition, a vertical conduction member 107 for electrically connecting the vertical conduction terminal 106 and the counter electrode 21 (see FIG. 2) to each other is provided.

  Next, the operation of the liquid crystal device 1 of the present embodiment configured as described above will be described with reference to FIG.

  During the operation of the liquid crystal device 1 of the present embodiment, the data line driving circuit 101 is operated from the external circuit connected to the external circuit connection terminal 102 via the FPC or the like via the external circuit connection terminal 102 and the lead wiring 90. Various signals such as a clock signal, a first power supply signal VDDX, a second power supply signal VSSX, a control signal, and image signals VID1 to VID6 are supplied to the data line driving circuit 101. In parallel with this, the clock signal, the first power supply signal VDDY, the second power supply signal VSSY, and the like for operating the scanning line driving circuit 104 from the external circuit via the external circuit connection terminal 102 and the lead wiring 90, Various signals such as a control signal are supplied to the scanning line driving circuit 104. At this time, the second power supply signal VSSX having the ground potential is supplied to the data line driving circuit 101 via the ground potential line 93a in the routing wiring 90, and the second power supply signal having the ground potential is supplied via the ground potential line 93b. VSSY is supplied to the scan line driver circuit 104. In addition, the image signals VID <b> 1 to VID <b> 6 are supplied to the sampling circuit 7 through the image signal line 91 in the routing wiring 90. On the other hand, the counter electrode potential LCCOM is supplied to the counter electrode 21 (see FIG. 2) through the counter electrode potential line 99 of the routing wiring 90 and further through the vertical conduction terminal 106 and the vertical conduction material 107. Thus, the image signal VID1 to VID6 is supplied to the pixel portion by the data line driving circuit 101 via the data line 6a, and the scanning signal is supplied to the pixel portion by the scanning line driving circuit 104 via the scanning line 11a. Active matrix driving is performed by driving the liquid crystal layer 50 sandwiched between the pixel electrode 9a and the counter electrode 21 in each pixel portion.

  Next, the configuration of the pixel portion of the liquid crystal device 1 according to the present embodiment will be described with reference to FIGS. FIG. 4 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels formed in a matrix that forms an image display area of the liquid crystal device. FIGS. 5 and 6 are plan views showing a partial configuration related to the pixel portion on the TFT array substrate. FIGS. 5 and 6 are respectively a lower layer portion (FIG. 5) and an upper layer portion ( This corresponds to FIG. FIG. 7 is a cross-sectional view taken along line AA ′ when FIGS. 5 and 6 are overlapped. In FIG. 7, the scale of each layer / member is different for each layer / member so that each layer / member can be recognized on the drawing.

  In FIG. 4, a pixel electrode 9a and a TFT 30 for controlling the switching of the pixel electrode 9a are provided for each of a plurality of pixels formed in a matrix configuration of the image display region 10a of the liquid crystal device according to the present embodiment. The data line 6 a formed and supplied with an image signal is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. May be.

  Further, the scanning line 11a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 11a in a pulse-sequential manner in this order at a predetermined timing. It is configured as follows. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,... Supplied from the data line 6a is closed by closing the switch of the TFT 30 serving as a switching element for a certain period. Sn is written at a predetermined timing.

  A predetermined level of image signals S1, S2,..., Sn written in the liquid crystal of the liquid crystal layer 50 through the pixel electrode 9a is held for a certain period with the counter electrode formed on the counter substrate. The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. One electrode of the storage capacitor 70 is connected to the drain of the TFT 30 in parallel with the pixel electrode 9a, and the other electrode is fixed electrically connected to the counter electrode potential line 99 so as to have the counter electrode potential LCCOM. The capacitor electrode 300 which is a potential line is electrically connected.

  Next, a specific configuration of the pixel portion that realizes the above-described operation will be described with reference to FIGS.

  5 to 7, each circuit element of the pixel portion described above is structured on the TFT array substrate 10 as a patterned and laminated conductive film. The TFT array substrate 10 is made of, for example, a glass substrate, a quartz substrate, an SOI substrate, a semiconductor substrate, and the like, and is disposed to face the counter substrate 20 made of, for example, a glass substrate or a quartz substrate. Each circuit element includes, in order from the bottom, the first layer including the scanning line 11a, the second layer including the TFT 30 and the like, the third layer including the data line 6a and the like, the fourth layer including the storage capacitor 70 and the like, and the pixel electrode It consists of the 5th layer containing 9a etc. Further, the base insulating film 12 is provided between the first layer and the second layer, the first interlayer insulating film 41 is provided between the second layer and the third layer, the second interlayer insulating film 42 is provided between the third layer and the fourth layer, and the fourth layer. A third interlayer insulating film 43 and an interlayer insulating film 49 are provided between the layer and the fifth layer, respectively, to prevent a short circuit between the aforementioned elements. Of these, the first to third layers are shown in FIG. 5 as lower layer portions, and the fourth to fifth layers are shown in FIG. 6 as upper layer portions.

(Structure of the first layer-scanning lines, etc.)
The first layer is composed of scanning lines 11a. The scanning line 11a is patterned into a shape including a main line portion extending along the X direction in FIG. 5 and a protruding portion extending in the Y direction in FIG. 5 where the data line 6a extends. Such a scanning line 11a is made of, for example, conductive polysilicon, among other high melting point metals such as titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), molybdenum (Mo), etc. It can be formed of a metal simple substance, an alloy, a metal silicide, a polysilicide, or a laminate thereof including at least one of the above. The scanning line 11a is arranged on the lower layer side of the TFT 30 so as to include a region facing the channel region 1a ′. For this reason, when a double-plate type projector is constructed using a back surface reflection on the TFT array substrate 10 or a liquid crystal device as a light valve, light emitted from other liquid crystal devices and penetrating through a synthetic optical system such as a prism is used. As for return light, the channel region 1a 'can be shielded from the lower layer side by the scanning line 11a.

(Second layer configuration-TFT, etc.)
The second layer is composed of the TFT 30. The TFT 30 has an LDD (Lightly Doped Drain) structure, for example, and includes an insulating film 2 including a gate electrode 3a, a semiconductor layer 1a, a gate electrode 3a, and a gate insulating film that insulates the semiconductor layer 1a. The gate electrode 3a is made of, for example, conductive polysilicon. The semiconductor layer 1a is made of, for example, polysilicon, and includes a channel region 1a ′, a low concentration source region 1b and a low concentration drain region 1c, and a high concentration source region 1d and a high concentration drain region 1e. The TFT 30 preferably has an LDD structure. However, the TFT 30 may have an offset structure in which no impurity is implanted into the low concentration source region 1b and the low concentration drain region 1c. It may be a self-aligned type in which a high concentration source region and a high concentration drain region are formed by implanting the film.

  The gate electrode 3a of the TFT 30 is electrically connected to the scanning line 11a through a contact hole 12cv formed in the base insulating film 12 in a part 3b thereof. The base insulating film 12 is made of, for example, a silicon oxide film, and is formed on the entire surface of the TFT array substrate 10 in addition to the interlayer insulating function between the first layer and the second layer. Has a function of preventing changes in the element characteristics of the TFT 30 caused by the above.

  The TFT 30 according to the present embodiment is a top gate type, but may be a bottom gate type.

(3rd layer configuration-data lines, etc.)
The third layer is composed of a data line 6a and a relay layer 600.

  The data line 6a is formed as a three-layer film of aluminum, titanium nitride, and silicon nitride in order from the bottom. The data line 6 a is formed so as to partially cover the channel region 1 a ′ of the TFT 30. For this reason, the channel region 1a ′ of the TFT 30 can be shielded against incident light from the upper layer side by the data line 6a that can be disposed close to the channel region 1a ′. The data line 6 a is electrically connected to the high concentration source region 1 d of the TFT 30 through a contact hole 81 that penetrates the first interlayer insulating film 41.

  Note that a conductive film having a lower reflectance than the conductive film such as an Al film constituting the main body of the data line 6a may be formed on the side of the data line 6a facing the channel region 1a ′. In this way, it is possible to prevent the return light from being reflected by the surface of the data line 6a facing the channel region 1a 'and generating multiple reflected light, stray light, and the like.

  The relay layer 600 is formed as the same film as the data line 6a. As shown in FIG. 5, the relay layer 600 and the data line 6a are formed so as to be separated from each other. The relay layer 600 is electrically connected to the high-concentration drain region 1 e of the TFT 30 through a contact hole 83 that penetrates the first interlayer insulating film 41.

  The first interlayer insulating film 41 is made of, for example, NSG (non-silicate glass). In addition, for the first interlayer insulating film 41, silicate glass such as PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), silicon nitride, silicon oxide, or the like can be used.

(Fourth layer configuration-storage capacity, etc.)
The fourth layer includes a storage capacitor 70. The storage capacitor 70 has a configuration in which a capacitor electrode 300 and a lower electrode 71 are disposed to face each other with a dielectric film 75 interposed therebetween.

  The capacitor electrode 300 as an example of the “upper electrode” according to the present invention is electrically connected to the counter electrode potential line 99, and the potential of the capacitor electrode 300 is held at the counter electrode potential LCCOM.

  The lower electrode 71, which is an example of the “lower electrode” according to the present invention, is electrically connected to the relay layer 600 through a contact hole 84 that penetrates the second interlayer insulating film 42. That is, the lower electrode 71 is electrically connected to the high concentration drain 1 e of the TFT 30 through the relay layer 600.

  Capacitance electrode 300 or lower electrode 71 is, for example, a metal simple substance containing at least one of refractory metals such as Ti, Cr, W, Ta, and Mo, an alloy, a metal silicide, a polysilicide, and a laminate thereof. Or preferably, it consists of tungsten silicide. For this reason, the channel region 1 a ′ of the TFT 30 can be more reliably shielded from incident light from the upper layer side by the storage capacitor 70 that can be disposed close to the data line 6 a via the interlayer insulating film 42.

  As shown in FIG. 6, the dielectric film 75 is formed in the non-opening region located in the gap between the opening regions for each pixel when viewed in plan on the TFT array substrate 10, that is, almost formed in the opening region. It has not been. Therefore, even if the dielectric film 75 is an opaque film, it is not necessary to reduce the transmittance in the opening region. Therefore, the dielectric film 75 is formed of a plasma silicon nitride film (pSiN) or the like having a high dielectric constant without considering the transmittance. For this reason, the dielectric film 75 can also function as a film for preventing moisture and moisture, and can also improve water resistance and moisture resistance. In addition to the silicon nitride film, for example, a single layer film or a multilayer film such as hafnium oxide (HfO 2), alumina (Al 2 O 3), tantalum oxide (Ta 2 O 5) or the like may be used as the dielectric film.

  The second interlayer insulating film 42 is made of, for example, NSG. In addition, for the second interlayer insulating film 42, silicate glass such as PSG, BSG, or BPSG, silicon nitride, silicon oxide, or the like can be used. The surface of the second interlayer insulating film 42 is subjected to a planarization process such as a chemical polishing process (CMP), a polishing process, a spin coat process, or a recess embedding process. Therefore, the unevenness caused by these elements on the lower layer side is removed, and the surface of the second interlayer insulating layer 42 is flattened. For this reason, the possibility of causing disturbance in the alignment state of the liquid crystal layer 50 sandwiched between the TFT array substrate 10 and the counter substrate 20 can be reduced, and higher-quality display can be achieved. Such planarization may be performed on the surface of another interlayer insulating film.

(Fifth layer configuration-pixel electrode, etc.)
A third interlayer insulating film 43 is formed on the entire surface of the fourth layer, and a pixel electrode 9a is formed thereon as a fifth layer. The third interlayer insulating film 43 is made of, for example, NSG. In addition, the third interlayer insulating film 43 can be made of silicate glass such as PSG, BSG, or BPSG, silicon nitride, silicon oxide, or the like. The surface of the third interlayer insulating film 43 is subjected to a planarization process such as CMP similarly to the second interlayer insulating film 42.

  The pixel electrode 9a (the outline is indicated by a broken line 9a 'in FIG. 6) is arranged in each of the pixel areas partitioned and arranged vertically and horizontally, and the data lines 6a and the scanning lines 11a are arranged in a grid at the boundary. (See FIGS. 5 and 6). The pixel electrode 9a is made of a transparent conductive film such as ITO (Indium Tin Oxide).

  The pixel electrode 9a is electrically connected to the lower electrode 71 through a contact hole 85 that penetrates the interlayer insulating film 43 (see FIG. 7). That is, the potential of the lower electrode 71 is a pixel potential.

  The lower electrode 71, the relay layer 600, and the high concentration drain region 1 e of the TFT 30 are electrically connected via contact holes 84 and 83. That is, the pixel electrode 9a and the high-concentration drain region 1e of the TFT 30 are relay-connected through the relay layer 600 and the capacitor electrode 300. Therefore, it is possible to avoid a situation in which it is difficult to connect the pixel electrode 9a and the drain with a single contact hole due to a long interlayer distance. In addition, the laminated structure and the manufacturing process are not complicated.

  An alignment film 16 that has been subjected to a predetermined alignment process such as a rubbing process is provided above the pixel electrode 9a.

  The above is the configuration of the pixel portion on the TFT array substrate 10 side.

  On the other hand, the counter substrate 20 is provided with a counter electrode 21 on the entire surface of the counter substrate 20, and an alignment film 22 is further provided thereon (under the counter electrode 21 in FIG. 7). As with the pixel electrode 9a, the counter electrode 21 is made of a transparent conductive film such as an ITO film. A light-shielding film 23 is provided between the counter substrate 20 and the counter electrode 21 so as to cover at least a region facing the TFT 30 in order to prevent generation of light leakage current in the TFT 30.

  A liquid crystal layer 50 is provided between the TFT array substrate 10 and the counter substrate 20 thus configured. The liquid crystal layer 50 is formed by sealing liquid crystal in a space formed by sealing the peripheral portions of the TFT array substrate 10 and the counter substrate 20 with a sealing material. The liquid crystal layer 50 takes a predetermined alignment state by the alignment film 16 and the alignment film 22 that have been subjected to an alignment process such as a rubbing process in a state where an electric field is not applied between the pixel electrode 9 a and the counter electrode 21. It is like that.

  The configuration of the pixel portion described above is common to each pixel portion as shown in FIGS. Such pixel portions are periodically formed in the image display region 10a (see FIG. 1). On the other hand, in such a liquid crystal device, as described with reference to FIGS. 1 and 2, the scanning line driving circuit 104, the data line driving circuit 101, and the like are driven in the peripheral area located around the image display area 10a. A circuit is formed.

  Next, the configuration of the discharge resistor 700 will be described with reference to FIGS. 8 and 9 in addition to FIG. FIG. 8 is a partially enlarged plan view of C1 in FIG. 9 is a cross-sectional view taken along line BB ′ in FIG.

  In FIG. 8, the counter electrode potential line 99 is electrically connected to the ground potential line 93a through a discharge resistor 700L as the discharge resistor 700.

  The image signal line 91 includes a plurality of image signal lines 91 </ b> A to 91 </ b> F to which a plurality of image signals VID <b> 1 to VID <b> 6 developed serially and in parallel are supplied. Each of the plurality of image signal lines 91 </ b> A to 91 </ b> F is a discharge resistor 700. The plurality of discharge resistors 700a to 700f are electrically connected to the ground potential line 93a via a corresponding one discharge resistor.

  In FIG. 9, the discharge resistor 700 is composed of a semiconductor layer 700 a doped with impurities on the TFT array substrate 10 via a base insulating film 12. The semiconductor layer 700a is subjected to a dedicated impurity doping that is different from the impurity doping performed on the semiconductor film constituting the pixel switching TFT, so that the resistance value is different from that of the semiconductor film constituting the semiconductor element. Have Further, at the connection portion between the discharge resistor 700 and the image signal line 91 and the counter electrode potential line 99, high-concentration impurity doped portions 700d and 700e each composed of a semiconductor layer 700a doped with an impurity higher than the discharge resistor 700. Exists locally. On the discharge resistor 700, a first interlayer insulating film 41 in which contact holes 86 and 87 leading to the high-concentration impurity doped portions 700d and 700e are formed, respectively.

  On the first interlayer insulating layer 41, a counter electrode potential line 99 and a ground potential line 93a are formed. The counter electrode potential line 99 is electrically connected to the high concentration impurity doped portion 700d through the contact hole 86, and the ground potential line 93a is electrically connected to the high concentration impurity doped portion 700e through the contact hole 87. Connected. A second interlayer insulating film 42 and a third interlayer insulating film 43 are sequentially formed on the counter electrode potential line 99, and a third interlayer insulating film 43 is formed on the ground potential line 93a.

  In the present embodiment, the discharge resistor 700 is connected to the ground potential line 93a for the data line driving circuit, but may be connected to the ground potential line 93b for the scanning line driving circuit.

  Further, the image signal line 91 is electrically connected to each discharge resistor 700 through a corresponding contact hole and a ground potential line 93a. Therefore, the charges accumulated in the image signal line 91 and the counter electrode potential line 99 can be released to the ground potential line 93a.

  Next, the configuration of the terminal portion according to the present embodiment will be described with reference to FIGS. 10 to 15. 10 to 12 show an external circuit connection terminal 102d electrically connected to the image signal line 91 among the plurality of external circuit connection terminals 102, an external circuit connection terminal 102e electrically connected to the ground potential line 93a, 4 is a plan view showing the configuration of each of the external circuit connection terminals 102 f electrically connected to the counter electrode potential line 99. 13 is a cross-sectional view taken along the line DD ′ in FIG. 14 is a cross-sectional view taken along line EE ′ in FIG. 15 is a cross-sectional view taken along line FF ′ in FIG.

  As shown in FIGS. 13 to 15, the liquid crystal device 1 is an example of “another terminal portion” according to the first invention of the present invention outside the seal region 52 a in the peripheral region on the TFT array substrate 10. Some external circuit connection terminals 102d and 102e and 102f which is an example of the “terminal portion” according to the first aspect of the present invention are provided. The liquid crystal device 1 corresponds to each of the external circuit connection terminals 102d, 102e, and 102f. Contact holes 191f and 192f, relay wiring 93f, contact holes 193f, and relay wiring 99f are provided. The external circuit connection terminals 102d, 102e, and 102f are formed of the same film as the conductive film forming the image signal line 91, that is, the conductive film forming the capacitor electrode 300. That is, each of the relay wirings 91d and 91e is an example of “another conductive film” according to the first invention of the present invention.

  As shown in FIGS. 13 to 15, the dielectric film 75 has an extending portion 75 s extending outside the seal region 52 a in the peripheral region on the TFT array substrate 10. On the lower layer side of the extending portion 75s, an interlayer insulating film 49 is formed by NSG, for example. The interlayer insulating film 49 may be made of silicate glass such as PSG, BSG, or BPSG, silicon nitride, silicon oxide, or the like in addition to NSG.

  10 and 13, the external circuit connection terminal 102d is electrically connected to the relay wiring 91d. The relay wiring 91d is integrally formed as the same film as the external circuit connection terminal 102d formed on the extending portion 75s extending outside the seal region 52a in the dielectric film 75. More specifically, the external circuit connection terminal 102d is a portion exposed to the opening formed in the third interlayer insulating film 43 in the relay wiring 91d.

  As shown in FIGS. 11 and 14, the external circuit connection terminal 102e is a portion exposed from the opening formed in the third interlayer insulating film 43 in the relay wiring 91e electrically connected to the relay wiring 93e. is there. The relay wiring 91e is formed on the extending portion 75s extending outside the seal region in the dielectric film 75 shown in FIG. 6, and is formed in the same layer as the layer where the relay wiring 91d is formed as the same film. ing. The relay layer 901e is the same film formed on the third interlayer insulating film 43 on the same occasion as the pixel electrode 9a. The relay layer 901e is electrically connected to the contact hole 191e electrically connected to the relay wiring 91e and the relay wiring 93e extending to the lower layer side of the interlayer insulating film 49 formed below the extending portion 75s. The contact hole 192e is electrically relay-connected. Therefore, the relay layer 901e electrically connects the relay wiring 93e and the external circuit connection terminal 102e, and the second power supply signal VSSX that is the ground potential supplied to the external circuit connection terminal 102e is passed through the relay layer 901e. It is supplied to the relay wiring 93e.

  The relay wiring 93e is formed as the same film as the ground potential line 93a shown in FIGS. 3, 8, and 9, and is electrically connected to the ground potential line 93a.

  The contact hole 192e is formed by embedding a conductive material constituting the pixel electrode 9a in a hole that penetrates the third interlayer insulating film 43, the extending portion 75s, and the interlayer insulating film 49. Therefore, the extension 75s, that is, the portion of the dielectric film 75 that is located in the region where the contact hole 192e is not formed is covered with the third interlayer insulating film 43, and the third interlayer is formed when the contact hole 192e is formed. It is possible to reduce the deterioration of the characteristics of the portion of the dielectric film 75 located in the region where the contact hole 192e is not formed by the etching process performed on the insulating film 43, the extending portion 75s, and the interlayer insulating film 49.

  As shown in FIGS. 12 and 15, the external circuit connection terminal 102f, which is an example of the “terminal portion” according to the first aspect of the present invention, is the “first conductive film” according to the first aspect of the present invention. It is an example of the relay wiring 91f as an example, the relay wiring 93f as an example of the “second conductive film” according to the first invention of the present invention, and the “third conductive film” according to the first invention of the present invention. Of the relay wiring 99f, the relay wiring 91f as an example of “one conductive film” according to the first aspect of the present invention is a portion exposed from the opening of the third interlayer insulating film 43.

  The relay wiring 99 f is formed as the same film in the same layer as the data line 6 a and the relay layer 600 formed on the first interlayer insulating film 41. Therefore, the relay wiring 99f is formed as the same film as the counter electrode potential line 99 and is electrically connected to each other. The relay wiring 93f is formed on the second interlayer insulating film 42 as the same film as the lower electrode 71 and the ground potential line 93a. The relay wiring 99f is electrically connected to the relay wiring 93f through a contact hole 193f that penetrates the second interlayer insulating film 42.

  The relay wiring 91 f is formed on the extending portion 75 s of the dielectric film 75. The relay wiring 91f is formed as the same film as the relay wirings 91d and 91e and the capacitor electrode 300, and is a contact hole 191f which is an example of the “first contact hole” according to the first invention of the present invention. The relay layer 901f, which is an example of the “relay layer” according to the first invention, and the relay wiring 93f via the contact hole 192f, which is an example of the “second contact hole” according to the first invention of the present invention. It is connected to the. Therefore, the external circuit connection terminal 102f is electrically connected to the relay wiring 99f through the contact hole 191f, the relay layer 901f, the contact hole 192f, the relay wiring 93f, and the contact hole 193. Therefore, the counter electrode potential LCCOM supplied to the external circuit connection terminal 102f is supplied to the counter electrode potential line 99 that is electrically connected to the relay wiring 99f located on the lower layer side of the external circuit connection terminal 102f.

  The contact holes 191f and 192f are formed using the same method as the contact holes 191e and 192e. Therefore, a portion of the dielectric film 75 located in a region where the contact hole 192f is not formed is covered with the third interlayer insulating film 43, and the third interlayer insulating film 43 extends when the contact hole 192e is formed. It is possible to reduce the deterioration of the characteristics of the portion of the dielectric film 75 located in the region where the contact hole 192e is not formed by the etching process performed on the portion 75s and the interlayer insulating film 49.

  More specifically, in the present embodiment, since the relay layers 901e and 901f are provided as described above, the photoetching when opening the contact holes 192e and 192f is performed by the extending portion 75s of the dielectric film 75. In the state where the interlayer insulating film 43 is present. That is, the extended portion 75s of the dielectric film 75 has no interlayer insulating film directly, that is, on the extended portion 75s (in other words, the surface on the upper layer side of the extended portion 75s of the dielectric film 75 has an atmosphere or atmosphere. In a state where the dielectric film 75 is exposed).

  That is, if an attempt is made to open a contact hole that reaches 93e directly from the relay wiring 91e, etching must be performed with the dielectric film 75 exposed, which may damage the dielectric film 75. However, with the above-described configuration, etching is not performed in a state where the dielectric film 75 is exposed, and thus the above-described problem can be solved.

  Therefore, the dielectric film constituting the storage capacitor 70 electrically connected to the pixel electrode 9a by performing an etching process such as photoetching for opening the contact hole on the extending portion 75s of the dielectric film 75. It is possible to suppress or prevent adverse effects on the 75 characteristics. Thereby, it can suppress or prevent that image quality deteriorates, such as the contrast in image display reducing.

  According to the liquid crystal device 1 according to the present embodiment, the external circuit connection terminal 102f for supplying the counter electrode potential LCCOM to the counter electrode potential line 99 is formed in the relay wiring 91f formed in the same layer as the relay wiring 91d. Therefore, the positions along the height direction of the external circuit connection terminals can be unified. Therefore, the level | step difference produced by the external circuit connection terminal formed in the mutually different position along the height direction can be reduced. Therefore, rubbing unevenness caused by such a step can be reduced, and deterioration in image quality can be suppressed.

  In addition, the external circuit connection terminal 102e, which is a part of the relay wiring 91e formed in the same layer as the relay wirings 91d and 91f, is connected to the relay wiring 91e that is electrically connected to the ground potential line 93a. The positions along the height direction of the external circuit connection terminals 102d, 102e, and 102f to which the image signal, the second power supply signal VSSX, and the counter electrode potential LCCOM are supplied can be unified. Therefore, the rubbing roll disorder (that is, the rubbing roll cloth hair disorder) caused by the difference in etching depth of the plurality of external circuit connection terminals 102 that can occur during the rubbing treatment can be almost eliminated. The rubbing process can be performed almost uniformly. As a result, it is possible to suppress or prevent the occurrence of rubbing streaks in image display due to the rubbing roll disturbance.

  In the liquid crystal device 1 according to this embodiment, the external circuit connection terminals 102d, 102e, and 102f are particularly located in the same layer as the capacitor electrode 300, that is, the uppermost layer among the image signal line 91, the ground potential line 93a, and the counter electrode potential line 99. Since the wiring layer is provided in the same layer as the wiring to be connected, the step generated between the relay layer 901 and the external circuit connection terminal on the lower layer side is further reduced and the rubbing unevenness is reduced. In view of this, the positions of the external circuit connection terminals are unified at a more preferable position.

  According to the external circuit connection terminals 102d, 102e, and 102f, for example, the image signal line 91, the ground potential line 93a, and the counter electrode potential line 99 that are electrically connected to each of these external circuit connection terminals are connected to the TFT array substrate 10. Since different layers can be formed so as to overlap each other, the area required to form these wirings can be reduced. Therefore, the size of the TFT array substrate 10 can be reduced, and the liquid crystal device 1 can be reduced in size.

  In the present embodiment, in particular, the relay layers 901e and 901f are arranged outside the seal region 52a in the peripheral region, so that the image display in the image display region 10a is hardly or not disturbed, and the TFT array substrate 10 The external circuit connection terminals 102e and 102f can be electrically connected to the ground potential line 93a and the counter electrode potential line 99, respectively, with little or no increase in size.

(Modification)
Next, a modification of the liquid crystal device of the present embodiment will be described with reference to FIGS. In the following description, parts common to the above-described liquid crystal device 1 are denoted by common reference numerals, and detailed description of common parts is omitted. 16 to 18, the external circuit connection terminal 102g electrically connected to the relay wiring 91g, the external circuit connection terminal 102h electrically connected to the relay wiring 93h, and the relay wiring 99i are electrically connected. It is a top view which shows each structure of the external circuit connection terminal 102i. The relay wiring 91g is electrically connected to the image signal line 91. The relay wiring 93h is electrically connected to the ground potential line 93a. The relay wiring 99i is electrically connected to the counter electrode potential line 99. 19 is a cross-sectional view taken along the line GG ′ in FIG. FIG. 20 is a cross-sectional view taken along the line HH ′ in FIG. 21 is a cross-sectional view taken along the line II ′ in FIG. Hereinafter, the configuration of the external circuit connection terminal will be mainly described.

  As shown in FIGS. 16 and 19, the external circuit connection terminal 102g, which is an example of the “terminal portion” according to the first aspect of the present invention, is formed of the “third conductive film” according to the first aspect of the present invention. It is an example of the relay wiring 99g as an example, the relay wiring 93g as an example of the “second conductive film” according to the first invention of the present invention, and the “first conductive film” according to the first invention of the present invention. Of the relay wiring 91g, the relay wiring 99g, which is an example of “one conductive film” according to the first aspect of the present invention, is a portion exposed from the opening of the third interlayer insulating film 43.

  The relay wiring 99g is formed as the same film in the same layer as the data line 6a and the relay layer 600 formed on the first interlayer insulating film 41. The relay wiring 93g is formed on the second interlayer insulating film 42 as the same film as the lower electrode 71 and the ground potential line 93a. The relay wiring 99g is electrically connected to the relay wiring 93g through a contact hole 193g penetrating the second interlayer insulating film 42.

  The relay wiring 91g is formed on the extending portion 75s of the dielectric film 75. The relay wiring 91g is formed as the same film as the capacitor electrode 300, and is a contact hole 192g which is an example of the “first contact hole” according to the first invention of the present invention, the relay layer 901g, and the first of the present invention. It is electrically connected to the relay wiring 93g through a contact hole 191g which is an example of the “second contact hole” according to the present invention. The relay layer 901g is formed on the third interlayer insulating film 43 as the same film as the pixel electrode 9a. The contact hole 191g is formed by burying a conductive material constituting the pixel electrode 9a in a hole that penetrates the third interlayer insulating film 43, the extending portion 75s, and the interlayer insulating film 49.

  Therefore, the external circuit connection terminal 102g is connected to the relay wiring 99g, the contact hole 193g, the relay wiring 93g, the contact hole 191g, the relay layer 901g, and the contact hole 192g. It is electrically connected to 91g. Since the relay wiring 91g is electrically connected to the image signal line 91, the external circuit connection terminal 102g is electrically connected to the image signal line 91.

  Since the dielectric film 75 is covered with the third interlayer insulating film 43, the characteristics of the dielectric film 75 are deteriorated by etching the extending portion 75s when the contact hole 191g is formed. It can be reduced or prevented. Thereby, it can suppress or prevent that image quality deteriorates, such as the contrast in image display reducing.

  As shown in FIGS. 17 and 20, the external circuit connection terminal 102h is a portion exposed from the opening formed in the third interlayer insulating film 43 in the relay wiring 99h. The relay wiring 99h is formed in the first interlayer insulating film 41 as the same film as the counter electrode potential line 99, and is electrically connected to the relay wiring 93h through a contact hole 193h penetrating the second interlayer insulating film 42. ing. The relay wiring 93h is formed as the same film as the ground potential line 93a and is electrically connected to each other.

  Therefore, the second power supply signal VSSX which is the ground potential supplied to the external circuit connection terminal 102h is supplied to the ground potential line 93a via the contact hole 193h and the relay wiring 93h.

  18 and 21, the external circuit connection terminal 102 i is a part where the relay wiring 99 i electrically connected to the counter electrode potential line 99 is exposed from the opening of the third interlayer insulating film 43.

  As described above, the external circuit connection terminals 102 g, 102 h and 102 i included in the liquid crystal device of this example are provided in the same layer on the first interlayer insulating film 41. Therefore, similarly to the external circuit connection terminals 102d, 102e, and 102f described above, the image signal lines 91, the ground potential lines 93a, and the counter electrode potential lines 99 that are formed in different layers on the TFT array substrate 10 respectively. Thus, the image signal, the second power supply signal VSSX, and the counter electrode potential LCCOM can be supplied from the external circuit connection terminals 102g, 102h, and 102i formed in the same layer. The positions along the height direction of the external circuit connection terminals 102g, 102h, and 102i are unified, and it is possible to suppress or prevent the occurrence of rubbing streaks in image display due to disturbance of the rubbing roll.

Second Embodiment
Next, an embodiment of the electro-optical device according to the second invention of the present invention will be described with reference to FIGS. 22 to 24, the external circuit connection terminal 102j electrically connected to the relay wiring 91j, the external circuit connection terminal 102k electrically connected to the relay wiring 93k, and the relay wiring 99l are electrically connected. It is a top view which shows each structure of the external circuit connection terminal 102l. 25 is a cross-sectional view taken along line JJ ′ in FIG. 26 is a cross-sectional view taken along the line KK ′ in FIG. 27 is a cross-sectional view taken along line LL ′ in FIG.

  As shown in FIG. 22 to FIG. 24, the liquid crystal device according to the present embodiment is provided on the outer side of the seal region 52a in the peripheral region on the TFT array substrate 10. Are external circuit connection terminals 102k and 102l, and 102j, which is an example of the “terminal portion” according to the second aspect of the present invention. In the liquid crystal device according to the present embodiment, the relay wiring 91j, the relay layer 901j, the contact holes 191j and 192j, the relay wirings 93j, 93k, 93l, provided corresponding to the external circuit connection terminals 102j, 102k, and 102l, respectively. And 99l, and a contact hole 193l.

  The external circuit connection terminals 102j, 102k, and 102l are formed of the same film as the ground potential line 93a, and the relay wiring 93j is an example of “one conductive film” according to the second aspect of the present invention. Each of the relay wirings 93k and 93l is an example of “another conductive film” according to the second invention of the present invention.

  22 and 25, the external circuit connection terminal 102 j is a portion where the relay wiring 93 j that is also an example of the “second conductive film” according to the second invention of the present invention is exposed from the opening of the third interlayer insulating film 43. The contact hole 192j, which is an example of the “second contact hole” according to the second invention of the present invention, the relay layer 901j, which is an example of the “relay layer” according to the second invention of the present invention, and the present invention The relay wiring 91j, which is an example of the “first conductive film” according to the second invention of the present invention, is electrically connected via the contact hole 191j, which is an example of the “first contact hole” according to the second invention. It is connected.

  The relay wiring 93j is formed as the same film as the lower electrode 71 shown in FIG. The relay wiring 91j is formed as the same film as the capacitor electrode 300, and is electrically connected to the image signal line 91. Therefore, the image signal supplied to the external circuit connection terminal 102j is supplied to the image signal line 91 formed on the upper layer side of the external circuit connection terminal 102j.

  The contact hole 192j is formed by embedding a conductive material constituting the pixel electrode 9a in a hole that penetrates the third interlayer insulating film 43, the extending portion 75s, and the interlayer insulating film 49. Therefore, the extended portion 75 s, that is, the portion of the dielectric film 75 located in the region where the contact hole 192 j is not formed is covered with the third interlayer insulating film 43. As a result, when the contact hole 192j is formed, the portion of the dielectric film 75 located in the region where the contact hole 192j is not formed by the etching process performed on the third interlayer insulating film 43, the extending portion 75s, and the interlayer insulating film 49. Deterioration of characteristics can be reduced.

  As shown in FIGS. 23 and 26, the external circuit connection terminal 102 k is a portion where the relay wiring 93 k is exposed from the opening formed in the third interlayer insulating film 43. The second power supply potential VSSX supplied to the external circuit connection terminal 102k is supplied to the ground potential line 93a via the relay wiring 93k.

  As shown in FIGS. 24 and 27, the external circuit connection terminal 102 l is a portion where the relay wiring 93 l is exposed from the opening of the third interlayer insulating film 43. The relay wiring 93l is electrically connected to the relay wiring 99l through a contact hole 193l that penetrates the second interlayer insulating film 42. The relay wiring 99l is formed on the lower layer side of the relay wiring 93l with the second interlayer insulating film 42 interposed therebetween. Therefore, the counter electrode potential LCCOM supplied to the external circuit connection terminal 102l is supplied to the counter electrode potential line 99 via the relay wiring 99l formed in a layer different from the layer where the external circuit connection terminal 102l is formed.

  According to the liquid crystal device according to the present embodiment, the external circuit connection terminal 102l for supplying the counter electrode potential LCCOM to the relay wiring 99l, the external circuit connection terminal 102k to which the second power supply signal VSSX is supplied, and the image signal are supplied. The external circuit connection terminal 102j to be formed is formed in the same layer on the TFT array substrate 10. Therefore, the depth of the etching process applied to the third interlayer insulating film 43 and the like when forming the external circuit connection terminal is unified, and the TFT array substrate 10 is formed on the TFT array substrate 10 according to the position of the external circuit connection terminal. The level | step difference which arises can be reduced. Therefore, the rubbing roll disturbance (that is, the rubbing roll cloth material disturbance) caused by the difference in the etching depth of the plurality of external circuit connection terminals 102 that can occur during the rubbing treatment can be almost eliminated. The rubbing process can be performed almost uniformly. As a result, it is possible to suppress or prevent the occurrence of rubbing streaks in image display due to the rubbing roll disturbance.

  Further, according to the external circuit connection terminals 102j, 102k, and 102l included in the liquid crystal device according to the present embodiment, the image signal line, the ground potential line, and the counter electrode potential that are electrically connected to each of these external circuit connection terminals. Since the lines can be formed in different layers so as to overlap each other on the TFT array substrate 10, the area required to form these wirings can be reduced. Therefore, the size of the TFT array substrate 10 can be reduced, and the liquid crystal device can be miniaturized.

  Particularly in the present embodiment, since the relay layer 901j is disposed outside the seal region 52a in the peripheral region, the image display in the image display region 10a is hardly or completely prevented, and the size of the TFT array substrate 10 is reduced. The external circuit connection terminal 102j can be electrically connected to the image signal line 91 with little or no increase.

  As described above, according to the liquid crystal device according to the first and second embodiments, conductive films such as wirings overlapping each other on the TFT array substrate 10 are electrically connected to the external circuit connection terminals formed in the same layer. The step difference caused by the difference in the position along the height direction between the plurality of external circuit connection terminals can be reduced while reducing or preventing the characteristic deterioration of the dielectric film 75. Accordingly, rubbing unevenness can be reduced or prevented, and an electro-optical device that can display a high-quality image without causing rubbing streaks can be provided.

<Electronic equipment>
Next, a case where the liquid crystal device which is an example of the above-described electro-optical device is applied to various electronic devices will be described. Here, a projector using a liquid crystal device as a light valve will be described.

  FIG. 28 is a plan view showing a configuration example of a projector. As shown in FIG. 28, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and liquid crystal as a light valve corresponding to each primary color. The light enters the panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  In addition, since light corresponding to each primary color of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  Since the projector 1100 includes a liquid crystal panel with reduced rubbing lines, it can display a high-quality image.

  In addition to the electronic device described with reference to FIG. 28, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, and an electronic notebook , Calculators, word processors, workstations, videophones, POS terminals, devices with touch panels, and the like. Needless to say, the above-described electro-optical device can be applied to these various electronic devices.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification, and an electro-optical device with such a change, In addition, an electronic apparatus including the electro-optical device is also included in the technical scope of the present invention.

It is a top view which shows the structure of the liquid crystal device 1 which concerns on 1st Embodiment. It is the HH 'sectional view taken on the line of FIG. It is a top view which shows the structure of the principal part of the liquid crystal device 1 which concerns on 1st Embodiment. FIG. 3 is an equivalent circuit diagram of various elements and wirings in a plurality of pixels constituting an image display region of the electro-optical device according to the first embodiment. It is a top view showing the partial structure which concerns on the pixel part on a TFT array substrate (the 1). It is a top view showing the partial structure which concerns on the pixel part on a TFT array substrate (the 2). FIG. 7 is a cross-sectional view taken along line AA ′ when FIG. 5 and FIG. 6 are superimposed. FIG. 4 is a partially enlarged plan view of C1 in FIG. 3. FIG. 9 is a sectional view taken along line BB ′ in FIG. 8. FIG. 6 is a plan view (part 1) illustrating a configuration of an external circuit connection terminal included in the electro-optical device according to the first embodiment. FIG. 6 is a plan view (part 2) illustrating a configuration of an external circuit connection terminal included in the electro-optical device according to the first embodiment. FIG. 6 is a plan view (part 3) illustrating a configuration of an external circuit connection terminal included in the electro-optical device according to the first embodiment. It is the DD 'sectional view taken on the line in FIG. It is the EE 'sectional view taken on the line in FIG. It is the FF 'sectional view taken on the line in FIG. FIG. 6 is a plan view (part 1) illustrating a configuration of an external circuit connection terminal included in a modification of the electro-optical device according to the first embodiment. FIG. 9 is a plan view (part 2) illustrating a configuration of an external circuit connection terminal included in a modification of the electro-optical device according to the first embodiment. FIG. 9 is a plan view (part 3) illustrating a configuration of an external circuit connection terminal included in a modification of the electro-optical device according to the first embodiment. It is the GG 'sectional view taken on the line in FIG. It is the HH 'sectional view taken on the line in FIG. It is the II 'sectional view taken on the line in FIG. FIG. 10 is a plan view (part 1) illustrating a configuration of an external circuit connection terminal included in a modification of the electro-optical device according to the second embodiment. FIG. 12 is a plan view (part 2) illustrating a configuration of an external circuit connection terminal included in a modification of the electro-optical device according to the second embodiment. FIG. 12 is a plan view (part 2) illustrating a configuration of an external circuit connection terminal included in a modification of the electro-optical device according to the second embodiment. It is the JJ 'sectional view taken on the line in FIG. FIG. 24 is a sectional view taken along line KK ′ in FIG. 23. It is the LL 'sectional view taken on the line in FIG. It is the top view which showed the structure of an example of the electronic device which concerns on this embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Liquid crystal device, 91 ... Image signal line, 93 ... Grounding potential line, 90 ... Lead wiring, 102 ... External circuit connection terminal

Claims (9)

On the board
A plurality of pixel electrodes arranged in a pixel region;
A storage capacitor that is disposed on the lower layer side through the interlayer insulating film from the plurality of pixel electrodes, and in which a lower electrode, a dielectric film, and an upper electrode are sequentially laminated,
A conductive film formed around the pixel region, the first conductive film in the same layer as the upper electrode, the second conductive film in the same layer as the lower electrode, and the lower layer side than the second conductive film And a third conductive film electrically connected to the second conductive film,
A relay layer formed on an upper layer side of the first conductive film in the peripheral region, and electrically relay-connecting the first conductive film and the second conductive film;
An electro-optical device comprising: a terminal portion formed of at least one of the first to third conductive films. In the peripheral region, provided with another terminal portion different from the terminal portion,
The electro-optical device according to claim 1, wherein the other terminal portion is a portion where another conductive film that is the same film as the one conductive film is exposed from the interlayer insulating film. The conductive film forming the terminal portion is the first conductive film, and the terminal portion is a portion where the first conductive film is exposed from the interlayer insulating film. The electro-optical device described. On the board
A plurality of pixel electrodes arranged in a pixel region;
A storage capacitor that is disposed on the lower layer side through the interlayer insulating film from the plurality of pixel electrodes, and in which a lower electrode, a dielectric film, and an upper electrode are sequentially laminated,
A conductive film formed around the pixel region, the first conductive film in the same layer as the upper electrode, and the second conductive film in the same layer as the lower electrode;
A relay layer formed on an upper layer side of the first conductive film and electrically relay-connecting the first conductive film and the second conductive film;
A terminal portion formed on at least one of the first conductive film and the second conductive film;
An electro-optical device comprising: In the peripheral region, provided with another terminal portion different from the terminal portion,
The electro-optical device according to claim 4, wherein the other terminal portion is a portion where another conductive film that is the same film as the conductive film is exposed from the interlayer insulating film. The electro-optical device according to claim 1, wherein the relay layer is the same film as the pixel electrode. The relay layer is electrically connected to the first conductive film through a first contact hole formed in the interlayer insulating film, and is opened through the interlayer insulating film and the extending portion. The electro-optical device according to claim 1, wherein the electro-optical device is electrically connected to the second conductive film through the formed second contact hole. A sealant for adhering the substrate and the opposite substrate disposed opposite to the substrate;
The electro-optical device according to claim 1, wherein the relay layer is formed outside a sealing region in which the sealing material is disposed in the peripheral region. An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 8.

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