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JP2006313932A - Multilayer circuit board and manufacturing method therefor - Google Patents

Multilayer circuit board and manufacturing method therefor Download PDF

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Publication number
JP2006313932A
JP2006313932A JP2006197904A JP2006197904A JP2006313932A JP 2006313932 A JP2006313932 A JP 2006313932A JP 2006197904 A JP2006197904 A JP 2006197904A JP 2006197904 A JP2006197904 A JP 2006197904A JP 2006313932 A JP2006313932 A JP 2006313932A
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circuit board
circuit pattern
double
prepreg sheet
sided
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Toshiaki Takenaka
敏昭 竹中
Toshihiro Nishii
利浩 西井
Shigeru Yamane
茂 山根
Shinji Nakamura
眞治 中村
Hideaki Komoda
英明 菰田
Kunio Kishimoto
邦雄 岸本
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer circuit board wherein the connection resistance of a conductive through-hole is stable. <P>SOLUTION: The multilayer circuit board is constructed of an inner-layer circuit board obtained by forming a protruded circuit pattern having a certain thickness over a base material, a prepreg sheet, and a circuit pattern formed by laminating metal foil in the outermost layer. A smooth layer is formed over the regions of the base material of the inner-layer circuit board where the protruded circuit pattern is not formed, and the uniformity of heating and pressurization is thereby enhanced. As a result, conductive paste can be evenly compressed, and a multilayer circuit board with statable connection resistance is obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、少なくとも2層以上の回路パターンを接続してなる多層回路基板とその製造方法に関するものである。   The present invention relates to a multilayer circuit board formed by connecting at least two circuit patterns and a method for manufacturing the same.

近年、電子機器の小型化、高密度化に伴い産業用にとどまらず民生用の分野においても回路基板の多層化が強く要望されるようになってきた。   In recent years, with the miniaturization and high density of electronic devices, there has been a strong demand for multilayer circuit boards not only for industrial use but also for consumer use.

このような回路基板では、複数層の回路パターンの間をインナビアホール接続する接続方法および信頼度の高い構造の新規開発が不可欠なものになっているが、導電性ペーストによるインナビアホール接続した新規な構成の高密度の回路基板製造法(特開平6−268345号公報)が提案されている。この回路基板の製造方法を以下に説明する。   In such a circuit board, it is indispensable to newly develop a connection method for connecting inner via holes between circuit patterns of a plurality of layers and a structure having high reliability. A high-density circuit board manufacturing method (JP-A-6-268345) has been proposed. A method for manufacturing this circuit board will be described below.

以下従来の多層回路基板、ここでは4層基板の製造方法について説明する。   Hereinafter, a method for manufacturing a conventional multilayer circuit board, here, a four-layer board will be described.

まず、多層回路基板のベースとなる両面の回路基板の製造方法を説明する。   First, a method of manufacturing a double-sided circuit board that is the base of a multilayer circuit board will be described.

図4(a)〜(g)は従来の内層用の両面回路基板の製造方法の工程断面図である。21は250mm角、厚さ約150μm(t1)のプリプレグシートであり、例えば不織布の芳香族ポリアミド繊維に熱硬化性エポキシ樹脂を含浸させた複合材からなる基材が用いられる。22a,22bは、片面にSi系の離型剤を塗布した厚さ約16μmの離型フィルムであり、例えばポリエチレンテレフタレートが用いられる。   4 (a) to 4 (g) are process sectional views of a conventional method for manufacturing a double-sided circuit board for an inner layer. Reference numeral 21 denotes a prepreg sheet having a 250 mm square and a thickness of about 150 μm (t1). For example, a base material made of a composite material in which a non-woven aromatic polyamide fiber is impregnated with a thermosetting epoxy resin is used. 22a and 22b are release films having a thickness of about 16 μm each having a Si-type release agent applied on one side, and for example, polyethylene terephthalate is used.

プリプレグシート21と離型フィルム22a,22bの貼り合わせはラミネート装置を用いてプリプレグシート21の樹脂成分を溶融させて離型フィルム22a,22bが連続的に接着する方法(特開平7−106760号公報)が提案されている。   The prepreg sheet 21 and the release films 22a and 22b are bonded together by a method in which the resin components of the prepreg sheet 21 are melted using a laminating apparatus and the release films 22a and 22b are continuously bonded (Japanese Patent Laid-Open No. 7-106760). ) Has been proposed.

23は貫通孔であり、プリプレグシート21の両面に貼り付ける厚さ18μmの銅などの金属はく25a,25bと電気的に接続する導電性ペースト24が充填されている。   Reference numeral 23 denotes a through hole, which is filled with a conductive paste 24 electrically connected to metal foils 25a and 25b such as copper having a thickness of 18 μm to be attached to both surfaces of the prepreg sheet 21.

まず、両面に離型フィルム22a,22bが接着されたプリプレグシート21(図4(a))の所定の箇所に図4(b)に示すようにレーザ加工法などを利用して貫通孔23が形成される。   First, as shown in FIG. 4 (b), through-holes 23 are formed at predetermined locations on the prepreg sheet 21 (FIG. 4 (a)) having the release films 22a and 22b bonded on both sides, as shown in FIG. 4 (b). It is formed.

次に図4(c)に示すように、貫通孔23に導電性ペースト24が充填される。導電性ペースト24を充填する方法としては、貫通孔23を有するプリプレグシート21を印刷機(図示せず)のテーブル状に設置し、直接導電性ペースト24が離型フィルム22aの上から印刷される。このとき、離型フィルム22a,22bは印刷マスクの役割と、プリプレグシート21の汚染防止の役割を果たしている。   Next, as shown in FIG. 4C, the conductive paste 24 is filled in the through holes 23. As a method of filling the conductive paste 24, the prepreg sheet 21 having the through holes 23 is placed on a table of a printing machine (not shown), and the conductive paste 24 is printed directly from the release film 22a. . At this time, the release films 22 a and 22 b play a role of a printing mask and a role of preventing contamination of the prepreg sheet 21.

次に図4(d)に示すように、プリプレグシート21の両面から離型フィルム22a,22bを剥離する。   Next, as shown in FIG. 4 (d), the release films 22 a and 22 b are peeled from both surfaces of the prepreg sheet 21.

そして、図4(e)に示すように、プリプレグシート21の両面に金属はく25a,25bを重ねる。そして真空中で温度約200℃、圧力約4MPaで1時間加熱加圧することにより、図4(f)に示すように、プリプレグシート21の厚みが圧縮される(t2=約100μm)とともにプリプレグシート21と金属はく25a,25bとが接着され、両面の金属はく25a,25bは所定位置に設けた貫通孔23に充填された導電性ペースト24により電気的に接続されている。   And as shown in FIG.4 (e), metal foil 25a, 25b is piled up on both surfaces of the prepreg sheet | seat 21. FIG. Then, by heating and pressurizing in vacuum at a temperature of about 200 ° C. and a pressure of about 4 MPa for 1 hour, the thickness of the prepreg sheet 21 is compressed (t2 = about 100 μm) as shown in FIG. And metal foils 25a and 25b are bonded to each other, and the metal foils 25a and 25b on both sides are electrically connected by a conductive paste 24 filled in a through hole 23 provided at a predetermined position.

そして、両面の金属はく25a,25bを選択的にエッチングして回路パターン31a,31bが形成されて両面の回路基板が得られる。   Then, the metal patterns 25a and 25b on both sides are selectively etched to form circuit patterns 31a and 31b to obtain a circuit board on both sides.

図5(a)〜(d)は、従来の多層回路基板の製造方法を示す工程断面図であり、4層基板を例として示している。   5A to 5D are process cross-sectional views showing a conventional method for manufacturing a multilayer circuit board, and show a four-layer board as an example.

まず図5(a)に示すように、図4(a)〜(g)によって製造された回路パターン31a,31bを有する両面回路基板40と図4(a)〜(d)で製造された貫通孔23に導電性ペースト24を充填したプリプレグシート21a,21bが準備される。   First, as shown in FIG. 5 (a), a double-sided circuit board 40 having circuit patterns 31a and 31b manufactured according to FIGS. 4 (a) to 4 (g) and a through-hole manufactured according to FIGS. 4 (a) to (d). Prepreg sheets 21a and 21b in which the holes 23 are filled with the conductive paste 24 are prepared.

次に、図5(b)に示すように、金属はく25b、プリプレグシート21b、内層用の両面回路基板40、プリプレグシート21a、金属はく25aの順で位置決めして重ねる。   Next, as shown in FIG. 5B, the metal foil 25b, the prepreg sheet 21b, the double-sided circuit board 40 for the inner layer, the prepreg sheet 21a, and the metal foil 25a are positioned and stacked in this order.

次に、真空中で温度約200℃で、圧力約4MPaで1時間加熱加圧してプリプレグシート21a,21bを硬化することにより、図5(c)に示すようにプリプレグシート21a,21bの厚みが圧縮(t2=約100μm)され、両面回路基板40と金属はく25a,25bとが接着されるとともに、両面回路基板40の回路パターン31a,31bは導電性ペースト24により金属はく25a,25bとインナビアホール接続される。そして図5(d)に示すように、両面の金属はく25a,25bを選択的にエッチングして回路パターン32a,32bを形成することで4層基板が得られる。
特開平6−268345号公報 特開平7−106760号公報
Next, the thickness of the prepreg sheets 21a and 21b is increased as shown in FIG. 5C by curing the prepreg sheets 21a and 21b by heating and pressing at a pressure of about 4 MPa for 1 hour in a vacuum. The double-sided circuit board 40 is bonded to the metal foils 25a and 25b by being compressed (t2 = about 100 μm), and the circuit patterns 31a and 31b of the double-sided circuit board 40 are bonded to the metal foils 25a and 25b by the conductive paste 24 Inna via hole connected. And as shown in FIG.5 (d), a 4-layer board | substrate is obtained by selectively etching the metal foils 25a and 25b of both surfaces, and forming the circuit patterns 32a and 32b.
JP-A-6-268345 JP-A-7-106760

上記の従来の多層回路基板の製造方法においては、板厚が薄くなるに伴って、内層用として用いた前記両面の回路基板の強度及び剛性が低下する。   In the above conventional multilayer circuit board manufacturing method, the strength and rigidity of the double-sided circuit boards used for the inner layer decrease as the plate thickness decreases.

すなわち図6に示すように、両面回路基板40の裏面に回路パターン31bが形成されない表面に回路パターン31aを形成し、プリプレグシート21aの導電性ペースト24を圧縮して最外層の回路パターン32と電気的に接続する場合、導電性ペースト24にかかる圧力で両面回路基板40が裏面の回路パターン31bの厚み相当分変形しプリプレグシート21bと接触する。   That is, as shown in FIG. 6, the circuit pattern 31a is formed on the surface where the circuit pattern 31b is not formed on the back surface of the double-sided circuit board 40, and the conductive paste 24 of the prepreg sheet 21a is compressed to connect the circuit pattern 32 to the outermost layer. When the connection is made, the double-sided circuit board 40 is deformed by the thickness corresponding to the circuit pattern 31b on the back surface due to the pressure applied to the conductive paste 24, and comes into contact with the prepreg sheet 21b.

このため、記号Aの導電性ペースト24に比べて記号Bの導電性ペースト24の圧縮が不足して接続抵抗が安定しない場合があるという問題を有していた。   For this reason, compared with the conductive paste 24 of the symbol A, the conductive paste 24 of the symbol B is insufficiently compressed and the connection resistance may not be stable.

上記課題を解決するために本発明の多層回路基板およびその製造方法は、基材上に一定厚みを有する凸状の回路パターンを形成した内層用の回路基板と、プリプレグシートと、最外層に金属はくを積層し、回路パターンを形成した多層回路基板において、前記内層用の回路基板の凸状の回路パターンが形成されていない基材上に平滑層を形成することで、加熱加圧時の均一性を高め、このことにより導電性ペーストを均一に圧縮することが可能となり、接続抵抗が安定した多層回路基板が得られる。   In order to solve the above problems, a multilayer circuit board and a manufacturing method thereof according to the present invention include an inner layer circuit board in which a convex circuit pattern having a certain thickness is formed on a base material, a prepreg sheet, and a metal in an outermost layer. In a multilayer circuit board in which foil is laminated and a circuit pattern is formed, by forming a smooth layer on a base material on which the convex circuit pattern of the circuit board for the inner layer is not formed, The uniformity can be improved, which makes it possible to uniformly compress the conductive paste, and a multilayer circuit board with stable connection resistance can be obtained.

以上述べたように、本発明の回路基板の製造方法は、少なくとも2層以上の回路パターンを有する内層用の両面回路基板に平滑層を形成することで、加熱加圧時に両面回路基板の変形がなくなり、接続抵抗が安定した多層回路基板が得られる。   As described above, the method for manufacturing a circuit board according to the present invention allows the double-sided circuit board to be deformed during heating and pressurization by forming a smooth layer on the double-sided circuit board for the inner layer having at least two circuit patterns. Thus, a multilayer circuit board with stable connection resistance can be obtained.

本発明は、基材上に一定厚みを有する凸状の回路パターンを形成した内層用の回路基板と、プリプレグシートと、最外層に金属はくを積層し、回路パターンを形成した多層回路基板において、前記内層用の回路基板の凸状の回路パターンが形成されていない基材上に平滑層を形成したことを特徴とする多層回路基板であり、これにより回路基板の凸状の回路パターンとそれが形成されていない基材上との凹凸による段差をなくすことができる。   The present invention provides a circuit board for an inner layer in which a convex circuit pattern having a constant thickness is formed on a base material, a prepreg sheet, and a multilayer circuit board in which a metal foil is laminated on the outermost layer to form a circuit pattern. A multilayer circuit board characterized in that a smoothing layer is formed on a base material on which the convex circuit pattern of the inner layer circuit board is not formed, whereby the convex circuit pattern of the circuit board and the The level | step difference by the unevenness | corrugation with the base material in which no is formed can be eliminated.

また、平滑層の厚みを凸状の回路パターンの厚みと同等とすることで、上記回路基板の回路パターンの厚みが変わっても凹凸がなくなり、導電性ペーストは均一に圧縮され安定した接続抵抗が得られる。   Also, by making the thickness of the smooth layer equal to the thickness of the convex circuit pattern, the unevenness disappears even if the thickness of the circuit pattern of the circuit board is changed, and the conductive paste is uniformly compressed and has a stable connection resistance. can get.

また本発明は、内層用の回路基板が導電性ペーストが充填された貫通導通孔を介して両面接続構造を有し、さらに前記プリプレグシートが導電性ペーストが充填された貫通導通孔を介して、最外層の回路パターンと層間接続構造を有する構成とすることも可能であり、複数の被圧縮性を有する内層用の回路基板と、複数の被圧縮性を有するプリプレグシートを交互に、かつ位置決めして挟持して積層することで高多層の回路基板の構成とすることも可能である。   In the present invention, the circuit board for the inner layer has a double-sided connection structure through a through conduction hole filled with a conductive paste, and the prepreg sheet has a through conduction hole filled with a conductive paste, It is also possible to adopt a configuration having an outermost layer circuit pattern and an interlayer connection structure, and alternately and alternately position a plurality of compressible inner circuit boards and a plurality of compressible prepreg sheets. It is also possible to form a highly multilayer circuit board by sandwiching and laminating.

上記構成においても全面を加熱加圧して上記プリプレグシートを硬化させて金属はくと上記回路基板との接着と層間を電気接続する際に、前記回路基板の変形がなくなるため、導電性ペーストが均一に圧縮され、安定した接続抵抗を得ることができる。   Even in the above configuration, when the entire surface is heated and pressed to cure the prepreg sheet and the metal foil is bonded to the circuit board and electrically connected between the layers, the circuit board is not deformed, so the conductive paste is uniform. And a stable connection resistance can be obtained.

本発明は、平滑層の材質をプリプレグシートまたは基材を構成する硬化性樹脂と同質とすることで層間接着性を向上し、耐熱的及び物理的強度を高めることができる。   In the present invention, interlayer adhesiveness can be improved and heat resistance and physical strength can be improved by making the material of the smooth layer the same as the curable resin constituting the prepreg sheet or the base material.

またプリプレグシートもしくは内層用の回路基板を芳香族ポリアミドを主材料とする織布あるいは不織布と熱硬化型エポキシ樹脂との複合材を用いることで、小径貫通孔のレーザー加工性に優れた物理的強度の高い配線収容性の高い多層回路基板を実現できるものである。   The prepreg sheet or inner layer circuit board is made of a composite material of woven or non-woven fabric and thermosetting epoxy resin, which is mainly made of aromatic polyamide. It is possible to realize a multilayer circuit board having a high wiring capacity.

さらにプリプレグシートもしくは内層用の回路基板をガラス繊維からなる織布あるいは不織布と熱硬化型エポキシ樹脂との複合材を用いることで物理的強度が高く、環境特性や耐熱性の高い多層回路基板を実現できるものである。   Furthermore, the circuit board for the prepreg sheet or inner layer is made of a composite material of woven fabric or nonwoven fabric made of glass fiber and thermosetting epoxy resin, realizing a multilayer circuit substrate with high physical strength, high environmental characteristics and heat resistance. It can be done.

また本発明は、平滑層を形成する工程を、硬化性樹脂を塗布し半硬化状態とすることで多層形成における層間密着性を高めることもでき、一方硬化性樹脂を塗布し硬化した後、表面を研磨することで内層用の回路基板の強度、剛性を高めることで高多層の積層時における位置合わせを容易にするとともに、樹脂流れによる位置ずれを防止する効果がある。   In the present invention, the step of forming the smooth layer can also improve interlayer adhesion in multilayer formation by applying a curable resin to a semi-cured state. On the other hand, after applying and curing the curable resin, the surface By polishing the surface, the strength and rigidity of the circuit board for the inner layer are increased, so that the alignment at the time of stacking high multilayers is facilitated, and the positional shift due to the resin flow is prevented.

以下本発明の実施の形態について図1〜図3を用いて説明する。   Hereinafter, embodiments of the present invention will be described with reference to FIGS.

(実施の形態1)
本発明の多層回路基板の製造方法の第1の実施形態について説明する。
(Embodiment 1)
A first embodiment of a method for manufacturing a multilayer circuit board according to the present invention will be described.

図1(a)〜(h)は本発明の内層用の両面回路基板の製造方法の工程断面図である。図2(a)〜(d)は、本発明の多層回路基板の製造方法を示す工程断面図であり、4層基板を例として示している。   1 (a) to 1 (h) are process cross-sectional views of a method for producing an inner layer double-sided circuit board according to the present invention. 2A to 2D are process cross-sectional views illustrating a method for manufacturing a multilayer circuit board according to the present invention, and show a four-layer board as an example.

まず、多層回路基板のベースとなる内層用の両面回路基板の製造方法を説明する。   First, a method for manufacturing an inner-layer double-sided circuit board serving as a base of a multilayer circuit board will be described.

図1において1は250mm角、厚さ約130μm(t1)のプリプレグシートであり、例えば不織布の芳香族ポリアミド繊維に熱硬化性エポキシ樹脂を含浸させた複合材からなる基材を用いている。2a,2bは、片面にSi系の離型剤を塗布した厚さ約16μmの離型フィルムであり、ここではポリエチレンテレフタレートを用いている。   In FIG. 1, reference numeral 1 denotes a prepreg sheet having a 250 mm square and a thickness of about 130 μm (t1). For example, a base material made of a composite material in which a non-woven aromatic polyamide fiber is impregnated with a thermosetting epoxy resin is used. Reference numerals 2a and 2b denote release films having a thickness of about 16 μm each having a Si-type release agent applied on one side, and here, polyethylene terephthalate is used.

プリプレグシート1と離型フィルム2a,2bの貼り合わせはラミネート装置を用いてプリプレグシート1の樹脂成分を溶融させ接着したものである。3は貫通孔であり、4は導電性ペーストである。使用した導電性ペースト4は、導電性のフィラーとして平均粒径2μmの銅粉末を用い、樹脂としては熱硬化型エポキシ樹脂(無溶剤型)、硬化剤として酸無水物系の硬化剤をそれぞれ85重量%、12.5重量%、2.5重量%となるように3本ロールにて十分に混練したものである。5a,5bは300mm角、厚さ18μmの銅などの金属はくであり、7は半硬化のエポキシ樹脂で形成した平滑層である。   The prepreg sheet 1 and the release films 2a and 2b are bonded together by melting and bonding the resin components of the prepreg sheet 1 using a laminating apparatus. 3 is a through hole, and 4 is a conductive paste. The used conductive paste 4 uses copper powder having an average particle diameter of 2 μm as a conductive filler, a thermosetting epoxy resin (solvent-free type) as a resin, and an acid anhydride type curing agent as a curing agent, respectively. Thoroughly kneaded with three rolls so as to be 1 wt%, 12.5 wt%, and 2.5 wt%. 5a and 5b are 300 mm square and 18 μm thick metal foil such as copper, and 7 is a smooth layer formed of a semi-cured epoxy resin.

まず、両面に離型フィルム2a,2bが接着されたプリプレグシート1(図1(a))の所定の箇所に図1(b)に示すようにレーザ加工法などを利用して貫通孔3を形成する。   First, as shown in FIG. 1B, through-holes 3 are formed at predetermined positions of the prepreg sheet 1 (FIG. 1A) having the release films 2a and 2b bonded on both sides, as shown in FIG. 1B. Form.

次に図1(c)に示すように、貫通孔3に導電性ペースト4を充填し、貫通導通孔を形成する。   Next, as shown in FIG.1 (c), the through-hole 3 is filled with the electrically conductive paste 4, and a through-conduction hole is formed.

導電性ペースト4を充填する方法としては、貫通孔3を有するプリプレグシート1を印刷機(図示せず)のテーブル上に設置し、直接導電性ペースト4を離型フィルム2aの上から充填する。このとき、離型フィルム2a,2bは印刷マスクの役割と、プリプレグシート1の汚染防止の役割を果たしている。   As a method for filling the conductive paste 4, the prepreg sheet 1 having the through holes 3 is placed on a table of a printing machine (not shown), and the conductive paste 4 is directly filled from the release film 2 a. At this time, the release films 2 a and 2 b play a role of a printing mask and a prevention of contamination of the prepreg sheet 1.

次に図1(d)に示すように、プリプレグシート1の両面から離型フィルム2a,2bを剥離する。   Next, as shown in FIG. 1 (d), the release films 2 a and 2 b are peeled from both surfaces of the prepreg sheet 1.

そして、図1(e)に示すように、プリプレグシート1の両面に金属はく5a,5bを重ねる。   And as shown in FIG.1 (e), metal foil 5a, 5b is piled up on both surfaces of the prepreg sheet 1. FIG.

そして真空中で温度約200℃、圧力約4MPaで1時間加熱加圧することにより、図1(f)に示すように、プリプレグシート1の厚みが圧縮される(t2=約90μm)とともにプリプレグシート1と金属はく5a,5bとが接着され、両面の金属はく5a,5bは所定位置に設けた貫通孔3に充填された導電性ペースト4により電気的に接続される。   Then, by heating and pressurizing in vacuum at a temperature of about 200 ° C. and a pressure of about 4 MPa for 1 hour, the thickness of the prepreg sheet 1 is compressed (t2 = about 90 μm) as shown in FIG. And metal foils 5a and 5b are bonded to each other, and the metal foils 5a and 5b on both sides are electrically connected by a conductive paste 4 filled in a through hole 3 provided at a predetermined position.

次に図1(g)に示すように両面の金属はく5a,5bを選択的にエッチングして凸状の回路パターン6a,6bを形成する。   Next, as shown in FIG. 1G, the metal foils 5a and 5b on both sides are selectively etched to form convex circuit patterns 6a and 6b.

そして、図1(h)に示すように回路パターン6a,6bが形成されていない凹部となった基材としてのプリプレグシート1上に平滑層7を設けることで平滑層7を有する内層用の両面回路基板20が得られる。   And as shown in FIG.1 (h), both surfaces for inner layers which have the smooth layer 7 by providing the smooth layer 7 on the prepreg sheet | seat 1 as a base material used as the recessed part in which the circuit patterns 6a and 6b are not formed. A circuit board 20 is obtained.

平滑層7の形成はメチルエチルケトンなどの溶剤で希釈した熱硬化性のエポキシ樹脂をスキージング法などを用いて回路パターン6a,6b厚と同等レベルに塗布し、約150℃の温度で2分間加熱することによって溶剤成分を揮発させてBステージ状態とした。   The smooth layer 7 is formed by applying a thermosetting epoxy resin diluted with a solvent such as methyl ethyl ketone to a level equivalent to the thickness of the circuit patterns 6a and 6b using a squeezing method, and heating at a temperature of about 150 ° C. for 2 minutes. As a result, the solvent component was volatilized to obtain a B-stage state.

両面回路基板20の両面に形成した平滑層7の厚さは回路パターン6a,6bの厚みとほぼ同等とした。   The thickness of the smooth layer 7 formed on both sides of the double-sided circuit board 20 was made substantially equal to the thickness of the circuit patterns 6a and 6b.

ここではBステージ状態の平滑層7を用いたが、エポキシ樹脂を回路パターン6a,6b厚より厚く塗布し、加熱してエポキシ樹脂を硬化させた後、研磨して回路パターン6a,6bを露出させて平滑層7を形成してもよい。   Although the smooth layer 7 in the B stage state is used here, the epoxy resin is applied thicker than the circuit patterns 6a and 6b, heated to cure the epoxy resin, and then polished to expose the circuit patterns 6a and 6b. The smooth layer 7 may be formed.

図2(a)〜(d)は、本発明の第1の多層回路基板の製造方法を示す工程断面図であり、4層基板を例として示している。   2A to 2D are process cross-sectional views illustrating the first method for manufacturing a multilayer circuit board according to the present invention, and show a four-layer board as an example.

まず図2(a)に示すように、図1(a)〜(h)によって製造された、凸状の回路パターン6a,6bを除く基材上の凹部に平滑層7を形成し、導電性ペースト4で両面の回路パターン6a,6bを電気的に接続した両面回路基板20を準備する。   First, as shown in FIG. 2 (a), a smooth layer 7 is formed in the recesses on the substrate excluding the convex circuit patterns 6a and 6b, which are manufactured as shown in FIGS. A double-sided circuit board 20 in which the circuit patterns 6a and 6b on both sides are electrically connected with the paste 4 is prepared.

また図1(a)〜(d)で製造された貫通孔3に導電性ペースト4を充填した貫通導通孔を有するプリプレグシート10a,10bと300mm角、厚さ18μmの銅などの金属はく8a,8bを準備する。   Further, prepreg sheets 10a and 10b each having a through-conduction hole in which the through-hole 3 manufactured in FIGS. 1 (a) to 1 (d) is filled with the conductive paste 4 and a metal foil 8a such as copper having a 300 mm square and a thickness of 18 μm. , 8b are prepared.

次に、図2(b)に示すように、金属はく8b、貫通導通孔を有するプリプレグシート10b、両面回路基板20、貫通導通孔を有するプリプレグシート10a、金属はく8aの順で位置決めして重ねる。   Next, as shown in FIG. 2B, the metal foil 8b, the prepreg sheet 10b having a through-conduction hole, the double-sided circuit board 20, the prepreg sheet 10a having a through-conduction hole, and the metal foil 8a are positioned in this order. And repeat.

そして真空中で温度約200℃、圧力約4MPaで1時間加熱加圧してプリプレグシート10a,10bを硬化することにより、図2(c)に示すようにプリプレグシート10a,10bの厚みが圧縮(t2=約90μm)され、両面回路基板20と金属はく8a,8bとが接着されるとともに、回路パターン6a,6bは導電性ペースト4により金属はく8a,8bとインナビアホール接続される。   Then, the thickness of the prepreg sheets 10a and 10b is compressed (t2) as shown in FIG. 2C by curing the prepreg sheets 10a and 10b by heating and pressurizing in vacuum at a temperature of about 200 ° C. and a pressure of about 4 MPa for 1 hour. The double-sided circuit board 20 and the metal foils 8a and 8b are bonded together, and the circuit patterns 6a and 6b are connected to the metal foils 8a and 8b by the conductive paste 4 and the inner via holes.

そして図2(d)に示すように、両面の金属はく8a,8bを選択的にエッチングして回路パターン9a,9bを形成することで4層基板が得られる。4層以上の多層基板を得ようとすれば上記製造方法で製造した多層の回路基板を両面回路基板の代わりに用い、同じ工程を繰り返せばよい。   Then, as shown in FIG. 2D, a four-layer substrate is obtained by selectively etching the metal foils 8a and 8b on both sides to form circuit patterns 9a and 9b. In order to obtain a multilayer substrate having four or more layers, a multilayer circuit substrate manufactured by the above-described manufacturing method may be used instead of the double-sided circuit substrate, and the same process may be repeated.

本発明の製造方法で作製した多層回路基板は、両面回路基板の回路パターンの凹部に平滑層を設けたことで、両面回路基板の回路パターンの有無に関わらず、加熱加圧時に両面回路基板の変形がなくなり、導電性ペーストが均一に加圧されて、接続抵抗が安定した。また、回路パターンの凹部に前もって平滑層を形成するため、両面回路基板の回路パターンの厚みにも関係なく接続抵抗が安定することを確認した。   The multilayer circuit board produced by the manufacturing method of the present invention is provided with a smooth layer in the concave portion of the circuit pattern of the double-sided circuit board, so that the double-sided circuit board can be There was no deformation, the conductive paste was uniformly pressed, and the connection resistance was stabilized. Further, since the smooth layer was formed in advance in the concave portion of the circuit pattern, it was confirmed that the connection resistance was stable regardless of the thickness of the circuit pattern of the double-sided circuit board.

(実施の形態2)
本発明の多層回路基板の製造方法の第2の実施形態について説明する。
(Embodiment 2)
A second embodiment of the method for manufacturing a multilayer circuit board according to the present invention will be described.

図3(a)〜(c)は、本発明の第2の多層回路基板の製造方法を示す工程断面図であり、6層基板を例としている。   3A to 3C are process cross-sectional views illustrating a method for manufacturing a second multilayer circuit board according to the present invention, taking a six-layer board as an example.

図3において、20a,20bは実施の形態1の図1(a)〜(h)によって製造した内層用の両面回路基板であり、回路パターン6a,6b,6c,6dの凹部に平滑層7を形成し、導電性ペースト4で両面の回路パターン6aと6b、6cと6dを電気的に接続している。8a,8bは300mm角、厚さ18μmの銅などの金属はくである。   In FIG. 3, reference numerals 20a and 20b denote inner-layer double-sided circuit boards manufactured according to FIGS. 1A to 1H according to the first embodiment, and the smooth layer 7 is formed in the recesses of the circuit patterns 6a, 6b, 6c and 6d. The circuit patterns 6a and 6b and 6c and 6d on both sides are electrically connected by the conductive paste 4. 8a and 8b are metal foils such as copper having a 300 mm square and a thickness of 18 μm.

10a,10b,10cは実施の形態1の図1(a)〜(d)によって製造した厚さ130μm(t1)の貫通導通孔を有するプリプレグシートであり、貫通孔3に導電性ペースト4を充填している。   Reference numerals 10a, 10b, and 10c denote prepreg sheets having a through-conduction hole with a thickness of 130 μm (t1) manufactured according to FIGS. 1A to 1D of the first embodiment. The through-hole 3 is filled with the conductive paste 4 is doing.

まず上記両面回路基板20a,20bと上記プリプレグシート10a,10b,10cと上記金属はく8a,8bを準備する。   First, the double-sided circuit boards 20a, 20b, the prepreg sheets 10a, 10b, 10c and the metal foils 8a, 8b are prepared.

そして図3(a)に示すように、金属はく8b、プリプレグシート10c、両面回路基板20b、プリプレグシート10b、両面回路基板20a、プリプレグシート10a、金属はく8aの順で位置決めして重ねる。   As shown in FIG. 3A, the metal foil 8b, the prepreg sheet 10c, the double-sided circuit board 20b, the prepreg sheet 10b, the double-sided circuit board 20a, the prepreg sheet 10a, and the metal foil 8a are positioned and stacked in this order.

次に、真空中で温度約200℃、圧力約4MPaで1時間加熱加圧してプリプレグシート10a,10b,10cを硬化することにより、図3(b)に示すようにプリプレグシート10a,10b,10cの厚みが圧縮(t2=約90μm)され、両面回路基板20a,20bと金属はく8a,8bとが接着されるとともに、回路パターン6a,6b,6c,6dは導電性ペースト4により金属はく8a,8bとインナビアホール接続される。   Next, the prepreg sheets 10a, 10b, and 10c are cured by heating and pressurizing in a vacuum at a temperature of about 200 ° C. and a pressure of about 4 MPa for 1 hour, as shown in FIG. Is compressed (t2 = about 90 μm), the double-sided circuit boards 20a and 20b are bonded to the metal foils 8a and 8b, and the circuit patterns 6a, 6b, 6c and 6d are made of metal foil by the conductive paste 4. 8a and 8b are connected to the inner via hole.

そして図3(c)に示すように、両面の金属はく8a,8bを選択的にエッチングして回路パターン9a,9bを形成することで6層の多層回路基板が得られる。   Then, as shown in FIG. 3C, by selectively etching the metal foils 8a and 8b on both sides to form circuit patterns 9a and 9b, a six-layer multilayer circuit board can be obtained.

本発明の第2の製造方法で作製した多層回路基板も実施の形態1の製造方法で作製した多層回路基板と同様の効果が得られることを確認した。   It was confirmed that the multilayer circuit board manufactured by the second manufacturing method of the present invention can obtain the same effect as the multilayer circuit board manufactured by the manufacturing method of the first embodiment.

なお、実施の形態1,2では被圧縮の基材に不織布の芳香族ポリアミド繊維に熱硬化性エポキシ樹脂を含浸させた複合材を金属はくで挟持して加熱加圧して硬化させた後、エッチングで金属はくを除去したものであるものを用いて説明したが、ガラスクロスに熱硬化性エポキシ樹脂を含浸させた複合材を金属はくで挟持して加熱加圧して硬化させた後、エッチングで金属はくを除去したものを用いても同様の効果を確認している。   In Embodiments 1 and 2, after a composite material in which a non-woven aromatic polyamide fiber is impregnated with a thermosetting epoxy resin is sandwiched between metal foils and heated and pressed to be cured, Although it explained using what removed metal foil by etching, after sandwiching a composite material impregnated with a thermosetting epoxy resin into a glass cloth with metal foil and curing by heating and pressing, The same effect has been confirmed even when the metal foil removed by etching is used.

また、実施の形態1,2では本発明の製造方法で製造した両面の回路基板を用いたが、層間にドリルで孔加工をして電気メッキにて析出した金属で接続した両面回路基板を用いても、回路基板表面の凹部を平滑化することで実施可能である。   In the first and second embodiments, the double-sided circuit board manufactured by the manufacturing method of the present invention is used. However, a double-sided circuit board connected with metal deposited by electroplating after drilling holes between layers is used. However, it can be implemented by smoothing the recesses on the surface of the circuit board.

本発明の内層用の両面回路基板の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the double-sided circuit board for inner layers of this invention 本発明の第1の多層回路基板の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the 1st multilayer circuit board of this invention 本発明の第2の多層回路基板の製造方法を示す工程断面図Sectional drawing which shows the manufacturing method of the 2nd multilayer circuit board of this invention 従来例の内層用の両面回路基板の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the double-sided circuit board for inner layers of a prior art example 従来例の多層回路基板の製造方法を示す工程断面図Cross-sectional process diagram illustrating a conventional method for manufacturing a multilayer circuit board 従来例での多層回路基板での課題を説明するための断面図Sectional drawing for demonstrating the subject in the multilayer circuit board in a prior art example

符号の説明Explanation of symbols

1,21a,21b プリプレグシート
2a,2b,22a,22b 離型フィルム
3,23 貫通孔
4,24 導電性ペースト
5a,5b,8a,8b,25a,25b 金属はく
6a,6b,6c,6d,9a,9b 回路パターン
7 平滑層
10 貫通導通孔を有するプリプレグシート
20,40 両面回路基板
31a,31b,32a,32b 回路パターン
1, 21a, 21b Prepreg sheet 2a, 2b, 22a, 22b Release film 3, 23 Through hole 4, 24 Conductive paste 5a, 5b, 8a, 8b, 25a, 25b Metal foil 6a, 6b, 6c, 6d, 9a, 9b Circuit pattern 7 Smooth layer 10 Pre-preg sheet having through-conduction holes 20, 40 Double-sided circuit board 31a, 31b, 32a, 32b Circuit pattern

Claims (7)

基材の表裏両面に形成された複数の凸状回路パターンを有する両面回路基板と、
前記の回路パターンの表面にプリプレグシートが積層硬化された層と、
前記プリプレグシートが積層硬化された層の表面に形成された最外層の回路パターンとを備え、
前記プリプレグシートは貫通導通孔を有し、
前記凸状回路パターンは、前記貫通導通孔を介して前記最外層の回路パターンと層間接続構造を有し、
前記両面回路基板は、凸状回路パターンが形成されていない基材上の凹部に前記凸状回路パターンと同等の厚みで形成された平滑層を有し、
前記プリプレグシートが積層硬化された層は、前記平滑層と前記両面回路基板の凸状回路パターン上に積層され、
前記貫通導通孔と層間接続構造を有する前記両面回路基板の複数の凸状回路パターンは、それぞれの回路パターンが形成された位置の反対面に回路パターンが有るものと回路パターンが無いものとで構成されていることを特徴とする多層回路基板。
A double-sided circuit board having a plurality of convex circuit patterns formed on both the front and back sides of the substrate;
A layer obtained by laminating and curing a prepreg sheet on the surface of the circuit pattern;
The outermost layer circuit pattern formed on the surface of the layer on which the prepreg sheet is laminated and cured,
The prepreg sheet has a through conduction hole,
The convex circuit pattern has an outermost layer circuit pattern and an interlayer connection structure through the through conduction hole,
The double-sided circuit board has a smooth layer formed with a thickness equivalent to the convex circuit pattern in a concave portion on a base material on which no convex circuit pattern is formed,
The layer obtained by laminating and curing the prepreg sheet is laminated on the smooth circuit layer and the convex circuit pattern of the double-sided circuit board,
The plurality of convex circuit patterns of the double-sided circuit board having the through-conduction hole and the interlayer connection structure are configured with a circuit pattern on the opposite surface of the position where each circuit pattern is formed and a circuit pattern without the circuit pattern. A multilayer circuit board characterized by being made.
平滑層の材質は、プリプレグシートまたは基材を構成する硬化性樹脂と同質であることを特徴とする請求項1に記載の多層回路基板。 The multilayer circuit board according to claim 1, wherein the material of the smooth layer is the same as the curable resin constituting the prepreg sheet or the base material. プリプレグシートもしくは両面回路基板は、芳香族ポリアミドを主材料とする織布あるいは不織布と熱硬化型エポキシ樹脂との複合材であることを特徴とする請求項1に記載の多層回路基板。 2. The multilayer circuit board according to claim 1, wherein the prepreg sheet or the double-sided circuit board is a composite material of a woven or non-woven fabric mainly composed of an aromatic polyamide and a thermosetting epoxy resin. プリプレグシートもしくは両面回路基板は、ガラス繊維からなる織布あるいは不織布と熱硬化型エポキシ樹脂との複合材であることを特徴とする請求項1に記載の多層回路基板。 2. The multilayer circuit board according to claim 1, wherein the prepreg sheet or the double-sided circuit board is a composite material of a woven or nonwoven fabric made of glass fiber and a thermosetting epoxy resin. 両面回路基板は導電性ペーストが充填された貫通導通孔を備え、かつ表裏両面の回路パターンは前記貫通導通孔を介して両面接続構造を有することを特徴とする請求項1に記載の多層回路基板。 2. The multilayer circuit board according to claim 1, wherein the double-sided circuit board includes a through-conduction hole filled with a conductive paste, and the circuit patterns on both the front and back surfaces have a double-sided connection structure through the through-conduction hole. . プリプレグシートは、被圧縮性を有することを特徴とする請求項1に記載の多層回路基板。 The multilayer circuit board according to claim 1, wherein the prepreg sheet has compressibility. 基材の表裏の両面に一定厚みを有する凸状回路パターンを有する両面回路基板を準備する工程と、
前記凸状回路パターン上を除く両面回路基板上の凹部に平滑層を半硬化状態に形成する工程と、
導電性ペーストが充填された複数の貫通導通孔を備えた被圧縮性を有するプリプレグシートを準備する工程と、
前記内層用の回路基板上の前記平滑層と前記凸状の回路パターンとの表面に前記プリプレグシートを積層し、さらに金属はくを最外層に積層する工程と、
積層された前記両面回路基板と前記プリプレグシートと前記金属はくとを加熱加圧し、前記金属はくと前記凸状回路パターンとを前記導電性ペーストを介して電気的に層間接続する工程と、
最外層の前記金属はくを加工して回路パターンを形成する工程とを備え、
前記貫通導通孔と接続する前記両面回路基板の複数の凸状回路パターンは、それぞれの回路パターンが形成された位置の反対面に回路パターンが有るものと回路パターンが無いものとで構成されていることを特徴とする多層回路基板の製造方法。
Preparing a double-sided circuit board having a convex circuit pattern having a constant thickness on both sides of the base material; and
Forming a smooth layer in a semi-cured state in a concave portion on a double-sided circuit board except on the convex circuit pattern;
Preparing a prepreg sheet having compressibility with a plurality of through-conduction holes filled with a conductive paste;
Laminating the prepreg sheet on the surface of the smooth layer and the convex circuit pattern on the circuit board for the inner layer, and further laminating metal foil on the outermost layer;
Heating and pressing the laminated double-sided circuit board, the prepreg sheet, and the metal foil, and electrically connecting the metal foil and the convex circuit pattern via the conductive paste; and
Processing the outermost metal foil to form a circuit pattern,
The plurality of convex circuit patterns of the double-sided circuit board connected to the through-conduction holes are configured with a circuit pattern on the opposite side of the position where each circuit pattern is formed and a circuit pattern without the circuit pattern. A method for manufacturing a multilayer circuit board.
JP2006197904A 2006-07-20 2006-07-20 Multilayer circuit board and manufacturing method therefor Pending JP2006313932A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008147228A (en) * 2006-12-06 2008-06-26 Toppan Printing Co Ltd Wiring board and its manufacturing method
JP2008235640A (en) * 2007-03-22 2008-10-02 Matsushita Electric Ind Co Ltd Circuit board and circuit board manufacturing method
JPWO2008146487A1 (en) * 2007-05-29 2010-08-19 パナソニック株式会社 Circuit board and manufacturing method thereof
JP2011082428A (en) * 2009-10-09 2011-04-21 Hitachi Chem Co Ltd Wiring board, multilayer wiring board, and method of manufacturing multilayer wiring board
JP2011082429A (en) * 2009-10-09 2011-04-21 Hitachi Chem Co Ltd Multilayer wiring board having cavity portion and method of manufacturing the same
JP2013110230A (en) * 2011-11-18 2013-06-06 Fujitsu Ltd Manufacturing method of laminated circuit board, laminated circuit board, and electronic apparatus

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008147228A (en) * 2006-12-06 2008-06-26 Toppan Printing Co Ltd Wiring board and its manufacturing method
JP2008235640A (en) * 2007-03-22 2008-10-02 Matsushita Electric Ind Co Ltd Circuit board and circuit board manufacturing method
JPWO2008146487A1 (en) * 2007-05-29 2010-08-19 パナソニック株式会社 Circuit board and manufacturing method thereof
JP4935823B2 (en) * 2007-05-29 2012-05-23 パナソニック株式会社 Circuit board and manufacturing method thereof
US8446736B2 (en) 2007-05-29 2013-05-21 Panasonic Corporation Circuit board and manufacturing method thereof
JP2011082428A (en) * 2009-10-09 2011-04-21 Hitachi Chem Co Ltd Wiring board, multilayer wiring board, and method of manufacturing multilayer wiring board
JP2011082429A (en) * 2009-10-09 2011-04-21 Hitachi Chem Co Ltd Multilayer wiring board having cavity portion and method of manufacturing the same
JP2013110230A (en) * 2011-11-18 2013-06-06 Fujitsu Ltd Manufacturing method of laminated circuit board, laminated circuit board, and electronic apparatus
US9445511B2 (en) 2011-11-18 2016-09-13 Fujitsu Limited Method for manufacturing layered circuit board, layered circuit board, and electronic device

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