JP2006345277A - Solid state imaging device and method of driving the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of driving an imaging device in an addition reading system for adding signal charges of a plurality of pixels which prevent the added signal charges from leaking from a vertical or horizontal transfer unit without changing the spectrum sensitivity characteristic. <P>SOLUTION: The imaging device may select a first operation mode for transferring signal charges from a sensor 2 without adding at a vertical or horizontal transfer unit 4, 7, or a second operation mode for adding the signal charges read out of the sensor 2 at the vertical or horizontal transfer unit 4, 7. At the second operation mode, the substrate bias voltage in the exposing time is set to the same voltage as the substrate bias voltage Vsub1 at the first operation mode, and risen up to a substrate bias voltage Vsub2 before reading from these sensors 2 to the vertical transfer unit 4 to prevent a plurality of sensors 2 from saturating. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and a method for driving the solid-state imaging device, and in particular, a solid-state imaging device capable of adding and reading out signal charges obtained by imaging without changing the spectral sensitivity of a sensor unit and the solid-state imaging device. The present invention relates to a method for driving an image sensor.

  As a method of reading out signal charges proportional to the amount of irradiation light obtained by the sensor unit of the solid-state image sensor, signal charges read from multiple sensor units are independent without being added by the vertical transfer unit or horizontal transfer unit There are known a non-addition readout method in which the signal charges are transferred to the image sensor and an addition readout method in which signal charges corresponding to the number of pixels read out from a plurality of sensor units are added by a vertical transfer unit or a horizontal transfer unit. The non-additive readout method is often used for taking still images that prioritize resolution, and the all-pixel readout method that simultaneously reads out the signal charges of all pixels and the signal charges of each pixel of even and odd lines alternately. There is a frame reading method for reading out. On the other hand, the addition reading method can increase the frame rate, and is used for autofocus (AF) control, monitoring, moving image shooting (MV), and the like.

  As a solid-state image pickup device of addition readout method and a driving method thereof, a substrate bias voltage is applied so that the saturation signal charge amount of the sensor unit becomes 1 / n, and signal charges for n pixels are applied to the vertical transfer unit or the horizontal transfer unit. In order to prevent the leakage of signal charges, it is known (see Patent Document 1).

In addition, by using the fact that the spectral sensitivity characteristics change when a substrate bias voltage is applied, the spectral sensitivity characteristics are actively controlled, so that shooting conditions such as daytime shooting and nighttime shooting can be handled without using a mechanical filter. What has been made possible is also known (see Patent Document 2).
JP 2000-307961 A JP 2000-133791 A

  In the solid-state imaging device and the driving method thereof in Patent Document 1, in the case of the addition readout method, the substrate bias voltage is set higher than the substrate bias voltage of the non-addition readout method, and the saturation signal charge amount of the sensor unit is 1 / number of added pixels. This prevents the signal charge from leaking out from the vertical transfer unit or the horizontal transfer unit when the signal charge of each pixel is added. However, when the substrate bias voltage is increased, a change in spectral sensitivity characteristic, particularly a change in spectral sensitivity characteristic that lowers the sensitivity on the long wavelength side occurs (see FIG. 3), and there is a problem that the sensitivity is lowered and the white balance is lost.

  In addition, the solid-state imaging device of Patent Document 2 is intended for a filter function that uses a change in spectral sensitivity characteristic due to a substrate bias voltage, and prevents the spectral sensitivity characteristic from changing even in the case of the additive readout method. It is technically completely different from the intended present invention.

  The present invention has been made in view of the above-described circumstances, and an object of the present invention is to perform vertical addition without changing spectral sensitivity characteristics in an addition readout method in which signal charges of a plurality of pixels are added. An object of the present invention is to provide a solid-state imaging device and a solid-state imaging device driving method capable of preventing leakage from the transfer unit or horizontal transfer unit.

The above object of the present invention can be achieved by the following configuration.
(1) A semiconductor substrate, a plurality of sensor units that perform photoelectric conversion arranged in a matrix on the semiconductor substrate, a vertical transfer unit that vertically transfers signal charges read from the plurality of sensor units, A horizontal transfer unit that horizontally transfers the signal charges transferred from the vertical transfer unit, without adding the signal charges read from the plurality of sensor units in the vertical transfer unit or the horizontal transfer unit A first operation mode for independently transferring and a second operation mode for adding signal charges corresponding to the number of pixels read from the plurality of sensor units in the vertical transfer unit or the horizontal transfer unit are selectively used. In the second operation mode, the substrate bias voltage of the semiconductor substrate during the exposure period is set to the same voltage as the substrate bias voltage in the first operation mode, and the vertical direction from the plurality of sensor units Roll A solid-state imaging device comprising bias voltage control means for limiting saturation of the plurality of sensor units by increasing the substrate bias voltage before reading to a sending unit.

  In the solid-state imaging device configured as described above, a first operation mode in which signal charges read from a plurality of sensor units are independently transferred without being added by a vertical transfer unit or a horizontal transfer unit, and a plurality of A second operation mode in which signal charges corresponding to the number of pixels read from the sensor unit are added by the vertical transfer unit or the horizontal transfer unit can be selected. In the second operation mode, the substrate bias voltage during the exposure period is set to the same voltage as the substrate bias voltage in the first operation mode, and the substrate bias voltage is increased before reading the signal charge from the sensor unit to the vertical transfer unit. Bias voltage control means for limiting the saturation of the sensor unit. As a result, it is possible to prevent the leakage of the added signal charge from the vertical transfer unit or the horizontal transfer unit while capturing an image without changing the spectral sensitivity characteristic during the exposure period.

  (2) The solid-state imaging device according to (1), wherein the bias voltage control means is a substrate bias generation circuit connected to the semiconductor substrate.

  In the solid-state imaging device configured as described above, since the substrate bias voltage is applied to the semiconductor substrate by the substrate bias generation circuit, the substrate bias voltage of an arbitrary voltage is applied to the semiconductor substrate by a simple electric circuit, and the sensor The saturation of the part can be limited to an arbitrary level.

Moreover, the said objective based on this invention can be achieved by the following method.
(3) a semiconductor substrate, a plurality of sensor units that perform photoelectric conversion arranged in a matrix on the semiconductor substrate, a vertical transfer unit that vertically transfers signal charges read from the plurality of sensor units, And a horizontal transfer unit that horizontally transfers the signal charges transferred from the vertical transfer unit, wherein the signal charges read from the plurality of sensor units are transferred to the vertical transfer unit or the horizontal transfer unit. A first operation mode in which transfer is performed independently without adding in the transfer unit, and a signal charge corresponding to the number of pixels read from the plurality of sensor units is added in the vertical transfer unit or the horizontal transfer unit. A second operation mode can be selectively set. In the second operation mode, a substrate bias voltage during an exposure period is set to the same voltage as the substrate bias voltage in the first operation mode, and the plurality of sensors A method of driving a solid-state imaging device, wherein saturation of the plurality of sensor units is limited by increasing the substrate bias voltage before reading from the unit to the vertical transfer unit.

  According to such a method, in the second operation mode, the substrate bias voltage in the exposure period is set to the same voltage as the bias voltage in the first operation mode, and the substrate bias is read before reading from the sensor unit to the vertical transfer unit. Since the voltage is increased to limit the saturation of the sensor section, the spectral sensitivity characteristics during the exposure period can be changed without changing the spectral sensitivity in the first operation mode, and the added signal charge can be transferred vertically. Leakage from the horizontal transfer unit or horizontal transfer unit can be prevented.

  According to the present invention, in the second operation mode in which the signal charges corresponding to the number of pixels read from the plurality of sensor units are added by the vertical transfer unit or the horizontal transfer unit, the spectral sensitivity characteristics of the exposure period are not changed. In addition, it is possible to provide a solid-state imaging device and a driving method of the solid-state imaging device that can prevent the added signal charges from leaking from the vertical transfer unit or the horizontal transfer unit.

Hereinafter, an embodiment of a solid-state imaging device according to the present invention will be described with reference to the drawings.
FIG. 1 shows a schematic configuration diagram of a solid-state imaging device. As shown in FIG. 1, in the solid-state imaging device 10, a plurality of sensor units 2 that perform photoelectric conversion, such as PN junction photodiodes, are two-dimensionally arranged in a horizontal and vertical direction on a semiconductor substrate 1. Vertical transfer units 4 are arranged corresponding to the plurality of sensor units 2 arranged in the column direction (vertical direction), and a read gate unit 3 is placed between each sensor unit 2 and the vertical transfer unit 4. Yes. That is, the imaging area 5 is configured by the plurality of sensor units 2, the readout gate unit 3, and the vertical transfer unit 4.

  At one end of each vertical transfer unit 4 (below the imaging area 5 in FIG. 1), a line memory unit 6 and a horizontal transfer unit 7 are arranged in this order, and signal charges vertically transferred by the vertical transfer unit 4 are arranged. Are temporarily stored in the line memory unit 6 and then transferred to the horizontal transfer unit 7. A charge voltage conversion unit 8 and an output terminal 9 are provided at the tip of the horizontal transfer unit 7 in the data transfer direction. The sensor unit 2, the read gate unit 3, the vertical transfer unit 4, the line memory unit 6, the horizontal transfer unit 7, the charge voltage conversion unit 8 and the like are formed on the semiconductor substrate 1.

  The solid-state imaging device 10 includes a timing generation circuit 11 that generates vertical transfer clocks φV1 to φV8, horizontal transfer clocks φH1 to φH2, a line memory clock φLM, and a shutter pulse φsub for driving the solid-state imaging device 10, and a semiconductor substrate 1. Is further provided with a substrate bias generation circuit 12 which is an example of a bias voltage control means for generating a substrate bias voltage Vsub for biasing.

  The substrate bias voltage Vsub generated by the substrate bias generation circuit 12 is applied to the semiconductor substrate 1 from the terminal 21 via the diode D. Further, the shutter pulse φsub generated by the timing generation circuit 11 is DC-cut by the capacitor C and applied to the semiconductor substrate 1 from the terminal 21. A resistor R is connected between the terminal 21 and the ground G. The substrate bias generating circuit 12 is connected to a voltage input unit DCIN for controlling the substrate bias voltage Vsub. The substrate bias generation circuit 12 can control the saturation signal charge amount of the sensor unit 2 by changing the substrate bias voltage Vsub.

  The operation of the solid-state imaging device 10 having the above configuration will be described in detail below. As shown in FIG. 1, the sensor unit 2 performs photoelectric conversion when light is irradiated, and accumulates signal charges having a charge amount corresponding to the light amount. The signal charges accumulated in the sensor unit 2 are read from each sensor unit 2 to the vertical transfer unit 4 together when a read pulse is applied to the read gate unit 3 to open the read gate unit 3. The vertical transfer unit 4 is driven by the eight-phase vertical transfer clocks φV1 to φV8 from the timing generation circuit 11 and vertically transfers the read signal charges. The line memory unit 6 temporarily accumulates signal charges in units of frames and then transfers the signal charges to the horizontal transfer unit 7. The number of phases of the vertical transfer clock φV is not limited to eight, and may be four, for example, depending on the vertical transfer control method.

  The horizontal transfer unit 7 is driven by the two-phase horizontal transfer clocks φH1 to φH2 and transfers the signal charges transferred from the vertical transfer unit 4 in the horizontal direction. The charge-voltage converter 8 converts the transferred signal charges into signal voltages and sequentially outputs them from the output terminal 9.

  Next, control of the substrate bias voltage Vsub, which is the gist of the present invention, will be described with reference to FIGS. The substrate bias voltage Vsub is a first operation mode (non-addition readout method) in which signal charges read from the plurality of sensor units 2 are transferred independently without being added by the vertical transfer unit 4 or the horizontal transfer unit 7. Different control is performed in the second operation mode (addition readout method) in which the signal charges corresponding to the number of pixels read from the plurality of sensor units 2 are added by the vertical transfer unit 4 or the horizontal transfer unit 7.

  2 is a potential distribution diagram in the substrate depth direction around the sensor unit, FIG. 3 is a spectral sensitivity characteristic diagram showing the relationship between the substrate bias voltage and sensitivity, and FIG. 4 is a solid-state imaging device in the second operation mode (addition readout method). It is a drive timing chart figure of.

  First, the first operation mode (non-addition readout method) will be briefly described. In the first operation mode (non-addition readout method), the voltage input unit DCIN is always kept at the “L” level, and a low substrate bias voltage Vsub 1 is applied to the semiconductor substrate 1 from the terminal 21. At this time, as shown in FIG. 2, the charge amount of the signal charge accumulated in the sensor unit 2 is determined by the potential curve 13, and is larger than the charge amount e by the potential curve 14 when the high substrate bias voltage Vsub2 is applied.

  Further, the spectral sensitivity at this time (when the low substrate bias voltage Vsub1 is applied) is represented by a spectral sensitivity characteristic curve 17 as shown in FIG. 3, and the spectral when the high substrate bias voltage Vsub2 is applied to the semiconductor substrate 1 is shown. The sensitivity is higher than the sensitivity characteristic curve 18. In particular, the sensitivity on the long wavelength side is large. The signal charge accumulated in the sensor unit 2 is transferred by the vertical transfer unit 4, the line memory unit 6 and the horizontal transfer unit 7 as described above, and further converted into a voltage signal by the charge / voltage conversion unit 8, and from the output terminal 9. Output. In other words, in the first operation mode (non-addition readout method), the signal charge that is imaged with high sensitivity represented by the spectral sensitivity characteristic curve 17 and accumulated in the sensor unit 2 depends on the amount of the signal charge. It is converted into a voltage signal of the selected voltage and output from the output terminal 9.

Next, the second operation mode (addition readout method) will be described. As shown in FIG. 4, in the second operation mode (addition readout method), an exposure period (t _{0 to} t ₁ ) in which the sensor unit 2 of the solid-state imaging device 10 is irradiated with light and signal charges corresponding to the amount of light are accumulated. ), The voltage input unit DCIN is held at the “L” level, and a low substrate bias voltage Vsub 1 is applied to the semiconductor substrate 1 from the terminal 21. The spectral sensitivity at this time is the same as in the first operation mode, and becomes a high-sensitivity spectral sensitivity characteristic curve 17 with a low substrate bias voltage Vsub1 (see FIG. 3). The signal charge accumulated in the sensor unit 2 is the same as that in the first operation mode, and follows the potential curve 13. That is, it is larger than the potential curve 14 when the high substrate bias voltage Vsub2 is applied (see FIG. 2).

Returning to FIG. 4, at the time t ₁ immediately before the exposure period (t _{0 to} t ₁ ) ends and the accumulated signal charges are read from the sensor unit 2 to the vertical transfer unit 4, the voltage input unit DCIN is at the “H” level. The high substrate bias voltage Vsub 2 is applied to the semiconductor substrate 1 from the terminal 21 to the semiconductor substrate 1. The substrate bias voltage Vsub2 at this time is a voltage value corresponding to the number of pixels to be added. For example, when two pixels are added, the substrate bias voltage Vsub2 is a voltage value that sets the saturation signal charge amount of the sensor unit 2 to ½. It has become.

  When the substrate bias voltage is switched from Vsub1 to Vsub2, the potential curve also changes from the potential curve 13 to the potential curve 14 as shown in FIG. The semiconductor substrate 1 is swept out. Thereby, the charge amount of the signal charge read in the first operation mode (non-addition read method) and the signal charge in the second operation mode (addition read method) obtained by adding two pixels become equal.

When the readout pulse is output from the timing generation circuit 11 to the readout gate unit 3 at the timing t ₂ after the exposure period, the signal charge accumulated in each sensor unit 2 is read out to the vertical transfer unit 4. Thereafter, the substrate bias voltage at the timing t ₃ is returned again to Vsub1 preparation for the next exposure.

  The signal charge read out to the vertical transfer unit 4 is transferred to the line memory unit 6 and the horizontal transfer unit 7 as in the first operation mode, and further converted into a signal voltage by the charge voltage conversion unit 8 and output. Output from terminal 9. As described above, since the amount of signal charge read to the vertical transfer unit 4 is the same in the first operation mode and the second operation mode, the signal charge leaks from the vertical transfer unit 4 or the horizontal transfer unit 7 and blooms. Is prevented from occurring.

  In the above description, the addition readout method is described as adding two pixels, but the present invention is not limited to this, and signal charges of three or more pixels can be added. In this case, the substrate bias voltage is set to a substrate bias voltage corresponding to the number of pixels to be added.

  As described above, according to the solid-state imaging device 10 of the present embodiment, when driven by the addition readout method (second operation mode), the substrate bias voltage is maintained at the low substrate bias voltage Vsub1 during exposure, thereby Since exposure is performed with the same high sensitivity as the spectral sensitivity characteristic of the non-additive readout method (first operation mode), it is possible to prevent the white balance from being lost and the sensitivity from being lowered. In addition, immediately before the signal charge is read from the sensor unit 2 to the vertical transfer unit 4, it is switched to a high substrate bias voltage Vsub2, and the saturation signal charge amount of the sensor unit 2 is increased to 1 / n according to the number of pixels n to be added. Therefore, the added signal charge can be prevented from leaking from the vertical transfer unit 4 or the horizontal transfer unit 7. In other words, the spectral sensitivity characteristic and the signal charge leakage are compatible with each other, the image quality is good, the frame rate is increased, the AF control is facilitated, and a smooth monitor image or moving image can be obtained.

It is a schematic block diagram of a solid-state image sensor. It is a potential distribution figure of the substrate depth direction around a sensor part. It is a spectral sensitivity characteristic figure which shows the relationship between a substrate bias voltage and a sensitivity. It is a timing chart figure which drives a solid-state image sensor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Sensor part 4 Vertical transfer part 7 Horizontal transfer part 10 Solid-state image sensor 12 Substrate bias generation circuit (bias voltage control means)
n Number of pixels t _{0 to} t ₁ Exposure period Vsub1 Substrate bias voltage Vsub2 Substrate bias voltage

Claims (3)

A semiconductor substrate;
A plurality of sensor units that perform photoelectric conversion arranged in a matrix on the semiconductor substrate;
A vertical transfer unit that vertically transfers signal charges read from the plurality of sensor units;
A horizontal transfer unit that horizontally transfers the signal charges transferred from the vertical transfer unit,
A first operation mode in which signal charges read from the plurality of sensor units are independently transferred without being added by the vertical transfer unit or the horizontal transfer unit, and pixels read from the plurality of sensor units A second operation mode in which signal charges corresponding to the number are added in the vertical transfer unit or the horizontal transfer unit can be selectively set, and in the second operation mode, the substrate bias voltage of the semiconductor substrate during the exposure period Is set to the same voltage as the substrate bias voltage in the first operation mode, and by increasing the substrate bias voltage before reading from the plurality of sensor units to the vertical transfer unit, A solid-state imaging device comprising bias voltage control means for limiting saturation.   The solid-state imaging device according to claim 1, wherein the bias voltage control unit is a substrate bias generation circuit connected to the semiconductor substrate. A semiconductor substrate, a plurality of sensor units that perform photoelectric conversion arranged in a matrix on the semiconductor substrate, a vertical transfer unit that vertically transfers signal charges read from the plurality of sensor units, and the vertical transfer unit A horizontal transfer unit that horizontally transfers a signal charge transferred from a solid-state imaging device,
A first operation mode in which signal charges read from the plurality of sensor units are independently transferred without being added by the vertical transfer unit or the horizontal transfer unit, and pixels read from the plurality of sensor units A second operation mode in which signal charges corresponding to the number are added in the vertical transfer unit or the horizontal transfer unit can be selectively set, and in the second operation mode, the substrate bias voltage during the exposure period is set to the first transfer mode. Saturation of the plurality of sensor units is limited by increasing the substrate bias voltage before being read from the plurality of sensor units to the vertical transfer unit. A method for driving a solid-state imaging device.

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