JP2006227151A - Organic el display apparatus and data line driving circuit thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an organic EL (OEL) display apparatus and a data line driving circuit thereof which have little output current variation and low current consumption. <P>SOLUTION: The OEL display apparatus includes; a plurality of data lines which connects OEL elements in row directions, respectively; and a data line driving circuit 20. The data line driving circuit 20 is equipped with: PMOS transistors PM11, PM21, ..., PMN1 which are provided so as to correspond to data lines, respectively, and supply driving currents I01, I02, ..., I0N which drive respective OEL elements to respective data lines; capacitors Cs1, Cs2, ..., CsN which hold driving voltage determined by the driving currents I01, I02, ..., I0N and apply the voltage to gates of the PMOS transistors PM11, PM21, ..., PMN1 so that the PMOS transistors PM11, PM21, ..., PMN1 may supply the suitable driving currents I01, I02, ..., I0N. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an organic EL display device and a data line driving circuit of the organic EL display device, and more particularly to a passive matrix type organic EL display device and a data line driving circuit of the organic EL display device.

  As a display that has low power consumption and high display quality and can be thinned, an organic EL (Electroluminescence) display device (organic EL) configured by arranging a plurality of organic EL elements in a matrix form (matrix form) Panel) is drawing attention.

A passive matrix driving method is known as a driving method of the organic EL element.
In this passive matrix driving method, an anode and a cathode are provided in a direction orthogonal to each other as a plurality of parallel electrodes patterned in stripes corresponding to the organic EL elements, and are arranged at intersections thereof. This is a method of expressing characters and pictures by selecting and illuminating (see, for example, Patent Documents 1 and 2).

  A conventional organic EL display device is driven by a data line driving circuit corresponding to one of the two electrodes described above and a scanning line driving circuit corresponding to the other. The scanning line driving circuit sequentially scans a series of organic EL element groups arranged in the row direction in the column direction, and the data line driving circuit scans the selected organic EL element group in the row selected by the scanning line driving circuit. A driving current is selectively supplied to drive the organic EL element to emit light. The data line driving circuit is composed of a constant current source that is equal to or more than the data line, and pulse (current) amplitude modulation (PAM) or pulse (current) is controlled by a control signal from the control circuit. ) Modulation such as PWM (Pulse Width Modulation) is performed, and gradation display of the organic EL panel is performed.

FIG. 6 is a circuit diagram showing a data line driving circuit in a conventional PWM system.
The data line driver circuit shown in FIG. 6 performs gradation control by a pulse width modulation method. Specifically, the internally generated reference current Iref is converted into a current mirror (hereinafter referred to as “PMOS current mirror”) 81, 82 including a pair of P-channel MOSFETs (hereinafter referred to as “PMOS transistors”), .., 8N are output from output terminals Out81, Out82,..., Out8N, respectively.

  Therefore, the value of the output current I8 can be set to an arbitrary current value by controlling the value of the reference current Iref. The pulse width, that is, the width of the output current I8 (ON / OFF timing) is controlled by PWM signals Ion1, Ion2,..., IonN generated by a digital circuit (not shown) according to external data. N channel MOSFETs (hereinafter referred to as “NMOS transistors”) NM81, NM82,..., NM8N are turned on / off.

FIG. 7 is a circuit diagram showing a data line driving circuit in the conventional PAM system.
Note that a description of the same matters as in FIG. 6 is omitted.
The data line driver circuit shown in FIG. 7 performs gradation control by a pulse amplitude modulation method. Specifically, the currents converted by the D / A converters (DACs) DA91, DA92,..., DA9N arranged at the respective output stages are configured by PMOS current mirrors 91, 92,. The output current I9 amplified at the output stage is output from the output terminals Out91, Out92,..., Out9N, respectively.

  The amplitude of the pulse, that is, the magnitude of the output current I9 is controlled by converting data Data91, Data92,..., Data9N input from the outside into a current value by a D / A converter. The output current I9 is turned on / off by turning on / off the NMOS transistors NM91, NM92,... NM9N.

Incidentally, the organic EL element is a current-driven light emitting element, and the light emission luminance is proportional to the current density flowing through the organic EL element. Therefore, if there is a variation in the output current from the data line driving circuit, luminance unevenness occurs on the display panel constituted by each organic EL element. In particular, variations between adjacent output terminals Out appear as linear luminance unevenness. This linear luminance unevenness is highly recognizable, and it is generally known that the human eye recognizes a luminance difference of about 2%. The luminance difference of about 2% corresponds to about 2% of the output current variation between adjacent data line drive circuits, and thus a data line drive circuit with a small output current variation (output current error) is required.
JP 2002-108284 A JP 2004-302273 A

However, the conventional techniques have the following problems.
If the characteristics of the PMOS transistors constituting the current mirror circuits (hereinafter referred to as “output stage PMOS transistors”) are exactly the same, an output current error will not occur. Due to variations in voltage and the like, it becomes difficult to obtain matching of the output stage PMOS transistor, and variations in output current occur between output terminals.

  Further, since the passive matrix type organic EL display device usually emits light only for the selected organic EL element (to perform duty driving), the passive matrix type organic EL display apparatus is more in comparison with the active matrix type in which the organic EL element is always energized. The light emission time is “1 / number of rows of elements in the organic EL panel”. Therefore, in order to obtain the same luminance on a time average, it is necessary to increase the instantaneous luminance as compared with the active matrix type. For this reason, a large drive current is required as compared with the active matrix type, and the internal resistance of the organic EL is large, so that the drive voltage increases accordingly. Therefore, high-breakdown-voltage MOS transistors are used for the output stage PMOS transistors and other MOS transistors (particularly, NMOS transistors NM80A and NM80B in FIG. 6). Generally, a high breakdown voltage MOS transistor has a larger variation in threshold voltage than a normal MOS transistor, and variations in output currents I8 and I9 also increase.

Here, when the threshold voltage variation of the output stage PMOS transistor is ΔVthp, the output current is expressed by the following equation (1).
Ids = 1 / 2K * (W / L) (Vgs−Vthp ± ΔVthp) ² (1)
From equation (1), the variation amplitude of the drain-source current Ids of the output stage PMOS transistor is greatly affected by ΔVthp. In order to reduce the variation of the current Ids, the gate-source voltage of the output stage PMOS transistor is reduced. Increasing Vgs is one countermeasure.

  However, increasing the gate-source voltage Vgs also increases the voltage at which the linearity region, which is the constant current region of the PMOS transistor, starts. That is, by increasing the gate-source voltage Vgs, the drain-source voltage Vds exhibiting constant current characteristics is also increased. When the constant current region is used as the display voltage of the organic EL panel, the increase of the drain-source voltage Vds increases the power consumption (Ids × Vds) of the output stage. It also causes heat generation. Therefore, there is a limitation in increasing the gate-source voltage Vgs to take measures against variations.

  In the circuits shown in FIGS. 6 and 7, when the output current is changed, the gate-source voltage Vgs also changes. As the current value is reduced, the gate-source voltage Vgs is also reduced, so that the influence of variations in threshold voltage is increased.

  The present invention has been made in view of the above points, and provides an organic EL display device and a data line driving circuit of the organic EL display device that can reduce output current variation and reduce current consumption. With the goal.

  In the present invention, in order to solve the above problem, in a passive matrix type organic EL display device, a plurality of organic EL elements arranged in a matrix, and a plurality of scanning lines connecting the organic EL elements in a row direction, A plurality of data lines for connecting the organic EL elements in the column direction, a scanning line driving circuit for sequentially scanning the scanning lines, and the data lines provided corresponding to the data lines, respectively. A plurality of supply transistor elements for supplying a driving current for driving each organic EL element, and corresponding to each of the supply transistor elements, and each of the supply transistor elements should be driven. A data line driving circuit having a plurality of voltage holding means for holding a driving voltage determined by a current and applying the driving voltage to the supply transistor element. The organic EL display apparatus is provided.

  According to the above configuration, by providing the voltage holding means, each supply transistor element can flow an appropriate drive current to each data line, so that an organic EL display with small variations in drive current can be obtained. An apparatus can be realized.

  Further, since the voltage holding means is provided, it is not necessary to increase the driving voltage applied to each supply transistor element more than necessary.

  The present invention includes a voltage holding unit that holds a driving voltage determined by a current to be driven, so that each supply transistor element is connected to each data line regardless of variations in characteristics of each supply transistor element. Since an appropriate driving current can be passed, the influence of variation in characteristics of each supply transistor element can be reduced or eliminated, and an organic EL display device with small variation in output current can be realized. Thereby, the brightness nonuniformity of a display part can be reduced or suppressed, and visibility can be improved.

  In addition, since the voltage holding means is provided, it is not necessary to increase the drive voltage applied to each supply transistor element in order to prevent variation in characteristics. As a result, since power consumption consumed by each supply transistor element can be reduced, the power consumption of the entire data line driving circuit and further the organic EL display device can be reduced.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a block diagram illustrating the organic EL display device according to the first embodiment.
The organic EL display device shown in FIG. 1 is a passive matrix type organic EL display device, and includes a plurality of organic EL elements E (11) arranged in a matrix of m rows and n columns (matrix). A plurality of scanning lines K1, K2,..., Km that connect E (mn) and each organic EL element E in the row direction, and each organic EL element E in the column direction, respectively. A display unit 1 having a plurality of data lines L1, L2,..., Ln to be connected, a scanning line driving circuit 10 for sequentially selecting and driving the scanning lines K1, K2,. A data line for selectively driving driving currents I01, I02,..., I0N described later to each organic EL element E in the row selected by the line driving circuit to drive the organic EL element E to emit light. Drive circuit 20, scanning line drive circuit 10, and data line drive circuit 2 And a control circuit 30 for controlling the scanning line driving circuit 10 and the data line driving circuit 20 so as to perform the operation described above to and.

Next, the data line driving circuit 20 will be described.
FIG. 2 is a circuit diagram of a data line driving circuit of the driving circuit shown in FIG.
The data line driving circuit 20 includes an NMOS transistor NM10 to which the reference current Iref is input, and unit circuits 21, 22,..., 2N corresponding to the number of organic EL elements E in the column direction (for N terminals). have. In addition, although it is N> = n, below, it demonstrates as N = n.

  These unit circuits 21, 22,..., 2N have the same drive currents (constant currents) I01, I02,. .., Ln are supplied (output) to the corresponding data lines L1, L2,..., Ln via the output terminals Out1, Out2,.

  The data line driving circuit 20 performs PWM gradation control. That is, the gradation control of the organic EL element E is performed by changing the average value of the drive current by changing the ratio of ON and OFF of the switch SW12 described later.

  Next, the configuration of the unit circuits 21, 22,..., 2N will be described. Since these unit circuits 21, 22,. The circuit 21 will be described.

  The unit circuit 21 includes a PMOS transistor PM11 whose source is connected to the power supply voltage VDD, a switch SW11 connected between the gate and drain of the PMOS transistor PM11, and a drain and GND of the PMOS transistor PM11 in this order. A capacitor Cs1 and a switch (discharge switching element) SW13 connected in parallel between the gate and source of the provided switch SW12 and NMOS transistor NM11 and PMOS transistor PM11, respectively, and a drain connected to the switch SW12 and output terminal Out1 And an NMOS transistor NM12 having a source connected to GND.

The NMOS transistor NM11 forms a current mirror circuit with the NMOS transistor NM10, and the reference current Iref is folded back to become a drive current (constant current) I01 by this current mirror circuit. Here, the drive current I01 is
I01 = Iref * k (2)
(K is a coefficient determined by the size ratio of the NMOS transistors NM10 and NM11).

  The switch SW11 supplies the drive current I01 to the data line L1, and charges the capacitor Cs1 with the gate-source voltage Vgs applied to the PMOS transistor PM11 prior to a supply period described later.

The capacitor Cs1 and the switch SW11 constitute a voltage holding unit.
Note that the capacitance value of the capacitor Cs1 is not particularly limited as long as the capacitance value can hold the gate-source voltage Vgs of the PMOS transistor PM11 during an output period described later.

  The switch SW12 is a switch whose one end is connected (fixed) to the drain of the PMOS transistor PM11 and whose other end can be switched between the reference current Iref side and the output terminal Out1 side.

  Here, the drain-source breakdown voltage of the NMOS transistors NM10, 11 is lower than the breakdown voltage at both ends of the switch SW12. The reason for this will be described in detail later.

The switch SW13 constitutes a discharging unit that discharges the voltage charged in the capacitor Cs1.
Examples of these switches SW11, SW12, and SW13 include MOSFETs and transistors.

The NMOS transistor NM12 is a switch for discharging a charge charged in a parasitic capacitance (not shown) of the organic EL element E.
The NMOS transistor NM12 is OFF when the switch SW12 is connected to the output terminal Out1 (when it is on the output terminal Out1 side), and when the switch SW12 is connected to the NMOS transistor (constant current source) 11 (constant). ON (on the current source side).

Next, the operation (action) of each unit circuit will be described with reference to FIG. 3. Hereinafter, the operation (action) of the unit circuit 21 will be described representatively.
FIG. 3 is a diagram showing the operation of each unit circuit shown in FIG.

In FIG. 3, a part of each unit circuit shown in FIG. 2 is simplified.
(Charging period)
First, the capacitor Cs1 is charged.

  Specifically, as shown in FIG. 3A, the switch SW11 is turned on, the switch SW12 is connected to the reference current Iref side, and the switch SW13 is turned off. As a result, the gate and drain of the PMOS transistor PM11 are short-circuited to form a diode connection.

Therefore, the capacitor Cs is charged with a gate-source voltage (driving voltage) Vgs that can pass the drain-source current Ids of the PMOS transistor PM11 equal to the driving current I01 (corresponding to the driving current I01). That is, the drain-source current Ids of the PMOS transistor PM11 is calibrated (calibrated) with respect to the drive current I01.
(Supply period)
Next, the drive current I01 is supplied to the data line.

  Specifically, as shown in FIG. 3B, the switch SW11 is turned OFF, the switch SW12 is connected to the output terminal Out1, and the switch SW13 is turned OFF. Accordingly, the driving current I01, that is, the drain-source current Ids is supplied from the PMOS transistor PM11 to the data line L1 through the output terminal Out1 by the voltage charged in the capacitor Cs1.

This supply period is determined by the number of scanning lines of the display unit 1 and the frame frequency.
(Discharge period)
Next, the voltage (charge) remaining in the capacitor Cs1 is discharged.

  Specifically, as shown in FIG. 3C, the switch SW13 is turned on. As a result, both ends of the capacitor Cs1 have the same potential, and almost all the voltage remaining in the capacitor Cs1 is discharged via the power supply voltage VDD. Therefore, the PMOS transistor PM11 is surely turned off. As a result, malfunction of the PMOS transistor PM11 can be reliably prevented.

Thereafter, the charging period starts again, and the process is continued.
By the way, as described above, the NMOS transistors NM10, 11 are used whose breakdown voltage between the drain and source is lower than the breakdown voltage at both ends of the switch SW12. Hereinafter, this reason will be described with reference to FIG.

  FIG. 4 is a circuit diagram showing a unit circuit when the switch SW12 is formed of a MOSFET and connected to the reference current Iref side. In FIG. 4, a part of each unit circuit shown in FIG. 2 is simplified.

In this embodiment, the switch SW12 connected to the reference current Iref side is an NMOS transistor constant voltage V ₀ is applied to the gate, operates in a saturation region, the driving current I01 has its drain-source voltage because that does not depend on V _SW ds, the drain-source V _SW ds of the switch SW12, so that the most of the voltage of the power supply voltage VDD is applied. Therefore, the withstand voltage of the switch SW12 needs to be higher than the power supply voltage VDD.

Further, the gate-source voltage V _SW gs is adjusted so that the current flowing through the switch SW12 becomes the drive current I01. Therefore, the voltage V _NM ds between the drain and source of the NMOS transistor NM11 is the voltage drop between the gate voltage V ₀ of the switch SW12 and the gate and source of the switch SW12, that is, the voltage V _SW gs from the gate voltage of the switch SW12. The subtracted voltage.

This voltage V _NM ds is much smaller than the power supply voltage VDD. Since the drain-source voltage of the NMOS transistor NM10 may be similar to this, the drain-source breakdown voltage of the NMOS transistor NM11 can be lower than the breakdown voltage at both ends of the switch SW12.

For this reason, variations in threshold values of the NMOS transistors NM10 and NM11 can be reduced, and variations in output current and luminance unevenness can be suppressed.
As described above, according to the organic EL display device of the present embodiment, the thresholds of the PMOS transistors PM11, PM221,..., PMN1 are provided by installing the capacitors Cs1, Cs2,. Even if the ON / OFF characteristics of the voltage vary, the gate-source voltage Vgs determined by the current obtained by multiplying the reference current Iref by a constant with respect to the PMOS transistors PM11, PM21,. Therefore, the drive currents with small variations are output from the unit circuits 21, 22,..., 2N, respectively.

  As a result, the influence of variations in characteristics of the PMOS transistors PM11, PM21,..., PMN1 can be reduced or eliminated, and an organic EL display device with small variations in drive current can be realized. Brightness unevenness can be reduced or suppressed, and visibility can be improved.

  Further, it is not necessary to increase (unnecessarily) the gate-source voltage Vgs of the PMOS transistors PM21, PM22,..., PM2N in order to prevent variation in characteristics. Therefore, the drain-source voltage Vds of the PMOS transistors PM21, PM22,..., PM2N can be lowered. As a result, power consumption (Ids × Vds) in each unit circuit can be reduced.

  In addition, since the influence of fluctuations in the gate voltage Vgs of the PMOS transistor due to fluctuations in the driving current (drain current Ids of the PMOS transistor) is reduced or suppressed, it is possible to realize a data line driving circuit with a small current error in a wide current range. it can.

  Furthermore, in the conventional circuit, the reference current is continuously supplied. However, in this embodiment, the current corresponding to the reference current only needs to be supplied during the data write period. Can reduce the current consumption of the entire organic EL display device.

  Further, as described above, the NMOS transistors NM10 and NM11 have a breakdown voltage between the drain and source that is lower than the breakdown voltage at both ends of the switch SW12. Therefore, the NMOS transistors NM10 and 11 have a relatively low breakdown voltage. (For example, about 5V) can be used. Therefore, the variation in threshold voltage of the NMOS transistors NM10 and NM11 is smaller than that of a MOSFET having a high breakdown voltage (for example, about 50V). Therefore, variation in the output current I due to the current mirror circuit can be suitably prevented.

Next, a second embodiment of the organic EL display device will be described.
FIG. 5 is a circuit diagram showing an organic EL display device according to the second embodiment.
Hereinafter, the organic EL display device according to the second embodiment will be described with a focus on differences from the first embodiment described above, and description of similar matters will be omitted.

The organic EL display device of the second embodiment is the same as the first embodiment except for the data drive circuit.
As shown in FIG. 5, the data line driving circuit 40 of the organic EL element according to the second embodiment performs PAM gradation control. That is, the gradation control of the organic EL element E is performed by changing the drive current to a desired magnitude.

  Hereinafter, the unit circuits 41, 42,..., 4N according to the second embodiment will be described. Since these unit circuits 41, 42,. The unit circuit 41 will be typically described.

The unit circuit 41 has a D / A converter (DAC) 41a.
The D / A converter 41a outputs a drive current I01 having a magnitude corresponding to the digital data Data1 input from the outside.

By changing the magnitude of the digital data Data1, the magnitude of the drive current I01 changes.
In addition, the D / A converter 41a has a breakdown voltage between the nodes N1 and GND of the output unit of the switch SW12 for the same reason as described with reference to FIG. 4 of the first embodiment. The one having a pressure resistance lower than both ends is used.

Also in the organic EL display device of the second embodiment, the same effect as that of the organic EL display device of the first embodiment can be obtained.
The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the specific embodiment.

1 is a block diagram illustrating an organic EL display device according to a first embodiment. FIG. 2 is a circuit diagram of a data line driving circuit of the driving circuit shown in FIG. 1. It is a figure which shows operation | movement of each unit circuit shown in FIG. It is a circuit diagram which shows the unit circuit at the time of comprising switch SW12 by MOSFET and connecting to the reference current Iref side. It is a circuit diagram which shows the organic electroluminescence display of 2nd Embodiment. It is a circuit diagram which shows the data line drive circuit in the conventional PWM system. It is a circuit diagram which shows the data line drive circuit in the conventional PAM system.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Scan line drive circuit 20 Data line drive circuit 40 Data line drive circuit 41a, 42a, ..., 4Na D / A converter Cs1, Cs2, ..., CsN capacitor | condenser E, E (11), E (m 1), E (1 n), E (mn) Organic EL elements I01, I02,..., I0N Drive current Iref Reference current K1,..., Km Scan line L1,. , NM11,..., NMN1 NMOS transistor SW1, SW2, SW3 switch Vgs drive voltage

Claims (10)

In a passive matrix type organic EL display device,
A plurality of organic EL elements arranged in a matrix;
A plurality of scanning lines connecting the organic EL elements in the row direction;
A plurality of data lines connecting the organic EL elements in the column direction;
A scanning line driving circuit for sequentially scanning the scanning lines;
Corresponding to each of the data lines, a plurality of supply transistor elements for supplying a driving current for driving the organic EL elements to the predetermined data lines, and corresponding to the supply transistor elements Each of the supply transistor elements is provided with a plurality of voltage holding means for holding a drive voltage determined by a current to be driven and applied to the supply transistor element;
An organic EL display device comprising: The voltage holding means is
A capacitor for storing the driving voltage;
Prior to a period for supplying the driving current to the data line, a charging switching element for charging the capacitor and storing the driving voltage;
The organic EL display device according to claim 1, comprising:   3. The organic EL display device according to claim 2, wherein the capacitor is charged to a voltage capable of supplying the driving current to the data line.   4. A switch means for connecting the output of the data line driving circuit to the data line or a reference current source for outputting a reference current for supplying the driving voltage to the voltage holding means. An organic EL display device according to any one of the above   5. The organic EL display device according to claim 4, wherein the output of the data line driving circuit is connected to the reference current source via a high-breakdown-voltage N-channel MOSFET in which a constant voltage is applied to the gate. .   6. The organic EL display device according to claim 4, wherein the reference current source is a current mirror that receives a constant current.   6. The organic EL display device according to claim 4, wherein the reference current source is a current output type D / A converter.   The organic EL display device according to claim 1, wherein the data line driving circuit includes a discharging unit that discharges the electric charge charged in the capacitor after a period of supplying the driving current to the data line.   9. The organic EL display device according to claim 8, wherein the discharge means is a discharge switching element connected in parallel to the capacitor. In the data line driving circuit of the passive matrix type organic EL display device,
A plurality of organic EL elements arranged in a matrix are respectively provided corresponding to a plurality of data lines connected in one of the row direction and the column direction, and the predetermined data lines are connected to the data lines. A plurality of supply transistor elements for supplying a drive current for driving each organic EL element;
Voltage holding means provided corresponding to each of the supply transistor elements, each of the supply transistor elements holding a drive voltage determined by a current to be driven, and applied to the supply transistor element;
A data line driving circuit for an organic EL display device, comprising:

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