JP2006203974A - Wiring structure of power converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent generation of an inbalanced state in the current running through a plurality of semiconductor modules connected in parallel per each arm of a power converter. <P>SOLUTION: For DC intermediate electrolytic capacitors 10a, 10b, a hook-shaped slit, as illustrated, is formed at a bus bar 9a (likewise for the negative side) so that respective wiring inductance value from the positive (negative) terminal of the electrolytic capacitors 10a, 10b to positive (negative) terminals of the semiconductor modules 11a, 11b substantially equals each other, thus providing symmetry. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power conversion device using a power semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor), and more particularly to a wiring structure thereof.

FIG. 11 shows a general example of the inverter main circuit.
In FIG. 11, 1 is a DC power supply circuit, 2 is a load such as a motor (M), and 3 is an inverter unit. However, the DC power supply circuit 1 is often composed of an AC power supply, a diode rectifier, and a large-capacity electrolytic capacitor. Reference numeral 4 of the inverter unit 3 is a diode, and 5 is a power semiconductor device such as an IGBT. In the case of a three-phase circuit, six circuits are provided as shown in the figure. A power semiconductor module usually has two upper and lower elements, and an external view thereof is shown in FIG. 6 (P) indicates a positive terminal (plus), 7 (N) indicates a negative terminal (minus), and 8 (U) indicates a phase terminal.

In order to increase the power of the power conversion device, it is possible to connect power semiconductor devices in parallel and arrange the power semiconductor devices connected in parallel to the DC intermediate electrolytic capacitor in a line as shown in FIG. It is disclosed in Patent Literature 1 and Patent Literature 2. FIG. 14 shows an equivalent circuit thereof.
As shown in FIG. 13, in order to suppress the surge voltage of the IGBT element at the time of switching low, the conductor plates (bus bars 9a and 9b) connecting the IGBT modules have a laminated structure so that the current flowing directions are alternated. Often.

  In the bus bar connection, the distance from the positive (positive) terminal of the DC intermediate electrolytic capacitors 10a and 10b to the P terminal of the IGBT module 11a is not equal to the P terminal of the IGBT module 11b. Similarly, the distance from the minus (negative) terminal of the DC intermediate electrolytic capacitors 10a, 10b to the N terminal of the IGBT module 11a is not equal to the N terminal of the IGBT module 11b. That is, since the IGBT module 11a is structurally closer to the electrolytic capacitors 10a and 10b, the wiring from the electrolytic capacitors 10a and 10b is connected to the wiring inductors 12a and 13a as shown in the equivalent circuit of FIG. The inductors 12b and 13b of the IGBT module 11b having a longer length become larger. Therefore, the wiring of the parallel elements is asymmetric.

JP 2004-135444 A JP 2002-044960 A

  In the stack structure as shown in FIG. 13, the current flowing through the IGBT modules 11a and 11b is unbalanced due to the difference in inductance value from the P (N) terminal of the power semiconductor device to the plus (minus) terminal of the DC intermediate capacitor. There is a problem that balance occurs. As a result, especially in a module with a high current sharing ratio at the turn-off transient, the breaking current becomes large and the current change rate di / dt at the time of breaking also becomes large. Therefore, a high surge voltage is generated between the collector and the emitter due to L · di / dt. Will occur. Therefore, the performance of the power semiconductor device cannot be used to the maximum. In the worst case, the surge voltage or current exceeds the rating, and the power semiconductor device may be destroyed.

  Accordingly, an object of the present invention is to prevent an unbalance from occurring in the current flowing through the power semiconductor devices connected in parallel per arm.

In order to solve such a problem, according to the first aspect of the present invention, two semiconductor modules connected in parallel with each other on the circuit are arranged in a line with a DC intermediate electrolytic capacitor in a line and connected via a plate-like bus bar. In the wiring structure of the power converter
A hook-shaped slit is provided in the plate-like bus bar to separate the electrolytic capacitor and the first semiconductor module from each other and to separate all the connection terminals of the first semiconductor module from one end of the bus bar. It is formed.
In the first aspect of the present invention, when the semiconductor modules connected in parallel are n (n is a natural number of 3 or more), n-2 hook-shaped slits separating the connection terminals of the semiconductor modules from each other, It can be additionally formed (invention of claim 2).

In the invention of claim 3, in the wiring structure of the power conversion device in which two semiconductor modules connected in parallel to each other on the circuit are connected to each other via a plate-like bus bar with respect to the DC intermediate electrolytic capacitor,
The plate-like bus bar has a “U” shape that separates the electrolytic capacitor from the first semiconductor module and separates all connection terminals of the first semiconductor module from both ends of the bus bar. A slit is formed.
According to the third aspect of the present invention, when the semiconductor modules connected in parallel are n (n is a natural number of 3 or more), the “U” -shaped slits separating the connection terminals of the semiconductor modules from each other are n−2. It can be additionally formed (invention of claim 4).

According to the invention of claim 5, the wiring of the power converter for connecting the four semiconductor modules connected in parallel to each other in parallel on the circuit to the DC intermediate electrolytic capacitor in two rows through a plate-like bus bar In structure
The plate-like bus bars are separated from the electrolytic capacitors and the first semiconductor modules in each row, and between all connection terminals of the first semiconductor modules in the rows and the ends of the bus bars, respectively. It is characterized by forming a “U” -shaped slit.
In the invention of claim 5, when the semiconductor modules connected in parallel are 2n (n is a natural number of 3 or more), the "U" -shaped slits separating the connection terminals of the semiconductor modules from each other are n-2. It can be additionally formed (invention of claim 6).

  According to the present invention, when connecting the power semiconductor modules connected in parallel on the circuit and arranged in one direction to the electrolytic capacitors via the bus bars, the power bars are formed by forming slits in the bus bars. Since the wiring inductance values from the P (N) terminal to the DC intermediate electrolytic capacitor are made substantially equal, the currents flowing through the semiconductor devices connected in parallel on the circuit are balanced with each other, Benefits that can be exploited to the performance limit.

1 and 2 are block diagrams showing a first embodiment of the present invention. FIG. 1 and FIG. 2 are functionally exactly the same except that the slits are formed differently. L1 to L3 indicate inductance values of arrows indicating current paths.
As is apparent from these drawings, a feature is that a hook-shaped or “L” -shaped slit SL is formed in the bus bar 9a with respect to the conventional one. As a result, the distance from the positive pole of the DC intermediate electrolytic capacitors 10a and 10b to the P end of the IGBT module 11a and the distance to the P end of the IGBT module 11b can be adjusted, and both can be made substantially equal. Become.

  FIG. 3 shows an equivalent circuit of FIGS. According to this circuit, the inductance value LP1 from the positive pole of the DC intermediate electrolytic capacitor to the P end of the IGBT module 11a is LP1 = L1 + L2-M (mutual inductance), and the inductance value to the P end of the IGBT module 11b. LP2 is LP2 = L1 + L3. Therefore, if the length of the slit is adjusted so that L2−M = L3, LP1 = LP2.

  Similarly, if a hook-shaped slit SL is formed for a negative (minus) bus bar, inductance values LN1, from the negative pole of the DC intermediate electrolytic capacitor to each N (negative) terminal of the IGBT modules 11a and 11b LN2 is LN1 = L4 + L5-M and LN2 = L4 + L6, respectively. Therefore, LN1 = LN2 can be obtained by adjusting the length of the slit to L5-M = L6.

1 and 2, the wiring of each module is structurally symmetrical (LP1 + LN1 = LP2 + LN2), and current balance can be achieved. In addition, since there is a mutual inductance M in the portion where the slit is inserted, considering this, the end point of the slit is the second module in which the P (N) terminals of the first and second IGBT modules are connected to each other. Near the P (N) terminal side.
FIG. 4 is an equivalent circuit in the case where the fuse 14 is connected between the DC intermediate capacitor and the bus bar, and the present invention can be applied to such a case.

FIG. 5 is a block diagram showing a second embodiment of the present invention.
This example is the same as FIGS. 1 and 2 except that the slit SL is “U” -shaped, and therefore the details are omitted.
FIG. 6 is a block diagram showing a modification of FIG. In this example, four modules with two elements are arranged in two horizontal rows and two vertical rows, which are basically the same as in FIG.

FIG. 7 shows a modification of FIG. This is an example in which three IGBT elements are connected in parallel on the circuit, and is characterized in that two hook-shaped slits, SL1 and SL2, are formed as shown in FIG. FIGS. 7A and 7B show a positive bus bar and a negative bus bar, respectively. The other parts are the same as those shown in FIGS.
FIG. 8 shows a modification of FIG. 8A and 8B show a positive bus bar and a negative bus bar, respectively. In this example, three IGBT elements are connected in parallel on the circuit, and two “U” -shaped slits are formed as SL1 and SL2 instead of one as shown in FIG. Others are the same as in FIG.

FIG. 9 shows a modification of FIG. 8, and FIG. 10 shows another modification of FIG.
9 and 10 are examples in which three IGBT elements are connected in parallel on the circuit, and there are also three slits. In FIG. 9, SL1, SL2, and SL3 are alternately arranged in the direction of the opening. In contrast, in FIG. 10, the openings of SL2 and SL3 are arranged so as not to face each other. However, since the wiring inductance values of the modules 11a and 11b and the modules 11c and 11d from the electrolytic capacitors 10a and 10b are symmetric, it can be said that the functions are the same as those in FIGS.

  In addition, in the case where 2n (natural number of 3 or more) or more are connected in parallel as shown in FIG. 6, such as 6, 8, 10,. It is possible to cope with it.

The block diagram which shows 1st Embodiment of this invention Configuration diagram showing a modification of FIG. Equivalent circuit diagram corresponding to FIGS. Equivalent circuit diagram showing the case where the fuse is connected in FIG. The block diagram which shows 2nd Embodiment of this invention The block diagram which shows the modification of FIG. The block diagram which shows another modification of FIG. The block diagram which shows 3rd Embodiment of this invention The block diagram which shows the modification of FIG. The block diagram which shows another modification of FIG. Circuit diagram showing a general example of an inverter main circuit External view of two-element IGBT module example Plan view showing a stack structure example Equivalent circuit diagram corresponding to FIG.

Explanation of symbols

  9a, 9b ... Conductor plates (bus bars), 10a, 10b, 10c ... Electrolytic capacitors, 11a, 11b, 11c, 11d ... IGBT (insulated gate bipolar transistor) modules, 12b, 12b, 13a, 13b ... Inductance, 14 ... Fuses, SL, SL1 to SL3 ... slits.

Claims (6)

In the wiring structure of the power conversion device in which two semiconductor modules connected in parallel to each other on the circuit are connected to each other through a plate-like bus bar, with respect to the DC intermediate electrolytic capacitor,
The plate-shaped bus bar has a hook-shaped slit separating the electrolytic capacitor and the first semiconductor module, and separating all connection terminals of the first semiconductor module and one end of the bus bar. A wiring structure of a power converter characterized by being formed.   When the number of semiconductor modules connected in parallel is n (n is a natural number of 3 or more), n-2 hook-shaped slits are formed to separate the connection terminals of each semiconductor module from each other. Item 2. A wiring structure of a power conversion device according to Item 1. In the wiring structure of the power conversion device in which two semiconductor modules connected in parallel to each other on the circuit are connected to each other via a plate-like bus bar, with respect to the DC intermediate electrolytic capacitor,
The plate-like bus bar has a “U” shape that separates the electrolytic capacitor from the first semiconductor module and separates all connection terminals of the first semiconductor module from both ends of the bus bar. A wiring structure of a power conversion device, wherein a slit is formed.   When the semiconductor modules connected in parallel are n (n is a natural number of 3 or more), n-2 “U” -shaped slits that separate the connection terminals of each semiconductor module are additionally formed. The wiring structure of the power converter device according to claim 3. In the wiring structure of the power conversion device in which four semiconductor modules connected in parallel to each other on the circuit are connected in parallel to each other through a plate-like bus bar with respect to the DC intermediate electrolytic capacitor,
The plate-like bus bars are separated from the electrolytic capacitors and the first semiconductor modules in each row, and between all connection terminals of the first semiconductor modules in the rows and the ends of the bus bars, respectively. A wiring structure of a power conversion device, wherein a “U” -shaped slit is formed.   When the semiconductor modules connected in parallel are 2n (n is a natural number of 3 or more), n−2 “U” -shaped slits separating the connection terminals of each semiconductor module are additionally formed. The wiring structure of the power converter according to claim 5.

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