JP2006010999A - Image display device and semiconductor device provided with protection circuit for image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display device capable of protecting a display part and drive circuit parts from malfunction or damages when a signal supplied from the external is interrupted due to an unexpected cause. <P>SOLUTION: A display part D has pixels arrayed like a matrix, a system control part S supplies signals including an image signal and a control signal, and drive circuit parts H, V drive the display part D in accordance with the control signal supplied from the system control part S and display an image on the display part D on the basis of the image signal supplied from the system control part S. A protection circuit Z is inserted into a route of signals to be supplied from the system control part S to the drive circuit parts H, V. When the supply of the control signal from the system control part S is interrupted, the protection circuit Z detects the interruption, shuts off the external supply of the control signal from the system control part S, internally generates a substitutive control signal, and supplies the substitutive control signal to the drive circuit parts H, V. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an image display apparatus including a display unit, a drive circuit unit, and a system control unit. More specifically, when a control signal externally supplied from the system control unit to the drive circuit unit is interrupted due to an unexpected cause, a protection circuit that internally generates an alternative control signal and supplies it to the drive circuit unit About.

  A conventional image display apparatus basically includes a display unit, a drive circuit unit, and a system control unit. The display unit has pixels arranged in a matrix. The system control unit supplies a signal including an image signal and a control signal. The drive circuit unit drives the display unit according to the control signal supplied from the system control unit, and displays an image on the display unit based on the image signal supplied from the system control unit. In a small image display device (display device), a display unit and a drive circuit unit are integrally formed in a single panel. In a large display device, the display unit is configured by a panel, and the drive circuit unit is connected to the panel as a separate driver IC. The system control unit is generally provided as a video display system mounted on an external substrate.

  In the case of an active matrix display portion, each pixel is arranged between a signal line and a scanning line that are orthogonal to each other. The drive circuit section is divided into a horizontal drive circuit connected to the signal line and a vertical drive circuit connected to the scanning line. The vertical drive circuit scans the scanning lines line-sequentially and selects a pixel for each line. The horizontal drive circuit is connected to the signal line and writes an image signal to the selected pixel to display an image.

As technologies related to the protection circuit of the image display device having such a configuration, there are Patent Literature 1 and Patent Literature 2 below.
JP 2002-185299 A JP 2002-223155 A

  The horizontal drive circuit and the vertical drive circuit described above may be incorporated in an image display device in the form of a driver IC. A signal including a control signal and an image signal is input from the external video display system to the driver IC. When the supply of input signals is interrupted due to an unexpected cause, the driver IC stops or malfunctions. In such a state, a problem may occur depending on the state of the panel constituting the display unit. The interruption of the input signal may cause the driver IC or the display panel to malfunction, and may cause physical damage.

  For example, when the control signal or the image signal is interrupted with respect to the horizontal drive circuit connected to the signal line side, the signal line potential becomes indefinite. A pixel connected to each signal line is composed of a light emitting element such as an organic EL or a thin film transistor (TFT) for driving the light emitting element. Due to variations in TFT characteristics and short circuit of high resistance / capacitance that is not a problem in normal driving, the potential of undefined level wiring is raised (lowered) to a potential different from the desired potential. There is a possibility that a large current flows like avalanches in a light emitting element such as an EL connected to the display panel, which may damage the display panel, the horizontal drive circuit, and the attached power supply circuit.

  The same danger can be considered in the vertical drive circuit connected to the scanning line side. On the scanning line side, the control signal may stop while a certain scanning line in the display panel is selected. In this state, similar to the phenomenon that occurs on the signal line side, a specific scan line in the panel is generated due to an avalanche large current generated due to a short circuit of high resistance and high capacity that was not a problem during normal high-speed scanning. Alternatively, there is a possibility of damaging a specific pin of the driver IC connected to this.

  In view of the above-described problems of the related art, the present invention provides an image display device that can protect a display unit and a drive circuit unit from malfunction or damage when an externally supplied signal is interrupted due to an unexpected cause. Objective. In order to achieve this purpose, the following measures were taken.

  That is, the present invention includes a display unit, a drive circuit unit, and a system control unit, the display unit having pixels arranged in a matrix, and the system control unit supplies a signal including an image signal and a control signal. The drive circuit unit drives the display unit according to a control signal supplied from the system control unit, and displays an image on the display unit based on an image signal supplied from the system control unit. A protection circuit is inserted in a path of a signal supplied from the system control unit to the drive circuit unit, and the protection circuit detects that the supply of the control signal from the system control unit is interrupted. While detecting and shutting off the external supply of the control signal from the system control unit, an alternative control signal is generated internally and supplied to the drive circuit unit.

  Preferably, when the control signal externally supplied from the system control unit is restored, the protection circuit detects this and sends the control signal received from the system control unit to the drive circuit unit as it is. Stop the internally generated alternative control signal. The protection circuit detects when an externally supplied control signal from the system control unit is interrupted and shuts off the supply of the image signal, while internally generating a signal of a predetermined potential. This is supplied to the drive circuit section.

  The present invention includes a semiconductor device in which a protection circuit incorporated in an image display device including a display unit, a drive circuit unit, and a system control unit is integrated. The display unit includes pixels arranged in a matrix, the system control unit supplies a signal including an image signal and a control signal, and the drive circuit unit responds to the control signal supplied from the system control unit. The display unit is driven, and an image is displayed on the display unit based on an image signal supplied from the system control unit. Here, the protection circuit is disposed in a path of a signal supplied from the system control unit to the drive circuit unit, and the protection circuit is provided when the supply of the control signal from the system control unit is interrupted. This is detected, and external supply of the control signal from the system control unit is cut off, while an alternative control signal is generated internally and supplied to the drive circuit unit.

  According to the present invention, when a driving signal such as a control signal or an image signal is interrupted from the outside due to disconnection or system trouble, the protection circuit of the present invention automatically detects the disconnection of the external input signal. Instead, an internally generated drive signal is supplied to a drive circuit unit (driver) and a display unit (display panel). Thereby, the driver can maintain normal operation. At this time, the image signal is switched to a signal having a predetermined potential, whereby each signal line is fixed to a predetermined potential (for example, black level). Therefore, when viewed from the panel side, even if the supply of the drive signal from the external system is interrupted, as long as the power is supplied, the function of the protection circuit according to the present invention always performs normal drive in the state of black display. The same state as is obtained. Therefore, it is possible to prevent abnormal panel driving such as indefinite signal line potential level or stop of a specific scanning line in a constantly selected state. Furthermore, the panel itself, system, power supply caused by abnormal driving of these panels can be prevented. This makes it possible to avoid the destruction of the product.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of an image display apparatus according to the present invention. As shown in the figure, this image display apparatus basically includes a display unit D, a drive circuit unit, and a system control unit S. The display unit D includes signal lines and scanning lines that are orthogonal to each other, and pixels that are arranged at intersections thereof. The system control unit S supplies driving signals including the image signal DATA and various control signals HCK, HSP, BANK, VCK, VSP1, and VSP2. The drive circuit unit is divided into a horizontal drive circuit H and a vertical drive circuit V. The display unit D is driven according to the control signal supplied from the system control unit S, and the image signal DATA supplied from the system control unit S is also used. Based on this, an image is displayed on the display unit D. Specifically, the vertical drive circuit V is connected to the scanning lines of the display unit D, operates in accordance with the control signals VCK, VSP1, and VSP2, and selects the scanning lines line-sequentially. Select a pixel. On the other hand, the horizontal drive circuit H is connected to a signal line, operates in response to the control signals HCK, HSP, and BANK, and writes the image signal DATA to each selected pixel.

  In the case of a small image display device, the display unit D, the horizontal driving circuit H, and the vertical driving circuit V shown in the figure are integrally formed in one panel. In the case of a large image display device, a horizontal drive circuit H and a vertical drive circuit V are provided separately from the panel constituting the display unit D. The horizontal drive circuit H and the vertical drive circuit V are integrated in the driver IC, and are connected to the display unit D by wiring L such as TAB or FPC. On the other hand, the system control unit S is supplied as an external video display system incorporated in a separate substrate.

  As a feature of the present invention, a protection circuit Z is inserted in the path of a signal supplied from the system control unit S to the drive circuit unit including the horizontal drive circuit H and the vertical drive circuit V. The protection circuit Z is a single semiconductor device (IC chip). In some cases, the protection circuit Z can be integrated into a driver IC in which a drive circuit is integrated. When the supply of the control signals HCK, HSP, BANK, VCK, VSP1, and VSP2 from the system control unit S is interrupted, the protection circuit Z detects this and blocks external supply of the control signal from the system control unit S. On the other hand, an alternative control signal is generated internally and supplied to the drive circuit unit. When the control signal externally supplied from the system control unit S returns, the protection circuit Z detects this and sends the control signal received from the system control unit S to the drive circuit unit as it is. Stop the generated alternative control signal. When the supply of a control signal externally supplied from the system control unit is interrupted, the protection circuit Z further cuts off the supply of the image signal DATA, while internally generating a signal of a predetermined potential and generating it as a horizontal drive circuit H is supplied.

  There are a plurality of signals sent from the system control unit S to the horizontal drive circuit H and the vertical drive circuit V, and differ depending on the display device. For example, in the case of a CRT, only three types of horizontal sync signal, vertical sync signal, and image signal are required. In matrix displays that transmit image signals digitally, or in matrix displays that use an RGB selector switch to reduce the number of external input terminals to 1/3, switching signals when switching RGB within the dot clock or panel Various drive signals are required. The embodiment of FIG. 1 is a case where the display unit D is composed of an organic EL panel, and an image signal DATA and control signals HCK, HSP, and BANK are supplied from the system control unit S to the horizontal drive circuit H. On the other hand, control signals VCK, VSP1, and VSP2 are supplied from the system control unit S to the vertical drive circuit V. HCK is a clock for operating a shift register incorporated in the horizontal drive circuit H, HSP is also a start pulse applied to the top stage of the shift register, and BANK is a data display for the previous screen and data for the next screen in the panel. This is a bank selection signal in the case of having a multiple bank mechanism for simultaneously performing the fetching. On the other hand, VCK applied to the vertical drive circuit V is a clock for shifting the scanning line, VSP1 is a start pulse for starting display, and VSP2 is an erase start pulse for controlling the light emission period width. These various control signals are normally supplied by a timing signal generator in the system control unit S, but when the protection circuit Z detects the supply interruption of the control signal, all the corresponding control signal groups in the protection circuit Z are displayed. Can be generated.

  FIG. 2 is a waveform diagram of various signals shown in FIG. Four waveforms above the one-dot chain line represent signals HCK, HSP, DATA, and BANK supplied to the horizontal drive circuit. The three waveforms shown on the lower side of FIG. 2 represent signals VCK, VSP1, and VSP2 supplied to the vertical drive circuit. As is apparent from the waveform diagram, each control signal has a pulse waveform with a predetermined period.

  FIG. 3 is a circuit diagram showing a specific configuration of protection circuit Z shown in FIG. An input image signal line 1 and an input control signal line 3 are connected to the protection circuit Z from the system control unit side. An image signal DATA is externally input to the input image signal line from the system control unit side. Similarly, the control signal CTRL is externally supplied to the input control signal line 3 from the system side. In the figure, for easy understanding, one of various control signals HCK, HSP, BANK, VCK, VSP1, and VSP2 is represented by CTRL. As described above, the control signal CTRL is a pulse waveform having a predetermined period. The period and the pulse width differ depending on the type of actual control signal.

  The protection circuit Z includes an output image signal line 12 and an output control signal line 13. The output image signal line 12 supplies the image signal DATA to the horizontal drive circuit side. The output control signal line 13 supplies a control signal CTRL to the horizontal drive circuit and the vertical drive circuit.

  The protection circuit Z includes a clock oscillator 5, an internal signal generation start counter 6, a reset signal generator 7, a switch switch 8, a control signal generator 9, an output buffer 10, an image signal generator 11, and switches SW1 and SW2. Etc. are included.

  All the input lines 1 and 3 are provided with pull-down resistors 2 and 4 so that the potential is fixed to the ground level when the input becomes indefinite. Specifically, a pull-down resistor 2 is connected to the input image signal line 1, another pull-down resistor 4 is connected to the input control signal line 3, and each line group is pulled down to the ground level. The clock oscillator 5 generates an internal clock CLK having a frequency sufficiently higher than that of the signal CTRL input from the outside. As long as power is supplied, the clock oscillator 5 generates a clock pulse CLK having a constant frequency regardless of the signal CTRL input from the outside. This clock pulse CLK is used as a clock for the internal signal generation start counter 6. The internal signal generation start counter 6 continues counting unless the reset signal RST is input from the reset signal generator 7 and outputs a ripple carry signal RC when the set count value or bit saturation is reached. The reset signal generator 7 outputs a reset signal RST when a high level voltage is input to the input control signal line 3. That is, since the reset signal generator 7 periodically receives a high level voltage while the control signal CTRL is stably supplied from the input control signal line 3, the internal signal generation start counter 6 has a load value. The RC signal cannot be output after being reset before.

  On the other hand, when the external input signal CTRL is interrupted due to an unforeseen cause, the input signal line 3 is fixed to the ground potential (low level) by the pull-down resistor 4, so that the reset signal generator 7 outputs the reset signal RST. Therefore, the internal signal generation start counter 6 is not reset and outputs the RC signal according to the set count value or bit saturation. The reset signal RST output from the reset signal generator 7 is also used as a reset signal for the switch switch 8 and the control signal generator 9. When the output RC of the internal signal generation start counter 6 is input, the switch switch 8 controls the switch SW1. As a result, the control signal generator 9 internally creates the control signal CTRL that is connected to the input terminal of the output buffer 10 connected to the output control signal line 13 from the terminal to which the external input signal CTRL is connected through. Switch to. The switch switch 8 further controls the switch SW2 in response to the RC signal. As a result, the input terminal connection destination of the output buffer 10 connected to the output image signal line 12 is switched from the input image signal line 1 to the image signal DATA generated internally by the image signal generator 11. The image signal created internally by the image signal generator 11 is a ground potential signal or a pattern signal capable of displaying a predetermined message, and is different from the normal image signal DATA supplied from the system control unit. The image signal generator 11 is programmed in advance to output an internal image signal capable of displaying a desired pattern.

  The internal control signal CTRL output from the control signal generator 9 is exactly the same as the external control signal CTRL supplied from the system control unit. For example, when the external clock signal HCK supplied from the system control unit is interrupted, the control signal generator 9 internally generates a signal completely identical to HCK and supplies it to the output control signal line 13. As is clear from this, in the actual configuration of the protection circuit Z, the reset signal generator 7, the internal signal generation start counter 6, the switch switch 8, the control signal generator 9, and the switch SW1 are different types of input control signals. It is provided corresponding to each. FIG. 3 illustrates the operation of the protection circuit Z as represented by the control signal CTRL in order to simplify the display and facilitate understanding.

  Once the switch switch 8 and the control signal generator 9 receive the RC signal and become active, the switch switch 8 and the control signal generator 9 maintain the generation of the internal control signal and the connection to the output buffer 10 until the reset signal RST is received. That is, until the RC signal is received, the input from the outside is simply sent to the output buffer as it is, but once the RC signal is received, the input from the outside is cut off and the connection is transferred to the inside, and the internally generated control signal CTRL and The image signal DATA continues to flow through the corresponding buffer 10. Thereafter, when the RST signal is received, the switches SW1 and SW2 are switched again in such a direction that the input from the outside is directly passed to the buffer. The control signal generator 9 generates an internal control signal in synchronization with the clock signal CLK supplied from the clock oscillator 5. In this way, the output image signal line 12 connected to one output buffer 10 outputs the image signal DATA normally supplied from the external system, and outputs an internally generated image signal when the external signal is indefinite. The internal image signals are all black level signals or pre-programmed pattern signals. As this pattern, for example, a pattern or a message that displays on the screen that the signal from the outside is interrupted can be selected. The control signal CTRL normally supplied from the external system is output as it is from the output control signal line 13 connected to the other output buffer 10, and an internally generated control signal is output when this external signal is indefinite. The protection circuit Z having such a configuration is formed separately from the driver IC that drives the panel, and is disposed between the external system and the driver IC. Alternatively, the protection circuit Z may be incorporated in the driver IC.

  The protection circuit according to the present invention automatically discriminates even when a signal is interrupted from the outside due to disconnection or system trouble, and internally generates driving signals (control signals and image signals) for drivers and displays. Supply to the panel. Since the signal line on the panel side is fixed to the ground potential by the black level signal supplied from the protection circuit, the panel side always displays black as long as this protection circuit is operating even if the control signal is interrupted from the outside. This is the same as performing normal driving in this state. Accordingly, it is possible to avoid destruction of the panel itself, the system, and the power source due to abnormal panel driving, such as indefinite potential level of the signal line or stoppage of a specific scanning line in a constantly selected state.

  FIG. 4 is a block diagram illustrating a specific configuration example of the display unit and the drive circuit unit illustrated in FIG. This example shows a configuration of a general organic EL display device. This image display device includes a display unit D in which pixel circuits (PXLC) 101 are arranged in an m × n matrix, a horizontal drive circuit H, a first vertical drive circuit V1, a second vertical drive circuit V2, and a horizontal drive circuit H. The selected signal lines DTL101 to DTL10n to which image signals corresponding to the luminance information are supplied, the scanning lines WSL101 to WSL10m selectively driven by the first vertical driving circuit V1, and the scanning lines selectively driven by the second vertical driving circuit V2 DSL101-DSL10m. The first vertical drive circuit V1 operates in response to the clock signal VCK supplied from the protection circuit, and sequentially selects the scanning lines WSL101 to WSL10m by sequentially transferring the start pulse VSP1. Similarly, the second vertical drive circuit V2 operates according to VCK and sequentially scans the scanning lines DSL101 to DSL10m by sequentially transferring VSP2. The first vertical drive circuit V1 and the second vertical drive circuit V2 constitute a vertical scanning circuit V. The horizontal drive circuit H operates in response to the clock signal HCK supplied from the protection circuit and sequentially transfers the start pulse HSP, thereby applying the image signal DATA to the signal lines DTL101 to DTL10n.

  FIG. 5 is a circuit diagram showing a configuration example of the pixel circuit shown in FIG. As shown in the figure, the pixel circuit 101 is basically composed of a p-channel type thin film field effect transistor (TFT). That is, the pixel circuit 101 includes a drive TFT 111, a switching TFT 112, a sampling TFT 115, an organic EL element 117, and a storage capacitor C111. The pixel circuit 101 having such a configuration is arranged at an intersection between the signal line DTL101 and the scanning lines WSL101 and DSL101. The signal line DTL101 is connected to the drain of the sampling TFT 115, the scanning line WSL101 is connected to the gate of the sampling TFT 115, and the other scanning line DSL101 is connected to the gate of the switching TFT 112.

  The drive TFT 111, the switching TFT 112, and the organic EL element 117 are connected in series between the power supply potential Vcc and the ground potential GND. That is, the source of the drive transistor 111 is connected to the power supply potential Vcc, while the cathode of the organic EL element (light emitting element) 117 is connected to the ground potential GND. In general, the organic EL element 117 is represented by a diode symbol because it has a rectifying property. On the other hand, the sampling TFT 115 and the storage capacitor C111 are connected to the gate of the drive TFT111. The gate-source voltage of the drive TFT 111 is represented by Vgs.

  The operation of the pixel circuit 101 is as follows. First, when the scanning line WSL101 is selected (low level here) and an image signal is applied to the signal line DTL101, the sampling TFT 115 is turned on and the image signal is written into the holding capacitor C111. The signal potential written in the storage capacitor C111 becomes the gate potential of the drive transistor 111. Subsequently, when the scanning line WSL101 is in a non-selected state (here, high level), the signal line DTL101 and the drive TFT 111 are electrically disconnected, but the gate potential Vgs of the drive TFT 111 is stably held by the holding capacitor C111. . Subsequently, when another scanning line DSL101 is selected (here, at a low level), the switching TFT 112 becomes conductive, and a drive current flows through the TFT 111, TFT 112, and the light emitting element 117 from the power supply potential Vcc toward the ground potential GND. When the DSL 101 is in a non-selected state, the switching transistor 112 is turned off and the driving current does not flow. The switching TFT 112 is inserted to control the light emission time of the light emitting element 117.

  The current flowing through the TFT 111 and the light emitting element 117 has a value corresponding to the gate-source voltage Vgs of the TFT 111, and the light emitting element 117 continues to emit light with a luminance corresponding to the current value. As described above, the operation of selecting the scanning line WSL101 and transmitting the signal given to the signal line DTL101 to the inside of the pixel circuit 101 is called writing. As described above, once the signal is written, the light emitting element 117 continues to emit light at a constant luminance until the next rewriting, and a desired image corresponding to the image signal can be displayed. Become.

1 is a block diagram illustrating an overall configuration of an image display device according to the present invention. FIG. 2 is a waveform diagram of control signals and image signals used in FIG. 1. FIG. 2 is a circuit diagram showing a specific configuration of a protection circuit included in the image display device shown in FIG. 1. FIG. 2 is a block diagram illustrating a configuration example of a display unit and a drive circuit unit illustrated in FIG. 1. FIG. 5 is a schematic diagram illustrating a specific circuit configuration of a pixel circuit included in the display unit illustrated in FIG. 4.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Input image signal line, 2 ... Pull-down resistor, 3 ... Input control signal line, 4 ... Pull-down resistor, 5 ... Clock oscillator, 6 ... Internal signal generation start counter, 7・ ・ ・ Reset signal generator, 8 ・ ・ ・ Switch changer, 9 ・ ・ ・ Control signal generator, 10 ・ ・ ・ Output buffer, 11 ・ ・ ・ Control signal generator, 12 ・ ・ ・ Output image signal line, DESCRIPTION OF SYMBOLS 13 ... Output control signal line, D ... Display part, S ... System control part, H ... Horizontal drive circuit, V ... Vertical drive circuit, Z ... Protection circuit

Claims (6)

The display unit includes a display unit, a drive circuit unit, and a system control unit, the display unit includes pixels arranged in a matrix, and the system control unit supplies a signal including an image signal and a control signal, and the drive circuit unit Is an image display device that drives the display unit according to a control signal supplied from the system control unit and displays an image on the display unit based on an image signal supplied from the system control unit.
A protection circuit is inserted in a path of a signal supplied from the system control unit to the drive circuit unit,
When the supply of the control signal from the system control unit is interrupted, the protection circuit detects this and shuts off the external supply of the control signal from the system control unit. Is generated and supplied to the drive circuit unit.   When the control signal externally supplied from the system control unit returns, the protection circuit detects this and sends the control signal received from the system control unit to the drive circuit unit as it is. The image display apparatus according to claim 1, wherein the substitute control signal generated in the step is stopped.   When the supply of a control signal externally supplied from the system control unit is interrupted, the protection circuit detects this and cuts off the supply of the image signal, while internally generating a signal of a predetermined potential. The image display device according to claim 1, wherein the image display device is supplied to the drive circuit unit. A semiconductor device in which a protection circuit incorporated in an image display device including a display unit, a drive circuit unit, and a system control unit is integrated, the display unit having pixels arranged in a matrix, and the system control unit Supplies a signal including an image signal and a control signal, and the drive circuit unit drives the display unit in accordance with the control signal supplied from the system control unit and is also based on the image signal supplied from the system control unit. Display an image on the display,
The protection circuit is arranged in a path of a signal supplied from the system control unit to the drive circuit unit,
When the supply of the control signal from the system control unit is interrupted, the protection circuit detects this and shuts off the external supply of the control signal from the system control unit. Is generated and supplied to the drive circuit portion.   When the control signal externally supplied from the system control unit returns, the protection circuit detects this and sends the control signal received from the system control unit to the drive circuit unit as it is. 5. The semiconductor device according to claim 4, wherein the alternative control signal generated in step (5) is stopped.   When the supply of a control signal externally supplied from the system control unit is interrupted, the protection circuit detects this and cuts off the supply of the image signal, while internally generating a signal of a predetermined potential. 5. The semiconductor device according to claim 4, wherein the semiconductor device is supplied to the drive circuit unit.

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