JP2006093325A - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP2006093325A JP2006093325A JP2004275521A JP2004275521A JP2006093325A JP 2006093325 A JP2006093325 A JP 2006093325A JP 2004275521 A JP2004275521 A JP 2004275521A JP 2004275521 A JP2004275521 A JP 2004275521A JP 2006093325 A JP2006093325 A JP 2006093325A
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- differential
- line
- signal
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
【解決手段】 配線基板1は、絶縁基体2の主面または内部に形成された互いに平行な一対の信号線路8a,8bから成る差動線路8と、差動線路8を所定間隔をもって取り囲むように形成された同一面接地導体4bと、各信号線路8a,8bの一端に設けられたランド導体部13と、ランド導体部13に一端が電気的に接続された貫通導体9a,9bとを具備し、差動線路8は、ランド導体部13側の一端部が一対の信号線路8a,8b同士の間の間隔が漸次広がっている展開部14とされているとともに、各信号線路8a,8bの展開部14の線路幅が展開部14以外の部位の線路幅よりも小さい。
【選択図】 図2
Description
2・・・絶縁基板
2a〜2f・・・絶縁層
5・・・半導体素子
8・・・差動線路
8a,8b・・・一対の信号線路
9・・・差動貫通導体
9a,9b・・・貫通導体
12・・・開口部
13・・・ランド導体部
14・・・展開部
Claims (3)
- 絶縁基体の主面または内部に形成された互いに平行な一対の信号線路から成る差動線路と、該差動線路を所定間隔をもって取り囲むように形成された同一面接地導体と、前記各信号線路の一端に設けられたランド導体部と、該ランド導体部に一端が電気的に接続された貫通導体とを具備しており、前記差動線路は、前記ランド導体部側の一端部が前記一対の信号線路同士の間の間隔が漸次広がっている展開部とされているとともに、前記各信号線路の前記展開部の線路幅が前記展開部以外の部位の線路幅よりも小さいことを特徴とする配線基板。
- 前記各信号線路の前記展開部の線路幅が前記ランド導体部に向かって漸次小さくなっていることを特徴とする請求項1記載の配線基板。
- 前記絶縁基体は、主面または内部に前記差動線路の前記展開部以外の部位および前記展開部の一部と対向する内層接地導体が形成されていることを特徴とする請求項1または請求項2記載の配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004275521A JP4601369B2 (ja) | 2004-09-22 | 2004-09-22 | 配線基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004275521A JP4601369B2 (ja) | 2004-09-22 | 2004-09-22 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006093325A true JP2006093325A (ja) | 2006-04-06 |
JP4601369B2 JP4601369B2 (ja) | 2010-12-22 |
Family
ID=36234017
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004275521A Expired - Fee Related JP4601369B2 (ja) | 2004-09-22 | 2004-09-22 | 配線基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4601369B2 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009021511A (ja) * | 2007-07-13 | 2009-01-29 | Ricoh Co Ltd | プリント配線基板および電子装置 |
JP2009212400A (ja) * | 2008-03-05 | 2009-09-17 | Ngk Spark Plug Co Ltd | 高周波パッケージ |
JP2011138845A (ja) * | 2009-12-27 | 2011-07-14 | Kyocer Slc Technologies Corp | 配線基板 |
CN112349668A (zh) * | 2020-09-28 | 2021-02-09 | 中国电子科技集团公司第二十九研究所 | 一种采用射频母板的宽带射频模块结构及其设计方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000349192A (ja) * | 1999-06-07 | 2000-12-15 | Canon Inc | 半導体集積回路およびプリント配線板 |
JP2002190541A (ja) * | 2000-12-22 | 2002-07-05 | Kyocera Corp | 高周波回路用パッケージ |
JP2004006789A (ja) * | 2002-04-04 | 2004-01-08 | Seiko Epson Corp | プリント配線基板 |
JP2004253746A (ja) * | 2002-12-26 | 2004-09-09 | Kyocera Corp | 配線基板 |
-
2004
- 2004-09-22 JP JP2004275521A patent/JP4601369B2/ja not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000349192A (ja) * | 1999-06-07 | 2000-12-15 | Canon Inc | 半導体集積回路およびプリント配線板 |
JP2002190541A (ja) * | 2000-12-22 | 2002-07-05 | Kyocera Corp | 高周波回路用パッケージ |
JP2004006789A (ja) * | 2002-04-04 | 2004-01-08 | Seiko Epson Corp | プリント配線基板 |
JP2004253746A (ja) * | 2002-12-26 | 2004-09-09 | Kyocera Corp | 配線基板 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009021511A (ja) * | 2007-07-13 | 2009-01-29 | Ricoh Co Ltd | プリント配線基板および電子装置 |
JP2009212400A (ja) * | 2008-03-05 | 2009-09-17 | Ngk Spark Plug Co Ltd | 高周波パッケージ |
JP2011138845A (ja) * | 2009-12-27 | 2011-07-14 | Kyocer Slc Technologies Corp | 配線基板 |
CN112349668A (zh) * | 2020-09-28 | 2021-02-09 | 中国电子科技集团公司第二十九研究所 | 一种采用射频母板的宽带射频模块结构及其设计方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4601369B2 (ja) | 2010-12-22 |
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