JP2005224049A - Switching power supply - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a switching power supply whose characteristics will not change, even if a voltage of a power source voltage supply source fluctuates, and which has a ground-fault protective function that operates normally, even if the voltage of the power source voltage supply source is very low. <P>SOLUTION: This switching power supply is provided with a first DC/DC converter 10 and a second DC/DC converter 11 and structured to use the output 16 of the second DC/DC converter 11 as the power source of a ground-fault detection circuit 12, the ground-fault protective circuit of the output terminal of the first DC/DC converter 10, and a timer circuit 13. The fluctuation in the output 16 of the second DC/DC converter 11 is small, even if the voltage of a power source 1 fluctuates. Thus, the change of the characteristics of the ground-fault detection 12 and the timer circuit 13 that use the output as the power source voltage becomes so small that malfunction can be prevented. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a switching power supply apparatus that can prevent overcurrent from flowing and generating heat when the switching power supply output is grounded.

  As a conventional switching power supply device, there is one that detects a secondary side voltage and stops the switching operation when the secondary side voltage is equal to or lower than a predetermined voltage.

  Hereinafter, the “switching regulator” of Patent Document 1 will be described with reference to FIG.

  FIG. 4 is a circuit diagram of a conventional switching power supply apparatus, in which 81 is a control unit formed on one substrate, 82 is an error amplifier, 83 is a PWM comparator, 84 is an oscillator, 85 is an AND circuit, 86 is Short-circuit detection comparator, 87 is a current source, 88 is a timer comparator, 89 is a latch circuit including a flip-flop circuit, Tin is an input terminal, Tout is an output terminal, VB is a high-potential side power supply voltage, and GND is Low-potential side power supply voltage, Vout is the output voltage, Vcc is the power supply input to the controller, IN is the input signal, OUT is the output signal, C1, C2 are capacitors, R1, R2, R3 are resistors, L is a coil, Tr1, Tr2 and Tr5 are NPN transistors, Tr3 and Tr4 are PNP transistors, and VR1, VR2, and VR3 are reference voltages.

  First, in a normal operation state that is not a ground fault state, the voltage of Expression (4) is output as the voltage Vout to the output terminal Tout.

Vout = VR1 × (R1 + R2) / R2 (4)
In a state where the equation (4) holds, VR2 is set to be higher than the output voltage of the error amplifier 82, so that the base of Tr2 is H (high level) and the collector of Tr2 is L (low level). The output voltage of the timer comparator 88 is L, the Q output of the latch circuit 89 is L, Tr5 is off, Tr4 is also off, the base current of Tr3 can flow in the R3 direction, and Tr3 can be turned on. Become a mode.

  Further, the pulse generated by comparing the output voltage of the error amplifier 82 and the output signal of the oscillator 84 becomes the output pulse signal of the PWM comparator 83. From the above, the signal from the latch circuit 89 to the AND circuit 85 becomes H, so Tr1 The output signal of the PWM comparator 83 is inputted to the base with the same polarity, the coil L is driven by the on / off operation of Tr1, and the output terminal Tout is set as Vout through Tr3 in the on state. The voltage of equation (4) is generated.

  Note that the smaller the voltage VB of the high-potential-side power supply, the larger the output voltage of the error amplifier 82 and the longer the on-period of Tr1, thereby maintaining the relationship of equation (4).

Next, when the output terminal Tout has a ground fault, the voltage of the input signal IN becomes lower than the reference voltage VR1, and the output voltage of the error amplifier 82 swings out in the higher direction and becomes higher than the reference voltage VR2. The output of the short-circuit detection comparator 86 becomes L. From that moment, the capacitor C2 begins to be charged with the current from the current source 87, and when the reference voltage VR3 is reached, the output of the timer comparator 88 is switched to H. Change. In conjunction with this switching, the Q output of the latch circuit 89 becomes H, Tr5 is on, Tr4 is also on, and the signal from the latch circuit 89 to the AND circuit 85 is L, so Tr1 is in the off state. It becomes. For this reason, the driving of the coil L is stopped, the overcurrent route from the coil L to GND via Tr1 and the overcurrent route from the coil L to Tout via Tr3 are eliminated, and the coil L is not magnetically saturated. , No overcurrent continues to flow from the input terminal Tin.
JP 9-182277 A

  However, in the conventional switching power supply device, when a battery having a large voltage fluctuation is used as a voltage supply source to the input terminal Tin, the output voltage Vout is reduced to a voltage as low as possible in order to extend the battery life. However, it is difficult to normally operate all the circuits including the ground fault protection function of the control unit 81 up to a voltage VB is as low as possible. When the power supply Vcc fluctuates, the characteristics of various circuits including the ground fault protection function of the control unit 81 are likely to fluctuate, and the standby state in which the switching operation is stopped during standby (or when not in use) as the specification of the set device. If there is, a ground fault protection function circuit will be added as a circuit connected to the input terminal Tin. Life is short, and there is a problem adverse effect on the set instrument from battery leakage occurs.

  In addition, when starting and stopping, the voltage across the capacitor C2 is not initialized, and when C2 is started in the L state, the S input of the latch circuit 89 is L, and the Q output becomes indefinite. There was a problem such as unstable startup.

  Also, once in the ground fault protection state, the ground fault state of the output terminal Tout is canceled, so that the high potential side power supply voltage VB of the input terminal Tin rises or the ground fault state is canceled in some form, After that, even if the voltage VB of the input terminal Tin rises by switching the input to the input terminal Tin from the battery input to the input from the regulator output using the AC adapter as the primary side input, the latch state (ground fault) There was a problem that it was not possible to release (protection state) and restart.

  The present invention solves the above-mentioned conventional problems, and the characteristics do not change even when the voltage (VB) of the power supply voltage supply source fluctuates, and the ground fault that the voltage of the power supply voltage supply source operates normally to the lowest possible voltage. Providing a switching power supply device with a protective function, providing a switching power supply device that has a long battery life by reducing current consumption during standby, and does not adversely affect set devices due to battery leakage. Even when stopped, it operates stably, and the ground fault state is released, so that the voltage of the power supply voltage source rises above the specified voltage, or the ground fault state is released. When the power source voltage supply voltage rises above the specified voltage, for example, when the power source is switched from the battery input to the regulator output with the AC adapter as the primary input, the latch state (ground fault protection) Releasing the state), and its object is to provide a switching power supply can be restarted.

  A first switching power supply device according to the present invention includes a power supply voltage supply source, a first DC / DC converter that converts a voltage supplied from the power supply voltage supply source into a first set voltage, and a supply from the power supply voltage supply source. The second DC / DC converter for converting the voltage to be set to the second set voltage, and the output voltage of the first DC / DC converter is lower than the first predetermined voltage lower than the first set voltage. A ground fault detection circuit that determines that the output terminal of the first DC / DC converter is in a ground fault state and issues a ground fault detection signal; and a first step after a predetermined time has elapsed since the ground fault detection signal was issued from the ground fault detection circuit. And a timer circuit that outputs a stop signal for stopping the operation of the first DC / DC converter to the first DC / DC converter, and at least a second DC / D as a power supply voltage of the ground fault detection circuit and the timer circuit. So that it uses the output voltage of the converter.

  According to this configuration, even if the voltage of the power supply voltage supply source fluctuates greatly, the fluctuation of the output voltage of the second DC / DC converter used as the power supply voltage of the ground fault detection circuit or timer circuit is small. Variations in characteristics of various circuits such as a ground fault protection function including a fault detection circuit and a timer circuit can be reduced. Therefore, even when a battery having a large voltage fluctuation is used as the power supply voltage supply source, the output voltage of the first DC / DC converter can be generated up to a voltage with a low voltage of the power supply voltage supply source. Since the ground fault protection function including the timer circuit and the like can be normally operated, the battery life can be extended.

  Further, the present invention has a mode for setting the standby state in which the operations of the first and second DC / DC converters are stopped.

  Thus, in the standby state when not used as a set, it is possible to reduce current consumption in the ground fault detection circuit and timer circuit in which the output voltage of the second DC / DC converter is used as the power supply voltage. The battery life can be extended, and adverse effects on the set equipment due to battery leakage can be reduced.

  In the present invention, the ground fault detection circuit is characterized in that the timer circuit is initialized when the output voltage of the first DC / DC converter is equal to or higher than the first predetermined voltage.

  In the present invention, a latch circuit for latching a stop signal from the timer circuit and outputting the stop signal to the first DC / DC converter is inserted between the timer circuit and the first DC / DC converter, The latch circuit is characterized in that the latch state is released when the output voltage of the second DC / DC converter is equal to or lower than a second predetermined voltage lower than the second set voltage.

  Thereby, after it will be in a ground fault protection state once, after a ground fault state is cancelled | released, it becomes possible to restart.

  The second switching power supply device of the present invention is supplied from a power supply voltage supply source, a first DC / DC converter that converts a voltage supplied from the power supply voltage supply source into a first set voltage, and a power supply voltage supply source. The second DC / DC converter for converting the voltage to be set to the second set voltage, and the output voltage of the first DC / DC converter is lower than the first predetermined voltage lower than the first set voltage. A ground fault detection circuit that determines that the output terminal of the first DC / DC converter is in a ground fault state and issues a ground fault detection signal; and a first step after a predetermined time has elapsed since the ground fault detection signal was issued from the ground fault detection circuit. A timer circuit that outputs a stop signal for stopping the operation of one DC / DC converter, and a latch circuit that latches the stop signal from the timer circuit and outputs the stop signal to the first DC / DC converter. Latch circuit, the output voltage of the second DC / DC converter when the following second lower than the set voltage a second predetermined voltage so that the latch state is released.

  According to this configuration, after the ground fault protection state is once established, the ground fault state is released, and then restart is possible.

  In the first and second switching power supply devices, the latch circuit is configured to release the latched state when the voltage supplied from the power supply voltage supply source becomes higher than a third predetermined voltage when the voltage is increased. And

  As a result, once the ground fault protection state is reached, the ground fault state is canceled, so that the voltage of the power supply voltage source rises (returns), or the ground fault state is canceled in some form, When the battery input consumed as the power supply voltage supply source is switched to the input from the regulator (DC power supply) output using the AC adapter as the primary side input, the voltage as the power supply voltage supply source rises above the third predetermined voltage. , The latched state (ground fault protection state) can be canceled and restarted.

  In the first and second switching power supply devices, the timer circuit is reset to an initial state when the latch circuit is in a state of latching a stop signal from the timer circuit.

  According to the present invention, even if the voltage of the power supply voltage supply source fluctuates greatly, characteristic fluctuations of various circuits such as a ground fault protection function including a ground fault detection circuit and a timer circuit can be reduced. When a battery with a large voltage fluctuation is used as the supply source, the output voltage of the first DC / DC converter can be generated up to a voltage with a low voltage of the power supply voltage supply source. From the ground fault detection circuit, the timer circuit, etc. Since the configured ground fault protection function can be operated normally, the battery life can be extended.

  Further, since the current consumption can be reduced in the standby state when not used as a set, the battery life can be extended, and the adverse effects on the set device due to battery leakage can be reduced.

  In addition, the timer circuit can be initialized at the time of starting / stopping, and the logic state of the latch circuit can be determined, so that stable starting is possible.

  In addition, once the ground fault protection state is entered, the ground fault state is canceled, so that the voltage of the power supply voltage source rises (returns), or the ground fault state is canceled in some form, When switching from a battery input consumed as a voltage supply source to an input from a regulator (DC power supply) output using the AC adapter as a primary side input when the voltage as the power supply voltage supply source rises above a predetermined voltage, the latch state ( (Ground fault protection state) can be canceled and restarted.

  Hereinafter, a switching power supply device according to an embodiment of the present invention will be described with reference to the drawings.

  First, the mechanism of the overcurrent that flows when the output terminal of the DC / DC converter is grounded will be described as an example in the case of a step-up / step-down DC / DC converter as shown in FIG.

  In FIG. 3, 61 is a power source, 62, 63, 64, and 65 are N-channel MOS transistors, 66 is a coil, 67 is a smoothing capacitor, 68 is a switch that equivalently considers the DC / DC converter output to be on when a ground fault occurs, 69 is a control signal generating circuit, and 70, 71, 72, 73, 74, and 75 are signals. Note that the switch 68 assumes a ground fault as described above and does not exist.

  The step-up / step-down DC / DC converter in FIG. 3 operates as a step-up DC / DC converter, a step-down DC / DC converter, or both operate simultaneously, depending on the voltage relationship between the signal 70 and the signal 71. Determined.

  In the boost mode when the voltage of the signal 70 is lower than the voltage of the signal 71, the signal 72 is H and the N-channel MOS transistor 62 is on, the signal 73 is L and the N-channel MOS transistor 63 is off, and the signals 74 and 75 are The pulse is in an inversion relationship, and the N-channel MOS transistor 64 and the N-channel MOS transistor 65 are turned on / off in an inversion relationship to drive the coil 66 and generate a predetermined constant DC voltage for the signal 71. The voltage of the signal 71 is fed back to the control signal generating circuit 69. The lower the voltage of the signal 70 than the predetermined DC voltage of the signal 71, the longer the H period of the pulse of the signal 74 (the pulse of the signal 75). The DC voltage of the signal 71 is kept constant. Note that the relationship between the signal 74 and the signal 75 is such that both signals are L when the polarity is switched so that the N-channel MOS transistors 64 and 65 are simultaneously turned on and no through current flows. (As a guide, about 50 nS at a frequency of about 100 kHz).

  Next, in the step-down mode where the voltage of the signal 70 is higher than the voltage of the signal 71, the signal 75 is H and the N-channel MOS transistor 64 is on, the signal 74 is L and the N-channel MOS transistor 65 is off, The signal 73 becomes a pulse having an inversion relationship, and the N-channel MOS transistor 62 and the N-channel MOS transistor 63 are turned on / off in an inversion relationship to drive the coil 66 and generate a predetermined constant DC voltage in the signal 71. The voltage of the signal 71 is fed back to the control signal generation circuit 69. The higher the voltage of the signal 70 than the predetermined DC voltage of the signal 71, the longer the H period of the signal 73 (the longer the L period of the signal 72). The DC voltage of the signal 71 is kept constant. Note that the relationship between the signal 72 and the signal 73 is such that both signals are L when the polarity is switched so that the N-channel MOS transistors 62 and 63 are simultaneously turned on and no through current flows. (As a guide, about 50 nS at a frequency of about 100 kHz).

  The boost mode and the step-down mode have been described above. However, as a configuration method, there is a configuration in which a period in which both modes operate simultaneously is provided so that the modes are switched smoothly when the modes are switched.

  Note that the step-up / step-down DC / DC converter shown in FIG. 3 is activated by up to 80% of the predetermined set voltage of the signal 71, with the H period of the signal 74 being 25%, and the signal 75 having a polarity signal ( In the same manner as described above, a countermeasure for preventing penetration in the N-channel MOS transistors 64 and 65 is taken).

  When the signal 71 serving as the output of the step-up / step-down DC / DC converter as described above assumes a ground fault by turning on the switch 68, the H period of the signal 74 is up to 80% of the predetermined set voltage of the signal 71. The N-channel MOS transistor 62 is on, the N-channel MOS transistor 63 is off, and the N-channel MOS transistors except for the above-described penetration countermeasure period in the N-channel MOS transistors 64 and 65. Since either of the transistors 64 and 65 is always on and the signal 71 and the source of the N-channel MOS transistor 65 are grounded, the coil 66 is magnetically saturated, and the N-channel MOS transistor 62 and the coil 66 are connected from the power source 61. Overcurrent will flow between the ground terminals.

(First embodiment)
FIG. 1 is a configuration diagram of a switching power supply device according to a first embodiment of the present invention, in which 1 is a power supply, 2 is a reference voltage source, 4 is a capacitor, 5 is a current source, 6 is an N-channel MOS transistor, 7 is a power supply, 8 and 9 are comparators, 10 is a first DC / DC converter, 11 is a second DC / DC converter, 12 is a ground fault detection circuit, 13 is a timer circuit, 14, 15, 16, and 17 , 18 and 19 are signals.

When the voltage of the reference voltage source 2 is V2 and the voltage of the signal 15 is V15,
V2 ≦ V15 (1)
The ground fault detection circuit 12 determines that there is no ground fault state, the signal 17 becomes H, the N-channel MOS transistor 6 in the timer circuit 13 is turned on, and the signal 18 becomes L, so that the signal 19 which is the output of the comparator 9 Becomes H. It is assumed that the first DC / DC converter 10 is in an operating state when the signal 19 is H.

Next, when the signal 15 has the relationship shown in the equation (2),
V2> V15 (2)
The ground fault detection circuit 12 determines that there is a ground fault state, the signal 17 becomes L, the N-channel MOS transistor 6 in the timer circuit 13 is turned off, and the current is supplied from the current source 5 to the capacitor 4 from when the N-channel MOS transistor 6 is turned off. The capacitor 4 has a capacitance value C4 (F), a current source 5 has a current value I5 (A), and the reference voltage source 3 has a voltage V3 (V). The time Ta (s) from when charging starts until the voltage between the terminals of the capacitor 4 becomes V3 and the signal 19 output from the comparator 9 switches to L is expressed by equation (3).

Ta = C4 × V3 / I5 (3)
That is, the signal 19 is switched to L after the time Ta when the signal 15 is in the ground fault state, and the first DC / DC converter 10 is stopped. As a method for stopping the first DC / DC converter 10, for example, in the example of the step-up / step-down DC / DC converter in FIG. 3, the signals 72, 73, 74, and 75 may be configured to drop to L.

  The signal 16 generates a predetermined DC voltage from the power source 1 by the second DC / DC converter 11, but the power source of the ground fault detection circuit 12 and the timer circuit 13 is configured by the signal 16 instead of the signal 14. Yes. For this reason, even when the power source 1 is a battery or the like, the fluctuation of the signal 16 (voltage) is large, or even if many other devices are connected to the signal 14 to generate a large noise, the fluctuation or noise of the signal 16 Therefore, the characteristics variation of the ground fault detection circuit 12 and the timer circuit 13 is small, stable characteristics are obtained, and malfunctions are less likely to occur.

  As a power supply configuration of the ground fault detection circuit 12 and the timer circuit 13 described above, only a valid location may be configured with the signal 16, and other locations may be configured with the signal 14. For example, not all of the plurality of transistors constituting the ground fault detection circuit 12 and the timer circuit 13 are operated by the power supply of the signal 16, but a power supply with a large power supply fluctuation is applied to some of the plurality of transistors (not shown). A circuit may be operated by supplying a bias from one output voltage (signal 14). More specifically, an input comparison unit (not shown) constituting the comparators 8 and 9 is operated by power supply of the signal 16 and a switching operation transistor (not shown) in its output unit (not shown). 3), the load current of the second DC / DC converter 11 may be reduced by using the signal 14 having a large power supply fluctuation. Alternatively, the ground fault detection circuit 12 and the timer circuit 13 may be powered down by stepping down or boosting from the signal 16.

  The protection operation when the signal 15 is in the ground fault state has been described above. However, in the case where the signal 16 is grounded, the output current capability of the second DC / DC converter 11 is reduced to be excessive. Current measures can be taken. For example, when the second DC / DC converter 11 is considered to have the configuration shown in FIG. 3, the ON resistance of the N-channel MOS transistors 62, 63, 64, 65 is set large, or the resistance component of the coil 66 is set large. By doing so, it is possible to prevent overcurrent when the signal 16 serving as the output of the second DC / DC converter 11 is grounded. The signal 15 may be used for a large load current, and the signal 16 may be used for a small load current.

  Note that it is a premise of the invention that a stabilized output voltage (signal 16) is output to the output terminal of the second DC / DC converter 11, and there is no fear of shorting the connected load. The absolute value of the voltage value of the signal 16 output from the DC / DC converter 11 is not specified. The signals 15 and 16 output from the two DC / DC converters 11 may have the same voltage value or different voltage values. Specifically, the signal 16 may be set to output 6V, the signal 15 may be stepped down to 5V, or the signal 15 may be boosted to 8V.

  In addition, as a specification of the set device, in a case where the standby state is such that the first DC / DC converter 10 and the second DC / DC converter 11 are stopped while the power source 1 is applied, a ground fault is detected. The power supply of the circuit 12 and the timer circuit 13 is not the signal 14, but is composed of the signal 16 which is stopped and the voltage is lowered in the standby state, so that the ground fault detection circuit 12 and the timer circuit 13 are consumed from the power source 1. No current is generated and current consumption during standby can be reduced. Therefore, even if the power source 1 is composed of a battery, the battery life can be extended, and adverse effects on the set device due to battery leakage can be reduced.

(Second Embodiment)
FIG. 2 is a configuration diagram of a switching power supply apparatus according to the second embodiment of the present invention, in which 1 is a power supply (battery), 25 is a power supply (AC adapter), 2, 3, 26, and 27 are reference voltage sources, 4 Is a capacitor, 5 is a current source, 6 and 39 are N-channel MOS transistors, 7 and 38 are power supplies, 8, 9, 40 and 41 are comparators, 10 is a first DC / DC converter, and 11 is a second DC. / DC converter, 12 is a ground fault detection circuit, 46 is a timer circuit, 21, 22, 23 and 24 are resistors, 28 and 29 are switches, 34, 35 and 36 are inverters, 30 and 31 are NOR circuits, 32 and 33 Is a NAND circuit, 37 is a flip-flop circuit, 49 is a regulator circuit (DC power supply circuit) that generates a voltage of signal 52 from the voltage of signal 51 when switch 28 is turned on and switch 29 is turned off, and 42 is applied with power supply 25 When the switch 28 is turned on, the switch 29 is turned off. When the power supply 25 is not applied, the switch 28 is turned off and the switch 29 is turned on, and the switch circuits in which the on / off states of the switches 28 and 29 are opposite to each other. , 43 is an input voltage detection circuit, and 44 is a protection state detection circuit that outputs H to the signal 53 in a protection state other than a ground fault (when a battery is exhausted or an overvoltage is applied to the signals 51 and 52). , 45 is a second DC / DC converter output detection circuit, 47 is a latch circuit, 48 is a latch release circuit, 15, 16, 17, 19, 51, 52, 53, 54, 55, 56, 57, 58, 59 Is a signal.

  In a device that can be operated by an AC adapter or a battery, the power supply 25 assumes the output voltage of the AC adapter, the power supply 1 assumes the voltage of the battery, and the switch 28 is turned on when the power supply 25 is applied in the switch circuit 42. Since the switch 29 is turned off, the voltage of the power supply 25 is applied to the signal 51, and the signal 51 is input to the regulator 49, so that the signal 52, which is the output of the regulator 49, has a set voltage in the regulator 49. Is output. When the power supply 25 is not applied, the switch 28 is turned off and the switch 29 is turned on, so that the voltage of the power supply 1 is output as the signal 52.

  As described above, when a voltage is applied to the signal 52 by the voltage from the power supply 25 or the power supply 1, the second DC / DC converter 11 starts to operate and the voltage of the signal 16 increases. Since the signal 56 becomes L below the voltage set by the second DC / DC converter output detection circuit 45, the latch circuit 47 is initialized, the signal 19 becomes H, and the first DC / DC converter 10 It becomes an operation state. Once the latch circuit 47 is initialized, the voltage of the signal 16 rises, and even if the signal 56 becomes H, the voltage of the signal 55 is L and the signal 57 is H at startup as described later. As long as signal 19 remains high.

  When the signal 15 that is the output of the first DC / DC converter 10 starts to rise and the voltage of the signal 15 is equal to or lower than the voltage set by the ground fault detection circuit 12, the signal 17 becomes H, and the signal 54 is L and N channel. Since the MOS transistor 6 is off and the signal 19 is H and the N-channel MOS transistor 39 is also off as described above, the capacitor 4 is charged with the current from the current source 5, but the signal 15 rises to the voltage of the reference voltage source 2. By setting the capacitor 4 and the current source 5 so that the rise time of the signal 55 to the voltage of the reference voltage source 3 is sufficiently longer than the rise time, the signal 57 is not switched to L at the start-up. The latch circuit 47 is not latched, the signal 19 remains H, and the activation of the signal 15 is not stopped.

  Next, when the signal 15 exceeds the voltage of the reference voltage source 2 from the above state, the signal 17 becomes L, the signal 54 becomes H, and the timer circuit 46 is initialized when the N-channel MOS transistor 6 is turned on.

  Note that the output signals of the protection state detection circuits 44 that output H to the signal 53 when the battery is exhausted or when an overvoltage is input to the signals 51 and 52 are L unless protection is necessary.

  After going through the above process, the signal 15 rises to a predetermined set voltage.

  Next, the operation when the signal 15 enters the ground fault state in the state where the signal 15 is at a predetermined set voltage through the above process will be described.

  When the signal 15 is in a ground fault state, the output signal 17 of the ground fault detection circuit 12 becomes H, so that the signal 54 becomes L. At this time, the signal 19 is H, so the capacitor 4 starts to be charged from the current source 5. The output signal 57 of the comparator 9 is switched to L after the time Ta shown in the above equation (3). At this time, the signal 58 which is the Q output of the flip-flop 37 in the latch release circuit 48 is reset to L and the signal 56 is H, so that the signal 19 output from the latch circuit 47 becomes L, and the first DC / The operation of the DC converter 10 is stopped and the stopped state is maintained. In this way, when the latch circuit 47 is in the latch state, the N-channel MOS transistor 39 is turned on and the timer circuit 46 is initialized.

  Although the ground fault protection function operates as described above, the same applies to the case where a voltage is applied to the signal 52 by the power source 25 or the power source 1 while the signal 15 is grounded. Rises, the signal 56 becomes H, and the signal 57, which is the output of the timer circuit 46, becomes L, so that the signal 19 becomes L and the first DC / DC converter 10 is stopped.

  Also, when the signal 15 is not grounded, the batteries are exhausted or the protection state detection circuit 44 operates when the overvoltage is applied to the signal 51 or the signal 52, and the signal 53 becomes H. Similarly, the signal 57 becomes L and the signal 19 becomes L, and the first DC / DC converter 10 is stopped.

  As described above, the first DC / DC converter 10 stops when the ground fault detection circuit 12 and the various protection state detection circuits 44 operate. However, when the signal 19 becomes L due to the ground fault state of the signal 15. , When the battery is used as the power source 1, the ground fault state is canceled in some way and the voltage of the signal 52 rises (returns), or the battery is used as the power source 1 and the ground fault protection state is set. Then, after the ground fault is canceled in some form, when the output voltage of the AC adapter is input to the power supply 25 and the voltage of the signal 52 rises, if the signal 52 exceeds the set voltage in the input voltage detection circuit 43, The output signal 59 is switched from L to H. By this clock signal, the signal 58 which is the Q output of the flip-flop 37 is switched from L to H, the output signal 19 of the latch circuit 47 is changed to H, and the first D The C / DC converter 10 can return to the operating state. Further, even when the output signal 53 of the protection state detection circuit 44 becomes H and the signal 19 becomes L due to battery exhaustion or the like, the voltage of the signal 52 is changed by inputting the output voltage of the AC adapter as the power supply 25 thereafter. When the voltage exceeds the set voltage of the input voltage detection circuit 43, the signal 19 becomes H, the first DC / DC converter 10 can be returned to the operating state, and after the battery is exhausted, the AC adapter is inserted. The set equipment can be used continuously.

  As described above, when the latch circuit 47 is latched and the signal 19 becomes L, the reason why the timer circuit 46 is initialized by the N-channel MOS transistor 39 is, for example, that there is no battery in the power source 1, When the signal 53 is H and the signal 19 is L and the output voltage of the AC adapter is input to the power supply 25, the signal 57 remains L when the signal 55 remains H and the signal 58 becomes H. Therefore, the signal 58 immediately becomes L and the signal 19 also becomes L, and the first DC / DC converter 10 cannot be restarted.

  In addition, when a battery is used as the power source 1, the signal 59 is switched from L to H by inputting the output voltage of the AC adapter as the power source 25 after the signal 19 becomes L due to the ground fault of the signal 15, Even if the latch state of the latch circuit 47 is released and the signal 19 becomes H, if the signal 15 holds the ground fault state, the signal 55 in the timer circuit 46 becomes H again, and the latch circuit 47 again Therefore, the first DC / DC converter 10 can be stopped, and safety can be ensured in various usage patterns.

  In the second embodiment, it goes without saying that the same effect as in the first embodiment can be obtained.

  In the second embodiment, for the places where the signals 16 and 52 are used as power supply voltages, basically, the power supply of the ground fault detection circuit 12 and the timer circuit 46 that require the accuracy of the circuit operating voltage is as follows. Power supply to a logic circuit, such as the latch circuit 47 and the latch release circuit 48, which is performed using the signal 16 and is not easily affected by power supply voltage fluctuations, may be performed from the signal 52. If comprised in this way, the load current of the 2nd DC / DC converter 11 can be reduced, and the power supply efficiency of the whole apparatus can be improved. More specifically, only the power supply of the input comparators (not shown) constituting the comparators 8 and 9 that require operation accuracy is supplied from the signal 16, and the power supply of other circuit parts is performed using the signal 52. It doesn't matter.

  As described above, the present invention is useful for the ground fault protection method for the output of the switching power supply device.

1 is a configuration diagram of a switching power supply device according to a first embodiment of the present invention. The block diagram of the switching power supply device which concerns on the 2nd Embodiment of this invention. The block diagram of the switching power supply device for demonstrating the overcurrent which flows when the output terminal in a buck-boost DC / DC converter is grounded. The block diagram of the conventional switching power supply device.

Explanation of symbols

1, 25, 61 Power source 2, 3, 26, 27 Reference voltage source 4 Capacitor 5 Current source 6, 39 N-channel MOS transistor 7, 38 Power source 8, 9, 40, 41 Comparator 10 First DC / DC converter 11 Second DC / DC converter 12 Ground fault detection circuit 13, 46 Timer circuit 14, 15, 16, 17, 18, 19, 51, 52, 53, 54, 55, 56, 57, 58, 59, 70, 71 72, 73, 74, 75 Signal 21, 22, 23, 24 Resistor 28, 29 Switch 30, 31 NOR circuit 32, 33 NAND circuit 34, 35, 36 Inverter 37 Flip flop 42 Switch circuit 43 Input voltage detection circuit 44 Protection state detection circuit 45 Second DC / DC converter output detection circuit 47 Latch circuit 48 Latch release circuit 49 Regulator 62, 63, 64, 65 Power N-channel MOS transistor 66 Coil 67 Smoothing capacitor 68 Ground fault assumption switch 69 Control signal generation circuit 81 Control unit 82 formed on one substrate Error amplifier 83 PWM comparator 84 Oscillator 85 NAND circuit 86 Short-circuit detection comparator 87 Current source 88 Timer comparator 89 Latch circuit composed of flip-flop circuit Tin Input terminal Tout Output terminal VB High-potential side power supply voltage GND Low-potential side power supply voltage Vout Output voltage Vcc Power supply to controller Input IN Input signal OUT Output signal C1, C2 Capacitors R1, R2, R3 Resistor L Coils Tr1, Tr2, Tr5 NPN transistor Tr3, Tr4 PNP transistors VR1, VR2, VR3 Reference voltage

Claims (7)

A power supply voltage source;
A first DC / DC converter for converting a voltage supplied from the power supply voltage supply source into a first set voltage;
A second DC / DC converter that converts a voltage supplied from the power supply voltage supply source to a second set voltage;
When the output voltage of the first DC / DC converter is lower than a first predetermined voltage lower than the first set voltage, it is determined that the output terminal of the first DC / DC converter is in a ground fault state. A ground fault detection circuit for generating a ground fault detection signal;
A timer circuit for outputting, to the first DC / DC converter, a stop signal for stopping the operation of the first DC / DC converter after a predetermined time has elapsed since the ground fault detection signal is issued from the ground fault detection circuit. Prepared,
A switching power supply apparatus in which at least an output voltage of the second DC / DC converter is used as a power supply voltage of the ground fault detection circuit and the timer circuit.   2. The switching power supply device according to claim 1, further comprising a mode for setting a standby state in which the operations of the first and second DC / DC converters are stopped.   2. The ground fault detection circuit sets the timer circuit to an initialization state when an output voltage of the first DC / DC converter is equal to or higher than the first predetermined voltage. Switching power supply. A latch circuit for latching the stop signal from the timer circuit and outputting the stop signal to the first DC / DC converter is inserted between the timer circuit and the first DC / DC converter;
2. The latch state is released when the output voltage of the second DC / DC converter is equal to or lower than a second predetermined voltage lower than the second set voltage. The switching power supply device described in 1. A power supply voltage source;
A first DC / DC converter for converting a voltage supplied from the power supply voltage supply source into a first set voltage;
A second DC / DC converter that converts a voltage supplied from the power supply voltage supply source to a second set voltage;
When the output voltage of the first DC / DC converter is lower than a first predetermined voltage lower than the first set voltage, it is determined that the output terminal of the first DC / DC converter is in a ground fault state. A ground fault detection circuit for generating a ground fault detection signal;
A timer circuit for outputting a stop signal for stopping the operation of the first DC / DC converter after a predetermined time has elapsed since the ground fault detection signal was issued from the ground fault detection circuit;
A latch circuit that latches the stop signal from the timer circuit and outputs the stop signal to the first DC / DC converter;
The switching power supply device, wherein the latch circuit is released when the output voltage of the second DC / DC converter is equal to or lower than a second predetermined voltage lower than the second set voltage.   6. The switching power supply according to claim 4, wherein the latch circuit is configured to release the latched state when a voltage supplied from the power supply voltage supply source becomes higher than a third predetermined voltage when the voltage is increased. apparatus.   6. The switching power supply device according to claim 4, wherein the timer circuit is reset to an initial state when the latch circuit latches the stop signal from the timer circuit.

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