JP2005261052A - Power converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power converter which can quickly shift from transient phenomena at restart to a stationary operation state. <P>SOLUTION: This power converter is composed of a converter which converts AC into DC, an inverter which converts this DC into AC, a controller which controls the converter and the inverter, a current detector which detects the output current of the inverter, a first voltage detector which detects the DC voltage of the inverter, and a second voltage detector which detects the output voltage of the inverter. The controller calculates the current limitation level at restart by adding the amount of offset roughly in proportion to the magnitude of the differential voltage between the voltage detected by the first voltage detector and the voltage after the voltage detected by the second voltage detector is converted into DC level, and suppresses the current of the inverter for a certain period when the current detected by the current detector gets over the current limitation level in an operation state that the inverter is restarted and shifts into a stationary state from its stop state. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a power conversion device, and more particularly to a power conversion device with improved control characteristics upon restart.

When an instantaneous power failure occurs during operation of a power converter such as an inverter, or when switching the drive system from a motor driven by a commercial power source to an inverter drive, the power converter is smoothly controlled from a stopped state to a restarted state. This is very important. For example, when a power failure occurs while an induction motor is being driven by an inverter, the inverter stops, the power is restored after a predetermined time while the induction motor is free running, and the inverter is restarted to continue driving. Therefore, it is necessary to control the inverter so as to prevent an excessive inrush current at the time of restarting and to perform a smooth restart. For this reason, a method is known in which a counter electromotive voltage of a motor during free-running is detected and restarted in a state where the output frequency and phase of the inverter are matched to match the frequency and phase. Also, recently, when the back electromotive voltage of the motor during free run is large, the above restart method is adopted, and when the back electromotive voltage is so small that it is difficult to detect, the current value when a predetermined voltage is applied A method for estimating the rotational frequency of the motor from the above has also been proposed (see, for example, Patent Document 1).
JP 2001-136387 A (page 3-4, FIG. 1)

  As described above, if the counter electromotive voltage of the motor during free run is detected and restarted with the output frequency and phase of the inverter matched to the frequency and phase, a transient phenomenon at the time of restart will be applied to some extent. It is possible to suppress. However, it has been recognized that the transient phenomenon at the time of restart is not necessarily determined only by the phase and frequency, but also depends on the magnitude of the back electromotive voltage of the motor during free running. In general, the magnitude of the back electromotive force of the motor during free run is proportional to the rotational speed, but the magnetization state of the induction motor depends on the transient phenomenon at the time of power failure. The back electromotive force of the motor varies greatly.

  Normally, an appropriate current limit was provided at restart after power recovery in order to prevent excessive output current at power recovery restart and to shorten the duration of transients. If the current limit level is determined so as to suppress the current value at high load when it is constant, an excessive current flows when the current at low load is low, whereas the current value at low load is On the other hand, when the load is high, the current is excessively suppressed, which causes a phase shift between the load and the inverter circuit, and causes a transient event to continue. This is because the current limit level is not properly selected for the load at the time of restart.

  Such a transient phenomenon is not preferable for the load, and in some cases, the load may be damaged.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a power converter that can quickly shift from a transient state at the time of restart to a steady operation state.

In order to achieve the above object, a power converter according to the present invention includes a converter that converts alternating current into direct current, an inverter that converts the direct current into alternating current, and drives an alternating current motor using the output, and controls the converter and the inverter. A controller for detecting the output current of the inverter, a first voltage detector for detecting a voltage corresponding to a DC voltage of the inverter, and a first detector for detecting an input voltage of the AC motor. The voltage detector comprises a voltage difference between a detection voltage of the first voltage detector and a voltage obtained by converting the detection voltage of the second voltage detector into a DC level. A difference voltage detecting means for detecting, a restart current limit level calculating means for calculating a current limit level at the time of restart by adding an offset and being substantially proportional to the magnitude of the difference voltage; In an operation state where the current detector restarts from the stopped state and shifts to the steady state, the current detector includes a current suppressing means for suppressing the current for a certain period when the detected current of the current detector exceeds the current limit level. It is a feature.

  According to the present invention, since the current limit level for suppressing the output current of the inverter is appropriately set, it is possible to provide a power converter that can quickly shift from a transient state at the time of restart to a steady operation state.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a circuit configuration diagram of a power conversion apparatus according to Embodiment 1 of the present invention.

  The AC power of the three-phase AC power source 1 is converted to DC by the converter 2 and smoothed by the DC capacitor 3. The smoothed direct current is supplied to the inverter 4 and converted into alternating current of an arbitrary frequency. The converted alternating current is supplied to the alternating current motor 5. The converter 2 and the inverter 4 are each composed of a main circuit in which power devices (not shown) are bridge-connected, and their outputs are controlled by gate control signals supplied from the control unit 6 to the gates of the respective power devices.

  The output voltage and output current of the inverter 4 are detected by a voltage detector 7 and a current detector 8, respectively, and these detection signals are supplied to the control unit 6. The voltage across the DC capacitor 3 is detected by a voltage detector 9, and this detection signal is supplied to the control unit 6.

  Next, the internal configuration of the control unit 6 will be described.

  The given frequency reference is converted into a voltage reference by the V / F conversion circuit 11, the voltage reference is compared with the feedback voltage detected by the voltage detector 9, and the voltage control circuit 12 is set so that the deviation becomes zero. Determines the gate pulse of the gate control circuit 13, and controls the converter 2 by this gate pulse. The gate control circuit 13 receives the frequency reference and controls the output frequency of the inverter 4.

  When the three-phase AC power supply 1 is cut off for a short time and restored, the control unit 6 performs a series of control operations. When the normal power failure is detected, the operation of the converter 2 and the inverter 4 is stopped, and when the power recovery is detected, these operations are resumed. However, the control circuit of this part is not shown. FIG. 1 shows the phase synchronization control and current limit control during power recovery, and this configuration will be described below.

  The signal detected by the voltage detector 7 before the inverter 4 operates at the time of power recovery corresponds to the counter electromotive voltage of the AC motor 5 during free running. This signal is supplied to the phase calculation circuit 14, which controls the gate control circuit 15 so that the frequency and phase coincide with the counter electromotive voltage, and operates the inverter 4 with this phase difference converged. Resume.

  On the other hand, the signal detected by the voltage detector 7 is input to the voltage conversion circuit 16 and converted into a feedback value corresponding to a DC voltage. This feedback value is compared with the DC voltage detected by the voltage detector 9 and used as an input of the current limit gain 17 via a limit circuit as necessary. The output of the current limit gain 17 and the output of the current limit offset 18 are added, and the current limit level at the time of power recovery restart is determined via the limit circuit 19. This current limit level is compared with the feedback current value detected by the current detector 8 by the comparison circuit 20, and when the feedback current value exceeds the current limit level, the timer circuit 21 outputs the output of the gate control circuit 15 for a certain period of time. Block and suppress the output current of the inverter 4.

  If the above configuration is adopted, the inverter 4 is restarted in a state where the output phase of the inverter 4 is matched with the counter electromotive voltage phase of the AC motor 5, and the voltage difference between the output voltage of the inverter 4 and the counter electromotive voltage of the AC motor 5 is obtained. Since the current limit level is changed accordingly, when a current more than necessary flows at the time of restart, it is possible to suppress this current and promptly shift to the steady state.

  In addition, although the said description demonstrated the control at the time of a power recovery after a power failure, it is the same also when switching the drive system from the commercial power source drive to the inverter driving | operation of the AC motor 5. FIG.

  In FIG. 1, an example of a power conversion device that performs voltage control by the converter 2 and frequency control by the inverter 4 is described. However, the converter is a diode converter, and the inverter is a so-called PWM control type inverter. A power converter that performs voltage control may be used. In this case, for example, the output of the voltage detector 9 is corrected with a PWM pattern to detect an equivalent voltage corresponding to the DC voltage of the inverter.

  FIG. 2 is a circuit configuration diagram of a power conversion device showing Embodiment 2 of the present invention. About each part of this Example 2, the same part as each part of the power converter device which concerns on Example 1 of FIG. 1 is shown with the same code | symbol, and the description is abbreviate | omitted. The second embodiment is different from the first embodiment in that the current value of each phase detected by the current detector 8 is compared with the current limit level by the comparators 20A, 20B and 20C, respectively, and the comparators 20A, 20B and 20C are compared. These outputs are configured to be input in parallel to the gate control circuit 15 via the timer circuits 21A, 21B and 21C.

  By configuring as described above, it is possible to quickly find the phase that has reached the current limit level, and to gate-block only the power device connected to the corresponding phase, so more rationally from the time of restart The transition to the steady state can be performed quickly.

  Further, when the inverter 4 is a three-level inverter capable of outputting zero voltage, instead of performing the above gate block, the output voltage of the phase is made zero, that is, two elements inside the power device of the phase are set. If the control is performed so that the voltage is turned on and fixed at zero voltage, the transient time required for restart can be further shortened as compared with the method of suppressing the current by performing the gate block.

  FIG. 3 is a circuit configuration diagram of a power conversion device showing Embodiment 3 of the present invention. About each part of this Example 3, the same part as each part of the power converter device which concerns on Example 1 of FIG. 1 is shown with the same code | symbol, and the description is abbreviate | omitted. The third embodiment is different from the first embodiment in that an electric motor constant setting circuit 22 and an offset calculation circuit 23 are provided, the output of the current control gain 17 is determined by a signal from the electric motor constant setting circuit 22, and the electric motor constant setting circuit 22 This is the point that the output of the current limit offset 18 is determined from the output, the output of the V / F calculator 11 and the phase offset Δθ obtained from the phase calculation circuit 14.

  The current flowing due to the voltage difference between the output of the voltage conversion circuit 16 and the output of the voltage detector 9 is determined by the impedance of the AC motor 5. Therefore, it is appropriate that the current limit level, which is the output of the limit circuit 19, is a value obtained by dividing the voltage difference by the impedance and adding a margin.

  The output of the current limit offset 18 is of a property that should be set to the current that flows when the voltage difference is zero. This value can be approximated by ΔI = VrsinΔθ / Z using the phase offset Δθ, which is a control error of the phase calculator 14, the voltage reference Vr of the converter 2, and the impedance Z of the AC motor 5. Instead of using the voltage reference Vr, a back air voltage obtained by the voltage detector 7 may be used.

  As described above, if the current limit gain and the current limit offset are determined from the motor constant, it is possible to rationally suppress the excessive current at the time of restart and speed up the transition to the steady state.

  FIG. 4 is a circuit configuration diagram of a power conversion device showing Embodiment 4 of the present invention. About each part of this Example 4, the same part as each part of the power converter device which concerns on Example 1 of FIG. 1 is shown with the same code | symbol, and the description is abbreviate | omitted. The fourth embodiment is different from the first embodiment in that a speed correction circuit 24 is provided and the current limit level is corrected according to the speed obtained from the frequency reference.

  The cause of the voltage difference between the output of the voltage conversion circuit 16 and the output of the voltage detector 9 is that the transient voltage at the time of power failure changes the excitation state of the AC motor 5, but considering the maximum value of the voltage difference In this state, the AC motor 5 is demagnetized, that is, the output of the voltage conversion circuit 16 is zero. Therefore, the maximum value of the voltage difference is proportional to the operation speed. This means that a transient current hardly flows at a low speed. For this reason, if a correction that lowers the current limit level at a low speed is added, the current limit level becomes more rational, and it becomes possible to quickly shift to a steady state while suppressing an excessive current at the time of restart.

The circuit block diagram of the power converter device which shows Example 1 of this invention. The circuit block diagram of the power converter device which shows Example 2 of this invention. The circuit block diagram of the power converter device which shows Example 3 of this invention. The circuit block diagram of the power converter device which shows Example 4 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 3 phase alternating current power supply 2 Converter 3 DC capacitor 4 Inverter 5 AC motor 6 Control part 7 Voltage detector 8 Current detector 9 Voltage detector 11 V / F conversion circuit 12 Voltage control circuit 13 Gate control circuit 14 Phase calculation circuit 15 Gate Control circuit 16 Voltage conversion circuit 17 Current control gain 18 Current limit offset 19 Limit circuit 20, 20A, 20B, 20C Comparison circuit 21, 21A, 21B, 21C Timer circuit 22 Motor constant setting circuit 23 Offset calculation circuit 24 Speed correction circuit

Claims (5)

A converter that converts alternating current to direct current,
An inverter that converts the direct current into alternating current and drives an alternating current motor with the output;
A control unit for controlling the converter and the inverter;
A current detector for detecting the output current of the inverter;
A first voltage detector for detecting a voltage corresponding to a DC voltage of the inverter and a second voltage detector for detecting an input voltage of the AC motor;
Consisting of
The controller is
Differential voltage detection means for detecting a differential voltage between a detection voltage of the first voltage detector and a voltage obtained by converting the detection voltage of the second voltage detector into a DC level;
A restart current limit level calculating means for calculating a current limit level at the time of restart by adding an offset and approximately proportional to the magnitude of the difference voltage;
In an operating state in which the inverter is restarted from a stopped state and transitions to a steady state, when the detected current of the current detector exceeds the current limit level, current suppressing means for controlling the current of the inverter for a certain period A power conversion device comprising: The current suppression means includes
The detected current of each phase detected by the current detector is compared with the current limit level obtained by the restart current limit level calculation means, respectively.
When the detected current of any phase exceeds the current limit level,
The power converter according to claim 1, wherein the phase of the inverter is gate-blocked for a certain period. The inverter is a three-level inverter capable of zero voltage output,
The current suppression means includes
The detected current of each phase detected by the current detector is compared with the current limit level obtained by the restart current limit level calculation means, respectively.
When the detected current of any phase exceeds the current limit level,
The power converter according to claim 1, wherein the phase of the inverter is configured to output zero voltage for a certain period. The restart current limit level calculation means further includes a motor constant setting means,
The current limit level is changed according to the constant set by the motor constant setting means,
The current limit offset is
The power conversion device according to any one of claims 1 to 3, wherein the power conversion device is determined from a value of a current that flows due to a phase offset between the inverter and the AC motor. The restart current limit level calculation means further includes a speed correction means,
The power conversion device according to any one of claims 1 to 4, wherein the current limit level is corrected in accordance with a speed of the AC motor at the time of restart.

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