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JP2004146401A - Laminated electronic parts and its manufacturing method - Google Patents

Laminated electronic parts and its manufacturing method Download PDF

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Publication number
JP2004146401A
JP2004146401A JP2002306259A JP2002306259A JP2004146401A JP 2004146401 A JP2004146401 A JP 2004146401A JP 2002306259 A JP2002306259 A JP 2002306259A JP 2002306259 A JP2002306259 A JP 2002306259A JP 2004146401 A JP2004146401 A JP 2004146401A
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Japan
Prior art keywords
laminate
electronic component
conductive film
film
conductive
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JP2002306259A
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Japanese (ja)
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JP4134675B2 (en
Inventor
Tetsuhisa Matsumoto
松本 哲久
Shigekatsu Yamamoto
山本 重克
Masahiro Sakuratani
櫻谷 昌弘
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To obtain thin laminated electronic parts having external electrodes, each of which has a proper electrical connection with an internal electrode and a small DC resistance and to obtain a method for manufacturing the same. <P>SOLUTION: The laminated electronic parts (laminated capacitor) include a laminate 2 formed by laminating a plurality of ceramic sheets and a plurality of internal electrodes, and external electrodes 3 electrically connected to lead parts of the internal electrodes on both end faces of the laminate 2. The electrodes 3 each includes a conductive film 31 formed in a state in which the lead parts of the internal electrodes are electrically connected in a ring state to four edges of the end face of the laminate 2, and a plating film 32 formed by electrolytically plating the end face formed with the film 31. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、積層電子部品及びその製造方法、特に、コンデンサやLCノイズフィルタなど、複数の絶縁性シートと複数の内部電極とを積層して積層体を形成し、該積層体の端面に前記内部電極の引出し部と電気的に接続された外部電極を設けた積層電子部品及びその製造方法に関する。
【0002】
【従来の技術と課題】
一般に、積層型のコンデンサとしては、内部電極を形成した複数のセラミックシートを積層し、さらにその上下面にセラミックシートの保護層を積層し、焼成した後に所定の外形寸法にカットして積層体とし、2端子型であれば、該積層体の両端面に内部電極の引出し部と電気的に接続された外部電極を設けたものが提供されている。
【0003】
従来、前記外部電極は積層体の端面に導電性ペーストを、例えば、ディップ法によって塗布、焼付けすることによって形成していた。しかし、導電性ペーストの塗布、焼付けによって形成された外部電極は、どうしても厚さが大きくなってしまい、近年の電子部品の小型化にそぐわないという問題点を有している。また、導電性ペーストがCuを主成分とするものの場合、内部電極がNiからなるものであれば、焼付けによる電気的な接続が必ずしも良好ではなく、しかも、導電性ペーストに含有されているガラス成分が導電性を阻害し、外部電極間の直流抵抗が大きくなってしまう不具合を有していた。
【0004】
【特許文献1】
特開昭63−169014号公報
【0005】
一方、特許文献1には、積層体コンデンサの端面に該端面に露出した内部電極が短絡されるようにその全面に無電解めっきによって導電性金属層を析出させる方法が記載されている。
【0006】
この外部電極形成方法では、薄い外部電極を得ることはできるものの、内部電極からのめっき生長のみのプロセスであるため、めっきの生長が十分ではなく、直流抵抗が大きくなってしまうという問題点を有している。
【0007】
そこで、本発明の目的は、薄くて、内部電極との電気的な接続が良好で直流抵抗が小さい外部電極を有する積層電子部品及びその製造方法を提供することにある。
【0008】
【課題を解決するための手段及び作用】
以上の目的を達成するため、本発明に係る積層電子部品は、複数の絶縁性シートと複数の内部電極とを積層して積層体を形成し、該積層体の両端面に前記内部電極の引出し部と電気的に接続された外部電極を設けた積層電子部品において、前記外部電極は導電膜と電解めっき膜とで構成されており、前記導電膜は前記積層体の各端面の稜部のうち少なくとも内部電極の積層方向に沿った稜部で前記引出し部と電気的に接続されて設けられており、前記電解めっき膜は前記積層体の各端面に前記稜部の導電膜と接続されるように設けられていることを特徴とする。前記導電膜は導電性ペーストや導電性樹脂等からなる。
【0009】
以上の構成からなる積層電子部品においては、引出し部と電気的に接続されている導電膜が形成されている積層体の端面に電解めっきが施されるため、めっき膜の生長が良好であり、通常、めっき材には内部電極と同じ材料であるNiが使用されることからその接続性が良好であり、直流抵抗が小さくなる。また、めっき膜の厚さは小さく、その分積層体の面積を拡げることが可能であり、内部電極を設計する際の自由度が増す。
【0010】
本発明に係る積層電子部品において、前記内部電極の引出し部は積層体の側面に引き出されており、電解めっき膜は導電膜と接続されるように積層体の側面に設けられていてもよい。引出し部と導電膜との接触量が増加し、より安定しためっき膜が形成される。
【0011】
さらに、前記導電膜は積層体の両端面の少なくとも一つの稜部に形成されていてもよいが、各々四つの稜部にリング状に設けられていることが好ましい。より安定しためっき膜の形成が可能であり、かつ、電子部品の実装時の方向性が限定されることもなくなる。
【0012】
さらに、前記引出し部の積層方向の間隔は前記電解めっき膜の厚さの2倍以下であることが好ましい。電解めっきにおいてめっき膜は引出し部を起点にして縦方向と横方向に生長するが、引出し部の間隔をめっき膜の厚さの2倍以下に設定することによって積層体端面に隙間なく電解めっき膜が形成される。
【0013】
さらに、前記積層体の前記稜部に隣接する側面に、前記両端面の外部電極とは別の外部電極が設けられていてもよい。別の外部電極を設ける工程を省略することが可能となる。
【0014】
一方、本発明に係る積層電子部品の製造方法は、複数の絶縁性シートと複数の内部電極とを積層して積層体を形成し、該積層体の端面に前記内部電極の引出し部と電気的に接続された外部電極を設けた積層電子部品の製造方法において、前記外部電極を形成する工程は、導電性ペーストを前記積層体の端面の少なくとも内部電極の積層方向に沿った稜部に前記引出し部と接触するように塗布する工程と、前記導電性ペーストを焼付け又は熱硬化させて導電膜を形成する工程と、前記積層体の端面に電解めっきを施し、前記稜部の導電膜と接続されるように電解めっき膜を形成する工程と、を備えていることを特徴とする。
【0015】
以上の構成からなる製造方法においては、引出し部と電気的に接続されている導電膜を形成した積層体の端面に電解めっきを施すため、めっき膜の生長が良好であり、通常、めっき材には内部電極と同じ材料であるNiが使用されることからその接続性が良好であり、直流抵抗が小さくなる。また、めっき膜の厚さは小さく、その分積層体の面積を拡げることが可能であり、内部電極を設計する際の自由度が増す。
【0016】
本発明に係る製造方法において、前記積層体の表面に外部電極とは別の外部電極を有する場合には、導電性ペーストを積層体の端面の少なくとも内部電極の積層方向に沿った稜部に塗布すると共に、該稜部に隣接する側面に前記外部電極とは別の外部電極となる導電性ペーストを同時に塗布すれば、製造工程が簡略化される。
【0017】
【発明の実施の形態】
以下、本発明に係る積層電子部品及びその製造方法の実施形態について、添付図面を参照して説明する。
【0018】
(第1実施形態、図1〜図7参照)
第1実施形態である2端子型の積層セラミックコンデンサ1Aの外観を図1に示す。このコンデンサ1Aは積層体2の両端面に形成した外部電極3を導電膜31とめっき膜32とで構成したものである。
【0019】
図2に積層体2の外観を示し、図3に内部電極5の平面形状を示す。この積層体2は、複数枚の誘電体セラミックグリーンシート4の表面に静電容量を形成するための内部電極5をその引出し部5aと共に形成し、これらのシート4を必要枚数積層し、さらにその上下面に無地のセラミックグリーンシートを積層して外層とし、焼成した後に所定の外形寸法にカットしたものである。
【0020】
積層体2の長さLは1.6mm、幅Wは0.8mm、高さTは0.8mmであるが、これに限定するものではない。また、W>Tであってもよく、図2ではW>Tとして図示している。さらに、引出し部5aの端部と積層体2の側面とのギャップgは150μm、外層の厚さtは150μmである。このギャップg、tの数値もあくまで一例である。
【0021】
前記積層体2に外部電極3を形成する工程は以下のとおりである。まず、積層体2を周知の図示しない保持/供給プレートに詰め込み、頭出しを行って高さを揃える。この積層体2を、図4に示すように、ペースト供給プレート10上に配置し、供給口11,11からCuを主成分とする導電性ペースト31’を押し出し、積層体2の両端面の稜部に塗布する。この塗布工程を4回繰り返すことにより、積層体2の端面の四つの稜部に導電膜31がリング状に形成される。
【0022】
図5において斜線を付した部分がこのようにして形成した導電膜31である。導電膜31は積層体2の端面において露出している引出し部5aと接触し、かつ、積層体2の側面にも回り込んでいる。
【0023】
前述の如く、引出し部5aの端部と積層体2の側面とのギャップgを150μm、外層の厚さtを150μmとしたのは、導電性ペースト膜31を確実に引出し部5aと接触させるためである。
【0024】
その後、温度と雰囲気をコントロールして導電性ペースト膜31の焼付けを行い、内部電極5と導電性ペースト膜31(以下、導電膜31と記す)とを電気的に接続する。
【0025】
次に、前記積層体2の端面に対して電解めっきを施し、Niめっき膜32及びその上にSnめっき膜(図6ではNiめっき膜のみを示す)を形成する。この電解めっき時において、積層体2の端面では内部電極5の引出し部5aと前記導電膜31とが電気的に接続しているため、導電膜31で覆われていない引出し部5aから金属が析出し、めっき生長することで端面全体を覆うめっき膜32が形成される。
【0026】
内部電極5はNiであり、めっき膜32もNiが使用されるため、めっき生長が良好であることと相まって、両者の電気的な接続は良好であり、直流抵抗が小さくなる。また、めっき膜32の厚さDは0.5〜10μmであり、前記導電膜31の厚さも大きい部分で15〜25μmである。従来の厚膜形成法による電極膜では端面の中央部分が最も厚くなり、その厚さは30〜70μmであった。従って、積層体2における外部電極3の厚さは従来の厚膜電極よりも両端面で100μm程度薄く、その分積層体2の寸法Lを大きくすることができる。
【0027】
電解めっきによると、めっき膜32は縦方向と横方向に生長する。引出し部5aの間隔Aをめっき膜32の厚さDの2倍以下に設定すると、めっき膜32は引出し部5aを起点として厚さDをほぼ半径として生長し、隙間のないめっき膜32が得られる。
【0028】
また、電解めっきにおいては、図7に示すスチールボール15をメディアとして使用する。ここで使用されるスチールボール15は直径が100〜400μmである。一方、積層体2の端面において引出し部5aは焼成時の収縮で端面から数μmほど引き込んでいる。
【0029】
即ち、引出し部5aの間隔Aを1〜20μm、引出し部5aの厚さBを0.4〜1μmとし、引出し部5aの引込み量Cが数μmである場合、直径が100〜400μmのスチールボール15を使用すれば、スチールボール15は直接引出し部5aに接触することはないが、引出し部5aには導電膜31が電気的に接続されているため、スチールボール15を通じて引出し部5aに電流が流れて金属が良好に析出する。
【0030】
しかし、導電膜31を形成しない場合では引出し部5aにめっきが析出することはない。なお、スチールボールの直径を100μm以下にすれば、スチールボールが直接引出し部5aに接触することになるが、接触回数が減少するために金属の析出が不能になるか多大の時間を要し、実用的ではない。
【0031】
(第2実施形態、図8参照)
第2実施形態である積層セラミックコンデンサ1Bの外観を図8に示す。このコンデンサ1Bは外部電極3に加えて積層体2の中央部にグランド用の外部電極6を導電性ペーストを4側面に各々塗布することによって形成した3端子型である。
【0032】
外部電極3は前記第1実施形態であるコンデンサ1Aと同様に導電膜31とめっき膜32とで構成されており、その形成工程は前述のとおりである。
【0033】
外部電極6に関しては、図4に示したように、ペースト供給プレート10を使用して導電性ペースト31’を塗布する。この場合、供給口11が一つ追加されることは勿論である。この塗布工程は導電性ペースト膜31の塗布と同時に行う。従って、前記のような3端子型やそれ以外の多端子型の積層電子部品であっても工程数を増加することなく製造することができる。
【0034】
長さLが1.6mm、幅Wが0.8mm、高さ0.8mmの積層体を用いた3端子型コンデンサの場合、本第2実施形態にあっては外部電極3,3間の直流抵抗値は3.5mΩであった。これに対して、従来の厚膜形成法によって外部電極を形成した同じサイズの3端子型コンデンサにあっては4.5mΩであった。即ち、本第2実施形態にあっては従来のものより直流抵抗値が20%程度小さくなり、定格電流値の向上を図ることができた。
【0035】
(第3実施形態、図9参照)
第3実施形態である積層セラミックコンデンサ1Cの中間製品状態での外観を図9(A)に示す。このコンデンサ1Cにあっては、外部電極3の導電膜31を内部電極の積層方向に沿った対向する二つの稜部にのみ形成した点が前記第1実施形態のコンデンサ1Aと異なっている。積層体2の端面には前記と同じ電解めっきによってめっき膜32(図9(B)参照)が形成される。
【0036】
本第3実施形態においては、図4に示したペースト供給プレート10を使用しての塗布工程が2回で済む利点を有している。
【0037】
このコンデンサ1Cにあっては、基板上に実装する場合、半田付けを確実にするには、図9(B)に示すように、導電膜31を形成した面を実装面として設定することが必要となる。前記積層コンデンサ1A,1Bにあっては四つの稜部に導電膜31が形成されているため、実装時の方向性を必ずしも決める必要のない構成となっている。
【0038】
(第4実施形態、図10〜図11参照)
第4実施形態である積層セラミックコンデンサ1Dを図10に示す。図10(A),(B),(C)は各工程順に示している。このコンデンサ1Dは図11に示す内部電極5を備えたもので、その引出し部5aは積層体2の側面の両端部(端面に隣接し、かつ、内部電極5と直交する側面の両端部)にも引き出されて露出している。
【0039】
コンデンサ1Dにあっては、前記第3実施形態のコンデンサ1Cと同様に、外部電極3を構成する導電膜31を内部電極5の積層方向に沿った対向する二つの稜部にのみ形成している。引出し部5aは積層体2の側面の両端部にも露出しており、導電膜31は引出し部5aとより多くの面積で接触する。
【0040】
また、積層体2の端面には前記と同じ電解めっきによってめっき膜32が形成される。ここでのめっき膜32は端面のみならず、引出し部5aの側面露出部にも導電膜31と連続して形成される。従って、外部電極3は積層体2の側面にも大きく回り込むことになり、内部電極5との接続がより確実になると共に、基板への実装時の半田付けも安定かつ確実なものとなる。
【0041】
(他の実施形態)
なお、本発明に係る積層電子部品及びその製造方法は前記各実施形態に限定するものではなく、その要旨の範囲内で種々に変更できる。
【0042】
特に、導電性ペースト膜を付与する方法は、図4に示したペースト供給プレート10を用いる方法以外に種々の方法や塗布装置を採用することができる。
【0043】
また、内部電極の引出し部の形状は任意であり、前記第1、第2、第3実施形態にあっても前記第4実施形態に示した引出し部、即ち、積層体の側面にも露出した形状の引出し部を形成してもよい。
【0044】
さらに、導電膜を形成する稜部は、少なくとも内部電極の積層方向に沿った稜部であればよく、第1実施形態において第3、第4実施形態と同様に内部電極の積層方向に沿った対向する二つの稜部にのみ導電膜を形成してもよい。逆に、第3、第4実施形態において第1、第2実施形態と同様に各々四つの稜部に導電膜をリング状に形成してもよい。
【0045】
さらに、導電膜は前記各実施形態に示したように導電性ペースト膜を焼付けて形成されたものに限らず、導電性樹脂を塗布して熱硬化させて形成してもよい。導電性樹脂を用いた場合、積層電子部品のたわみ強度の向上に効果的であり、特に稜部に形成すると有効である。
【0046】
なお、本発明はコンデンサ以外にもインダクタやLCノイズフィルタ等種々の電子部品に適用できることは勿論である。
【0047】
【発明の効果】
以上の説明で明らかなように、本発明によれば、積層体の両端面の少なくとも一つの稜部に形成された導電膜と、該導電膜が形成された積層体の端面に電解めっきによって形成されためっき膜とで外部電極を構成しているため、外部電極の端面での厚みが薄く、かつ、内部電極との電気的な接続が良好であり、直流抵抗の小さい積層電子部品を得ることができる。
【図面の簡単な説明】
【図1】本発明に係る積層コンデンサの第1実施形態を示す斜視図。
【図2】前記第1実施形態の積層体を示す斜視図。
【図3】前記第1実施形態の内部電極の形状を示す平面図。
【図4】前記第1実施形態において導電性ペースト膜の塗布工程を示す概略説明図。
【図5】前記第1実施形態において積層体の端面稜部に導電膜を形成した中間品を示す斜視図。
【図6】積層体の端面に形成された電解めっき膜を示す断面図。
【図7】電解めっき工程の説明図。
【図8】本発明に係る積層コンデンサの第2実施形態を示す斜視図。
【図9】本発明に係る積層コンデンサの第3実施形態を示し、(A)は導電膜を形成した状態の斜視図、(B)は実装方向を示すための斜視図。
【図10】本発明に係る積層コンデンサの第4実施形態を示し、(A)は積層体の斜視図、(B)は導電膜を形成した状態の斜視図、(C)はめっき膜を形成した状態の斜視図。
【図11】前記第4実施形態の内部電極の形状を示す平面図。
【符号の説明】
1A,1B,1C,1D…積層セラミックコンデンサ
2…積層体
3…外部電極
4…セラミックグリーンシート
5…内部電極
5a…引出し部
31…導電膜
32…めっき膜
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a laminated electronic component and a method of manufacturing the same, particularly, a laminate formed by laminating a plurality of insulating sheets and a plurality of internal electrodes, such as a capacitor and an LC noise filter, and forming the laminate on an end face of the laminate. The present invention relates to a multilayer electronic component provided with external electrodes electrically connected to a lead portion of an electrode, and a method for manufacturing the same.
[0002]
[Prior art and problems]
In general, as a multilayer capacitor, a plurality of ceramic sheets on which internal electrodes are formed are stacked, and furthermore, protective layers of the ceramic sheets are stacked on the upper and lower surfaces thereof, and after firing, cut into predetermined external dimensions to form a stacked body. In the case of a two-terminal type, there is provided a laminate in which external electrodes electrically connected to the lead portions of the internal electrodes are provided on both end surfaces of the laminate.
[0003]
Conventionally, the external electrodes have been formed by applying and baking a conductive paste to the end surface of the laminate by, for example, a dipping method. However, an external electrode formed by applying and baking a conductive paste has a problem that the thickness is inevitably increased, which is incompatible with recent miniaturization of electronic components. Further, when the conductive paste is mainly composed of Cu, if the internal electrode is made of Ni, the electrical connection by baking is not always good, and the glass component contained in the conductive paste is not always good. However, there was a problem that the conductivity was hindered and the DC resistance between the external electrodes was increased.
[0004]
[Patent Document 1]
JP-A-63-169014 [0005]
On the other hand, Patent Literature 1 describes a method of depositing a conductive metal layer by electroless plating on the entire surface of an end face of a multilayer capacitor so that an internal electrode exposed on the end face is short-circuited.
[0006]
In this method of forming an external electrode, although a thin external electrode can be obtained, there is a problem that the plating growth is not sufficient and the direct current resistance increases because the process is only the growth of the plating from the internal electrode. are doing.
[0007]
Therefore, an object of the present invention is to provide a multilayer electronic component having an external electrode that is thin, has good electrical connection with an internal electrode, and has a small DC resistance, and a method of manufacturing the same.
[0008]
Means and Action for Solving the Problems
In order to achieve the above object, a laminated electronic component according to the present invention is configured such that a plurality of insulating sheets and a plurality of internal electrodes are laminated to form a laminate, and the internal electrodes are drawn to both end surfaces of the laminate. In the laminated electronic component provided with the external electrode electrically connected to the portion, the external electrode is composed of a conductive film and an electrolytic plating film, and the conductive film is formed of a ridge on each end face of the laminate. At least a ridge portion along the stacking direction of the internal electrodes is provided so as to be electrically connected to the lead portion, and the electrolytic plating film is connected to the conductive film at the ridge portion on each end surface of the laminate. It is characterized by being provided in. The conductive film is made of a conductive paste, a conductive resin, or the like.
[0009]
In the multilayer electronic component having the above configuration, since the electrolytic plating is performed on the end surface of the laminate in which the conductive film electrically connected to the lead portion is formed, the growth of the plating film is good, Normally, Ni, which is the same material as the internal electrode, is used as the plating material, so that its connectivity is good and the DC resistance is small. In addition, the thickness of the plating film is small, so that the area of the stacked body can be increased accordingly, and the degree of freedom in designing the internal electrode increases.
[0010]
In the laminated electronic component according to the present invention, the lead portion of the internal electrode may be extended to a side surface of the laminate, and the electrolytic plating film may be provided on a side surface of the laminate so as to be connected to the conductive film. The amount of contact between the lead portion and the conductive film increases, and a more stable plating film is formed.
[0011]
Further, the conductive film may be formed on at least one ridge on both end surfaces of the laminate, but is preferably provided in a ring shape on each of the four ridges. A more stable plating film can be formed, and the directionality at the time of mounting the electronic component is not limited.
[0012]
Further, it is preferable that the interval between the lead portions in the laminating direction is not more than twice the thickness of the electrolytic plating film. In electrolytic plating, the plating film grows in the vertical and horizontal directions starting from the lead-out portion, but by setting the interval between the lead-out portions to twice or less the thickness of the plating film, there is no gap in the end face of the laminated body without any gap. Is formed.
[0013]
Further, an external electrode different from the external electrodes on the both end faces may be provided on a side surface of the laminate adjacent to the ridge. The step of providing another external electrode can be omitted.
[0014]
On the other hand, the method for manufacturing a laminated electronic component according to the present invention includes the steps of: laminating a plurality of insulating sheets and a plurality of internal electrodes to form a laminate, and electrically connecting a lead portion of the internal electrode to an end surface of the laminate. In the method for manufacturing a laminated electronic component provided with external electrodes connected to the semiconductor device, the step of forming the external electrodes may include drawing out the conductive paste to at least a ridge of an end surface of the laminated body along a laminating direction of the internal electrodes. A step of applying the conductive paste so as to be in contact with the portion, a step of baking or thermosetting the conductive paste to form a conductive film, and applying an electrolytic plating to an end face of the laminate to be connected to the conductive film of the ridge. Forming an electrolytic plating film as described above.
[0015]
In the manufacturing method having the above configuration, since the end face of the laminate formed with the conductive film electrically connected to the lead portion is subjected to electrolytic plating, the growth of the plated film is good, and the plating material is usually used. Since Ni, which is the same material as the internal electrodes, is used, its connectivity is good and the DC resistance is small. In addition, the thickness of the plating film is small, so that the area of the stacked body can be increased accordingly, and the degree of freedom in designing the internal electrode increases.
[0016]
In the manufacturing method according to the present invention, when an external electrode other than the external electrode is provided on the surface of the laminate, a conductive paste is applied to at least a ridge portion of the end surface of the laminate along the laminating direction of the internal electrodes. In addition, if a conductive paste to be an external electrode different from the external electrode is simultaneously applied to the side surface adjacent to the ridge, the manufacturing process is simplified.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of a multilayer electronic component and a method of manufacturing the same according to the present invention will be described with reference to the accompanying drawings.
[0018]
(1st Embodiment, FIGS. 1-7)
FIG. 1 shows the appearance of a two-terminal multilayer ceramic capacitor 1A according to a first embodiment. In this capacitor 1A, external electrodes 3 formed on both end surfaces of a laminated body 2 are constituted by a conductive film 31 and a plating film 32.
[0019]
FIG. 2 shows the appearance of the laminate 2 and FIG. In the laminate 2, an internal electrode 5 for forming a capacitance is formed on the surface of a plurality of dielectric ceramic green sheets 4 together with a lead portion 5a, and a required number of these sheets 4 are laminated. An outer layer is formed by laminating plain ceramic green sheets on the upper and lower surfaces, fired, and then cut into predetermined external dimensions.
[0020]
The length L of the laminate 2 is 1.6 mm, the width W is 0.8 mm, and the height T is 0.8 mm, but is not limited thereto. Further, W> T may be satisfied, and FIG. 2 illustrates W> T. Further, the gap g between the end of the lead portion 5a and the side surface of the laminate 2 is 150 μm, and the thickness t of the outer layer is 150 μm. The values of the gaps g and t are merely examples.
[0021]
The steps of forming the external electrodes 3 on the laminate 2 are as follows. First, the laminate 2 is packed in a well-known holding / supply plate (not shown), and the height is made uniform by performing cueing. As shown in FIG. 4, this laminate 2 is placed on a paste supply plate 10, and a conductive paste 31 ′ containing Cu as a main component is extruded from supply ports 11, 11, and edges of both end surfaces of the laminate 2 are ridged. Apply to the part. By repeating this coating process four times, the conductive film 31 is formed in a ring shape on the four ridges on the end face of the laminate 2.
[0022]
In FIG. 5, the hatched portion is the conductive film 31 thus formed. The conductive film 31 is in contact with the exposed lead portion 5 a at the end face of the multilayer body 2 and also extends around the side face of the multilayer body 2.
[0023]
As described above, the reason why the gap g between the end portion of the lead portion 5a and the side surface of the multilayer body 2 is 150 μm and the thickness t of the outer layer is 150 μm is to ensure that the conductive paste film 31 comes into contact with the lead portion 5a. It is.
[0024]
After that, the conductive paste film 31 is baked by controlling the temperature and the atmosphere, and the internal electrode 5 and the conductive paste film 31 (hereinafter, referred to as conductive film 31) are electrically connected.
[0025]
Next, electrolytic plating is performed on the end face of the laminate 2 to form a Ni plating film 32 and an Sn plating film (only the Ni plating film is shown in FIG. 6) thereon. At the time of this electrolytic plating, since the lead portion 5a of the internal electrode 5 and the conductive film 31 are electrically connected to each other at the end surface of the laminate 2, metal is deposited from the lead portion 5a not covered with the conductive film 31. Then, the plating film 32 is formed to cover the entire end face by growing the plating.
[0026]
Since the internal electrode 5 is made of Ni and the plating film 32 is made of Ni, the electrical connection between the two is good and the DC resistance is small, in combination with the good plating growth. Further, the thickness D of the plating film 32 is 0.5 to 10 μm, and the thickness of the conductive film 31 is 15 to 25 μm in a large portion. In the electrode film formed by the conventional thick film forming method, the center portion of the end face is the thickest, and its thickness is 30 to 70 μm. Therefore, the thickness of the external electrode 3 in the laminate 2 is smaller by about 100 μm on both end surfaces than the conventional thick film electrode, and the dimension L of the laminate 2 can be increased accordingly.
[0027]
According to the electrolytic plating, the plating film 32 grows in the vertical direction and the horizontal direction. When the distance A between the lead portions 5a is set to be equal to or less than twice the thickness D of the plating film 32, the plating film 32 grows with the thickness D substantially as a radius starting from the lead portion 5a, and the plating film 32 having no gap is obtained. Can be
[0028]
In electrolytic plating, a steel ball 15 shown in FIG. 7 is used as a medium. The steel ball 15 used here has a diameter of 100 to 400 μm. On the other hand, in the end face of the laminated body 2, the drawer 5a is pulled in from the end face by several μm due to shrinkage during firing.
[0029]
That is, in the case where the interval A between the lead portions 5a is 1 to 20 μm, the thickness B of the lead portions 5a is 0.4 to 1 μm, and the drawing amount C of the lead portions 5a is several μm, the steel ball having a diameter of 100 to 400 μm. When the steel ball 15 is used, the steel ball 15 does not come into direct contact with the lead portion 5a. However, since the conductive film 31 is electrically connected to the lead portion 5a, a current flows through the steel ball 15 to the lead portion 5a. The metal flows and deposits well.
[0030]
However, when the conductive film 31 is not formed, plating does not deposit on the lead portion 5a. In addition, if the diameter of the steel ball is set to 100 μm or less, the steel ball comes into direct contact with the drawer 5a. However, since the number of contacts is reduced, metal deposition becomes impossible or it takes a long time, Not practical.
[0031]
(Second embodiment, see FIG. 8)
FIG. 8 shows the appearance of the multilayer ceramic capacitor 1B according to the second embodiment. This capacitor 1B is of a three-terminal type in which, in addition to the external electrodes 3, a ground external electrode 6 is formed by applying a conductive paste to the four sides of the laminate 2 at the center thereof.
[0032]
The external electrode 3 is composed of a conductive film 31 and a plating film 32 as in the capacitor 1A of the first embodiment, and the forming process is as described above.
[0033]
As for the external electrode 6, as shown in FIG. 4, the conductive paste 31 'is applied using the paste supply plate 10. In this case, it goes without saying that one supply port 11 is added. This application step is performed simultaneously with the application of the conductive paste film 31. Therefore, even a three-terminal type or multi-terminal type multilayer electronic component as described above can be manufactured without increasing the number of steps.
[0034]
In the case of a three-terminal capacitor using a laminate having a length L of 1.6 mm, a width W of 0.8 mm and a height of 0.8 mm, in the second embodiment, the direct current between the external electrodes 3 The resistance value was 3.5 mΩ. On the other hand, it was 4.5 mΩ for a three-terminal capacitor of the same size in which external electrodes were formed by a conventional thick film forming method. That is, in the second embodiment, the DC resistance value is reduced by about 20% as compared with the conventional one, and the rated current value can be improved.
[0035]
(Third embodiment, see FIG. 9)
FIG. 9A shows an appearance of a multilayer ceramic capacitor 1C according to the third embodiment in an intermediate product state. This capacitor 1C differs from the capacitor 1A of the first embodiment in that the conductive film 31 of the external electrode 3 is formed only on two opposing ridges along the lamination direction of the internal electrodes. A plating film 32 (see FIG. 9B) is formed on the end face of the laminate 2 by the same electrolytic plating as described above.
[0036]
The third embodiment has an advantage that the application step using the paste supply plate 10 shown in FIG. 4 can be performed only twice.
[0037]
In this capacitor 1C, when it is mounted on a substrate, it is necessary to set the surface on which the conductive film 31 is formed as a mounting surface as shown in FIG. It becomes. In the multilayer capacitors 1A and 1B, since the conductive films 31 are formed on the four ridges, it is not always necessary to determine the directionality at the time of mounting.
[0038]
(Fourth embodiment, see FIGS. 10 to 11)
FIG. 10 shows a multilayer ceramic capacitor 1D according to a fourth embodiment. FIGS. 10A, 10B, and 10C show the order of each process. This capacitor 1D is provided with the internal electrode 5 shown in FIG. 11, and the lead portion 5a is provided at both ends of the side surface of the laminate 2 (both ends of the side surface adjacent to the end surface and orthogonal to the internal electrode 5). Is also pulled out and exposed.
[0039]
In the capacitor 1D, similarly to the capacitor 1C of the third embodiment, the conductive film 31 constituting the external electrode 3 is formed only on two opposing ridges along the lamination direction of the internal electrode 5. . The lead portion 5a is also exposed at both ends of the side surface of the multilayer body 2, and the conductive film 31 contacts the lead portion 5a with a larger area.
[0040]
Further, a plating film 32 is formed on the end face of the laminate 2 by the same electrolytic plating as described above. Here, the plating film 32 is formed not only on the end face but also on the exposed side surface of the lead portion 5a so as to be continuous with the conductive film 31. Therefore, the external electrode 3 also largely goes around the side surface of the multilayer body 2, so that the connection with the internal electrode 5 becomes more reliable and the soldering at the time of mounting on the substrate becomes stable and reliable.
[0041]
(Other embodiments)
The multilayer electronic component and the method of manufacturing the same according to the present invention are not limited to the above embodiments, but can be variously modified within the scope of the invention.
[0042]
In particular, as a method for applying the conductive paste film, various methods and a coating device can be adopted other than the method using the paste supply plate 10 shown in FIG.
[0043]
Further, the shape of the lead portion of the internal electrode is arbitrary, and even in the first, second, and third embodiments, the lead portion shown in the fourth embodiment, that is, also exposed to the side surface of the laminate. A drawer having a shape may be formed.
[0044]
Further, the ridge forming the conductive film may be at least a ridge along the lamination direction of the internal electrodes. In the first embodiment, the ridge is formed along the lamination direction of the internal electrodes as in the third and fourth embodiments. A conductive film may be formed only on two opposing ridges. Conversely, in the third and fourth embodiments, similarly to the first and second embodiments, a conductive film may be formed in a ring shape on each of four ridges.
[0045]
Further, the conductive film is not limited to one formed by baking a conductive paste film as described in each of the above embodiments, but may be formed by applying a conductive resin and thermally curing the resin. When a conductive resin is used, it is effective in improving the bending strength of the multilayer electronic component, and it is particularly effective to form it on a ridge.
[0046]
Note that the present invention can of course be applied to various electronic components such as inductors and LC noise filters other than capacitors.
[0047]
【The invention's effect】
As is apparent from the above description, according to the present invention, a conductive film formed on at least one ridge on both end surfaces of the laminate, and an electroplating formed on the end surface of the laminate on which the conductive film is formed Since the external electrode is composed of the plated film and the external electrode, the thickness at the end face of the external electrode is small, the electrical connection with the internal electrode is good, and a laminated electronic component having a low DC resistance is obtained. Can be.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a first embodiment of a multilayer capacitor according to the present invention.
FIG. 2 is a perspective view showing a laminate of the first embodiment.
FIG. 3 is a plan view showing the shape of an internal electrode according to the first embodiment.
FIG. 4 is a schematic explanatory view showing a step of applying a conductive paste film in the first embodiment.
FIG. 5 is a perspective view showing an intermediate product in which a conductive film is formed on an edge of an end face of the laminate in the first embodiment.
FIG. 6 is a cross-sectional view showing an electrolytic plating film formed on an end face of the laminate.
FIG. 7 is an explanatory view of an electrolytic plating step.
FIG. 8 is a perspective view showing a second embodiment of the multilayer capacitor according to the present invention.
9A and 9B show a third embodiment of the multilayer capacitor according to the present invention, wherein FIG. 9A is a perspective view showing a state where a conductive film is formed, and FIG. 9B is a perspective view showing a mounting direction.
10A and 10B show a multilayer capacitor according to a fourth embodiment of the present invention, wherein FIG. 10A is a perspective view of a multilayer body, FIG. 10B is a perspective view of a state in which a conductive film is formed, and FIG. FIG.
FIG. 11 is a plan view showing the shape of an internal electrode according to the fourth embodiment.
[Explanation of symbols]
1A, 1B, 1C, 1D: Multilayer ceramic capacitor 2: Laminate 3: External electrode 4: Ceramic green sheet 5: Internal electrode 5a: Leader 31: Conductive film 32: Plating film

Claims (10)

複数の絶縁性シートと複数の内部電極とを積層して積層体を形成し、該積層体の両端面に前記内部電極の引出し部と電気的に接続された外部電極を設けた積層電子部品において、
前記外部電極は、導電膜と電解めっき膜とで構成されており、
前記導電膜は、前記積層体の各端面の稜部のうち少なくとも内部電極の積層方向に沿った稜部で前記引出し部と電気的に接続されて設けられており、
前記電解めっき膜は、前記積層体の各端面に前記稜部の導電膜と接続されるように設けられていること、
を特徴とする積層電子部品。
In a laminated electronic component, a laminated body is formed by laminating a plurality of insulating sheets and a plurality of internal electrodes, and external electrodes electrically connected to lead portions of the internal electrodes are provided on both end surfaces of the laminated body. ,
The external electrode is composed of a conductive film and an electrolytic plating film,
The conductive film is provided so as to be electrically connected to the lead-out portion at least at a ridge along a stacking direction of the internal electrodes among ridges of each end face of the laminate,
The electrolytic plating film is provided on each end face of the laminate so as to be connected to the conductive film at the ridge portion,
A laminated electronic component characterized by the following.
前記内部電極の引出し部は前記積層体の側面に引き出されており、前記電解めっき膜は前記導電膜と接続されるように積層体の側面に設けられていることを特徴とする請求項1に記載の積層電子部品。The lead-out portion of the internal electrode is drawn out to a side surface of the laminate, and the electrolytic plating film is provided on a side surface of the laminate so as to be connected to the conductive film. The laminated electronic component as described. 前記導電膜は、前記積層体の両端面の各々四つの稜部にリング状に設けられていることを特徴とする請求項1又は請求項2に記載の積層電子部品。The multilayer electronic component according to claim 1, wherein the conductive film is provided in a ring shape at each of four ridges on both end surfaces of the multilayer body. 前記引出し部の積層方向の間隔は前記電解めっき膜の厚さの2倍以下であることを特徴とする請求項1、請求項2又は請求項3に記載の積層電子部品。4. The multilayer electronic component according to claim 1, wherein an interval between the lead portions in a laminating direction is equal to or less than twice a thickness of the electrolytic plating film. 5. 前記積層体の前記稜部に隣接する側面に、前記両端面の外部電極とは別の外部電極が設けられていることを特徴とする請求項1、請求項2、請求項3又は請求項4に記載の積層電子部品。The external electrode different from the external electrodes on the both end surfaces is provided on a side surface adjacent to the ridge portion of the laminate, the external electrode being provided on the side surface thereof. 3. The laminated electronic component according to item 1. 前記導電膜は、導電性ペーストからなることを特徴とする請求項1、請求項2、請求項3、請求項4又は請求項5に記載の積層電子部品。The multilayer electronic component according to claim 1, wherein the conductive film is made of a conductive paste. 前記導電膜は、導電性樹脂からなることを特徴とする請求項1、請求項2、請求項3、請求項4又は請求項5に記載の積層電子部品。The multilayer electronic component according to claim 1, wherein the conductive film is made of a conductive resin. 複数の絶縁性シートと複数の内部電極とを積層して積層体を形成し、該積層体の端面に前記内部電極の引出し部と電気的に接続された外部電極が形成された積層電子部品の製造方法において、
前記外部電極を形成する工程は、
導電性ペーストを前記積層体の端面の少なくとも内部電極の積層方向に沿った稜部に前記引出し部と接触するように塗布する工程と、
前記導電性ペーストを焼付け又は熱硬化させて導電膜を形成する工程と、
前記積層体の端面に電解めっきを施し、前記稜部の導電膜と接続されるように電解めっき膜を形成する工程と、
を備えていることを特徴とする積層電子部品の製造方法。
A laminated electronic component in which a plurality of insulating sheets and a plurality of internal electrodes are laminated to form a laminate, and an external electrode electrically connected to a lead-out portion of the internal electrode is formed on an end surface of the laminate. In the manufacturing method,
The step of forming the external electrode,
A step of applying a conductive paste on at least the ridges along the stacking direction of the internal electrodes on the end surfaces of the stacked body so as to be in contact with the lead portion,
Baking or thermosetting the conductive paste to form a conductive film,
Electroplating the end face of the laminate, forming an electrolytic plating film so as to be connected to the conductive film of the ridge,
A method for manufacturing a laminated electronic component, comprising:
前記導電膜を、前記積層体の端面の各々四つの稜部にリング状に形成することを特徴とする請求項8に記載の積層電子部品の製造方法。9. The method according to claim 8, wherein the conductive film is formed in a ring shape on each of four edges of the end surface of the multilayer body. 10. 導電性ペーストを前記積層体の端面の少なくとも内部電極の積層方向に沿った稜部に塗布すると共に、該稜部に隣接する側面に前記外部電極とは別の外部電極となる導電性ペーストを同時に塗布することを特徴とする請求項8又は請求項9に記載の積層電子部品の製造方法。A conductive paste is applied to at least the ridges along the stacking direction of the internal electrodes on the end surfaces of the laminate, and the conductive paste to be an external electrode different from the external electrode is simultaneously applied to the side surface adjacent to the ridges. The method for manufacturing a multilayer electronic component according to claim 8, wherein the method is applied.
JP2002306259A 2002-10-21 2002-10-21 Multilayer electronic component and manufacturing method thereof Expired - Lifetime JP4134675B2 (en)

Priority Applications (1)

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US8631549B2 (en) 2007-03-28 2014-01-21 Murata Manufacturing Co., Ltd. Method for manufacturing multilayer electronic component
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US20120019100A1 (en) * 2010-07-26 2012-01-26 Murata Manufacturing Co., Ltd. Laminated ceramic electronic component and manufacturing method therefor
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US9576728B2 (en) 2012-05-30 2017-02-21 Samsung Electro-Mechanics Co., Ltd. Laminated chip electronic component, board for mounting the same, and packing unit thereof
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