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JP2004023007A - Semiconductor package, lead frame of semiconductor package, manufacturing method of semiconductor package - Google Patents

Semiconductor package, lead frame of semiconductor package, manufacturing method of semiconductor package Download PDF

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JP2004023007A
JP2004023007A JP2002179271A JP2002179271A JP2004023007A JP 2004023007 A JP2004023007 A JP 2004023007A JP 2002179271 A JP2002179271 A JP 2002179271A JP 2002179271 A JP2002179271 A JP 2002179271A JP 2004023007 A JP2004023007 A JP 2004023007A
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semiconductor package
lead frame
width
blade
cutting groove
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Takuro Hashiguchi
橋口　卓郎
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Sony Corp
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Sony Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To assure adhesion between the lead frames of a semiconductor package and a protective tape, and to suppress wearing of blades. <P>SOLUTION: The lead frame of a semiconductor package is provided with a cut groove for cutting into pieces, while a plurality of chips are sealed in batch with resin, while being mounted on one surface. The width of the cut groove 3 is larger than the width of the blade, and a protruding part 4 narrower than the blade width is provided in the cut groove. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体パッケージ用リードフレーム及び半導体パッケージ並びに半導体パッケージの製造方法に関する。詳しくは、複数のチップが一方の面に載置された状態において一括樹脂封止され個々を切断する切断溝が形成された半導体パッケージ用リードフレーム及び半導体パッケージ用リードフレームの一方の面に複数のチップが一括樹脂封止された半導体パッケージ並びに半導体パッケージ用リードフレームの一方の面に複数のチップを一括樹脂封止した後に個片化する半導体パッケージの製造方法に係るものである。
【０００２】
【従来の技術】
近年、電子機器の小型化に対応するために、樹脂封止型半導体パッケージ等の半導体部品の高密度実装が要求され、それに伴い半導体部品の小型化、薄型化が進んでいる。また小型で薄型でありながら、多ピン化が進み、高密度の小型、薄型の樹脂封止半導体パッケージが要求されている。
以下、このような高密度の小型、薄型の要求に応じて行われている従来の外部端子となるリード部が片面封止された小型／薄型の半導体パッケージであるＱＦＮ（Ｑｕａｄ　Ｆｌａｔ　Ｎｏｎ−Ｌｅａｄｅｄ　Ｐａｃｋａｇｅ）型の半導体パッケージの製造方法について図５を用いて説明する。
【０００３】
従来のＱＦＮ型の半導体パッケージの製造方法では先ず図５（ａ）で示す様に、裏面に保護テープ１０１を貼り付けた半導体パッケージ用リードフレーム１０２のダイパット１０３に半導体チップ１０４をボンディングし、半導体チップと半導体パッケージ用リードフレームの端子部１０５とを金属ワイヤー１０６で接続した後に一括樹脂封止を行い、半導体チップがボンディングされた半導体パッケージ用リードフレームの一方の面を樹脂１０７で封止する。
【０００４】
次に、保護テープの剥離を行い、図５（ｂ）で示す様に、図５（ｂ）中符号Ａで示す半導体パッケージの周辺に位置する図５（ｂ）中符号Ｂで示す切断部をブレード１０８で切削して図５（ｃ）で示す様なＱＦＮ型の半導体パッケージを製造している。
【０００５】
ここで、従来のＱＦＮ型半導体パッケージの製造方法で用いられる半導体パッケージ用リードフレームの裏面形状は切断部が平坦形状である場合と全面溝加工形状である場合とがある。
即ち、図６中符号Ｃで示す半導体パッケージ用リードフレームの切断部の拡大図である図７及び図８を用いて説明すると、図７に示す様に半導体パッケージ用リードフレームの裏面と図７中符号Ｘで示す半導体パッケージ用リードフレームのブレードによる切削部とが同一高さに形成された平坦形状である場合と、図８に示す様に、図８中符号Ｘで示す半導体パッケージ用リードフレームのブレードによる切削部周辺全体に溝加工が施され半導体パッケージ用リードフレームの裏面と比較してブレードによる切削部の高さが低く形成されている全面溝加工形状である場合とがある。
なお、図７（ａ）は裏面が平坦形状である半導体パッケージ用リードフレームの切断部の拡大平面図、図７（ｂ）は裏面が平坦形状である半導体パッケージ用リードフレームの切断部の拡大断面図、図８（ａ）は裏面が全面溝加工形状である半導体パッケージ用リードフレームの切断部の拡大平面図を示し、図８（ｂ）は裏面が全面溝加工形状である半導体パッケージ用リードフレームの切断部の拡大断面図を示している。
【０００６】
【発明が解決しようとする課題】
しかしながら、半導体パッケージ用リードフレームの切断部の裏面が平坦形状である場合は半導体パッケージ用リードフレームと保護テープとの接着面積が広く樹脂封止の際に接着界面からの樹脂浸入を有効に抑制することが可能であるものの、図７中符号Ｄで示すブレードによる切削部の厚さが大きいためにブレードにより切削を行う際に半導体パッケージ用リードフレームの素材である金属によるブレードの磨耗が生じやすいという不都合があった。なお、半導体パッケージの外形はブレードによる切断幅によって決定されるのであるが、ブレードの側面の磨耗が生じやすくなることにより半導体パッケージの外形のバラツキが生じやすくなるという不都合もあった。
【０００７】
一方、半導体パッケージ用リードフレームの切断部の裏面が全面溝加工形状である場合は半導体パッケージ用リードフレームのブレードによる切削部周辺全体に溝加工を施すことにより図８中符号Ｅで示すブレードによる切削部の厚さを小さくし、半導体パッケージ用リードフレームの素材である金属を切削する量が多いことに起因する上記した切断部が平坦形状である半導体パッケージ用リードフレームにおける不都合を解消することが可能であるものの、半導体パッケージ用リードフレームと保護テープとの接着面積が狭くなり、半導体パッケージ用リードフレームの端子部周辺と保護テープとの接合力が減少してしまい、樹脂封止する際に半導体パッケージ用リードフレームの端子部と保護テープとの界面に樹脂が浸入して半導体パッケージ用リードフレームの端子部上面を樹脂が覆ってしまうことにより、半導体パッケージの実装時の通電が悪くなり、実装不良品が生じてしまうという不都合があった。
【０００８】
本発明は以上の点に鑑みて創案されたものであって、半導体パッケージ用リードフレームと保護テープとの接着力を担保すると共にブレードの磨耗を抑制することが可能である半導体パッケージ用リードフレーム及び半導体パッケージ並びに半導体パッケージの製造方法を提供することを目的とするものである。
【０００９】
【課題を解決するための手段】
上記の目的を達成するために、本発明に係る半導体パッケージ用リードフレームは、複数のチップが一方の面に載置された状態において一括樹脂封止され個々を切断する切断溝が形成された半導体パッケージ用リードフレームにおいて、前記切断溝の幅がブレードの幅より大きく、該切断溝内にブレードの幅より小さい幅の凸部を設けた。
【００１０】
ここで、切断溝の幅がブレードの幅より大きく、切断溝内にブレードの幅より小さい幅の凸部を設けたことによって、ブレードの側面で切削する半導体パッケージ用リードフレームの切断部の厚さを小さくすることができると共に半導体パッケージ用リードフレームと保護テープとの接着面積を充分に確保することができる。
【００１１】
また、上記の目的を達成するために、本発明に係る半導体パッケージは、半導体パッケージ用リードフレームの一方の面に複数のチップが一括樹脂封止された半導体パッケージにおいて、前記半導体パッケージ用リードフレームに個々を切断する切断溝を設けるとともに、前記切断溝の幅がブレードの幅より大きく、該切断溝内にブレードの幅より小さい幅の凸部を設けた半導体パッケージ用リードフレームと、前記半導体パッケージ用リードフレームに搭載され、金属ワイヤーで該半導体パッケージ用リードフレームの端子部と接続される半導体チップと、前記半導体チップが搭載された前記半導体パッケージ用リードフレームを封止する封止樹脂とを備える半導体パッケージ集合体を、前記半導体パッケージ用リードフレームに形成された前記切断溝に沿って個片化した。
【００１２】
ここで、半導体パッケージ用リードフレームに個々を切断する切断溝を設けるとともに、切断溝の幅がブレードの幅より大きく、切断溝内にブレードの幅より小さい幅の凸部を設けた半導体パッケージ用リードフレームによって、ブレード側面で切削する半導体パッケージ用リードフレームの切断部の厚さを小さくすることができると共に半導体パッケージ用リードフレームと保護テープとの接着面積を充分に確保することができる。
【００１３】
また、上記の目的を達成するために、本発明に係る半導体パッケージの製造方法は、半導体パッケージ用リードフレームの一方の面に複数のチップを一括樹脂封止した後に個片化する半導体パッケージの製造方法において、前記半導体パッケージ用リードフレームの他方の面のうちブレードにより切断される部位に切断溝の幅がブレードの幅より大きい該切断溝と、該切断溝内にブレードの幅より小さい幅の凸部を切断方向に従って形成する工程と、前記半導体パッケージ用リードフレームの一方の面に半導体チップを搭載する工程と、前記半導体パッケージ用リードフレームに搭載された前記半導体チップと該半導体パッケージ用リードフレームの端子部とを金属ワイヤーで接続する工程と、前記半導体チップが搭載され、前記端子部が該半導体チップと前記金属ワイヤーで接続された前記半導体パッケージ用リードフレームを樹脂封止する工程と、前記樹脂封止した前記半導体パッケージ用リードフレームを該半導体パッケージ用リードフレームに形成した前記切断溝に沿って前記ブレードにより個片化する工程とを備える。
【００１４】
ここで、半導体パッケージ用リードフレームの一方の面のうちブレードにより切断される部位に切断溝の幅がブレードの幅より大きい切断溝と、切断溝内にブレードの幅より小さい幅の凸部を切断方向に従って形成することによって、ブレードにより個片化する際にブレード側面で切削する半導体パッケージ用リードフレームの切断部の厚さを小さくすることができると共に半導体パッケージ用リードフレームと保護テープとの接着面積を充分に確保することができる。
【００１５】
【発明の実施の形態】
以下、本発明の実施の形態を図面を参照しながら説明し、本発明の理解に供する。
【００１６】
図１に本発明を適用した半導体パッケージ用リードフレームの一例を説明するための模式的な平面図を示し、図２に図１中符号ａで示す半導体パッケージ用リードフレームの切断部の拡大図を示す。なお、図２（ａ）は本発明を適用した半導体パッケージ用リードフレームの切断部の拡大平面図を示し、図２（ｂ）は本発明を適用した半導体パッケージ用リードフレームの切断部の拡大断面図を示している。
ここで示す半導体パッケージ用リードフレーム１は切断部２に切断方向に沿って切断溝３が形成されており、この切断溝内には半導体パッケージ用リードフレームの裏面と同一高さで凸部４が形成されている。ここで、図２（ｂ）中符号ｂで示す切断溝の幅は図２（ｂ）中符号ｃで示すブレードの幅よりも大きく、図２（ｂ）中符号ｄで示す凸部の幅はブレードの幅よりも小さく形成されている。
【００１７】
なお、切断溝内に形成された凸部は、半導体パッケージ用リードフレームと保護テープとの接着面積を確保することにより半導体パッケージ用リードフレームと保護テープとを充分に接着し、樹脂封止の際に接着界面からの樹脂浸入を抑制することができれば充分であり、切断溝内に形成された凸部の個数は必ずしも１つである必要は無く、例えば図３に示す様に切断溝内に２つの凸部が形成されても構わない。
同様に、切断溝内に形成された凸部は、半導体パッケージ用リードフレームと保護テープとを充分に接着し、樹脂封止の際に接着界面からの樹脂浸入を抑制すべく半導体パッケージ用リードフレームの裏面と同一高さで形成されているが、例えば、弾力性を有する保護テープが用いられる等、半導体パッケージ用リードフレームと保護テープとが充分に接着するのであれば、必ずしも半導体パッケージ用リードフレームの裏面と同一高さで形成される必要性は無いが、より強固な接着を可能とし、より確実に樹脂封止の際に接着界面からの樹脂浸入を抑制できるように凸部は半導体パッケージ用リードフレームの裏面と同一高さで形成された方が好ましい。
【００１８】
本発明を適用した半導体パッケージ用リードフレームでは、ブレードの磨耗を抑制することができ、半導体パッケージの幅や長さのバラツキを抑え品質の安定が図れ、更にはブレードの長期間利用が可能となりランニングコストの低減が図れると共に、半導体パッケージ用リードフレームと保護テープとの間の樹脂浸入の抑制により実装不良品を低減することが可能となる。
【００１９】
図４に本発明を適用した半導体パッケージの製造方法の一例を説明するための模式的な断面図を示す。
本発明を適用した半導体パッケージの製造方法の一例では、先ず図４（ａ）で示す様に、半導体パッケージ用リードフレーム１の切断部２の裏面に切断方向に沿って切断溝３を形成すると共に、この切断溝内に半導体パッケージ用リードフレームの裏面と同一高さで凸部４を形成する。ここで、図４（ａ）中符号ｂで示す切断溝の幅は図４（ａ）中符号ｃで示すブレードの幅よりも大きく、図４（ａ）中符号ｄで示す凸部の幅はブレードの幅よりも小さく形成する。
【００２０】
なお、切断溝内に形成する凸部は、樹脂封止の際に接着界面からの樹脂浸入を抑制することができれば充分であり、切断溝内に形成する凸部の個数は必ずしも１つである必要は無い点は上記した本発明を適用した半導体パッケージ用リードフレームの一例と同様である。
また、半導体パッケージ用リードフレームと保護テープとが充分に接着するのであれば凸部を必ずしも半導体パッケージ用リードフレームの裏面と同一高さに形成する必要は無いが、より強固な接着を可能とし、より確実に樹脂封止の際に接着界面からの樹脂浸入を抑制できるように凸部は半導体パッケージ用リードフレームの裏面と同一高さで形成する方が好ましい点についても上記した本発明を適用した半導体パッケージ用リードフレームの一例と同様である。
【００２１】
次に、図４（ｂ）で示す様に、半導体パッケージ用リードフレームの裏面に保護テープ５を貼り付け、半導体パッケージ用リードフレームのダイパッド６に半導体チップ７をボンディングし、半導体チップと半導体パッケージ用リードフレームの端子部８とを金属ワイヤー９で接続した後に一括樹脂封止を行い、半導体チップがボンディングされた半導体パッケージ用リードフレームの一方の面を樹脂１０で封止する。
【００２２】
続いて、保護テープの剥離を行い、図４（ｃ）で示す様に、図４（ｃ）中符号ｅで示す半導体パッケージの周辺に位置する図４（ｃ）中符号ｆで示す切断部を半導体パッケージ用リードフレームに形成した切断溝に沿ってブレード１１により切削して図４（ｄ）で示す様な半導体パッケージを製造する。
【００２３】
本発明を適用した半導体パッケージの製造方法では、上記した本発明を適用した半導体パッケージ用リードフレームと同様に半導体パッケージの品質の安定が図れ、更にはランニングコストの低減が図れると共に、実装不良品を低減することが可能となる。
【００２４】
【発明の効果】
以上述べてきた如く、本発明の半導体パッケージ用リードフレーム及び半導体パッケージ並びに半導体パッケージの製造方法によれば、半導体パッケージ用リードフレームと保護テープとの接着力を担保すると共にブレードの磨耗を抑制することが可能である。
【図面の簡単な説明】
【図１】本発明を適用した半導体パッケージ用リードフレームの一例を説明するための模式的な平面図である。
【図２】図１中符号ａで示す半導体パッケージ用リードフレームの切断部の拡大図である。
【図３】本発明を適用した半導体パッケージ用リードフレームの他の一例を説明するための模式的な断面図である。
【図４】本発明を適用した半導体パッケージの製造方法の一例を説明するための模式的な断面図である。
【図５】従来の半導体パッケージの製造方法を説明するための模式的な断面図である。
【図６】従来の半導体パッケージ用リードフレームを説明するための模式的な平面図である。
【図７】従来の半導体パッケージ用リードフレームの一例を説明するための模式的な平面図及び断面図である。
【図８】従来の半導体パッケージ用リードフレームの他の一例を説明するための模式的な平面図及び断面図である。
【符号の説明】
１　　半導体パッケージ用リードフレーム
２　　切断部
３　　切断溝
４　　凸部
５　　保護テープ
６　　ダイパッド
７　　半導体チップ
８　　端子部
９　　金属ワイヤー
１０　　樹脂
１１　　ブレード[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor package lead frame, a semiconductor package, and a method for manufacturing a semiconductor package. More specifically, a plurality of chips are packaged in a state where a plurality of chips are mounted on one surface, and a plurality of semiconductor package lead frames are formed on one surface of the semiconductor package lead frame in which a cutting groove for cutting each is formed. The present invention relates to a method for manufacturing a semiconductor package in which chips are collectively resin-sealed, and a method for manufacturing a semiconductor package in which a plurality of chips are collectively resin-sealed on one surface of a lead frame for a semiconductor package and then individualized.
[0002]
[Prior art]
In recent years, in order to cope with miniaturization of electronic devices, high-density mounting of semiconductor components such as resin-encapsulated semiconductor packages has been required, and accordingly, semiconductor components have been reduced in size and thickness. In addition, despite the small size and thinness, the number of pins is increasing, and a high-density small-size and thin resin-sealed semiconductor package is required.
Hereinafter, a QFN (Quad Flat Non-Leaded Package) which is a small / thin semiconductor package in which a lead portion serving as a conventional external terminal has been sealed on one side, which has been performed in response to such demand for high density, small and thin. A method of manufacturing a semiconductor package of the type (1) will be described with reference to FIG.
[0003]
In a conventional method of manufacturing a QFN type semiconductor package, first, as shown in FIG. 5A, a semiconductor chip 104 is bonded to a die pad 103 of a lead frame 102 for a semiconductor package having a protective tape 101 adhered to the back surface. After connecting the semiconductor chip and the terminal portion 105 of the semiconductor package lead frame with the metal wire 106, collective resin sealing is performed, and one surface of the semiconductor package lead frame to which the semiconductor chip is bonded is sealed with the resin 107.
[0004]
Next, the protective tape is peeled off, and as shown in FIG. 5B, a cut portion indicated by reference numeral B in FIG. 5B located around the semiconductor package indicated by reference numeral A in FIG. By cutting with a blade 108, a QFN type semiconductor package as shown in FIG. 5C is manufactured.
[0005]
Here, the back surface shape of the semiconductor package lead frame used in the conventional method of manufacturing a QFN type semiconductor package may be a cut portion having a flat shape or a full-face groove processed shape.
7 and 8, which are enlarged views of a cut portion of the semiconductor package lead frame indicated by reference numeral C in FIG. 6, and as shown in FIG. The case where the cutting portion of the semiconductor package lead frame indicated by the reference numeral X and the cut portion by the blade is a flat shape formed at the same height, and the case where the semiconductor package lead frame indicated by the reference numeral X in FIG. In some cases, a groove is formed on the entire periphery of the cut portion by the blade, and the height of the cut portion by the blade is lower than that of the back surface of the lead frame for a semiconductor package.
7A is an enlarged plan view of a cut portion of the semiconductor package lead frame having a flat back surface, and FIG. 7B is an enlarged cross section of a cut portion of the semiconductor package lead frame having a flat back surface. FIG. 8 (a) is an enlarged plan view of a cut portion of a semiconductor package lead frame whose back surface has an entire groove processing shape, and FIG. 8 (b) is a semiconductor package lead frame whose back surface has an entire groove processing shape. 2 shows an enlarged cross-sectional view of the cut portion.
[0006]
[Problems to be solved by the invention]
However, when the back surface of the cut portion of the semiconductor package lead frame has a flat shape, the bonding area between the semiconductor package lead frame and the protective tape is large and effectively suppresses resin intrusion from the bonding interface during resin sealing. Although it is possible, since the thickness of the cut portion by the blade indicated by reference symbol D in FIG. 7 is large, when the blade is cut, the blade, which is a material of the lead frame for a semiconductor package, is likely to be worn by the metal. There was an inconvenience. Although the outer shape of the semiconductor package is determined by the cutting width of the blade, there is also a disadvantage that the outer shape of the semiconductor package is likely to be uneven because the side surface of the blade is easily worn.
[0007]
On the other hand, when the entire back surface of the cut portion of the semiconductor package lead frame has a grooved shape, the entire surface around the cut portion by the blade of the semiconductor package lead frame is cut so as to be cut by the blade indicated by symbol E in FIG. It is possible to reduce the thickness of the portion and eliminate the inconvenience in the semiconductor package lead frame in which the cut portion has a flat shape due to a large amount of cutting the metal which is the material of the semiconductor package lead frame. However, the bonding area between the semiconductor package lead frame and the protective tape is reduced, and the bonding force between the periphery of the terminal portion of the semiconductor package lead frame and the protective tape is reduced. Resin enters the interface between the protective tape and the terminal of the lead frame for By thus the terminal portion upper surface of the over-di lead frame covered with the resin, the energization at the time of mounting the semiconductor package is deteriorated, there is a disadvantage that mounting defective products occurs.
[0008]
The present invention has been made in view of the above points, and has a semiconductor package lead frame capable of securing the adhesive force between a semiconductor package lead frame and a protective tape and suppressing wear of a blade. It is an object of the present invention to provide a semiconductor package and a method of manufacturing a semiconductor package.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, a semiconductor package lead frame according to the present invention is a semiconductor package in which a plurality of chips are mounted on one surface and a cutting groove for cutting each is formed by collectively resin sealing. In the lead frame for a package, the width of the cutting groove is larger than the width of the blade, and a projection having a width smaller than the width of the blade is provided in the cutting groove.
[0010]
Here, the width of the cutting groove is larger than the width of the blade, and the thickness of the cut portion of the semiconductor package lead frame to be cut on the side surface of the blade by providing a convex portion having a width smaller than the width of the blade in the cutting groove. Can be reduced, and a sufficient bonding area between the semiconductor package lead frame and the protective tape can be secured.
[0011]
In order to achieve the above object, a semiconductor package according to the present invention is a semiconductor package in which a plurality of chips are collectively resin-sealed on one surface of a lead frame for a semiconductor package. A lead frame for a semiconductor package in which a cutting groove for cutting each is provided, and the width of the cutting groove is larger than the width of the blade, and a projection having a width smaller than the width of the blade is provided in the cutting groove; A semiconductor comprising: a semiconductor chip mounted on a lead frame and connected to a terminal of the semiconductor package lead frame by a metal wire; and a sealing resin for sealing the semiconductor package lead frame on which the semiconductor chip is mounted. A package assembly is formed on the semiconductor package lead frame. Singulation along the cutting groove.
[0012]
Here, a semiconductor package lead frame is provided with a cutting groove for individually cutting a semiconductor package lead frame, and a width of the cutting groove is larger than the width of the blade, and a projection having a width smaller than the width of the blade is provided in the cutting groove. With the frame, it is possible to reduce the thickness of the cut portion of the semiconductor package lead frame that is cut on the side surface of the blade, and it is possible to ensure a sufficient bonding area between the semiconductor package lead frame and the protective tape.
[0013]
In order to achieve the above object, a method of manufacturing a semiconductor package according to the present invention is directed to a method of manufacturing a semiconductor package in which a plurality of chips are collectively resin-sealed on one surface of a lead frame for a semiconductor package and then singulated. In the method, a cutting groove having a width larger than the width of the blade is provided on a portion of the other surface of the lead frame for a semiconductor package which is cut by the blade, and a projection having a width smaller than the width of the blade is provided in the cutting groove. Forming a portion in accordance with the cutting direction; mounting a semiconductor chip on one surface of the semiconductor package lead frame; and forming the semiconductor chip and the semiconductor package lead frame mounted on the semiconductor package lead frame. Connecting the terminal portion with a metal wire, and mounting the semiconductor chip; A step of resin-sealing the semiconductor package lead frame connected to the conductor chip and the metal wire, and a step of forming the resin-packaged semiconductor package lead frame along the cutting groove formed in the semiconductor package lead frame. And singulating with the blade.
[0014]
Here, on one surface of the semiconductor package lead frame, a cutting groove having a width of the cutting groove larger than the width of the blade is cut at a portion cut by the blade, and a protrusion having a width smaller than the width of the blade is cut into the cutting groove. By forming according to the direction, it is possible to reduce the thickness of the cut portion of the lead frame for the semiconductor package which is cut on the side surface of the blade when individualizing with the blade, and to make the bonding area between the lead frame for the semiconductor package and the protective tape. Can be sufficiently secured.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings to provide an understanding of the present invention.
[0016]
FIG. 1 is a schematic plan view for explaining an example of a lead frame for a semiconductor package to which the present invention is applied, and FIG. 2 is an enlarged view of a cut portion of the lead frame for a semiconductor package indicated by reference numeral a in FIG. Show. 2A is an enlarged plan view of a cut portion of the semiconductor package lead frame to which the present invention is applied, and FIG. 2B is an enlarged cross section of the cut portion of the semiconductor package lead frame to which the present invention is applied. FIG.
In the lead frame 1 for a semiconductor package shown here, a cutting groove 3 is formed in a cutting portion 2 along a cutting direction, and a convex portion 4 is formed in the cutting groove at the same height as the back surface of the semiconductor package lead frame. Is formed. Here, the width of the cutting groove indicated by reference numeral b in FIG. 2B is larger than the width of the blade indicated by reference numeral c in FIG. 2B, and the width of the protrusion indicated by reference numeral d in FIG. It is formed smaller than the width of the blade.
[0017]
The protrusion formed in the cut groove secures the bonding area between the semiconductor package lead frame and the protective tape, thereby sufficiently bonding the semiconductor package lead frame and the protective tape, and is used for resin sealing. It is sufficient that the resin intrusion from the adhesive interface can be suppressed at the same time, and the number of protrusions formed in the cutting groove is not necessarily one, and for example, as shown in FIG. Two protrusions may be formed.
Similarly, the protrusion formed in the cut groove sufficiently adheres the semiconductor package lead frame and the protective tape, and suppresses resin intrusion from the bonding interface during resin sealing. Is formed at the same height as the back surface of the semiconductor package, but if the semiconductor package lead frame and the protective tape are sufficiently adhered to each other, for example, when a protective tape having elasticity is used, the semiconductor package lead frame is not necessarily used. It is not necessary to be formed at the same height as the back surface of the package, but the protrusions are for semiconductor packages so that stronger bonding is possible and resin intrusion from the bonding interface can be more reliably suppressed during resin sealing. It is preferable to form the same height as the back surface of the lead frame.
[0018]
In the lead frame for a semiconductor package to which the present invention is applied, wear of the blade can be suppressed, variation in the width and length of the semiconductor package can be suppressed, quality can be stabilized, and the blade can be used for a long period of time. It is possible to reduce the cost, and it is possible to reduce defective mounting products by suppressing resin intrusion between the semiconductor package lead frame and the protective tape.
[0019]
FIG. 4 is a schematic cross-sectional view illustrating an example of a method for manufacturing a semiconductor package to which the present invention is applied.
In one example of a method of manufacturing a semiconductor package to which the present invention is applied, first, as shown in FIG. 4A, a cutting groove 3 is formed along the cutting direction on the back surface of a cutting portion 2 of a lead frame 1 for a semiconductor package. A projection 4 is formed in the cut groove at the same height as the back surface of the semiconductor package lead frame. Here, the width of the cutting groove shown by reference numeral b in FIG. 4A is larger than the width of the blade shown by reference numeral c in FIG. 4A, and the width of the projection shown by reference numeral d in FIG. It is formed smaller than the width of the blade.
[0020]
In addition, the number of protrusions formed in the cut groove is sufficient as long as it can suppress resin intrusion from the bonding interface during resin sealing, and the number of protrusions formed in the cut groove is necessarily one. The point that is not necessary is the same as that of the example of the semiconductor package lead frame to which the present invention is applied.
Also, if the lead frame for the semiconductor package and the protective tape are sufficiently bonded, it is not always necessary to form the convex portion at the same height as the back surface of the lead frame for the semiconductor package, but it enables stronger bonding, The present invention was also applied to the point that it is preferable that the protrusions be formed at the same height as the back surface of the semiconductor package lead frame so that the resin intrusion from the bonding interface can be more reliably suppressed during resin sealing. This is the same as an example of a lead frame for a semiconductor package.
[0021]
Next, as shown in FIG. 4B, a protective tape 5 is attached to the back surface of the lead frame for the semiconductor package, and the semiconductor chip 7 is bonded to the die pad 6 of the lead frame for the semiconductor package. After connecting the terminal portions 8 of the lead frame with the metal wires 9, collective resin sealing is performed, and one surface of the semiconductor package lead frame to which the semiconductor chip is bonded is sealed with the resin 10.
[0022]
Subsequently, the protective tape is peeled off, and as shown in FIG. 4C, a cut portion indicated by reference numeral f in FIG. 4C located around the semiconductor package indicated by reference numeral e in FIG. The semiconductor package as shown in FIG. 4D is manufactured by cutting with a blade 11 along a cutting groove formed in a semiconductor package lead frame.
[0023]
According to the method of manufacturing a semiconductor package to which the present invention is applied, the quality of the semiconductor package can be stabilized in the same manner as the above-described lead frame for a semiconductor package to which the present invention is applied, and further, the running cost can be reduced, and defective mounting can be reduced. It becomes possible to reduce.
[0024]
【The invention's effect】
As described above, according to the lead frame for a semiconductor package, the semiconductor package, and the method of manufacturing a semiconductor package of the present invention, it is possible to ensure the adhesive force between the lead frame for a semiconductor package and the protective tape and to suppress the wear of the blade. Is possible.
[Brief description of the drawings]
FIG. 1 is a schematic plan view for explaining an example of a lead frame for a semiconductor package to which the present invention is applied.
FIG. 2 is an enlarged view of a cut portion of a lead frame for a semiconductor package indicated by reference numeral a in FIG.
FIG. 3 is a schematic cross-sectional view for explaining another example of a lead frame for a semiconductor package to which the present invention is applied.
FIG. 4 is a schematic sectional view for explaining an example of a method for manufacturing a semiconductor package to which the present invention is applied.
FIG. 5 is a schematic cross-sectional view for explaining a conventional method for manufacturing a semiconductor package.
FIG. 6 is a schematic plan view for explaining a conventional lead frame for a semiconductor package.
FIG. 7 is a schematic plan view and a cross-sectional view illustrating an example of a conventional lead frame for a semiconductor package.
FIG. 8 is a schematic plan view and a sectional view for explaining another example of a conventional lead frame for a semiconductor package.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Lead frame for semiconductor packages 2 Cutting part 3 Cutting groove 4 Convex part 5 Protective tape 6 Die pad 7 Semiconductor chip 8 Terminal part 9 Metal wire 10 Resin 11 Blade

Claims (5)

複数のチップが一方の面に載置された状態において一括樹脂封止され個々を切断する切断溝が形成された半導体パッケージ用リードフレームにおいて、
前記切断溝の幅がブレードの幅より大きく、該切断溝内にブレードの幅より小さい幅の凸部を設けた
ことを特徴とする半導体パッケージ用リードフレーム。In a semiconductor package lead frame in which a plurality of chips are mounted on one surface, and a cutting groove for cutting each is collectively sealed with a resin,
A width of the cutting groove is larger than a width of the blade, and a protrusion having a width smaller than a width of the blade is provided in the cutting groove. 前記切断溝に設けられた凸部と前記半導体パッケージ用リードフレームとが同一高さである
ことを特徴とする請求項１に記載の半導体パッケージ用リードフレーム。2. The lead frame for a semiconductor package according to claim 1, wherein the protrusion provided in the cut groove and the lead frame for the semiconductor package have the same height. 3. 半導体パッケージ用リードフレームの一方の面に複数のチップが一括樹脂封止された半導体パッケージにおいて、
前記半導体パッケージ用リードフレームに個々を切断する切断溝を設けるとともに、前記切断溝の幅がブレードの幅より大きく、該切断溝内にブレードの幅より小さい幅の凸部を設けた半導体パッケージ用リードフレームと、
前記半導体パッケージ用リードフレームに搭載され、金属ワイヤーで該半導体パッケージ用リードフレームの端子部と接続される半導体チップと、
前記半導体チップが搭載された前記半導体パッケージ用リードフレームを封止する封止樹脂とを備える半導体パッケージ集合体が、
前記半導体パッケージ用リードフレームに形成された前記切断溝に沿って個片化された
ことを特徴とする半導体パッケージ。In a semiconductor package in which a plurality of chips are collectively resin-sealed on one surface of a lead frame for a semiconductor package,
A semiconductor package lead having a cutting groove for cutting each of the semiconductor package lead frames, and having a width of the cutting groove larger than a width of the blade and a projection having a width smaller than the width of the blade in the cutting groove; Frame and
A semiconductor chip mounted on the semiconductor package lead frame and connected to a terminal of the semiconductor package lead frame by a metal wire;
A semiconductor package assembly comprising: a sealing resin that seals the semiconductor package lead frame on which the semiconductor chip is mounted;
A semiconductor package which is singulated along the cut grooves formed in the semiconductor package lead frame. 前記切断溝に設けられた凸部と前記半導体パッケージ用リードフレームとが同一高さである
ことを特徴とする請求項３に記載の半導体パッケージ。4. The semiconductor package according to claim 3, wherein the protrusion provided in the cutting groove and the lead frame for the semiconductor package have the same height. 半導体パッケージ用リードフレームの一方の面に複数のチップを一括樹脂封止した後に個片化する半導体パッケージの製造方法において、
前記半導体パッケージ用リードフレームの他方の面のうちブレードにより切断される部位に切断溝の幅がブレードの幅より大きい該切断溝と、該切断溝内にブレードの幅より小さい幅の凸部を切断方向に従って形成する工程と、
前記半導体パッケージ用リードフレームの一方の面に半導体チップを搭載する工程と、
前記半導体パッケージ用リードフレームに搭載された前記半導体チップと該半導体パッケージ用リードフレームの端子部とを金属ワイヤーで接続する工程と、前記半導体チップが搭載され、前記端子部が該半導体チップと前記金属ワイヤーで接続された前記半導体パッケージ用リードフレームを樹脂封止する工程と、前記樹脂封止した前記半導体パッケージ用リードフレームを該半導体パッケージ用リードフレームに形成した前記切断溝に沿って前記ブレードにより個片化する工程とを備える
半導体パッケージの製造方法。In a method of manufacturing a semiconductor package in which a plurality of chips are collectively resin-sealed on one surface of a lead frame for a semiconductor package and then singulated,
A cutting groove having a width larger than the width of the blade is cut into a portion of the other surface of the semiconductor package lead frame which is cut by the blade, and a convex portion having a width smaller than the width of the blade is cut into the cutting groove. Forming according to a direction;
Mounting a semiconductor chip on one surface of the semiconductor package lead frame,
Connecting the semiconductor chip mounted on the semiconductor package lead frame to a terminal portion of the semiconductor package lead frame with a metal wire; and mounting the semiconductor chip, and the terminal portion is connected to the semiconductor chip and the metal. A step of resin-sealing the semiconductor package lead frame connected by wires; and a step of individually forming the resin-packaged semiconductor package lead frame by the blade along the cutting groove formed in the semiconductor package lead frame. A method for manufacturing a semiconductor package, comprising:
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EP1447847A3 (en) * 2003-02-13 2004-09-29 Atlantic Technology (UK) Ltd. Lead frame for an electronic component package
JP2007258590A (en) * 2006-03-24 2007-10-04 Disco Abrasive Syst Ltd Method of dividing package substrate
JP2008112961A (en) * 2006-10-04 2008-05-15 Rohm Co Ltd Method for manufacturing semiconductor device, and semiconductor device
JP2008182175A (en) * 2006-12-27 2008-08-07 Denso Corp Method for manufacturing molded package
JP2012114354A (en) * 2010-11-26 2012-06-14 Dainippon Printing Co Ltd Lead frame and method of manufacturing the same
JP2015072946A (en) * 2013-10-01 2015-04-16 大日本印刷株式会社 Lead frame and manufacturing method of the same, and manufacturing method of semiconductor device
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JP2016105524A (en) * 2016-03-10 2016-06-09 大日本印刷株式会社 Lead frame and method of manufacturing lead frame
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EP1447847A3 (en) * 2003-02-13 2004-09-29 Atlantic Technology (UK) Ltd. Lead frame for an electronic component package
JP2007258590A (en) * 2006-03-24 2007-10-04 Disco Abrasive Syst Ltd Method of dividing package substrate
JP2008112961A (en) * 2006-10-04 2008-05-15 Rohm Co Ltd Method for manufacturing semiconductor device, and semiconductor device
JP2008182175A (en) * 2006-12-27 2008-08-07 Denso Corp Method for manufacturing molded package
JP2012114354A (en) * 2010-11-26 2012-06-14 Dainippon Printing Co Ltd Lead frame and method of manufacturing the same
JP2015072946A (en) * 2013-10-01 2015-04-16 大日本印刷株式会社 Lead frame and manufacturing method of the same, and manufacturing method of semiconductor device
JP2020014029A (en) * 2014-10-09 2020-01-23 大日本印刷株式会社 Lead frame and method of manufacturing the same
JP2016082222A (en) * 2014-10-09 2016-05-16 大日本印刷株式会社 Lead frame and method of manufacturing the same
JP7044142B2 (en) 2014-10-09 2022-03-30 大日本印刷株式会社 Lead frame and its manufacturing method
JP2020205456A (en) * 2014-10-09 2020-12-24 大日本印刷株式会社 Lead frame and method of manufacturing the same
JP2016154161A (en) * 2015-02-20 2016-08-25 Ｓｈマテリアル株式会社 Lead frame for mounting semiconductor device and manufacturing method thereof
JP2017130524A (en) * 2016-01-19 2017-07-27 株式会社三井ハイテック Lead frame and manufacturing method of the same
WO2017126393A1 (en) * 2016-01-19 2017-07-27 株式会社三井ハイテック Lead frame and method for manufacturing same
JP2016105524A (en) * 2016-03-10 2016-06-09 大日本印刷株式会社 Lead frame and method of manufacturing lead frame
JP2017123479A (en) * 2017-03-07 2017-07-13 大日本印刷株式会社 Lead frame and method of manufacturing lead frame
JP2018191012A (en) * 2018-09-05 2018-11-29 大日本印刷株式会社 Lead frame and method of manufacturing lead frame
CN113903672A (en) * 2021-11-16 2022-01-07 新恒汇电子股份有限公司 Preparation method of burr-shaped cutting rib of metal lead frame

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