JP2004087575A

JP2004087575A - Semiconductor, manufacturing method, and mount structure for semiconductor device

Info

Publication number: JP2004087575A
Application number: JP2002243283A
Authority: JP
Inventors: Tetsuhiro Nakamura; 中村　　哲浩
Original assignee: Citizen Watch Co Ltd
Current assignee: Citizen Watch Co Ltd
Priority date: 2002-08-23
Filing date: 2002-08-23
Publication date: 2004-03-18

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of a conventional semiconductor and its mount structure that the semiconductor cannot normally be driven because electric conduction between a projected electrode and a wire electrode cannot be supported at the occurrence of exfoliation between the semiconductor device and an insulating resin or an opposed board and the insulating resin due to the difference of the thermal expansion coefficient between the semiconductor device and the opposed board in the case that an external temperature change is caused to an electronic apparatus with the semiconductor device mounted thereon. <P>SOLUTION: The projection electrode is configured to include a base connected to an electrode pad and a connection part formed to the upper stage of the base, the upper end face of the connection part is formed flat, and at least the connection part comprises a plurality of divisions. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は半導体装置を直接基板上に実装するフリップチップ実装方法における半導体装置と半導体装置の製造方法ならびにその半導体装置の実装構造に関するものである。さらに詳しくは、半導体基板上の回路素子を制御するための複数個の電極パッド上の各々に形成された突起電極を有する半導体装置と対向基板とにより形成された実装構造に熱が掛かり、その実装構造に用いられている各部材の熱膨張係数の違いにより前記各部材間に応力が生じても、その実装構造の破損を最小限に留めることができる半導体装置とその製造方法とその半導体装置を用いた実装構造に関するものである。
【０００２】
【従来の技術】
半導体装置と対向基板とを絶縁性樹脂を用いて固着した半導体装置の実装構造が様々な用途の電子機器に搭載されている。この実装構造は、前記半導体装置に配した突起電極と前記対向基板に配した配線電極とを当接させて電気的な接続を行い、ノンコンダクトペーストにより両基板を固着した形態である。このノンコンダクトペーストにより両電極を固着させる技術が特開昭６０−２６２４３０号公報に開示されているので、この技術を下記に詳細に説明する。
【０００３】
図２２は、前記公報に記載された半導体装置の構成を説明するための構造断面図である。
従来の技術の実装構造に用いる半導体装置は、この図２２に示す様に、半導体基板１上に形成された回路素子（図示せず）と、電極パッド２と、その電極パッド２上を開口させ前記半導体基板を被覆した絶縁膜３と、その電極パッド２上に共通電極膜６を介して形成された突起電極１００を有する。この半導体装置と、前記突起電極１００と相対する配線電極９を有する対向基板８との間に光硬化もしくは熱硬化型の絶縁性樹脂７（ノンコンダクトペースト）を配し、前記半導体装置の突起電極１００を前記対向基板８の配線電極９に当接させた後に前記絶縁性樹脂７を硬化させることにより半導体装置の実装構造を形成することができるとある。この方法によれば、前記突起電極１００と前記配線電極９との間に導電粒子を介在させずに直接両電極を当接させることができ、さらに前記半導体装置と前記配線基板８との良好な電気的な接続を行うことができるのである。
【０００４】
ここでこの半導体装置の製造方法とこの半導体装置を用いた実装方法についてあわせて以下に詳細に説明する。図１６〜図２１は、この従来の半導体装置形成方法を説明するための工程断面図であり、図２２はここで形成された半導体装置の実装方法（ノンコンダクトペースと実装方法）を説明するための工程断面図である。
まず図１６に示す様に、常法により半導体基板１上に回路素子（図示せず）とその回路素子を制御するための複数個の電極パッド２を設け、前記回路素子を含む他の半導体基板１表面を被覆し、前記電極パッド２の上面のみを開口させた絶縁膜３を形成する。ここでは、複数個の内の一つの電極パッドについて以下説明する。
【０００５】
続けて図１７に示す様に、この前記絶縁膜３と前記電極パッド２上に前記半導体基板１の表面全面に共通電極膜６を形成する。この共通電極膜６の形成方法はスパッタリング法や真空蒸着法によりクロム、銅、チタン、タングステン等の金属膜で形成する。
【０００６】
さらに図１８に示す様に、感光性樹脂からなるメッキレジスト５を前記半導体基板１上に塗布し、露光現像処理により前記電極パッド２上すなわち後の工程で突起電極１００を形成する部分が開口する様にメッキレジスト５をパターン化する。これにより前記共通電極膜６を陰極として電解メッキを行うことができ、図１９に示す様に前記メッキレジスト５の開口部にのみメッキを成長させ、前記電極パッド２上に前記突起電極１００を形成することができる。この時形成する突起電極１００は、一般的に金、銅、ニッケル、ハンダ等の金属が多用される。
【０００７】
その後、図２０に示す様に前記メッキレジスト５を除去し、図２１に示す様に前記半導体基板１表面に露出した共通電極膜６をエッチングすることにより、前記電極パッド２上と前記突起電極１００の間のみに共通電極膜６が残る構成となる。この共通電極膜６の材料には、前記共通電極膜６がエッチングされる金属であり、かつ突起電極１００はエッチングされない様に前記材料とエッチング方法をそれぞれ選定する必要がある。例えば、前記共通電極膜６を銅で形成し、前記突起電極１００を金で形成しておき、硝酸や過硫酸アンモニウムに前記半導体装置を浸漬するエッチング方法を採用することで、露出している共通電極膜６のみを除去することができる。
【０００８】
さらに、図２２に示す様に前記突起電極１００を形成した前記半導体装置を配線電極９を形成した対向基板８に絶縁性樹脂７を介在させて加熱、加圧により実装することで、前記突起電極１００と前記配線電極９を当接させて両電極が電気的に導通し、さらに前記半導体基板１と前記対向基板８が前記絶縁性樹脂により固着された構成となる。
【０００９】
またさらに図面では示さないが、前記半導体装置の突起電極の接続端面（上部端面）に複数個の尖部を配した突起電極を有する半導体装置が特開平６−１６３５４９号公報に開示されている。この構成によれば、前記ノンコンダクトペーストを用いて両基板を固着させるとともに、前記尖部が前記配線電極に当接した際にこの尖部が押し潰されることで両電極の電気的な接続が成されるというものである。この尖部が、コンダクトペーストに混入された導電粒子の役割を果たし、前述のノンコンダクトペーストによる前記突起電極と前記配線電極との接続不良を更に軽減することができるのである。
【００１０】
【発明が解決しようとする課題】
この様に、半導体装置に形成する突起電極を対向基板上に形成した配線電極に当接させて電気的な接続を行い、半導体装置と対向基板の間に絶縁性樹脂を充填して両基板を固着した従来技術の半導体装置の実装構造を形成する際には、その絶縁性樹脂が前記突起電極と前記配線電極の当接面に介在しない様に加熱とともに加圧を行ってその絶縁性樹脂を前記当接面から排除する必要がある。ここで、前記突起電極と前記配線電極は電気的に当接しているだけで接着または接合はされていない。また、従来の技術の後段で説明した突起電極の表面に尖部を有する半導体装置を用いた構成においても、その接続形態は同じである。
【００１１】
そのため、前記実装構造を用いた電子機器等に外的な温度変化が生じた場合、前記半導体装置と前記対向基板に用いる材料の熱膨張係数の違いにより、例えば前記半導体基板と前記絶縁性樹脂または対向基板と絶縁性樹脂の各部材間で熱応力に耐えきれずに剥離（基板配置位置のズレやクラック）が発生し、前記突起電極と前記配線電極との電気的導通を保持することができなくなる場合がある。その結果、半導体装置を正常に駆動することができなってしまう。
【００１２】
また、この従来技術における実装構造では、半導体装置の突起電極のピン数が増加するとともに各電極面積が小さくなった場合や、前記実装構造の形成段階における前記絶縁性樹脂の熱硬化工程等により各電極に熱応力が掛かった場合も同様に、電気的導通不良を発生させる要因となり得る。
【００１３】
この様な現象を回避するためには、前記実装構造に使用する各部材間で接着強度が強くなる材料を意図的に厳選することで上記問題は解消できるが、各部材の材料が限定されるため好ましくない。
【００１４】
本発明の目的は、半導体装置に形成した突起電極と対向基板上に形成した配線電極とを電気的に接続する際に、前記半導体装置と前記対向基板の熱膨張係数の違いにより発生する応力に強く、さらに前記突起電極と前記配線電極の電気的に安定した接続が行うことを可能とした半導体装置とその製造方法およびその半導体装置の実装構造を提供することにある。
【００１５】
【課題を解決するための手段】
上記の目的を達成するために、本発明における半導体装置とその実装方法は下記記載の製造方法を採用する。
【００１６】
本発明の半導体装置は、半導体基板上の回路素子を制御するための複数個の電極パッド上に突起電極を有する半導体装置において、前記突起電極は、前記電極パッドと接続する基部とその基部の上段に形成された接続部とを有し、前記接続部の上端面は平坦であり、少なくともその接続部が複数個に分割されてなることを特徴とする。
【００１７】
また本発明の半導体装置は、前記突起電極は、前記接続部とともに前記基部も分割形成されてなることを特徴とする。
【００１８】
さらに本発明の半導体装置は、前記接続部を複数個に分割形成された各分割片が、前記各電極パッド上にライン状に配置されてなることを特徴とする。
【００１９】
さらに本発明の半導体装置は、前記接続部を複数個に分割形成された各分割片が、前記各電極パッド上にマトリックス状に配置されてなることを特徴とする。
【００２０】
さらに本発明の半導体装置は、前記接続部を複数個に分割形成された各分割片が、等間隔に配置されてなることを特徴とする。
【００２１】
さらに本発明の半導体装置は、前記突起電極と前記電極パッドが、共通電極膜を介して接続されてなることを特徴とする。
【００２２】
さらに本発明の半導体装置は、前記半導体基板の表面は、少なくとも前記電極パッドの一部を露出開口させた絶縁膜で被覆されてなることを特徴とする。
【００２３】
本発明の半導体装置の製造方法は、半導体基板上の回路素子を制御する複数個の電極パッド上の各々に形成された突起電極を有する半導体装置の製造方法において、前記各電極パッド上を被覆する共通電極膜を形成する工程と、前記各電極パッド上に少なくとも一つの開口を有する第１のメッキレジストを形成し、メッキ処理を行うことにより前記開口部に突起電極の基部を形成する工程と、前記第１のメッキレジストを除去した後に、前記基部上に複数個の開口を有する第２のメッキレジストを形成し、メッキ処理を行うことにより前記各基部上段に複数個の分割片からなる接続部を形成する工程と、その接続部を形成した後に前記半導体基板表面を露出する前記共通電極膜を除去する工程を含むことを特徴とする。
【００２４】
また本発明の半導体装置の製造方法は、半導体基板上の回路素子を制御する複数個の電極パッド上の各々に形成された突起電極を有する半導体装置の製造方法において、前記各電極パッド上を被覆する共通電極膜を形成する工程と、前記各々の電極パッドのそれぞれに複数個の開口を有するメッキレジストを前記共通電極膜上に形成し、メッキ処理を行うことにより前記各電極パッド上のそれぞれに複数個の分割片からなる接続部を形成する工程と、前記メッキレジストを除去した後に前記半導体基板表面を露出する前記共通電極膜を除去する工程を含むことを特徴とする。
【００２５】
さらに本発明の半導体装置の製造方法は、前記各電極パッド上に被覆する前記共通電極膜を形成する工程の前に、少なくとも前記電極パッドの一部を露出させる絶縁膜を形成する工程を含むことを特徴とする。
【００２６】
本発明の半導体装置の実装構造は、半導体装置と、対向基板上に形成された配線電極とを、前記半導体基板と前記対向基板とを対向接続させた際にできる間隙、および前記接続部を分割して形成された各分割片の隙間に絶縁性樹脂を充填させて前記半導体装置と前記対向基板を固着させるとともに、前記接続部の上端面と前記配線電極とを当接させて両電極の電気的な接続を行うことを特徴とする。
［作用］
【００２７】
本発明の半導体装置は、対向基板に形成された配線電極に対向する突起電極を、電極パッドと接続する基部とその基部と前記配線電極との接続をするための接続部からなる構成とする。さらにその接続部の前記配線電極との接続箇所となる上部端面を平坦とするとともに、前記接続部を複数個に分割して複数個の分割片からなる構成とする。この半導体装置を用いて対向基板に形成された配線電極との実装構造の形成段階で半導体装置と対向電極とで形成される間隙はもちろん、この各分割片の隙間に絶縁性樹脂を充填せることができる。
【００２８】
これにより、前記複数個に分割された接続部を有する突起電極と配線電極と電気的接続を行う際に、前記分割片の隙間の分だけ突起電極と絶縁性樹脂との接触面積を増大させることが可能となるので、前記半導体装置と前記対向基板の熱膨張係数の違いにより発生する応力にも十分耐えることができる様になり、例え外的な要因により両基板が変形したとしても、両基板間の電気的な導通を損なうことがない半導体装置とその実装構造を得ることができる。
【００２９】
【発明の実施の形態】
（第１の実施の形態）
以下図面を用いて本発明の第１の実施形態における半導体装置とその半導体装置を用いた実装構造ついて説明する。
【００３０】
図１は本発明の第１の実施形態における半導体装置の実装構造を示す断面図である。ここで用いる半導体装置は、半導体基板１上の図示しない回路素子を制御するための複数個の電極パッド２（図では１つのみを示す）上の各々に形成された突起電極４を有する。その突起電極４は、前記電極パッド２に接続する基部２０とその基部２０の上段に形成された複数個の分割片１０からなる接続部２２からなる構成とした。さらに、この接続部２２の上部端面形状を平坦とし、かつ複数個の分割片からなる構成としている。この構成は、対向基板８上に形成された配線電極９と前記複数個に分割された接続部２２における各分割片１０により電気的な接続を成し、さらに両基板間はもとより前記各分割片１０の隙間１２に絶縁性樹脂７を充填させて両基板の固着できる様に形成されたものである。
【００３１】
これにより、前記突起電極４の前記隙間１２に充填された絶縁性樹脂７が各分割片１０と配線電極９との電気的接続を補強し、半導体基板１と対向基板８との熱膨張係数の違いにより発生する応力にも十分耐えることができる。つまり、前記隙間１２により突起電極４と絶縁性樹脂７との接する表面積が増大し、各部材間の接着力を強固にすることができるのである。その結果、従来の構成では頻発していた絶縁性樹脂７と半導体装置、または前記絶縁性樹脂７と対向基板８との間で発生する剥離（両基板間での位置ズレやクラック）を極力抑えることが可能となる。
【００３２】
次に第１の実施形態における半導体装置の製造方法およびその半導体装置と対向基板との実装方法を図面を用いて説明する。図２〜図７は本発明の半導体装置の製造方法を説明するための図面であり、図１は本発明の半導体装置の実装方法を説明するための図面である。
【００３３】
まず、従来の技術と同様に、常法に従って図１６に示す様に半導体基板１上に図示しない回路素子を制御するための電極パッド２と、その電極パッド２の少なくとも一部表面を露出させ、前記回路素子を含む前記半導体基板１の表面を被覆した絶縁膜３を有する構造体を作成する。
【００３４】
次に、図１７に示す様に、前記構造体の表面、つまり前記絶縁膜３および電極パッド２表面にスパッタリング法や真空蒸着法により共通電極膜６を形成する。この共通電極膜６はチタンとタングステンの２層からなる金属層の厚みがそれぞれが０．１μｍとなる様にスパッタリング法により形成した。
【００３５】
続けて、図２に示す様に、前記共通電極膜６上に感光性樹脂からなるメッキレジスト５を塗布し露光現像処理することにより前記電極パッド２上に開口部を形成する。第１の実施形態ではメッキレジスト５の厚みを２μｍとし、開口面積および形状は電極パッド２と同じになる様に形成した。この時のメッキレジスト５の開口面積および形状は特に制限されるものではなく、電極パッド２より大きい場合や小さい場合でも特に問題は生じない。
【００３６】
さらに図３に示す様に、前記共通電極膜６を陰極として前述の構造体を電解メッキ液に浸漬させ、電解メッキを行うことによりメッキレジスト５の開口部分の共通電極膜６上に金、銅、ニッケル等から選択された金属を成長させることができ、前記電極パッド２上に突起電極の基部２０が形成される。本実施形態では、金メッキを行い、高さ２μｍの基部２０を形成した。
【００３７】
前記基部２０を形成した後、不要となった感光性樹脂からなるメッキレジスト５を図４に示す様に除去し、再度図５に示す様に、前記共通電極膜６および前記基部２０上に感光性樹脂からなるメッキレジスト５を塗布し、露光現像処理することにより前記基部２０のそれぞれの上段に複数個の開口部を形成する。この開口部の形状および配置形態については後段で詳細に説明する。
【００３８】
続いて、前記共通電極膜６を陰極として図５に示す構造体を電解メッキ液に浸漬させて電解メッキを行うことにより、メッキレジスト５の開口部分の共通電極膜６上に金、銅、ニッケル等から選択される金属を成長させる。そうすると、図６に示す様に接続部２２、つまり基部２０上段に複数個の分割片１０を形成することができる。この様に本実施形態では、金メッキにて形成した基部２０上にさらに金メッキを行い高さ５μｍの複数個の分割片１０からなる接続部２２を形成した。なお前記基部２０、前記接続部２２のそれぞれの材質は、ニッケルと金、銅と金など複数種類の金属で形成されていても特に問題はなく、単一の金属にて形成したも構わない。これは目的仕様用途に応じて任意に選択できるものである。
【００３９】
さらに続けて図７に示す様に、前記接続部２２を形成した後、不要となった感光性樹脂からなるメッキレジスト５を除去した後に、表面に露出した前記共通電極膜６をエッチング除去することにより、前記基部２０上に接続部２２の上部端面形状を平坦とし、かつ前記接続部２２を複数個に分割した分割片１０を有する突起電極４を形成することができ、本発明の半導体装置が完成する。
【００４０】
この接続部２２の上部端面を平坦面とした理由は、下段で説明するこの半導体装置における突起電極と、対向基板上に形成された配線電極とで実装構造を形成する際に、突起電極４の接続部２２と前記配線電極とが良好な電気的接続を得るには平坦面が好ましい形態であるからである。この構成により、従来の技術で示した前記分割片１０の形状が尖部とした場合よりも、両電極の接触面積を大きくとることができる。また、本願発明の半導体装置の形態は、従来の技術（図２２）における半導体装置の突起電極１００の上部端面の面積よりも隙間１２の分だけ小さくなるが、この隙間１２は両基板の固着の補強だけでなく、前記両電極間で排除し切れなかった絶縁性樹脂７を排除し易くする。
この様に本願発明の上記構成により両電極間で良好な接続を得ることができるが、前記間隙の間隔が大き過ぎると前記絶縁性樹脂を両電極間から排除し難くなる場合がある。この場合は、前記接続部２２の上部端面における縁部を丸め、つまり、各突起電極を緩やかに上に凸の形状とすれば、両電極間からこの絶縁性樹脂を容易に排除することができる。前記接続部の形態は任意である。
【００４１】
その後、常法に従い配線電極９が形成された対向基板８を用意し、その対向基板８側に例えば熱硬化型の絶縁性樹脂７からなるシートを配置した基板と、図７に示した半導体基板１上の複数個に分割した接続電極２２を有する突起電極４との位置合わせを行い、前記対向基板８側を加熱しながら前記突起電極４の接続部２２と前記配線電極９とを接続する。ここで、絶縁性樹脂７を介して両基板を固着させることができ、さらに図１に示すような半導体基板１上の電極パッド２と対向基板８上の配線電極９が突起電極４を介して電気的に接続し、さらに半導体装置と対向基板８との間隙および突起電極の隙間１２に充填された絶縁性樹脂７を有する半導体装置の実装構造が得られる。
【００４２】
上記の如く前記対向基板８側に前記絶縁性樹脂７からなるシートを配して形成された実装構造の製造方法を説明したが、前記半導体装置側に前記絶縁性樹脂７を配して前記対向基板８との接続を行っても構わない。
【００４３】
この様に形成された半導体装置の実装構造は、従来の技術で示した実装構造に比べ、半導体基板１と対向基板８に形成された各部材と、両基板を固着させる絶縁性樹脂７との接触面積、特に半導体装置の突起電極４の表面積を大きく設定することができるので、より両基板を強固に固着が可能であることは前述で説明した通りである。
【００４４】
ここで、前記複数個に分割された前記分割片１０の形状および配置構成について説明する。この接続部２２の形状および配置位置は、前記メッキレジスト５に形成される前記開口部のパターン形状及び配置により制御する。この開口部配置により、前記複数個に分割された分割片１０の形状及び面積を任意に設定することができる。
このメッキレジスト５にて形成される複数個の開口部２４は、例えば図８に示すようなマトリックス状や図９に示すようなライン状に配置してもよい。また、前記各開口部２４の形状についても例えば図１０に示すような任意の形状のそれぞれの開口部２４を任意に配置することができる。この開口部の数、開口部面積および開口部形状についても、特に限定されるものではなく、半導体装置の目的仕様用途に応じて任意に設計変更が可能である。
【００４５】
例えば、前記突起電極４の接続部２２と前記配線電極９との間で十分な電気的な接続が望める場合は、分割片１０の隙間１２と、その隙間１２に充填される絶縁性樹脂７の接触面積を大きくするために開口部２４の面積を広く設定すればよい。また、狭ピッチ間隔でしかも前記接続部２２の端部面積を小さく設計する必要がある場合には、できるだけ開口部２４の大きさを狭くし、前記電極パッド２方向に深くまで隙間１２を形成すればよい。この様に前記メッキレジスト５の形状を任意に設計することで、半導体装置の仕様・用途に応じて前記分割片１０の形状・高さを所望の形状とすることができる。また、前記開口部２４は等間隔に整列配置して、外部熱履歴が発生した場合に各開口部２４に形成される前記複数個の分割片１０のそれぞれに同じ力が加わる様にすることが好ましい。
【００４６】
さらに、ここでは前記半導体基板１と前記対向基板８との固着をノンコンダクトペーストである絶縁性樹脂７により行った例を説明したが、この絶縁性樹脂７に導電粒子を混入させた異方性導電膜を用いて、前記半導体基板１上の突起電極４と前記対向基板８上の配線電極９とを接続しても構わない。
【００４７】
（第２の実施形態）
上述の如く、第１の実施形態では基部２０と複数個に分割された接続部２２からなる突起電極４を有する半導体装置構造について説明したが、第２の実施形態の半導体装置は、前記接続部２２に加え、前記基部２０も前記接続部２２と同様に複数個に分割した形態である。つまり、この半導体装置は、各電極パッド２上に直接複数個の分割片１０を有する接続部２２を配した構成であり、第１の実施の形態における基部１０を省いた構成となる。ここで、半導体装置とその半導体装置の実装構造およびその半導体装置とその製造方法について説明する。
【００４８】
まず図面を用いて本発明の第２の実施形態における半導体装置の実装構造について説明する。
図１１は本発明の第２の実施形態における半導体装置の実装構造を示す構造断面図である。この図における半導体装置は、前述の通り半導体基板１上の図示しない回路素子を制御するための複数個の電極パッド２（図面では１つのみを示した）上の各々に直接複数個に分割した接続部２２を配した点が第１の実施の形態とは異なるが、前記半導体基板１と対向基板８との間隙および前記複数個に分割した接続部２２の隙間１２に絶縁性樹脂７を充填させて実装構造を形成している点が共通する。
なお、この図１１の半導体装置の構造断面図は、前記接続部２２が４本に分割され、その４本がライン状に配した柱状形状を有する構成例を示しているが、この接続部２２の形状、本数および配置形態は、第１の実施形態で説明した様に実装構造の仕様用途に応じて任意に変えることができることを理解されたい。
【００４９】
これにより、第１の実施の形態と同様に、突起電極４を構成する前記複数個に分割された分割片１０からなる接続部２２により形成される隙間１２に充填された絶縁性樹脂７が配線電極９との電気的接続を補強し、半導体基板１と対向基板８との熱膨張係数の違いにより発生する熱応力にも十分耐えることができ、さらに絶縁性樹脂７と半導体基板１、または絶縁性樹脂７と対向基板８との間で発生する剥離を極力防止することが可能となる。
【００５０】
次に第２の実施形態における半導体装置の製造方法、およびその半導体装置を用いた半導体装置の実装方法を図面を用いて説明する。図１２〜図１５は、本発明の半導体装置の製造方法を説明するための図面であり、図１１は本発明の半導体装置の実装方法を説明するための図面である。
【００５１】
まず、第２の実施の形態における半導体装置の製造方法について説明する。
従来の技術および第１の実施の形態と同様に、図１６に示す様に半導体基板１上に図示しない回路素子と電極パッド２を形成し、その回路素子を含む半導体基板１上を被覆し、前記電極パッド２の上面を開口させた絶縁膜３を配置する。
【００５２】
次に図１７に示す様に、前記半導体基板１上の前記絶縁膜３および前記電極パッド２表面に、スパッタリング法や真空蒸着法により銅、クロム、チタン、タングステンなどの金属からなる共通電極膜６を形成する。本実施形態ではチタンとタングステンの２層の共通電極膜６を厚みがそれぞれ０．１μｍとなる様にスパッタリング法により形成した。
【００５３】
さらに図１２に示す様に、前記共通電極膜６上に感光性樹脂からなるメッキレジスト５を塗布し露光現像処理することにより前記電極パッド２上に複数個の開口部を形成する。本実施形態では、メッキレジスト５の厚みを５μｍとし、一箇所の開口部の開口面積が５μｍ□となる様に形成した。
【００５４】
続いて図１３に示す様に、前記共通電極膜６を陰極として図１２に示した構造体を電解メッキ液に浸漬し、電解メッキを行うことにより前記メッキレジスト５の開口部分の共通電極膜６上に金、銅、ニッケル等から選択された金属を成長させる。そうすると、複数個に分割された分割片１０からなる接続部２２を形成することができる。本実施形態では、金メッキを行い、高さ５μｍの接続部２２を形成した。この接続部２２の材質については、メッキ途中で成長させる金属材料を代えて、ニッケルと金との組合わせ、銅と金の組合わせなど複数種類の金属で形成した形態としても特に問題はないし、本実施例の様に単一金属にて形成してももちろん構わない。
【００５５】
さらに続けて図１５に示す様に、前記接続部２２を形成した後、不要となった感光性樹脂からなる前記メッキレジスト５を除去した後、表面に露出した前記共通電極膜６をエッチングにより除去することで、第２の実施の形態の半導体装置が完成する。
この時、前記接続部２２と前記共通電極膜６が同じエッチング液でエッチングされない金属としておくことで、前記接続部２２がエッチングマスクの役割を果たし、前記接続部２２が形成されていないで露出した共通電極膜６のみをエッチング除去して前記電極パッド２と前記接続部２２の間のみに共通電極膜６を残した半導体装置を形成することができる。
【００５６】
この第２の実施形態では、前記接続部２２を金で形成してあり、金が溶解しない過酸化水素水でエッチングできるチタンやタングステンを前記共通電極膜６としているので前記複数個に分割された接続部２２はエッチングされずに、露出している共通電極膜６だけをエッチング除去することができる。また、前記電極パッド２もエッチングされず同一電極パッド２と各分割片１０はそれぞれ電気的に導通している。
【００５７】
その後、常法に従い配線電極９が形成された対向基板８を用意し、その対向基板８に例えば熱硬化型の絶縁性樹脂７のシートを配置した基板と、図１１に示した複数個の分割片１０を有する接続部２２（突起電極４）を有する半導体基板１との位置合わせを行い、前記対向基板８側を加熱しながら前記配線電極９と前記接続部２２との実装を行う。ここで、絶縁性樹脂７を介して両基板を固着させることができ、さらに、図１１に示すような前記半導体基板１上の前記電極パッド２と前記対向基板８上の前記配線電極９を前記接続部２２を介して電気的に接続し、半導体装置と対向基板８との間および前記接続部２２の隙間１２に充填された絶縁性樹脂７を有する半導体装置の実装構造が得られる。
【００５８】
この様に形成された半導体装置の実装構造は、従来の技術で開示した実装構造に比べ、半導体基板１と対向基板８に形成された各部材と、両基板を固着させる絶縁性樹脂７との接触面積が第１の実施形態に比べても更に大きく設定することができるので、より両基板を強固に接続可能であるものである。
【００５９】
また、第１の実施形態と同様に、ノンコンダクトペーストである絶縁性樹脂７の代りに異方性導電膜を用いても、両基板間の強固な固着ができ、接続する電極間の電気的な接続を成すことができる。
【００６０】
なお、前記接続部２２の各分割片１０の配置構造は、例えばマトリックス状、ライン状に配置することができる。
【００６１】
また、第１の実施形態では、２段階のメッキ工程（基部２０と接続部２２）により突起電極４を形成した例を示したが、第２の実施形態では、１段階のメッキ工程にて複数個に分割された接続部２２を有する突起電極４を形成できるという利点を有する。つまり、第２の実施形態によれば、従来の技術の工程数と同じ工程数で、しかも前述の通り外部熱履歴が発生したとしても非常に強固な基板間接続を可能とした実装構造が形成できるのである。
【００６２】
【発明の効果】
以上の説明で明らかな様に本発明の半導体装置の実装構造は、半導体基板１上の回路素子を制御するための複数個の電極パッド２上の各々に形成された突起電極４と、ガラスまたは樹脂からなる対向基板８上に形成された配線電極９とを当接させて電気的に接続した半導体装置の実装構造において、前記突起電極が前記電極パッド２上に形成された基部２０と、その上層に形成された接続部２２からなる構成とし、その接続部２２の接続端面を平坦とするとともに複数個に分割した構成とすることで、前記半導体基板と前記対向基板８との間隙および前記複数個に分割された接続部２２の隙間にも絶縁性樹脂７を充填させて、前記半導体装置と前記対向基板８を強固に固着させることができる。
【００６３】
この構造とすることにより、半導体装置と対向基板８との間隙にある絶縁性樹脂７だけでなく前記複数個に分割された接続部２２の隙間に充填された絶縁性樹脂７によっても突起電極４と配線電極９との電気的導通を保持するので、半導体装置と対向基板８の熱膨張係数の違いにより発生する応力によって起こる絶縁性樹脂７と半導体装置または対向基板８との剥離を極力抑えることができる。
【００６４】
また、第２の実施の形態においては、前記各電極パッドに複数個に分割された分割片１０を有する接続部２２を直接に電極パッド２上に配する構成としたので、この接続部２２からなる突起電極４を一段階のメッキ工程で製造できる。つまり、この第２の実施の形態によれば、従来の半導体装置の製造方法と同じ工程数で上記効果を有する半導体装置と、その半導体装置を用いた実装構造を形成できるという顕著を得ることができる。
【００６５】
さらに、本発明の半導体装置を用いた実装構造では、半導体装置の突起電極のピン数が増加するとともに各電極面積が小さくなった場合や、前記実装構造の形成段階における前記絶縁性樹脂の熱硬化工程等により各電極に熱応力が掛かった場合も同様に、電気的導通不良を発生させる確立が極端に減らすことができる。
【００６６】
そしてさらに、本発明の半導体装置を用いた実装構造を適用すれば、前記実装構造に使用する部材の選定の幅が広がる。
【図面の簡単な説明】
【図１】本発明の第１の実施形態における半導体装置の実装構造を説明するための構造断面図である。
【図２】本発明の半導体装置の製造方法を説明するための工程断面図である。
【図３】本発明の半導体装置の製造方法を説明するための工程断面図である。
【図４】本発明の第１の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図５】本発明の第１の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図６】本発明の第１の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図７】本発明の第１の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図８】本発明の第１、第２の実施形態における複数個に分割された接続部をマトリックス状に配した凸部の配置形態を説明するための模式平面図である。
【図９】本発明の第１、第２の実施形態における複数個に分割された接続部をライン状に配した凸部の配置形態を説明するための模式平面図である。
【図１０】本発明の第１、第２の実施形態における複数個に分割された接続部の凸部形状を説明するための模式平面図である。
【図１１】本発明の第２の実施形態の半導体装置の実装構造を説明するための構造断面図である。
【図１２】本発明の第２の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図１３】本発明の第２の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図１４】本発明の第２の実施形態における半導体装置の製造方法を説明するための工程断面図である。
【図１５】本発明の第２の実施形態における半導体装置とその製造方法を説明するための工程断面図である。
【図１６】従来の半導体装置の製造方法を説明するための工程断面図である。
【図１７】従来の半導体装置の製造方法を説明するための工程断面図である。
【図１８】従来の半導体装置の製造方法を説明するための工程断面図である。
【図１９】従来の半導体装置の製造方法を説明するための工程断面図である。
【図２０】従来の半導体装置の製造方法を説明するための工程断面図である。
【図２１】従来の半導体装置の製造方法を説明するための工程断面図である。
【図２２】従来の半導体装置の実装構造及び実装方法を説明するための構造断面図である。
【符号の説明】
１　半導体基板
２　電極パッド
３　絶縁膜
４　突起電極
５　メッキレジスト
６　共通電極膜
７　絶縁性樹脂
８　対向基板
９　配線電極
１０　凸部
１２　隙間
２０　基部
２２　接続部
２４　開口部[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device in a flip chip mounting method for mounting a semiconductor device directly on a substrate, a method of manufacturing the semiconductor device, and a mounting structure of the semiconductor device. More specifically, heat is applied to a mounting structure formed by a semiconductor device having projecting electrodes formed on a plurality of electrode pads for controlling circuit elements on a semiconductor substrate and a counter substrate, and the mounting A semiconductor device, a method of manufacturing the same, and a semiconductor device capable of minimizing damage to the mounting structure even when stress is generated between the respective members due to a difference in thermal expansion coefficient of each member used in the structure. It relates to the mounting structure used.
[0002]
[Prior art]
2. Description of the Related Art A mounting structure of a semiconductor device in which a semiconductor device and a counter substrate are fixed with an insulating resin is mounted on electronic devices for various uses. This mounting structure is a form in which the protruding electrodes arranged on the semiconductor device and the wiring electrodes arranged on the counter substrate are brought into contact with each other to make an electrical connection, and the two substrates are fixed by a non-conduct paste. A technique for fixing both electrodes with the non-conducting paste is disclosed in Japanese Patent Application Laid-Open No. Sho 60-262430, and this technique will be described in detail below.
[0003]
FIG. 22 is a structural cross-sectional view for explaining the configuration of the semiconductor device described in the above publication.
As shown in FIG. 22, a semiconductor device used for a conventional mounting structure has a circuit element (not shown) formed on a semiconductor substrate 1, an electrode pad 2, and an opening on the electrode pad 2. It has an insulating film 3 covering the semiconductor substrate, and a protruding electrode 100 formed on the electrode pad 2 via a common electrode film 6. A light-curing or thermosetting insulating resin 7 (non-conducting paste) is disposed between the semiconductor device and an opposing substrate 8 having a wiring electrode 9 facing the protruding electrode 100. It is stated that the mounting structure of the semiconductor device can be formed by curing the insulating resin 7 after the contact of the insulating resin 100 with the wiring electrode 9 of the counter substrate 8. According to this method, both electrodes can be directly contacted without interposing conductive particles between the protruding electrode 100 and the wiring electrode 9, and furthermore, a good connection between the semiconductor device and the wiring substrate 8 can be obtained. An electrical connection can be made.
[0004]
Here, a method for manufacturing the semiconductor device and a mounting method using the semiconductor device will be described in detail below. 16 to 21 are process cross-sectional views for explaining this conventional semiconductor device forming method. FIG. 22 is for explaining a mounting method (non-conducting space and mounting method) of the semiconductor device formed here. FIG.
First, as shown in FIG. 16, a circuit element (not shown) and a plurality of electrode pads 2 for controlling the circuit element are provided on a semiconductor substrate 1 by a conventional method, and another semiconductor substrate including the circuit element is provided. An insulating film 3 covering one surface and opening only the upper surface of the electrode pad 2 is formed. Here, one of the plurality of electrode pads will be described below.
[0005]
Subsequently, as shown in FIG. 17, a common electrode film 6 is formed on the entire surface of the semiconductor substrate 1 on the insulating film 3 and the electrode pads 2. The common electrode film 6 is formed of a metal film such as chromium, copper, titanium, and tungsten by a sputtering method or a vacuum evaporation method.
[0006]
Further, as shown in FIG. 18, a plating resist 5 made of a photosensitive resin is applied on the semiconductor substrate 1, and an exposure and development process is performed to open a portion on the electrode pad 2, that is, a portion where the bump electrode 100 will be formed in a later step. The plating resist 5 is patterned as described above. As a result, electroplating can be performed using the common electrode film 6 as a cathode. As shown in FIG. 19, plating is grown only on the openings of the plating resist 5 to form the protruding electrodes 100 on the electrode pads 2. can do. Metals such as gold, copper, nickel, and solder are generally used for the protruding electrodes 100 formed at this time.
[0007]
Thereafter, the plating resist 5 is removed as shown in FIG. 20, and the common electrode film 6 exposed on the surface of the semiconductor substrate 1 is etched as shown in FIG. In this configuration, the common electrode film 6 remains only during the interval. The material of the common electrode film 6 needs to be selected from the metal used to etch the common electrode film 6 and the material and the etching method so that the bump electrode 100 is not etched. For example, the common electrode film 6 is formed of copper, the projecting electrode 100 is formed of gold, and the semiconductor device is immersed in nitric acid or ammonium persulfate. Only the film 6 can be removed.
[0008]
Further, as shown in FIG. 22, the semiconductor device on which the protruding electrodes 100 are formed is mounted on the opposite substrate 8 on which the wiring electrodes 9 are formed by heating and pressurizing with the insulating resin 7 interposed therebetween. 100 and the wiring electrode 9 are brought into contact with each other to electrically connect the two electrodes, and the semiconductor substrate 1 and the counter substrate 8 are fixed to each other with the insulating resin.
[0009]
Although not shown in the drawings, Japanese Patent Application Laid-Open No. 6-163549 discloses a semiconductor device having a protruding electrode in which a plurality of cusps are arranged on the connection end surface (upper end surface) of the protruding electrode of the semiconductor device. According to this configuration, the two substrates are fixed using the non-conducting paste, and when the apex contacts the wiring electrode, the apex is crushed so that the electrical connection between the two electrodes is established. It is done. The point serves as the conductive particles mixed in the conductive paste, and the poor connection between the protruding electrode and the wiring electrode due to the non-conductive paste can be further reduced.
[0010]
[Problems to be solved by the invention]
In this way, the protruding electrodes formed on the semiconductor device are brought into contact with the wiring electrodes formed on the opposing substrate to make an electrical connection, and an insulating resin is filled between the semiconductor device and the opposing substrate to form the two substrates. When forming the mounting structure of the fixed prior art semiconductor device, the insulating resin is heated and pressurized so that the insulating resin does not intervene between the contact surfaces of the protruding electrodes and the wiring electrodes. It must be removed from the contact surface. Here, the protruding electrodes and the wiring electrodes are only in electrical contact with each other, but are not bonded or joined. Also, in a configuration using a semiconductor device having a pointed portion on the surface of a protruding electrode described later in the related art, the connection form is the same.
[0011]
Therefore, when an external temperature change occurs in an electronic device or the like using the mounting structure, a difference in thermal expansion coefficient between the semiconductor device and the material used for the counter substrate causes, for example, the semiconductor substrate and the insulating resin or Separation (displacement or cracking of the substrate arrangement position) occurs between the opposing substrate and each member of the insulating resin because the member cannot withstand thermal stress, and electrical continuity between the protruding electrode and the wiring electrode can be maintained. May disappear. As a result, the semiconductor device cannot be driven normally.
[0012]
Further, in the mounting structure according to the prior art, when the number of pins of the protruding electrode of the semiconductor device increases and the area of each electrode decreases, or due to a thermosetting process of the insulating resin in the stage of forming the mounting structure, Similarly, when thermal stress is applied to the electrode, it can be a factor that causes electrical conduction failure.
[0013]
In order to avoid such a phenomenon, the above problem can be solved by intentionally selecting a material that increases the adhesive strength between the members used for the mounting structure, but the material of each member is limited. Therefore, it is not preferable.
[0014]
An object of the present invention is to provide a semiconductor device and a wiring electrode formed on an opposing substrate which are electrically connected to each other when electrically connecting a projecting electrode formed on the semiconductor device to a wiring electrode formed on the opposing substrate. An object of the present invention is to provide a semiconductor device, a method of manufacturing the semiconductor device, and a mounting structure of the semiconductor device, which enable strong and electrically stable connection between the protruding electrode and the wiring electrode.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, a semiconductor device according to the present invention and a mounting method thereof employ the following manufacturing method.
[0016]
The semiconductor device according to the present invention is a semiconductor device having a plurality of electrode pads for controlling a circuit element on a semiconductor substrate, wherein the plurality of electrode pads have a base connected to the electrode pad and an upper part of the base. And a connecting portion formed at a top surface of the connecting portion, the upper end surface of the connecting portion is flat, and at least the connecting portion is divided into a plurality of portions.
[0017]
Further, in the semiconductor device according to the present invention, the protruding electrode is formed such that the base portion is formed separately from the connection portion.
[0018]
Further, the semiconductor device according to the present invention is characterized in that each of the divided portions formed by dividing the connection portion into a plurality of pieces is arranged in a line on each of the electrode pads.
[0019]
Further, the semiconductor device according to the present invention is characterized in that each of the divided portions formed by dividing the connection portion into a plurality of pieces is arranged in a matrix on each of the electrode pads.
[0020]
Further, the semiconductor device according to the present invention is characterized in that the divided portions obtained by dividing the connection portion into a plurality of pieces are arranged at equal intervals.
[0021]
Further, the semiconductor device of the present invention is characterized in that the protruding electrodes and the electrode pads are connected via a common electrode film.
[0022]
Furthermore, the semiconductor device of the present invention is characterized in that a surface of the semiconductor substrate is covered with an insulating film having at least a part of the electrode pad exposed and opened.
[0023]
According to a method of manufacturing a semiconductor device of the present invention, in the method of manufacturing a semiconductor device having projecting electrodes formed on a plurality of electrode pads for controlling circuit elements on a semiconductor substrate, the method covers the respective electrode pads. A step of forming a common electrode film, a step of forming a first plating resist having at least one opening on each of the electrode pads, and forming a base of the protruding electrode in the opening by performing a plating process; After removing the first plating resist, a second plating resist having a plurality of openings is formed on the base, and a plating process is performed to form a connection portion including a plurality of divided pieces on each of the base upper stages. And a step of removing the common electrode film exposing the surface of the semiconductor substrate after forming the connection portion.
[0024]
Further, according to a method of manufacturing a semiconductor device of the present invention, there is provided a method of manufacturing a semiconductor device having projecting electrodes formed on a plurality of electrode pads for controlling circuit elements on a semiconductor substrate. Forming a common electrode film, and forming a plating resist having a plurality of openings on each of the electrode pads on the common electrode film, and performing a plating process on each of the electrode pads. Forming a connecting portion composed of a plurality of divided pieces; and removing the common electrode film exposing the semiconductor substrate surface after removing the plating resist.
[0025]
The method for manufacturing a semiconductor device according to the present invention may further include, before the step of forming the common electrode film covering the electrode pads, a step of forming an insulating film exposing at least a part of the electrode pad. It is characterized by.
[0026]
The mounting structure of the semiconductor device according to the present invention may be configured such that the semiconductor device and the wiring electrode formed on the opposing substrate are divided into a gap formed when the semiconductor substrate and the opposing substrate are connected to each other, and the connection portion is divided. Insulating resin is filled in the gaps between the divided pieces thus formed to fix the semiconductor device and the counter substrate, and the upper end surface of the connection portion is brought into contact with the wiring electrode to thereby make the electrodes electrically connected. It is characterized by making a dynamic connection.
[Action]
[0027]
The semiconductor device according to the present invention has a configuration in which a protruding electrode facing a wiring electrode formed on a counter substrate includes a base portion connected to an electrode pad and a connection portion for connecting the base portion to the wiring electrode. Further, an upper end surface of the connection portion, which is a connection portion with the wiring electrode, is flattened, and the connection portion is divided into a plurality of pieces to constitute a plurality of divided pieces. At the stage of forming the mounting structure with the wiring electrode formed on the counter substrate using this semiconductor device, the gap formed between the semiconductor device and the counter electrode as well as the gap between each of the divided pieces is filled with an insulating resin. Can be.
[0028]
This makes it possible to increase the contact area between the projection electrode and the insulating resin by an amount corresponding to the gap between the divided pieces when electrically connecting the projection electrode having the plurality of divided connection portions and the wiring electrode. Therefore, it is possible to sufficiently withstand the stress generated due to the difference in the thermal expansion coefficient between the semiconductor device and the counter substrate, and even if both substrates are deformed by an external factor, It is possible to obtain a semiconductor device and a mounting structure thereof that do not impair electrical conduction between them.
[0029]
BEST MODE FOR CARRYING OUT THE INVENTION
(First Embodiment)
Hereinafter, a semiconductor device according to a first embodiment of the present invention and a mounting structure using the semiconductor device will be described with reference to the drawings.
[0030]
FIG. 1 is a sectional view showing a mounting structure of a semiconductor device according to the first embodiment of the present invention. The semiconductor device used here has projecting electrodes 4 formed on a plurality of electrode pads 2 (only one is shown in the figure) for controlling circuit elements (not shown) on a semiconductor substrate 1. The protruding electrode 4 has a configuration including a base portion 20 connected to the electrode pad 2 and a connection portion 22 including a plurality of divided pieces 10 formed on an upper stage of the base portion 20. Further, the shape of the upper end face of the connecting portion 22 is flattened, and the connecting portion 22 is configured by a plurality of divided pieces. In this configuration, the wiring electrodes 9 formed on the opposing substrate 8 are electrically connected to the respective divided pieces 10 in the plurality of connection portions 22. Further, not only the two substrates but also the respective divided pieces are used. It is formed so that the insulating resin 7 is filled in the gap 12 of 10 so that both substrates can be fixed.
[0031]
As a result, the insulating resin 7 filled in the gaps 12 of the projecting electrodes 4 reinforces the electrical connection between each of the divided pieces 10 and the wiring electrodes 9, and the coefficient of thermal expansion between the semiconductor substrate 1 and the counter substrate 8 is reduced. It can sufficiently withstand the stress generated by the difference. In other words, the surface area where the protruding electrode 4 and the insulating resin 7 are in contact with each other is increased by the gap 12, so that the adhesive force between the members can be strengthened. As a result, peeling (positional displacement or crack between the two substrates) occurring between the insulating resin 7 and the semiconductor device, or between the insulating resin 7 and the opposing substrate 8, which frequently occurs in the conventional configuration, is suppressed as much as possible. It becomes possible.
[0032]
Next, a method of manufacturing the semiconductor device according to the first embodiment and a method of mounting the semiconductor device and the counter substrate will be described with reference to the drawings. 2 to 7 are views for explaining a method for manufacturing a semiconductor device according to the present invention, and FIG. 1 is a drawing for explaining a method for mounting the semiconductor device according to the present invention.
[0033]
First, as in the prior art, an electrode pad 2 for controlling a circuit element (not shown) on a semiconductor substrate 1 and at least a partial surface of the electrode pad 2 are exposed on a semiconductor substrate 1 according to a conventional method as shown in FIG. A structure having an insulating film 3 covering the surface of the semiconductor substrate 1 including the circuit element is created.
[0034]
Next, as shown in FIG. 17, a common electrode film 6 is formed on the surface of the structure, that is, on the surfaces of the insulating film 3 and the electrode pads 2 by a sputtering method or a vacuum evaporation method. The common electrode film 6 was formed by a sputtering method so that the thickness of each of the two metal layers of titanium and tungsten was 0.1 μm.
[0035]
Subsequently, as shown in FIG. 2, an opening is formed on the electrode pad 2 by applying a plating resist 5 made of a photosensitive resin on the common electrode film 6 and performing exposure and development processing. In the first embodiment, the thickness of the plating resist 5 is set to 2 μm, and the opening area and the shape are formed to be the same as those of the electrode pad 2. At this time, the opening area and the shape of the plating resist 5 are not particularly limited, and there is no particular problem even when the plating resist 5 is larger or smaller than the electrode pad 2.
[0036]
Further, as shown in FIG. 3, the above-mentioned structure is immersed in an electrolytic plating solution using the common electrode film 6 as a cathode, and electroplating is performed so that gold, copper or the like is formed on the common electrode film 6 at the opening of the plating resist 5. , Nickel or the like can be grown, and the base 20 of the protruding electrode is formed on the electrode pad 2. In the present embodiment, the base 20 having a height of 2 μm is formed by performing gold plating.
[0037]
After the base 20 is formed, the plating resist 5 made of a photosensitive resin that is no longer needed is removed as shown in FIG. 4, and the photosensitive film is exposed on the common electrode film 6 and the base 20 again as shown in FIG. 5. A plurality of openings are formed in the upper portion of each of the base portions 20 by applying a plating resist 5 made of a conductive resin and performing exposure and development processing. The shape and arrangement of the openings will be described later in detail.
[0038]
Subsequently, the structure shown in FIG. 5 is immersed in an electrolytic plating solution using the common electrode film 6 as a cathode, and electrolytic plating is performed, so that gold, copper, nickel Grow a metal selected from the above. Then, as shown in FIG. 6, a plurality of divided pieces 10 can be formed on the connecting portion 22, that is, on the upper stage of the base 20. As described above, in the present embodiment, the connection portion 22 including the plurality of divided pieces 10 having a height of 5 μm is formed by further performing gold plating on the base portion 20 formed by gold plating. The material of each of the base portion 20 and the connection portion 22 may be formed of a plurality of types of metals such as nickel and gold, copper and gold, and there is no particular problem. This can be arbitrarily selected according to the purpose specification application.
[0039]
Subsequently, as shown in FIG. 7, after forming the connection portion 22, the unnecessary plating resist 5 made of a photosensitive resin is removed, and then the common electrode film 6 exposed on the surface is removed by etching. Thereby, it is possible to form the protruding electrode 4 having the flattened upper end face shape of the connection portion 22 and the divided piece 10 obtained by dividing the connection portion 22 into a plurality on the base portion 20. Complete.
[0040]
The reason why the upper end surface of the connection portion 22 is made flat is that when the mounting structure is formed by the protruding electrodes in the semiconductor device described below and the wiring electrodes formed on the opposing substrate, This is because a flat surface is a preferable mode for obtaining a good electrical connection between the connection portion 22 and the wiring electrode. With this configuration, the contact area between the two electrodes can be made larger than when the shape of the divided piece 10 shown in the related art is a point. Further, the form of the semiconductor device of the present invention is smaller than the area of the upper end face of the bump electrode 100 of the semiconductor device in the prior art (FIG. 22) by the gap 12, but this gap 12 is a gap between the two substrates. In addition to reinforcement, the insulating resin 7 that has not been completely removed between the two electrodes can be easily removed.
As described above, a good connection can be obtained between the two electrodes by the above configuration of the present invention. However, if the gap is too large, it may be difficult to remove the insulating resin from between the two electrodes. In this case, if the edge of the upper end surface of the connection portion 22 is rounded, that is, if each protruding electrode is formed to have a gently convex shape, the insulating resin can be easily removed from between the two electrodes. . The form of the connection part is arbitrary.
[0041]
Thereafter, an opposing substrate 8 on which wiring electrodes 9 are formed is prepared according to a conventional method, and a substrate on which a sheet made of, for example, a thermosetting insulating resin 7 is disposed, and a semiconductor substrate shown in FIG. The connecting portion 22 of the protruding electrode 4 is connected to the wiring electrode 9 while the opposing substrate 8 is heated while the positioning is performed with the protruding electrode 4 having the plurality of connection electrodes 22 divided on one. Here, the two substrates can be fixed via the insulating resin 7, and the electrode pads 2 on the semiconductor substrate 1 and the wiring electrodes 9 on the counter substrate 8 as shown in FIG. A semiconductor device mounting structure that is electrically connected and has the insulating resin 7 filled in the gap between the semiconductor device and the counter substrate 8 and the gap 12 between the protruding electrodes is obtained.
[0042]
As described above, the manufacturing method of the mounting structure in which the sheet made of the insulating resin 7 is arranged on the counter substrate 8 side has been described. The connection with the substrate 8 may be performed.
[0043]
The mounting structure of the semiconductor device formed in this manner is different from the mounting structure shown in the prior art in that each member formed on the semiconductor substrate 1 and the counter substrate 8 and the insulating resin 7 for fixing the two substrates. As described above, since the contact area, particularly the surface area of the bump electrode 4 of the semiconductor device can be set large, the two substrates can be more firmly fixed.
[0044]
Here, the shape and arrangement of the divided pieces 10 divided into a plurality will be described. The shape and arrangement position of the connection portion 22 are controlled by the pattern shape and arrangement of the openings formed in the plating resist 5. With this opening arrangement, the shape and area of the divided piece 10 divided into a plurality can be arbitrarily set.
The plurality of openings 24 formed by the plating resist 5 may be arranged, for example, in a matrix as shown in FIG. 8 or in a line as shown in FIG. As for the shape of each of the openings 24, for example, each of the openings 24 having an arbitrary shape as shown in FIG. 10 can be arbitrarily arranged. The number, the area, and the shape of the openings are not particularly limited, and the design can be arbitrarily changed according to the intended use of the semiconductor device.
[0045]
For example, when a sufficient electrical connection can be expected between the connection portion 22 of the protruding electrode 4 and the wiring electrode 9, the gap 12 between the divided pieces 10 and the insulating resin 7 filled in the gap 12 are formed. In order to increase the contact area, the area of the opening 24 may be set large. If it is necessary to design the connection portion 22 at a narrow pitch and a small end area of the connection portion 22, the size of the opening portion 24 should be reduced as much as possible to form the gap 12 deep in the direction of the electrode pad 2. Just fine. By arbitrarily designing the shape of the plating resist 5 in this manner, the shape and height of the divided piece 10 can be made desired according to the specifications and applications of the semiconductor device. The openings 24 may be arranged at regular intervals so that the same force is applied to each of the plurality of divided pieces 10 formed in each opening 24 when external heat history occurs. preferable.
[0046]
Further, here, an example is described in which the semiconductor substrate 1 and the counter substrate 8 are fixed to each other by the insulating resin 7 which is a non-conducting paste. The projecting electrode 4 on the semiconductor substrate 1 and the wiring electrode 9 on the counter substrate 8 may be connected by using a conductive film.
[0047]
(Second embodiment)
As described above, in the first embodiment, the semiconductor device structure including the protruding electrode 4 including the base portion 20 and the connection portion 22 divided into a plurality of portions has been described. However, the semiconductor device according to the second embodiment includes the connection portion. In addition to the connection portion 22, the base portion 20 is also divided into a plurality of portions similarly to the connection portion 22. In other words, this semiconductor device has a configuration in which the connecting portion 22 having the plurality of divided pieces 10 is directly disposed on each electrode pad 2, and has a configuration in which the base 10 in the first embodiment is omitted. Here, a semiconductor device, a mounting structure of the semiconductor device, a semiconductor device, and a manufacturing method thereof will be described.
[0048]
First, a mounting structure of a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings.
FIG. 11 is a structural sectional view showing a mounting structure of a semiconductor device according to the second embodiment of the present invention. As shown above, the semiconductor device in this figure is divided directly into a plurality of electrode pads 2 (only one is shown in the drawing) for controlling circuit elements (not shown) on the semiconductor substrate 1. The difference from the first embodiment is that the connecting portions 22 are arranged, but the insulating resin 7 is filled in the gap between the semiconductor substrate 1 and the counter substrate 8 and the gap 12 between the plurality of connecting portions 22. The common point is that the mounting structure is formed.
The structural cross-sectional view of the semiconductor device in FIG. 11 shows a configuration example in which the connection part 22 is divided into four parts and the four parts have a columnar shape arranged in a line. It should be understood that the shape, the number, and the arrangement of these can be arbitrarily changed according to the specification application of the mounting structure as described in the first embodiment.
[0049]
As a result, similarly to the first embodiment, the insulating resin 7 filled in the gap 12 formed by the connection portion 22 formed by the plurality of divided pieces 10 constituting the bump electrode 4 is connected to the wiring. It can reinforce the electrical connection with the electrode 9 and sufficiently withstand the thermal stress generated due to the difference in the thermal expansion coefficient between the semiconductor substrate 1 and the counter substrate 8. It is possible to prevent peeling occurring between the conductive resin 7 and the counter substrate 8 as much as possible.
[0050]
Next, a method for manufacturing a semiconductor device according to the second embodiment and a method for mounting a semiconductor device using the semiconductor device will be described with reference to the drawings. 12 to 15 are views for explaining a method for manufacturing a semiconductor device according to the present invention, and FIG. 11 is a drawing for explaining a method for mounting the semiconductor device according to the present invention.
[0051]
First, a method for manufacturing a semiconductor device according to the second embodiment will be described.
As in the prior art and the first embodiment, a circuit element (not shown) and an electrode pad 2 are formed on a semiconductor substrate 1 as shown in FIG. 16, and the semiconductor substrate 1 including the circuit element is covered. An insulating film 3 having an opening on the upper surface of the electrode pad 2 is disposed.
[0052]
Next, as shown in FIG. 17, a common electrode film 6 made of a metal such as copper, chromium, titanium, or tungsten is formed on the surface of the insulating film 3 and the electrode pads 2 on the semiconductor substrate 1 by a sputtering method or a vacuum evaporation method. To form In this embodiment, the two-layered common electrode film 6 of titanium and tungsten is formed by a sputtering method so that each has a thickness of 0.1 μm.
[0053]
Further, as shown in FIG. 12, a plurality of openings are formed on the electrode pads 2 by applying a plating resist 5 made of a photosensitive resin on the common electrode film 6 and performing exposure and development processing. In the present embodiment, the thickness of the plating resist 5 is 5 μm, and the opening area of one opening is 5 μm square.
[0054]
Subsequently, as shown in FIG. 13, the structure shown in FIG. 12 is immersed in an electrolytic plating solution using the common electrode film 6 as a cathode, and electrolytic plating is performed to form the common electrode film 6 in the opening of the plating resist 5. A metal selected from gold, copper, nickel and the like is grown thereon. Then, the connecting portion 22 including the plurality of divided pieces 10 can be formed. In this embodiment, the connection part 22 having a height of 5 μm is formed by performing gold plating. Regarding the material of the connection portion 22, there is no particular problem even when the metal material to be grown during plating is replaced by a combination of nickel and gold, a combination of copper and gold, and a plurality of types of metal. Of course, it may be formed of a single metal as in this embodiment.
[0055]
Subsequently, as shown in FIG. 15, after the connection portion 22 is formed, the plating resist 5 made of an unnecessary photosensitive resin is removed, and the common electrode film 6 exposed on the surface is removed by etching. Thereby, the semiconductor device of the second embodiment is completed.
At this time, the connection portion 22 and the common electrode film 6 are made of a metal that is not etched by the same etching solution, so that the connection portion 22 serves as an etching mask, and the connection portion 22 is exposed without being formed. By removing only the common electrode film 6 by etching, a semiconductor device in which the common electrode film 6 is left only between the electrode pad 2 and the connection portion 22 can be formed.
[0056]
In the second embodiment, since the connection portion 22 is formed of gold, and the common electrode film 6 is made of titanium or tungsten which can be etched with a hydrogen peroxide solution in which gold is not dissolved, the connection portion 22 is divided into a plurality of portions. The connection portion 22 is not etched, and only the exposed common electrode film 6 can be removed by etching. Also, the electrode pad 2 is not etched, and the same electrode pad 2 and each of the divided pieces 10 are electrically connected to each other.
[0057]
Thereafter, an opposing substrate 8 on which wiring electrodes 9 are formed is prepared according to a conventional method, and a substrate on which a sheet of, for example, a thermosetting insulating resin 7 is arranged is placed on the opposing substrate 8 and a plurality of divided substrates shown in FIG. The alignment with the semiconductor substrate 1 having the connection portion 22 (the protruding electrode 4) having the piece 10 is performed, and the wiring electrode 9 and the connection portion 22 are mounted while heating the counter substrate 8 side. Here, the two substrates can be fixed via the insulating resin 7, and further, the electrode pads 2 on the semiconductor substrate 1 and the wiring electrodes 9 on the counter substrate 8 as shown in FIG. The mounting structure of the semiconductor device having the insulating resin 7 filled electrically between the semiconductor device and the counter substrate 8 and in the gap 12 of the connection portion 22 is obtained by electrically connecting via the connection portion 22.
[0058]
The mounting structure of the semiconductor device formed in this manner is different from the mounting structure disclosed in the prior art in that each member formed on the semiconductor substrate 1 and the counter substrate 8 and the insulating resin 7 for fixing the two substrates together. Since the contact area can be set larger than in the first embodiment, the two substrates can be connected more firmly.
[0059]
Also, similarly to the first embodiment, even if an anisotropic conductive film is used in place of the insulating resin 7 which is a non-conducting paste, the two substrates can be firmly fixed, and the electrical connection between the connected electrodes can be improved. Connection can be made.
[0060]
In addition, the arrangement structure of each of the divided pieces 10 of the connection portion 22 can be arranged in, for example, a matrix shape or a line shape.
[0061]
In the first embodiment, the example in which the protruding electrode 4 is formed by the two-stage plating process (the base 20 and the connecting portion 22) has been described. There is an advantage that the protruding electrode 4 having the connection part 22 divided into pieces can be formed. In other words, according to the second embodiment, a mounting structure is formed that has the same number of steps as the number of steps in the related art, and also enables extremely strong inter-substrate connection even when external heat history occurs as described above. You can.
[0062]
【The invention's effect】
As is apparent from the above description, the mounting structure of the semiconductor device of the present invention includes a projection electrode 4 formed on each of a plurality of electrode pads 2 for controlling a circuit element on a semiconductor substrate 1 and glass or glass. In a mounting structure of a semiconductor device in which a wiring electrode 9 formed on a counter substrate 8 made of resin is brought into contact with and electrically connected to the wiring electrode 9, a base 20 in which the protruding electrode is formed on the electrode pad 2, The gap between the semiconductor substrate and the counter substrate 8 and the gap between the semiconductor substrate and the opposing substrate 8 are formed by forming the connection section 22 formed in the upper layer and flattening the connection end face of the connection section 22 and dividing it into a plurality of sections. The insulating resin 7 is also filled in the gap between the connection parts 22 divided into individual parts, so that the semiconductor device and the counter substrate 8 can be firmly fixed.
[0063]
With this structure, not only the insulating resin 7 in the gap between the semiconductor device and the opposing substrate 8 but also the insulating resin 7 filled in the gap between the plurality of connection portions 22 divide the projecting electrodes 4. To maintain electrical continuity between the semiconductor device and the opposing substrate 8, thereby minimizing separation between the insulating resin 7 and the semiconductor device or the opposing substrate 8 caused by stress generated due to a difference in thermal expansion coefficient between the semiconductor device and the opposing substrate 8. Can be.
[0064]
In the second embodiment, the connection portion 22 having the plurality of divided pieces 10 is arranged directly on the electrode pad 2 on each of the electrode pads. The protruding electrode 4 can be manufactured in a single-stage plating process. That is, according to the second embodiment, it is remarkable that the semiconductor device having the above-described effect and the mounting structure using the semiconductor device can be formed in the same number of steps as the conventional method of manufacturing the semiconductor device. it can.
[0065]
Further, in the mounting structure using the semiconductor device of the present invention, when the number of pins of the protruding electrode of the semiconductor device increases and the area of each electrode decreases, or when the insulating resin is cured by heat at the stage of forming the mounting structure. Similarly, when thermal stress is applied to each electrode by a process or the like, the probability of occurrence of electrical conduction failure can be extremely reduced.
[0066]
Further, if a mounting structure using the semiconductor device of the present invention is applied, the range of selection of members used for the mounting structure is widened.
[Brief description of the drawings]
FIG. 1 is a structural cross-sectional view for explaining a mounting structure of a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a process sectional view for illustrating the method for manufacturing a semiconductor device according to the present invention.
FIG. 3 is a process sectional view for illustrating the method for manufacturing a semiconductor device according to the present invention.
FIG. 4 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention.
FIG. 5 is a process cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention.
FIG. 6 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention.
FIG. 7 is a process cross-sectional view for describing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.
FIG. 8 is a schematic plan view for explaining an arrangement form of a projection in which a plurality of divided connection parts are arranged in a matrix in the first and second embodiments of the present invention.
FIG. 9 is a schematic plan view for explaining an arrangement form of a convex portion in which a plurality of divided connection portions are arranged in a line in the first and second embodiments of the present invention.
FIG. 10 is a schematic plan view for explaining a convex shape of a plurality of divided connection portions in the first and second embodiments of the present invention.
FIG. 11 is a structural cross-sectional view illustrating a mounting structure of a semiconductor device according to a second embodiment of the present invention.
FIG. 12 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment of the present invention.
FIG. 13 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment of the present invention.
FIG. 14 is a process cross-sectional view for explaining the method for manufacturing the semiconductor device according to the second embodiment of the present invention.
FIG. 15 is a process sectional view for describing the semiconductor device and the method for manufacturing the same according to the second embodiment of the present invention.
FIG. 16 is a process cross-sectional view for describing a conventional method for manufacturing a semiconductor device.
FIG. 17 is a process sectional view for illustrating the conventional method of manufacturing a semiconductor device.
FIG. 18 is a process cross-sectional view for explaining a conventional method of manufacturing a semiconductor device.
FIG. 19 is a process sectional view for illustrating the conventional method of manufacturing a semiconductor device.
FIG. 20 is a process cross-sectional view for describing the conventional method of manufacturing a semiconductor device.
FIG. 21 is a process cross-sectional view for describing the conventional method of manufacturing a semiconductor device.
FIG. 22 is a structural cross-sectional view for explaining a mounting structure and a mounting method of a conventional semiconductor device.
[Explanation of symbols]
1 semiconductor substrate
2 electrode pad
3 insulating film
4 protruding electrodes
5 Plating resist
6 Common electrode film
7 Insulating resin
8 Counter substrate
9 Wiring electrode
10 convex part
12 gap
20 base
22 Connection
24 opening

Claims

In a semiconductor device having a projecting electrode on a plurality of electrode pads for controlling circuit elements on a semiconductor substrate,
The protruding electrode has a base connected to the electrode pad and a connection formed on an upper stage of the base, and an upper end surface of the connection is flat, and at least the connection is divided into a plurality of parts. A semiconductor device, comprising:

2. The semiconductor device according to claim 1, wherein the base portion is formed separately from the connection portion along with the connection portion. 3.

3. The semiconductor device according to claim 1, wherein each of the plurality of divided pieces formed by dividing the connection portion into a plurality of pieces is arranged in a line on each of the electrode pads. 4.

3. The semiconductor device according to claim 1, wherein divided pieces obtained by dividing the connection portion into a plurality of pieces are arranged on the respective electrode pads in a matrix.

5. The semiconductor device according to claim 1, wherein divided pieces obtained by dividing the connection portion into a plurality of pieces are arranged at equal intervals. 6.

The semiconductor device according to claim 1, wherein the bump electrode and the electrode pad are connected via a common electrode film.

The semiconductor device according to claim 1, wherein a surface of the semiconductor substrate is covered with an insulating film having at least a part of the electrode pad exposed and opened.

In a method of manufacturing a semiconductor device having a protruding electrode formed on each of a plurality of electrode pads for controlling a circuit element on a semiconductor substrate,
Forming a common electrode film covering each of the electrode pads, forming a first plating resist having at least one opening on each of the electrode pads, and performing a plating process on the opening portions. Forming a base of the protruding electrode, removing the first plating resist, forming a second plating resist having a plurality of openings on each of the bases, and performing a plating process to form each base. A step of forming a connecting portion composed of a plurality of divided pieces in an upper stage, and a step of removing the common electrode film exposed on a surface of the semiconductor substrate after removing the second plating resist. Device manufacturing method.

In a method of manufacturing a semiconductor device having a protruding electrode formed on each of a plurality of electrode pads for controlling a circuit element on a semiconductor substrate,
Forming a common electrode film covering each of the electrode pads, forming a plating resist having a plurality of openings in each of the electrode pads on the common electrode film, and performing a plating process on each of the respective electrode pads. A semiconductor device comprising: a step of forming a connection portion composed of a plurality of divided pieces on an electrode pad; and a step of removing the common electrode film exposed on a surface of the semiconductor substrate after removing the plating resist. Manufacturing method.

10. The method according to claim 8, further comprising, before the step of forming the common electrode film covering the electrode pad, forming an insulating film exposing at least a part of the electrode pad. A method for manufacturing a semiconductor device.

8. A gap formed when the semiconductor device according to claim 1 and a wiring electrode formed on a counter substrate are connected to each other by opposing the semiconductor substrate and the counter substrate, and the connection. Insulating resin is filled in the gaps between the divided pieces formed by dividing the portion to fix the semiconductor device and the counter substrate, and the upper end surface of the connection portion and the wiring electrode are brought into contact with each other. A mounting structure of a semiconductor device, which electrically connects electrodes.