JP2004048037A - Electronic component mounted assembly - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component allowing a capacitor or the like to be arranged in the vicinity of a semiconductor chip while reducing the increase of the mounting area. <P>SOLUTION: Electrode layers 1 and 2 are arranged facing to each other at both sides of a dielectric layer 3 in such a manner as to constitute a capacitor. Lead out electrodes 4 and 5 are formed on the electrode layers 1 and 2. Moreover, through electrodes 6 that are insulated from the electrode layers 1 and 2 are formed and arranged at the lattice points. An electronic component 10 is mounted on a wiring board, and a semiconductor chip is mounted on it. The semiconductor chip is connected with the wiring board through the through electrodes 6, and the semiconductor chip or the wiring board are connected to the lead-out electrodes 4 and 5. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to an electronic component.

要求 The demand for faster information processing speeds never stops, and the frequency of semiconductor chips is increasing year by year. In order to increase the speed of semiconductor operation, it is necessary not only to increase the density and performance of an integrated chip but also to improve the characteristics of peripheral circuits. Above all, ensuring the stability of transmission lines and power supply lines is one of the essential requirements for high-speed stable operation, and it is no exaggeration to say that peripheral components are involved in the life of the semiconductor chip itself.

コ ン デ ン サ Capacitors are one of the important devices for ensuring the stability of transmission lines and power supply lines. Capacitors that realize high-speed operation are required to have high-frequency performance of the capacitor itself and low impedance wiring up to the capacitor.

さ せ る In order to operate a semiconductor chip at a high frequency, it is necessary to arrange a capacitor or the like near the semiconductor chip to reduce wiring loss. In the prior art, there are only limited techniques such as forming a minute capacitor or the like inside a semiconductor, and the effect is becoming insufficient to stably perform further high-frequency operation. Further, when a capacitor or the like is arranged around the semiconductor chip, there is a problem that the mounting board area becomes large.

The present invention has been made to solve these problems, and an object of the present invention is to provide an electronic component in which a capacitor and the like can be arranged near a semiconductor chip while minimizing an increase in a mounting area.

The present invention has the following configuration to achieve the above object.

That is, an electronic component according to the present invention is an electronic component having an electrode layer opposed to a dielectric material, and an extraction electrode or an external electrode connected to the electrode layer. And penetrating the electronic component without being connected to the electronic component. Since the electronic component of the present invention has through-electrodes arranged in a lattice point, for example, the electronic component of the present invention is mounted on a wiring board, and another electronic component (for example, a semiconductor chip) is further placed thereon. Thus, other electronic components can be connected to the wiring board via the through electrodes. Further, since the electronic component of the present invention includes the dielectric and the electrode layer sandwiching the dielectric, a capacitor can be formed in the electronic component, for example. As a result, the capacitor can be arranged in the vicinity of the semiconductor chip while the increase in the mounting area is reduced, and both the high-frequency driving of the semiconductor chip and the suppression of the increase in the mounting area can be achieved.

It is preferable that the through electrode penetrates in a direction substantially parallel to the direction in which the electrode layer and the dielectric are laminated. An electronic component having such a configuration is easy to manufacture.

In the electronic component of the present invention, the electrode layer includes a first electrode layer and a second electrode layer disposed between the through electrodes, and the first electrode layer and the second electrode The layers may be arranged so as to intersect in a grid pattern with the dielectric interposed therebetween. Alternatively, the electrode layer may be configured to include a first electrode layer and a second electrode layer disposed so as to have a facing portion of a predetermined size with the dielectric interposed therebetween. According to such a configuration, a capacitor having a desired capacity can be easily formed in the electronic component.

In the above electronic component of the present invention, the extraction electrode can be formed on the same plane as the through electrode. That is, the extraction electrode and the through electrode can be formed so as to be exposed on the same surface of the electronic component. According to such a configuration, connection with a wiring board or the like for supplying a voltage to the electrode layer in the electronic component can be similarly performed in the same plane as the through electrode (for example, the lower surface or the upper surface of the electronic component). it can. As a result, the mounting area can be further reduced. Further, it is also possible to easily take out another electronic component installed on the electronic component of the present invention and connect it to the electrode.

In addition, in the electronic component of the present invention, the external electrode may be formed on a different surface from the through electrode. For example, the through electrodes are formed so as to be exposed on the upper and lower outer surfaces of the electronic component, and the external electrodes are formed on the peripheral surface of the electronic component. According to such a configuration, when the electronic component of the present invention is mounted on a wiring board or the like, the external electrodes can be easily soldered to the wiring board or the like.

In the electronic component of the present invention, it is preferable that a plurality of capacitance forming regions are formed between the first electrode layer and the second electrode layer. Thereby, a capacitor can be formed in the electronic component.

At this time, it is preferable that the extraction electrode or the external electrode connected to the first electrode layer and the second electrode layer forming the respective capacitance forming regions are insulated from each other. With this configuration, a plurality of independent capacitors can be formed in the electronic component.

Furthermore, when capacitance forming regions having different capacitances are formed, a plurality of capacitors having different capacitances can be formed in the electronic component.

As described above, according to the electronic component of the present invention, since a capacitance can be formed in the vicinity of the semiconductor chip, the semiconductor chip can be driven at a high frequency, and at the same time, an increase in the mounting area can be suppressed.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a schematic plan view illustrating an example of an electronic component 10 according to Embodiment 1 of the present invention. FIG. 2 is a perspective view showing an internal structure of a part of the electronic component shown in FIG.

A first electrode layer 1 formed in a plurality of stripes (stripes) on substantially the same plane, and a second electrode layer 2 formed in a plurality of stripes (stripes) on the substantially same plane. Are laminated with the dielectric layer 3 interposed therebetween. By intersecting the stripe directions of the electrode layers 1 and 2, a capacitance forming region 9 is formed at each intersection, and functions as a capacitor.

A first extraction electrode 4 is connected to the first electrode layer 1, and a second extraction electrode 5 is connected to the second electrode layer 2. These can be used as connection terminals when exerting the capacitor function. The extraction electrodes 4 and 5 may be formed so as to penetrate in the stacking direction of the electronic component 10 as shown in FIGS. 1 and 2 or formed so as to appear only on one surface of the electronic component. Or a combination thereof.

In addition to the extraction electrodes 4 and 5, a through electrode 6 is formed on the electronic component 10. Through the penetrating electrode 6, electrical connection between electronic components different from the electronic component of the present invention disposed above and below the electronic component 10 of the present invention is secured as if the electronic component of the present invention does not exist. Is done.

金属 As a material for forming the electrode layers 1 and 2, a metal or a metal compound such as aluminum, copper, or gold can be used. Examples of the material for forming the dielectric layer 3 include resin materials such as acrylic resin, epoxy resin, and vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, and titanium oxide. And metal oxides such as aluminum oxide and silicon oxide, and metalloid oxides. Further, as the extraction electrodes 4 and 5 and the penetrating electrode 6, a conductive paste or a conductive polymer can be used in addition to a metal such as gold, silver, aluminum, copper, or a solder material.

The formation of the electrode layers 1 and 2 can be performed by a vacuum evaporation method, a sputtering method, a plating method, or the like. As a means for forming the electrode layers 1 and 2 in a stripe shape, a method using a patterned solid mask, a method using an evaporable mask such as oil, a method of performing laser etching, and the like can be used as appropriate. As the oil masking material, various oils such as hydrocarbon oils, mineral oils, and fluorine oils can be used.

The dielectric layer 3 may be formed by vaporizing by heating with a heater, or atomizing by ultrasonic wave or spray, and depositing a resin material if it is a resin material. A method can be used.

In order to form a hole-shaped opening in the dielectric layer 3 for forming the extraction electrodes 4, 5 and the through electrode 6, a method of removing a dielectric at a predetermined location by laser etching after forming the dielectric layer, A method of forming a dielectric layer after providing an evaporative mask of oil or the like can be used. In order to apply a dot-shaped evaporative mask, it is particularly effective to apply an ink-jet method in which fine droplets of a masking material are ejected from fine holes.

付 与 When an oil mask is provided, examples of usable oils include hydrocarbon oils, mineral oils, and fluorine oils.

When an evaporative mask is used, if an excessive masking material remains after the formation of each layer, it can be removed by using a far-infrared heater, electron beam, ultraviolet lamp irradiation, plasma irradiation, or the like, if necessary.

FIG. 3 is a schematic perspective view of an apparatus for explaining a part of an example of a manufacturing process for manufacturing the electronic component shown in FIG. 1 and FIG.

The support is carried in from the support carrying-in chamber 11 provided on the right side of the apparatus, and is taken out from the support taking-out port 22 provided on the left side through a predetermined process. The space between the gate valve 12a and the gate valve 12b is composed of a plurality of chambers divided for each process, and these are formed in a vacuum chamber maintained at a predetermined degree of vacuum. The support is sequentially moved in each room by a transfer system 21 provided substantially at the center of the apparatus, and is subjected to predetermined processing. As the support, for example, a sheet-shaped or plate-shaped substrate made of resin, ceramics, metal, or the like can be used, on which a dielectric thin film and a metal thin film are laminated.

支持 The support carried into the support carry-in chamber 11 is carried into the vacuum chamber with the gate valve 12a opened. First, a lower insulator film is formed on the surface of the support by the lower insulator film forming source 13. At this time, an opening (hole) may be formed by applying a patterning mask to a position where the through electrode and the extraction electrode are to be formed, or by irradiating a laser beam. Subsequently, a first patterned metal thin film (first electrode layer) is formed by a combination of the metal thin film deposition source 14 and a patterning mask. Next, a first dielectric thin film (dielectric layer) is formed by the dielectric thin film forming source 15. After the formation of the first dielectric thin film, the laser processing machine 16 removes the dielectric thin film at the position where the extraction electrode and the through electrode are to be formed. Subsequently, a second patterned metal thin film (second electrode layer) is formed by the combination of the metal thin film deposition source 17 and the patterning mask. Next, a second dielectric thin film (dielectric layer) is formed by the dielectric thin film forming source 18. Even after the formation of the second dielectric thin film, the laser processing machine 19 removes the dielectric thin film at the position where the extraction electrode and the through electrode are to be formed. Thereafter, the metal thin film forming source 14, the dielectric thin film forming source 15, the laser processing machine 16, the metal thin film forming source 17, the dielectric thin film forming source 18, and the laser processing machine 19 are sequentially sent again. Only these operations are repeated. After the film is formed a predetermined number of times, an upper insulator film is formed by the upper insulator film forming source 20. At this time, an opening (hole) may be formed by applying a patterning mask to a position where the through electrode and the extraction electrode are to be formed, or by irradiating a laser beam. Thereafter, the gate valve 12b is opened, and is taken out from the support take-out port 22.

The through electrode is formed by applying a conductive paste into a through hole formed at the position of the through electrode and then hardening the paste.

Similarly, a conductive paste is applied to the opening to connect to the metal thin film exposed at the opening formed at the position of the extraction electrode of the upper insulator film and / or the lower insulator film, and the extraction electrode is formed on the surface of the laminate. It may be made to be the same plane as or a slight protrusion.

Thereafter, the laminate is cut into a predetermined size as needed at an appropriate process step.

The formed electronic component 10 of the present invention is used, for example, as schematically shown in FIG. 4, disposed between a carrier 28 on which a semiconductor chip 27 is mounted and a wiring board 30. The signal terminals 29a on the lower surface of the carrier 28 are connected to the wiring patterns 31 formed on the wiring board 30 via the through electrodes 6 of the electronic component 10 of the present invention as necessary. The power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring board 30 via the through electrode 6, and further connected to the first extraction electrode 4. Further, another power terminal 29 b on the lower surface of the carrier 28 is connected to the wiring board 30 via the through electrode 6, and further connected to the second extraction electrode 5. The connection between the through electrode 6 and the extraction electrodes 4 and 5 may be made by a method using the wiring pattern 31 on the surface of the wiring board 30 as shown in FIG. 4 or by another method such as connection inside the wiring board 30. May be.

The first electrode layer 1 connected to the first extraction electrode 4 and the second electrode layer 2 connected to the second extraction electrode 5 are insulated with a dielectric layer interposed therebetween. If the power supply terminal connected to the first extraction electrode 4 is a Vcc terminal, and the power supply terminal connected to the second extraction electrode 5 is a GND terminal, between the first extraction electrode 4 and the second extraction electrode 5 Since the formed capacitor functions as a power supply pass capacitor at a position close to the semiconductor chip without increasing the mounting area, it is preferable in terms of high-frequency driving and reduction of the mounting area.

[Example 1]
Using aluminum as a metal thin film material, aluminum oxide as a dielectric material, silver paste as a conductive paste, and fluorine oil as an oil masking material applied by an ink jet method, grid points of 0.8 mm pitch in a 17 mm square area 484 through electrodes having a diameter of 0.25 mm were formed, and 462 extraction electrodes 4 and 5 of the electrode layer 1 and the electrode layer 2 were formed at grid points of 0.8 mm pitch between the through electrodes, each having a diameter of 0.25 mm. . Each of the electrode layers 1 and 2 is a multi-stripe having a width of 0.65 mm, and is repeatedly laminated so that the thickness of the electrode layer is 30 nm, the thickness of the dielectric layer is 0.5 μm, and the number of the dielectric layers is 80. went. Insulating layers of 4 μm each were formed above and below the laminate for the purpose of improving the strength of the laminate. For simplicity, the upper and lower insulator layers were made of the same material as the dielectric layer. Holes were formed in the lower insulator layer by masking in order to form through electrodes and extraction electrodes. A hole was formed by masking on the upper insulator layer to form a through electrode. A conductive paste was applied to solidify the recesses (openings) generated at the positions of the penetrating electrodes and the positions of the extraction electrodes where the holes were formed.

As a result, it was confirmed by the LCR meter that a capacitor having a total capacitance of 1 μF and tan δ 1.2% was formed inside the laminate having a thickness of about 50 μm. Similar results were obtained when a thin wire of a solder material was used instead of the conductive paste.

(Embodiment 2)
FIG. 5 is a schematic plan view showing another example of the electronic component 10 according to Embodiment 2 of the present invention. FIG. 6 is a perspective view showing the internal structure of a part of the electronic component shown in FIG.

A first electrode layer 1 formed in a plurality of stripes on a substantially same plane and a second electrode layer 2 formed in a plurality of stripes on a substantially same plane form a dielectric layer 3. They are sandwiched and stacked. By intersecting the stripe directions of the electrode layers 1 and 2, a capacitance forming region 9 is formed at each intersection, and functions as a capacitor.

外部 External electrodes 7 and 8 are formed on the outer peripheral surface of the electronic component 10. The first external electrode 7 is electrically connected to the first electrode layer 1, and the second external electrode 8 is electrically connected to the second electrode layer 2. These are connected when the capacitor function is exhibited. It can be used as a terminal. The external electrodes 7 and 8 may be formed on both opposing side surfaces of the electronic component as shown in FIG. 5, may be formed only on one side of the opposing side surfaces, or may be a combination thereof. good. Further, the external electrodes 7 and 8 may be formed so as to reach both surfaces (upper and lower surfaces) of the electronic component 10 in the laminating direction as shown in FIG. 6 or may be formed only on one side of the electronic component. Or a combination thereof. Further, a plurality of electrode layers 1 (or 2) may be connected to one external electrode 7 (or 8). Thereby, the capacity of the formed capacitor can be changed.

In addition to the external electrodes 7 and 8, a through electrode 6 is formed on the electronic component 10. Through the penetrating electrode 6, electrical connection between electronic components different from the electronic component of the present invention disposed above and below the electronic component 10 of the present invention is secured as if the electronic component of the present invention does not exist. Is done.

金属 As a material for forming the electrode layers 1 and 2, a metal or a metal compound such as aluminum, copper, or gold can be used. Examples of the material for forming the dielectric layer 3 include resin materials such as acrylic resin, epoxy resin, and vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, and titanium oxide. And metal oxides such as aluminum oxide and silicon oxide, and metalloid oxides. In addition, as the external electrodes 7 and 8 and the through electrode 6, a conductive paste or a conductive polymer can be used in addition to a metal such as gold, silver, aluminum, copper, or a solder material.

The formation of the electrode layers 1 and 2 can be performed by a vacuum evaporation method, a sputtering method, a plating method, or the like. As a means for forming the electrode layers 1 and 2 in a stripe shape, a method using a patterned solid mask, a method using an evaporable mask such as oil, a method of performing laser etching, and the like can be used as appropriate. As the oil masking material, various oils such as hydrocarbon oils, mineral oils, and fluorine oils can be used.

The dielectric layer 3 may be formed by vaporizing by heating with a heater, or atomizing by ultrasonic wave or spray, and depositing a resin material if it is a resin material. A method can be used.

(4) In order to form the external electrodes 7 and 8, a method such as thermal spraying, plating, or application of a conductive paste can be used.

In order to form a hole-shaped opening in the dielectric layer 3 for forming the through electrode 6, a method of removing the dielectric at a predetermined location by laser etching after the formation of the dielectric layer, or a method of previously using an evaporable mask such as oil , And then a method of forming a dielectric layer can be used. In order to apply a dot-shaped evaporative mask, it is particularly effective to apply a small droplet of a masking material by an ink jet method in which the droplet is ejected from a fine hole.

付 与 When an oil mask is provided, examples of usable oils include hydrocarbon oils, mineral oils, and fluorine oils.

When an evaporative mask is used, if an excessive masking material remains after the formation of each layer, it can be removed by using a far-infrared heater, electron beam, ultraviolet lamp irradiation, plasma irradiation, or the like, if necessary.

FIG. 7 is a schematic cross-sectional view showing a part of an example of a manufacturing apparatus for manufacturing the electronic component shown in FIGS.

(4) The inside of the vacuum chamber 24 is composed of a plurality of rooms divided for each process, and an exhaust system 25 such as a vacuum pump is connected to the rooms of the metal thin film deposition sources 14 and 17. Each room in the vacuum chamber is maintained at a predetermined degree of vacuum. A support (a can 23 in FIG. 7) that rotates and moves in the direction of the arrow is disposed as a transport system at a substantially central portion of the vacuum chamber 24.

First, a lower insulator film is formed on the can 23 by an insulator film forming source (the dielectric thin film forming source 15 or 18 in FIG. 7). After the film formation, the opening (hole) may be formed by removing the insulator film at the position of the through electrode with the laser beam machine 16 or 19. At this time, the shutters 26 of the metal thin film deposition sources 14 and 17 are closed. Subsequently, the shutter 26 is opened and a first patterned metal thin film (first electrode layer) is formed by a combination of the metal thin film deposition source 14 and a patterning mask. Next, a first dielectric thin film (dielectric layer) is formed by the dielectric thin film forming source 15. After the formation of the first dielectric thin film, the laser processing machine 16 removes the dielectric thin film at the position of the through electrode. Subsequently, a second patterned metal thin film (second electrode layer) is formed by a combination of the metal thin film deposition source 17 and a patterning mask. Next, a second dielectric thin film (dielectric layer) is formed by the dielectric thin film forming source 18. Even after the formation of the second dielectric thin film, the laser thinner 19 removes the dielectric thin film at the position of the through electrode. Thereafter, the metal thin film forming source 14, the dielectric thin film forming source 15, the laser processing machine 16, the metal thin film forming source 17, the dielectric thin film forming source 18, and the laser processing machine 19 are sequentially sent again. Only these operations are repeated. After the film formation is performed a predetermined number of times, the shutter 26 is closed, and the upper insulator film is formed by the insulator film forming source (the dielectric thin film forming source 15 or 18 in FIG. 7). After the film formation, the opening (hole) may be formed by removing the insulator film at the position of the through electrode with the laser beam machine 16 or 19.

The through electrode is formed by applying a conductive paste into a through hole formed at the position of the through electrode and then hardening the paste.

Thereafter, the laminate is cut into a predetermined size as needed at an appropriate process step.

外部 External electrodes are formed on the end faces of the laminate cut into a predetermined size by a method such as thermal spraying or paste application.

When forming the external electrodes, the number of stripe electrodes that are divided and connected to the external electrodes can be adjusted using a mask, a resist, or the like.

The formed electronic component 10 of the present invention is used by being arranged between a carrier 28 on which a semiconductor chip 27 is mounted and a wiring board 30, for example, as schematically shown in FIG. The signal terminals 29a on the lower surface of the carrier 28 are connected to the wiring patterns 31 formed on the wiring board 30 via the through electrodes 6 of the electronic component 10 of the present invention as necessary. The power supply terminal 29b on the lower surface of the carrier 28 is connected to the wiring board 30 via the through electrode 6, and further to the first external electrode 7. Further, another power terminal 29 b on the lower surface of the carrier 28 is connected to the wiring board 30 via the through electrode 6, and further connected to the second external electrode 8. The connection between the through electrode 6 and the external electrodes 7 and 8 may be made by a method using the wiring pattern 31 on the surface of the wiring board 30 as shown in FIG. 8, or the connection inside the wiring board 30 or the electronic component of the present invention. Other methods such as connection on the upper surface may be used. The connection between the external electrodes 7 and 8 and the wiring board 30 can be performed by soldering 32 or other methods.

The first electrode layer 1 connected to the first external electrode 7 and the second electrode layer 2 connected to the second external electrode 8 are insulated with a dielectric layer interposed therebetween. If the power supply terminal connected to the first external electrode 7 is a Vcc terminal and the power supply terminal connected to the second external electrode 8 is a GND terminal, the power supply terminal is connected between the first external electrode 7 and the second external electrode 8. Since the formed capacitor functions as a power supply pass capacitor at a position close to the semiconductor chip without increasing the mounting area, it is preferable in terms of high-frequency driving and reduction of the mounting area.

[Example 2]
Aluminum was used as the metal thin film material, acrylate was used as the dielectric material, silver paste was used as the conductive paste, and a carbon dioxide laser with an output of 10 W was used as the laser. 484 through electrodes were formed. Each of the electrode layers 1 and 2 is a multi-stripe having a width of 0.8 mm, and is repeatedly laminated so that the electrode layer has a thickness of 30 nm, the dielectric layer has a thickness of 0.25 μm, and the dielectric layer has 140 layers. went. Insulating layers of 5 μm each were formed above and below the laminate for the purpose of improving the strength of the laminate. For simplicity, the upper and lower insulator layers were made of the same material as the dielectric layer. The upper insulator layer and the lower insulator layer were subjected to laser processing for forming through electrodes. Thereafter, the laminate was subjected to a cutting process, and a brass layer was formed on the cut surface by thermal spraying to a thickness of 20 μm, and then a solder plating layer was formed to a thickness of 60 μm to form external electrodes. A recess (opening) generated at the position of the through electrode where the hole was formed was hardened by applying a conductive paste.

As a result, it was confirmed by an LCR meter that a capacitor having a total capacitance of 1 μF and a tan δ of 0.8% was formed inside the laminate having a thickness of about 50 μm.

(Embodiment 3)
FIG. 9 is a schematic plan view showing an example of the electronic component 10 according to Embodiment 3 of the present invention. FIG. 10 is a perspective view showing the internal structure of a part of the electronic component shown in FIG.

A plurality of first electrode layers 1 formed in a predetermined pattern on substantially the same plane and a plurality of second electrode layers 2 formed in a predetermined pattern on the substantially same plane form a dielectric layer 3. They are sandwiched and stacked. By forming each of the first electrode layers 1 and each of the second electrode layers 2 so as to at least partially overlap (oppose), the capacitance forming region 9 is formed at each overlapping portion (opposing portion). It is formed and functions as a capacitor. The capacitance can be changed by changing the size of each overlapping portion (capacitance forming region 9).

A first extraction electrode 4 is connected to the first electrode layer 1, and a second extraction electrode 5 is connected to the second electrode layer 2. These can be used as connection terminals when exerting the capacitor function. The extraction electrodes 4 and 5 may be formed so as to penetrate in the stacking direction of the electronic component 10 as shown in FIGS. 9 and 10, or formed so as to appear only on one surface of the electronic component. Or a combination thereof.

In addition to the extraction electrodes 4 and 5, a through electrode 6 is formed on the electronic component 10. Through the penetrating electrode 6, electrical connection between electronic components different from the electronic component of the present invention disposed above and below the electronic component 10 of the present invention is secured as if the electronic component of the present invention does not exist. Is done.

金属 As a material for forming the electrode layers 1 and 2, a metal or a metal compound such as aluminum, copper, or gold can be used. Examples of the material for forming the dielectric layer 3 include resin materials such as acrylic resin, epoxy resin, and vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, and titanium oxide. And metal oxides such as aluminum oxide and silicon oxide, and metalloid oxides. Further, as the extraction electrodes 4 and 5 and the penetrating electrode 6, a conductive paste or a conductive polymer can be used in addition to a metal such as gold, silver, aluminum, copper, or a solder material.

The formation of the electrode layers 1 and 2 can be performed by a vacuum evaporation method, a sputtering method, a plating method, or the like. Means for forming the electrode layers 1 and 2 in a predetermined pattern (shape) such as a polygonal shape include a method using a patterned solid mask, a method using an evaporative mask such as oil, a method using laser etching, and the like. Can be used as appropriate. As the oil masking material, various oils such as hydrocarbon oils, mineral oils, and fluorine oils can be used.

The dielectric layer 3 may be formed by vaporizing by heating with a heater, or atomizing by ultrasonic wave or spray, and depositing a resin material if it is a resin material. A method can be used.

In order to form a hole-shaped opening in the dielectric layer 3 for forming the extraction electrodes 4, 5 and the through electrode 6, a method of removing a dielectric at a predetermined location by laser etching after forming the dielectric layer, A method of forming a dielectric layer after providing an evaporative mask of oil or the like can be used. In order to apply a point-like or linear evaporative mask, it is also effective to apply an ink-jet method in which fine droplets of a masking material are ejected from fine holes.

付 与 When an oil mask is provided, examples of usable oils include hydrocarbon oils, mineral oils, and fluorine oils.

When an evaporative mask is used, if an excessive masking material remains after the formation of each layer, it can be removed by using a far-infrared heater, electron beam, ultraviolet lamp irradiation, plasma irradiation, or the like, if necessary.

具体 A specific method of manufacturing an electronic component according to the present embodiment can be similarly manufactured using, for example, the apparatus described in Embodiment 1 or 2.

The formed electronic component 10 of the present invention is used by being arranged between a carrier 28 on which a semiconductor chip 27 is mounted and a wiring board 30, for example, as schematically shown in FIG. The signal terminals 29a on the lower surface of the carrier 28 are connected to the wiring patterns 31 formed on the wiring board 30 via the through electrodes 6 of the electronic component 10 of the present invention as necessary. The power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring board 30 via the through electrode 6, and further connected to the first extraction electrode 4. Further, another power terminal 29 b on the lower surface of the carrier 28 is connected to the wiring board 30 via the through electrode 6, and further connected to the second extraction electrode 5. The connection between the through electrode 6 and the extraction electrodes 4 and 5 may be made by a method using the wiring pattern 31 on the surface of the wiring board 30 as shown in FIG. 11 or by other methods such as connection inside the wiring board 30. May be. Alternatively, the power supply terminal 29b on the lower surface of the carrier 28 may be connected to the extraction electrodes 4 and 5 on the lower surface of the carrier, and the electronic component 10 of the present invention and the wiring substrate 30 may be connected on the surface of the wiring substrate 30. In the figure, reference numeral 9 denotes a capacitance forming region formed at an overlapping portion between the first metal thin film and the second metal thin film.

The first electrode layer 1 connected to the first extraction electrode 4 and the second electrode layer 2 connected to the second extraction electrode 5 are insulated with a dielectric layer interposed therebetween. If one power supply terminal connected to the first extraction electrode 4 is a Vcc terminal and another power supply terminal connected to the second extraction electrode 5 is a GND terminal, the first extraction electrode 4 and the second extraction electrode 5 The capacitor formed between them functions as a power supply pass capacitor at a position close to the semiconductor chip without increasing the mounting area, and is therefore preferable in terms of high-frequency driving and reduction of the mounting area.

[Example 3]
Aluminum was used as the metal thin film material, aluminum oxide was used as the dielectric material, and silver paste was used as the conductive paste. When forming an electrode layer, a solid mask with a window-shaped hole is used.When forming a dielectric layer, a fluorine-based oil is used as an oil masking material to be applied by an inkjet method. A total of 200 through electrodes having a pitch of 0.7 mm and a diameter of 0.3 mm are formed in a row of 20 × 10 rows, and a rectangular electrode layer 1 and an electrode layer 2 each having a width of 1 to 2 mm are formed between the through electrode rows. , So that the capacitors have different areas at the overlapping portions of the two electrode layers. Two extraction electrodes were formed in each capacitor by filling a conductive paste in a hole shape of 0.25 mm × 1 mm. Repeated lamination was performed so that the thickness of the electrode layer was 30 nm, the thickness of the dielectric layer was 0.3 μm, and the number of the dielectric layers was 130. Insulating layers of 8 μm each were formed on the upper and lower sides of the laminate for the purpose of improving the strength of the laminate. For simplicity, the upper and lower insulator layers were made of the same material as the dielectric layer. A hole was formed in the lower insulator layer by masking to form a through electrode and an extraction electrode. A hole was formed by masking on the upper insulator layer to form a through electrode. A conductive paste was applied to solidify the recesses (openings) generated at the positions of the penetrating electrodes and the positions of the extraction electrodes where the holes were formed.

As a result, a total of 9 capacitors having a capacitance of 0.047 μF × 4, 0.068 μF × 2, 0.1 μF × 2, and 0.47 μF × 1 have a tan δ of 1.2% and a thickness of about 60 μm. It could be confirmed by the LCR meter that it was formed inside the laminate.

材料 The material for forming the electrode layer of the present invention is not limited to Embodiments 1 to 3 and Examples 1 to 3, but may be a metal such as aluminum, copper, or gold, or a metal compound. In addition, as a material for forming the dielectric layer, a resin material such as an acrylic resin, an epoxy resin, and a vinyl resin, a ceramic material such as a barium titanium oxide ceramic or a strontium titanium oxide ceramic, or titanium oxide, Metal oxides such as aluminum oxide and silicon oxide and metalloid oxides can be used. In addition, as the through electrode, a metal such as gold, silver, aluminum, copper, or a solder material or a conductive polymer can be used in addition to the conductive paste. In addition, as the extraction electrode and the external electrode, in addition to the conductive paste, brass, zinc, a solder material, a metal such as gold, silver, copper, or a conductive polymer alone or, for example, a conductive layer after forming a brass layer. They can be used in appropriate combination by forming a paste layer or the like.

In the explanatory views of the first to third embodiments, the arrangement of the electrode layers for forming the capacitance forming regions is such that the electrode layers are orthogonal to each other when viewed from above in the stacking direction. Although the capacitance formation region is formed so as to be formed, the capacitance formation region is not necessarily required to be rectangular. For example, the shape of the capacitance forming region formed at the intersection may be changed to another shape such as a parallelogram by crossing the stripe-shaped electrode layers obliquely.

The shapes of the extraction electrode and the through electrode are not limited to the shapes schematically shown in the drawings, but may be changed to other shapes.

構造 Further, the structures shown in the first to third embodiments may be mixed in the same electronic component. For example, the stripe-shaped electrode layers shown in Embodiments 1 and 2 are formed, the extraction electrodes shown in Embodiment 1 are connected to some of the electrode layers, and Embodiment 2 is used for other electrode layers. May be connected. Alternatively, the stripe-shaped electrode layers described in Embodiments 1 and 2 and the electrode pattern having a predetermined pattern described in Embodiment 3 are formed, and some of the electrode layers are described in Embodiment 1 or 3. The extraction electrode may be connected, and the external electrode described in Embodiment 2 may be connected to another electrode layer.

The openings (holes) in the dielectric layer for forming the through electrodes and the extraction electrodes are formed by applying laser etching or evaporative oil every time the dielectric layers are laminated. An opening (hole) may be formed by irradiating a laser beam to a predetermined portion after lamination, without using a proper method. That is, a through-hole can be formed by forming a through-hole in the lamination direction so as not to contact any of the electrode layers, and filling the through-hole with a conductive material. Also, a hole (or through hole) having a predetermined depth is formed so as to contact only a desired electrode layer, and a conductive layer is formed so as to contact the electrode layer exposed on the inner peripheral wall of the hole (and the bottom of the hole). By filling the material, an extraction electrode to which a desired electrode layer is electrically connected can be formed.

Also, the electronic component of the present invention has been described as an example having a capacitor function, but has other functions (for example, a coil, a noise filter, a laminated circuit board, etc.) in addition to or in addition to the capacitor function. It may be something.

FIG. 2 is a schematic plan view illustrating an example of the electronic component according to Embodiment 1 of the present invention. FIG. 2 is a perspective view illustrating an internal structure of a part of the electronic component illustrated in FIG. 1. FIG. 2 is a schematic perspective view of an apparatus for describing a part of a manufacturing process for manufacturing the electronic component illustrated in FIG. 1. FIG. 2 is a schematic diagram illustrating a usage example of the electronic component illustrated in FIG. 1. FIG. 13 is a schematic plan view illustrating an example of an electronic component according to Embodiment 2 of the present invention. FIG. 6 is a perspective view illustrating an internal structure of a part of the electronic component illustrated in FIG. 5. FIG. 6 is a schematic cross-sectional view showing a manufacturing apparatus for manufacturing the electronic component shown in FIG. FIG. 6 is a schematic diagram illustrating a usage example of the electronic component illustrated in FIG. 5. FIG. 13 is a schematic plan view illustrating an example of an electronic component according to Embodiment 3 of the present invention. FIG. 10 is a perspective view illustrating an internal structure of a part of the electronic component illustrated in FIG. 9. FIG. 10 is a schematic diagram illustrating a usage example of the electronic component illustrated in FIG. 9.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 1st electrode layer 2 2nd electrode layer 3 dielectric layer 4 1st extraction electrode 5 2nd extraction electrode 6 penetration electrode 7 1st external electrode 8 2nd external electrode 9 Capacitance formation area 10 Electronic component 11 Support loading chamber 12a, 12b Gate valve 13 Lower insulator film forming source 14 Metal thin film forming source 15 Dielectric thin film forming source 16 Laser processing machine 17 Metal thin film forming source 18 Dielectric thin film forming source 19 Laser processing machine 20 Upper insulator film forming source 21 Transport system 22 Support take-out port 23 Can 24 Vacuum tank 25 Exhaust system 26 Shutter 27 Semiconductor chip 28 Carrier 29a Signal terminal 29b Power supply terminal 30 Wiring board 31 Wiring pattern 32 Solder

Claims (9)

An electronic component having an electrode layer opposed to the dielectric layer and an extraction electrode or an external electrode connected to the electrode layer, wherein the electronic component penetrates the electronic component without being electrically connected to the electrode layer. An electronic component having through-electrodes arranged in a lattice point pattern. The electronic component according to claim 1, wherein the extraction electrode is exposed only on one surface of the electronic component. The electrode layer includes a first electrode layer and a second electrode layer disposed between the through electrodes, 2. The electronic component according to claim 1, wherein the electrode layer includes a first electrode layer and a second electrode layer disposed so as to have a facing portion of a predetermined size with the dielectric interposed therebetween. 3. The electronic component according to claim 1, wherein the extraction electrode is formed on the same plane as one end of the through electrode. The electronic component according to claim 1, wherein the external electrode is formed on a different surface from the through electrode. The electronic component according to claim 3, wherein a plurality of capacitance forming regions are formed between the first electrode layer and the second electrode layer. The electronic component according to claim 7, wherein the extraction electrode or the external electrode connected to the first electrode layer and the second electrode layer forming each capacitance forming region are insulated from each other. The electronic component according to claim 7, wherein capacitance forming regions having different capacitances are formed.

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