JP2003316588A - Information processor and memory mapping method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an information processor capable of sharing data among a plurality of processes to be generated by a plurality of different information processing applications. <P>SOLUTION: The information processor for mapping a memory in the process of an information processing application, is provided with a region acquiring means for acquiring a direct map region capable of directly mapping a memory in the process and a direct mapping means for directly mapping a memory from the virtual memory region of the process to a predetermined region in the direct map region designated by the process in accordance with a physical address indicating the predetermined region. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus having various information processing functions, and more specifically, enables sharing of data among a plurality of processes generated by an application corresponding to each function, An information processing device that integrates information processing functions is provided.

[0002]

2. Description of the Related Art Information processing apparatuses such as personal computers perform various information processing by executing one or more applications respectively corresponding to various information processing. In a conventional information processing device, a process generated by executing each application separately acquires a necessary memory.

An image forming apparatus as an application example of an information processing apparatus houses the functions of each device such as a printer, a copier, a facsimile, and a scanner in one housing.
Such a composite type image forming apparatus is provided with a display unit, a printing unit, an image pickup unit, and the like in one housing, and three types of applications corresponding to a printer, a copier, and a facsimile device, respectively. , The device is operated as a printer, a copier, a scanner, or a facsimile device.

Since such a conventional composite type image forming apparatus is provided with separate applications (including OS) corresponding to a printer, a copy and a facsimile, respectively, a process generated by executing each application is generated. The required memory is acquired separately,
It is also managed individually.

For example, Patent Document 1 describes an example of the composite type image forming apparatus as described above.

[0006]

[Patent Document 1] Japanese Patent Laid-Open No. 2002-84383

[0007]

A conventional information processing apparatus in which one or more applications corresponding to various information processing operate on an OS (operating system), or an application such as a copy, a scanner, or a printer on the OS In the case of a conventional multi-function peripheral that operates on the OS, the OS virtual memory area map performed by the OS and the virtual memory area map performed by a process created by an application or the like usually have different architectures. Many.

In such an architecture, by converting the address of the virtual memory area mapped by the process generated by the application or the like into the address of the OS virtual memory area, the access to the address by the OS is controlled. There is.

For example, as shown in FIG. 1, after the process A is mapped to a predetermined area in the virtual memory area of the process A, the OS 1 accesses the OS virtual memory area by the occurrence of an interrupt during the operation of the process A. By converting the address of the virtual memory area mapped by the process A into the address of the OS virtual memory area, the access becomes possible.

On the other hand, when an interrupt occurs while the process B is operating, the OS 1 accesses the OS virtual memory area corresponding to the address of the virtual memory area of the process A mapped by the process A. If the predetermined area in the virtual memory area of the process B corresponding to the predetermined area in the virtual memory area of the process A is not mapped, the address cannot be converted into the address to the OS virtual memory area. Due to the failure of the address conversion, the OS 1 has a problem such as abnormal termination.

Due to such an abnormal termination, for example, when the same image data is output to paper by the printer function and the image data is output by the scanner function, efficient processing cannot be performed.

Therefore, it is desired to share data between processes generated by executing each application rather than the conventional information processing apparatus. Further, instead of the conventional multifunctional image forming apparatus in which the functions of each device such as a printer, a copier, a facsimile, and a scanner are housed in one housing, the processes generated by an application corresponding to each function It is desired to combine the functions of a printer, a copy machine, a facsimile machine, a scanner, and the like into one image forming apparatus by sharing data.

Therefore, an object of the present invention is to provide an image forming apparatus capable of sharing data between processes generated by applications corresponding to various information processing functions.

[0014]

In order to solve the above problems, the present invention provides an information processing apparatus for mapping a memory to a process of an application for performing information processing, as described in claim 1. From the virtual memory area of the process to the predetermined area by means of area acquisition means for acquiring a direct map area that can be directly mapped by the process on the memory and a physical address indicating a predetermined area in the direct map area specified by the process. And direct mapping means for directly mapping to.

In such an information processing apparatus, when a process specifies a physical address, the process can be acquired from the virtual memory area of the process and can be directly mapped on the memory.

In view of the direct mapping of the process, the present invention, as set forth in claim 2, includes:
The information processing apparatus according to claim 1, wherein the direct map means is
The system call may be configured to directly activate the map processing means for mapping from the virtual memory area of the operating system to the predetermined area in the direct map area.

In such an information processing apparatus, the process can directly activate the map processing means of the operating system by the system call and perform the map to the direct map area on the memory.

From the viewpoint that a process makes a system call, the present invention provides the information processing apparatus according to claim 2 as described in claim 3, wherein the system call is made by calling a sysarch function. Can be configured to take place.

In such an information processing apparatus, a process can make a system call by directly calling a sysarch function, and a map can be directly mapped to a memory area in the memory without any processing by the operating system. Can be done.

The method according to claim 1, wherein the map area is directly shared between the processes.
The information processing apparatus according to any one of items 1 to 3, wherein 2
By designating the same physical address in the above processes, the same predetermined area can be configured to be shared between the processes.

In such an information processing apparatus, different processes specify the same physical address without going through the operating system, so that the predetermined area specified by the physical address can be shared.

From the viewpoint of designating a predetermined area in the direct map area by a physical address, the information processing apparatus according to any one of claims 1 to 4, as described in claim 5, The process may be configured to specify the physical address by an offset value indicating the predetermined area within the direct map area.

In order to solve the above problems, the present invention is an information processing apparatus that maps a memory to a process of an application that performs information processing, and can directly map the virtual memory area of the process onto the memory. And a first map area acquisition means for acquiring a first direct map area on the memory, which is directly accessible by the processor, and a predetermined first direct map area acquired by the first map area acquisition means. By setting a physical address indicating the area in the page directory entry, the virtual memory area of the process is directly mapped to the predetermined first area.

In such an information processing apparatus, the processor can directly access the first direct map area from the page directory entry without using the operating system.

Further, from the viewpoint of directly mapping the map area by the process, the information processing apparatus according to claim 6 is described, wherein the process is performed from the virtual memory area of the process. Second map area acquisition means for acquiring a second map area on the memory that enables direct mapping on the memory, and the second direct area acquired by the second map area acquisition means by a system call by the process. By setting a physical address indicating a predetermined second area of the map area in the page table entry, a second map means for directly mapping from the virtual memory area of the process to the predetermined second area is configured.

In such an information processing apparatus, the process can map from the page table entry by setting the physical address indicating the predetermined second area in the page table entry without going through the operating system. .

From the viewpoint that the process directly maps to the predetermined second area, as described in claim 8, the information processing apparatus according to claim 7, wherein the second mapping means uses a system call. The map processing means for mapping from the virtual memory area of the above-mentioned process of the operating system to the predetermined second area of the second direct map area can be directly activated.

In such an information processing apparatus, since the process is configured to make a system call, it is possible to map the predetermined second area without the intervention of the operating system.

From the viewpoint of mapping the first map area and the second map area in units of different page lengths, as described in claim 9, the method according to any one of claims 6 to 8. In the information processing apparatus, the first map means maps the first map area for the process in units of a first predetermined page length from a virtual memory area of the process, and the second map means. Can be configured to map the second map area to the process in units of the second predetermined page length from the virtual memory area of the process.

In such an information processing apparatus, the first map area which the processor can directly access at high speed,
The process can map the second map area that can be directly mapped by a system call in units of different page lengths.

According to a tenth aspect of the present invention, in the information processing apparatus according to the ninth aspect, the processor directly accesses a large amount of data at high speed.
The first predetermined page length unit may be larger than the second predetermined page length unit.

In such an information processing apparatus, a processor can process a large amount of data at high speed.

From the viewpoint of maintaining compatibility with conventional functions,
As described in claim 11, the information processing apparatus according to claim 9, wherein when the operating system is started,
It has a page unit judgment means for judging whether or not it supports the first predetermined page length unit, and based on the judgment result by the page unit judgment means, the first map area acquisition means and the first map. The means, the second map area acquisition means, and the second map means may be configured to be effective.

In such an information processing apparatus, when the first predetermined page length unit for accessing a large amount of data is not supported, the first direct map area and the second direct map area are acquired and It is possible to prevent mapping and maintain compatibility with conventional functions.

As described in claim 12, claim 6
The information processing apparatus according to any one of claims 1 to 11,
The memory can be configured to be used for drawing.

Further, in order to solve the above-mentioned problems, the present invention provides a memory mapping method for mapping a memory to a process of an application which performs information processing, as described in claim 13, wherein the virtual memory of the process is A first map area acquisition procedure for acquiring a first direct map area on the memory, which can be directly mapped from the area onto the memory, and which can be directly accessed by a processor;
Direct mapping from the virtual memory area of the process to the predetermined first area by setting the physical address indicating the predetermined first area of the first direct map area acquired by the first map area acquisition means in the page directory entry. And a first map procedure to perform.

In such a memory mapping method, since the physical address indicating the predetermined first area in the acquired first map area is set in the page directory entry, access from the page directory entry to the predetermined first area is performed. Can be done.

From the viewpoint of enabling high-speed direct access from the processor, the memory mapping method according to claim 13, wherein the first mapping procedure is performed on the page directory entry. In such a memory mapping method for setting a flag indicating user availability, a flag indicating user availability is set in a page directory entry in which a physical address indicating a predetermined first area in the acquired first map area is set. Therefore, the processor can be directly accessed without using the operating system.

From the viewpoint of enabling direct mapping by a process, as described in claim 14, the memory mapping method according to claim 13, wherein the process is performed from a virtual memory area of the process onto the memory. A second map area acquisition procedure that acquires a second map area that enables direct mapping to the memory, and the second direct map area acquired by the second map area acquisition procedure by a system call by the above process. By setting a physical address indicating the predetermined second area in the page table entry, a second mapping procedure for directly mapping from the virtual memory area of the process to the predetermined second area can be configured.

In such a memory mapping method, by setting the physical address of the page in the page table which manages the entry of the page, the mapped process itself can access the mapped area.
Therefore, it is possible to access the same area by another process mapped to the same area, and the same area can be shared.

Claim 1 as claimed in claim 16 in terms of allowing access from a process.
5. The memory mapping method according to 5, wherein the second mapping procedure can be configured to set a flag indicating that the page table entry can be used by a user.

In such a memory mapping method, since the flag indicating user availability is set in the page table entry in which the physical address indicating the predetermined second area in the acquired second map area is set, the operating system is set. The process can be directly accessed without going through.

[0043]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of the information processing apparatus according to the present invention. The information processing device 2000 is configured to include a hardware resource 2100 and a software group 2200.

The hardware resources 2100 include a memory device 2110, an input device 2120, a display device 2130, other hardware resources 2140 and the like. The software group 2200 includes the applications 2210-1 and 2210-2.
210-n, OS 223 such as UNIX (registered trademark)
0, BIOS 2240, device driver 2250 and the like.

The information processing device 2000 is turned on when the power is turned on.
The program of S2230 is read from the auxiliary storage device,
The read program is transferred to the memory device 2110 and activated. Further, the information processing device 2000 reads the programs of the applications 2210-1 to 2210-n from the auxiliary storage device when the power is turned on or in response to the activation instruction from the operator, and the read programs are stored in the memory device 2.
Transfer to 110 and start.

Applications 2210-1 to 2210
-N causes the information processing apparatus 2000 to perform various information processing. The BIOS 2240 is a program that controls the hardware resource 2100. The device driver 2250 is a program that manages peripheral devices included in the hardware resource 2100.

The OS 2230 uses the API (Application Pr
gram interface) 2220 is used to receive requests from the applications 2210-1 to 2210-n.
The API 2220 is used to receive a request from the applications 2210-1 to 2210-n by a predefined function.

The OS 2230 is the application 221.
Each software of 0-1 to 2210-n is controlled in parallel as a process. Also, the OS 2230 is the BIOS 224.
0, the device driver 2250 is used to make a request to the hardware resource 2100.

Next, the hardware configuration of the information processing apparatus 2000 will be described. FIG. 2 is a hardware configuration diagram of an embodiment of the information processing apparatus according to the present invention. The information processing device 2000 includes an input device 2510, a display device 2520, an auxiliary storage device 2530, a memory device 2540, and an arithmetic processing device 2 which are connected to each other by a bus B.
550.

The input device 2510 is composed of a keyboard and a mouse, and is used for inputting various operation instructions. The display device 2520 displays various windows and data necessary for operation. The auxiliary storage device 2530 is
It stores a program that causes the information processing apparatus 2000 to perform processing, and also stores various files and data necessary for processing the program.

The memory device 2540 is used by the information processing device 20.
00 is started, the program is read from the auxiliary storage device 2530 and stored. The arithmetic processing unit 2550 executes processing according to the program stored in the memory device 2540.

Next, an image forming apparatus (hereinafter referred to as a compound machine) as an application example of the information processing apparatus according to the present invention will be described. A fusion machine that fuses various image forming functions according to an embodiment of the present invention has a functional configuration as shown in FIG. 4, for example. FIG. 4 is a block diagram showing a functional configuration of a compound machine that combines various image forming functions according to an embodiment of the present invention.

In FIG. 4, the compound machine 1200 is configured to include a hardware resource 1205, a software group 1210, and a compound machine starting part 1240. The hardware resource 10 is a black and white laser printer (B & W L
P) 1201 and a color laser printer (Color)
LP) 1202 and a hardware resource 1203 such as a scanner and a facsimile.

The software group 1210 is a UNI
It is composed of a platform 1220 and an application 1230 activated on an operating system (hereinafter referred to as OS) such as X (registered trademark). The compound machine start-up unit 1240 is first executed when the power of the compound machine 1200 is turned on.
And the application 1230 are activated.

The platform 1220 interprets the processing request from the application 1230 and manages one or a plurality of hardware resources, and the control service 1250 described below for generating a hardware resource acquisition request, and the control service 1250. A system resource manager (SRM (System Resource Manager) 1223) that arbitrates acquisition requests from
And a handler layer 1260 that manages the hardware resource 1205 in response to an acquisition request from the SRM 1223.

The control service 1250 is composed of a plurality of service modules.
SCS (System Control Service) 1222 and ECS
((Engine Control Service) 1224 and MCS (Memo
ry Control Service) 1225 and OCS (Operation
panel Control Service) 1226 and FCS (FAX Con
Control Service) 1227 and NCS (Network Control)
Service) 1228. The platform 1220 has an application program interface (A) that enables it to receive a processing request from the application 1230 using a predefined function.
PI) 1215.

The OS is an operating system such as UNIX (registered trademark).
20 and each software of the application 1230 are executed in parallel as processes. By using the open source UNIX (registered trademark), the safety of the program can be secured, the network can be supported, and the source code can be easily obtained. In addition, royalty of OS and TCP / IP is unnecessary,
Outsourcing is also easy.

The SRM 1223, together with the SCS 1222, controls the system and manages resources. The engine unit such as a scanner or plotter, memory, HDD file, host I / O (Centro I / F,
Network I / F, IEEE1394 I / F, RS2
32C I / F, etc.) performs arbitration according to a request from an upper layer that uses a hardware resource such as 32 CI / F, and controls execution.

Specifically, the SRM 1223 determines whether the requested hardware resource is available (whether it is not used by another request), and if it is available, the requested hardware resource is available. Tell upper layers that wear resources are available. In addition, hardware resource utilization scheduling may be performed in response to a request from an upper layer, and the request content (for example, paper conveyance and image forming operation by the printer engine, memory reservation, file generation, etc.) may be directly executed. .

The SCS 1222 manages the application (function 1), controls the operation unit (function 2), displays the system screen (job list screen, counter display screen, etc.) (function 3), L
It performs a plurality of functions such as ED display (function 4), resource management (function 5), and interrupt application control (function 6).

Specifically, in the application management (function 1),
Registers the application and notifies other applications of the information. In the operation unit control (function 2), exclusive control of the operation unit use right of the application is performed. In the system screen display (function 3), a warning screen corresponding to the state of the engine unit is displayed according to the request content from the application having the operation unit usage right. In LED display (function 4), warning LED,
It controls the display of system LEDs such as application keys. The resource management (function 5) provides a service for exclusive control of engine resources (scanner, staple, etc.) that must be excluded when the application (ECS) executes a job. In the interrupt application control (function 6), control and service for prioritizing a specific application are performed.

The ECS 1224 is a monochrome laser printer (B & W LP) 1201 and a color laser printer (C
color L) 1202, other hardware resources 1203, and other engine units, and performs image reading and printing operations, status notification, jam recovery, and the like.

The MCS 1225 performs memory control, and specifically, performs acquisition and release of an image memory, use of a hard disk device (HDD), compression and expansion of image data, and the like.

The OCS 1226 is a module for controlling the operation panel which serves as a means for transmitting information between the operator and the main body control, and is a process for notifying the main body control of a key operation event of the operator, and a library function for each application to construct a GUI. Is provided, processing for managing the constructed GUI information for each application, display reflection processing on the operation panel, and the like are performed.

The FCS 1227 is used for facsimile transmission / reception from each application layer of the system controller using the PSTN / ISDN network, registration / quotation of various facsimile data managed by BKM (backup SRAM), facsimile reading, facsimile reception printing, fusion transmission / reception. API (Application Program Interf
ace).

The NCS 1228 is a group of modules for providing services that can be used in common to applications that require network I / O. The NCS 1228 distributes data received from each protocol from the network side to each application, and Mediates when data is transmitted from the network to the network side.

The handler layer 1260 is an FC which will be described later.
FCUH (FAX Co Unit) that manages U (FAX Control Unit)
IMH that allocates memory to each process, manages the memory allocated to each process, and manages a direct map area described later.
(Imaging Memory Handler) 1229.

The IMH 1229 also maps image data from the virtual memory area (user virtual space) to the physical memory. Depending on the start of the process, it makes a system call to map the virtual memory area for the process,
Performs processing such as releasing the mapped virtual memory area at the end of the process. IMH1229 is a CP described later.
The MEM-P area directly accessible by U and the MEM-P0 area directly accessible by the process are mapped.

The SRM 1223, FCUH 1231 and IMH 1229 utilize the engine I / F 1233 which sends a processing request to the hardware resource 1205 by a predefined function and uses the hardware resource 120.
5 request processing.

Application 1230 includes page description language (PDL), PCL and Postscript (PDL).
The printer application 1211 is a printer application including S), the copy application 1212 is a copy application, the fax application 1213 is a facsimile application, and the scanner application 1214 is a scanner application.

Applications 1211 to 1214
Can perform operations by using each process on the platform 1220, and is mainly composed of a screen display control program that performs screen control, key operation control, job generation, and the like. Note that a new application can be installed via the network via the network connected by the NCS 1228. Further, each application can be added or deleted for each application.

As described above, the multi-function peripheral 1200 performs the processing commonly required by each application on the platform 1220.
Process centrally.

Next, the hardware configuration of the compound machine 1200 will be described. FIG. 5 shows the compound machine 120 shown in FIG.
It is a block diagram which shows the hardware constitutions of 0. As shown in FIG. 5, the compound machine 1200 includes an operation panel 1310, a fax control unit (FC
U) 1320, USB (Universal Serial Bus) device 1330, IEEE 1394 device 1340, engine unit 1350, and ASIC of controller 1300
1301 and PCI (Peripheral Component Interconn
ect) It will be connected by a bus.

The controller 1300 uses the ASIC 130.
1 is connected to MEM-C1302, HD1303, network I / F controller 1309, etc.,
The ASIC 1301 and the CPU 1304 are connected via the NB 1305 of the CPU chip set. Thus, the reason for connecting via the NB 1305 is that the CPU 1
This is because the interface of 304 itself is not open to the public.

Here, the ASIC 1301 and the NB 13
05 is not simply connected via PCI, but is connected via AGP 1308. The reason for making the connection via the AGP 1308 is as follows.
This fusion machine 1200 is the platform 1 shown in FIG.
This is because, in order to control the execution of a plurality of processes forming the 220 and the application 1230, if these are connected by a low-speed PCI, the performance will decrease.

The CPU 1304 controls the entire compound machine 1200, and more specifically, the SCS 1222 and SR which form the platform 1220 on the OS.
M1223, ECS1224, MCS1225, OCS
1226, FCS 1227, and NCS 1228 are respectively activated and executed as processes, and a printer application 1211 that forms an application 1230,
The copy application 1212, the fax application 1213, and the scanner application 1214 are activated and executed.

The NB 1305 has a CPU 1304 and a MEM.
-P1306, SB1307, is a bridge for connecting the ASIC1301, MEM-P1306,
A system memory used as a drawing memory or the like of the multi-function peripheral. The SB 1307 is an NB 1305, a ROM, and a PC.
It is a bridge for connecting I devices and peripheral devices. The MEM-C1302 is a local memory used as a copy image buffer and a code buffer,
The ASIC 1301 is an IC for image processing applications having a hardware element for image processing.

The HDD 1303 is a storage for accumulating image data, programs, font data, and forms, and the operation panel 1310 accepts input operations from the operator and directs the operator. It is an operation unit for displaying.

Therefore, the ASIC 1301 has a ME
A RAM interface for connecting the MC 1302 and a hard disk interface for connecting the HDD 1303 are provided, and when inputting and outputting image data to and from these storage units, the input / output destination is R.
It can be switched to AM interface or hard disk interface.

The AGP 1308 is a bus interface for a graphics accelerator card that has been proposed for accelerating graphics processing, and makes the graphics accelerator card faster by directly accessing the system memory with high throughput.

The memory mapping method according to the present invention will be described below, focusing on the processing of the compound machine as an application example of the information processing apparatus. Fusion machine 120 in which platform 1220 and application 1230 are built on OS (operating system) such as UNIX (registered trademark)
In the case of 0, the virtual address area is controlled by the virtual address space interpretable by the OS kernel and the virtual address space interpretable by the process generated by the software.

Therefore, the OS uniquely controls access to the virtual memory area (hereinafter referred to as the virtual memory area for the kernel), and the virtual memory area developed by the process generated by the software (hereinafter, virtual memory for each process). Access to the area). When the OS accesses the virtual memory area for each process from the kernel virtual memory area, the OS
Is converted into a virtual address area accessible from.

First, MEM-C1302 and MEM-P1
Correspondence between the physical memory expanded in the 306 and the HDD 1303 and the virtual memory area will be described with reference to FIG. Referring to FIG. 6, the physical memory 10 includes a kernel area 11 used by the kernel, a general-purpose area 12 generally managed by the virtual memory processing unit 111, and a part of the area of the MEM-P 1306. The MEM-P0 area 13 that is mapped from the process generated by the application 1230 or the control service 1250 to the virtual memory area, and the ME that is accessed at high speed from the CPU 1304.
Substantial MEM-P region 14 as MP 1306
A black and white laser printer (B & W LP) 1201, a color laser printer (Color LP) 1202, and other hardware resources 1203 are engine I / F1.
MEM-C130 that can be accessed at high speed via 233
2 and a substantial MEM-C region 15. Areas 11 to 14 are RAMs on the MEM-P1306 side.
Is used, and the area 15 is RA on the MEM-C1302 side.
M is used.

The virtual memory area 20 expanded corresponding to the physical memory 10 includes a user program area 21 that is generally managed by the OS (general-purpose processing unit 110, which will be described later), and a virtual memory area for a process. Area 2
It has a direct map area 22 that can be directly mapped from 0 to the physical memory 10, and a stack area 23 that is generally managed by the OS (general-purpose processing unit 110) and data is stacked as needed.

The user program area 21 is further a program code area 2 for storing a program code for the CPU 1304 to execute the application 1230.
11, a program data area 212 for storing program data required when the CPU 1304 executes the application 1230, and a heap area 213 for dynamically allocating the data area. The user program area 21 is mapped to the virtual area 12 of the physical memory 10. The stack area 23 is also mapped to the virtual area 12 of the physical memory 10.

The direct map area 22 is MEM-P130.
6 is an area that is not managed by the OS (general-purpose processing unit 110 described later) and that is managed by the direct map area access driver 120 described later. The direct map area 22 is the MEM-P0 area 13, ME of the physical memory 10.
It has a MEM-P0 region 221, a MEM-P region 222, and a MEM-C region 223 that correspond to the M-P region 14 and the MEM-C region 15, respectively.

A memory management method for the direct map area in such a correspondence relationship will be described. Figure 7
It is a functional block diagram which implement | achieves memory sharing between processes.

In FIG. 7, the OS 1221 has a virtual memory area 2 corresponding to the physical memory 10 when the kernel is started.
A direct map area acquisition unit 130 that sets 0, and a user map permission / prohibition flag 13 that indicates whether or not the process allows the map.
1 and virtual memory area 2 for each process at process startup
A direct map virtual memory area process initialization unit 132 for initializing a table for direct mapping from 0 to the physical memory 10, a process virtual address space 141 for each process, and a virtual memory area for each process are managed. Table set 14 for managing multiple tables for
3, a MEM-P0 area information acquisition unit 241 that acquires the MEM-P0 virtual address and size that are allocated to each process, and a MEM- that is allocated to each process.
The MEM-P area information acquisition unit 242 that acquires the P virtual address and size, the MEM-P0 memory mapping unit 243 that maps the memory for the process, and the MEM-P0 that releases the memory mapped for the process. It has a dedicated memory release unit 244 and a system call processing unit 240 for allocating processing during system calls.

The kernel is activated by the multi-function peripheral activation unit 1240, and determines the presence / absence of the direct map region 22, the direct map region presence / absence determination unit 102, the general-purpose processing unit 110 for universally processing access to virtual memory, General-purpose processing unit 1
And a direct map area access driver 120 that handles virtual memory access without going through 10. Further, the general-purpose processing unit 110 performs a virtual memory processing unit 111 that processes access to the virtual memory, a page table management unit 112 that manages the used area of the virtual memory for each page, and an exceptional process of access to the virtual memory. And an exception processing unit 113 for performing the processing.

Direct map area access driver 120
Corresponds to a kernel address conversion unit 121 for converting an address (hereinafter, referred to as a user virtual address) of the direct map area on the virtual memory area for each process into an address accessible from the kernel, and a user virtual address of the direct map area. It has a physical address conversion unit 122 for converting into a physical address, and a specified region presence / absence judgment unit 123 for judging whether or not a region specified by an address and a size exists in the direct map region of the virtual memory region for each process.

The process management section 200 creates a process required to execute software, and releases the process when the process ends. The process management unit 200 manages the process generated by the software group 1210. The process management unit 200 directly activates the map virtual memory area process initialization unit 132 to cause the CPU 1304 to execute the MEM-P.
A map to the MEM-P area 222 that enables high-speed access into the 1306 and a M directly accessed by the process.
Initialization of the table for mapping to the EM-P0 area 221 is performed.

The direct map virtual memory area process initialization unit 132, based on the process virtual address space 141 for each process, MEM-P area 222 and MEM.
-Initialize the table for mapping to the P0 area 221.

Each of the started processes further includes IMH1
System call via 229, MEM-P0
Initialization of the table that enables direct access by the process in the area 221 is performed.

When the IMH 1229 makes a system call, the system call processing unit 240 activates the corresponding processing unit according to the type of the system call. For example, if IMH1229 makes a system call, s
Calling the ysearch function.

The system call processing unit 240 uses the MEM-
If the type indicates acquisition of P area information, the MEM-P area information acquisition unit 242 is activated, and if the type indicates acquisition of MEM-P0 area information, the MEM-P0 area information acquisition unit 241 is activated. , If it is a type for instructing a memory map to the MEM-P0 area 221, it is a type for instructing to release the mapped memory to the MEM-P0 area 221 by activating the MEM-P0 memory map unit 243. ME
The M-P0 memory releasing unit 244 is activated.

As described above, the memory map to the MEM-P0 area 221 is configured to be executed by the system call of IMH1229. For example, the same area mapped to the MEM-P0 area 221 by the process A is
When the process B specifies the same address, the process B can access the same area, and the ME by the process A and the process B can be accessed.
Sharing of a partial area in the M-P0 area 221 is realized.

Hereinafter, the MEM-P0 of the direct map area 22 will be described.
A method of controlling the area 221 and the MEM-P area 222 will be described. First, the processing in the direct map area acquisition unit 130 will be described with reference to the flowchart of FIG. Figure 8
It is a flowchart figure explaining the process in a direct map area acquisition part.

When the kernel is started by the multi-function peripheral starting unit 1240, the CPU 1304 sets the application 1
It is determined whether or not 230 can map the MEM-P0 area 13 to the virtual memory area for each process (step S11). For example, the determination method is CPU1
MEM-P area 1 accessed at high speed by 304
Judgment is made based on whether or not a 4 MB page having a page size of 4 is supported.

Then, the user map availability flag 1 indicating that paging of 4 MB size is possible in the predetermined area
31 is turned on (step S12). The user map enable / disable flag 131 is a predetermined register (for example, the CPU 13
04 control register).

If the map cannot be made in step S11 (NO), the general-purpose processing unit 110 is activated, the conventional virtual memory is managed, and the process is terminated. On the other hand, if mappable (YES), the kernel directly determines the map area acquisition unit 1
The structure of the MEM-P area 222 of the direct map area 22 in the virtual memory area 20 shown in FIG. 6 is set in the virtual memory area for kernel by 30 (step S1.
3) Go to step S14, and further set the structure of the MEM-P0 region 221.

Subsequently, the kernel specifies the size of the page directory for the MEM-P area 222 by the direct map area acquisition unit 130 and sets the page directory for the MEM-P area 222 in the virtual memory area for each process. A directory entry is set (step S15). Therefore, the MEM-P area 222 is the CPU
Since it is directly accessed by 1304, conversion from the kernel virtual memory area to the process-by-process virtual memory area is unnecessary, and the area is set as an area that can be accessed at high speed.

Further, the kernel uses the direct map area acquisition unit 130 to specify the size of the page directory of the MEM-P0 area 221, and the page directory entry in the page directory for the MEM-P0 area 221 in the virtual memory area for each process. Is set (step S16). These page sizes are CPU 1304
The maximum page size supported by (for example, 4 MB) may be set.

The page directory entry (PDE) set in the page directory (PD) indicates the head of each page table, and each page table is managed by the table set 143. Details of the page directory will be described later. By being initialized, MEM-P
For each of the 0 area 221 and the MEM-P area 222, each entry of the page directory has a base physical address of a page table (PT) indicated by an offset from the beginning of a page in which data is stored, a predetermined page size (for example, 4 MB), user access not possible, read / write possible, page valid, and other information are set.

Kernel and direct map area acquisition unit 130
After the processing by the
When the software 0 starts, the process management unit 200
A new process (hereinafter, for example, process A
Virtual address space 141 for the process
On the basis of the above, an entry is made to the table managed by the table set 143 for direct mapping to the map area.

Next, the process of initializing the page directory for the process in the virtual memory area, which is executed by the direct map virtual memory area process initialization unit 132 when the process of FIG. 7 is started, will be described with reference to FIG. FIG. 9 is a flow chart for explaining the processing in the direct map virtual memory area process initialization unit.

In FIG. 9, the direct map virtual memory area process initialization unit 132 initializes the page directory entry corresponding to the process (step S3).
1) Initialize a local descriptor table that identifies the process (step S32).

Then, the size of the page directory for the MEM-P area 222 and user accessibility are designated, and a page directory entry is set in the page directory for the MEM-P area in the virtual memory area (step S33). A physical address of the page is set in each page directory entry for the MEM-P area 222, which allows the page to be accessed at high speed.

Further, the direct map virtual memory area process initialization unit 132 specifies the size of the page directory for the MEM-P0 area 221 and the user inaccessibility to specify the page directory for the MEM-P0 area in the virtual memory area. The page directory entry is set to (step S34). In each page directory entry for the MEM-P0 area 221, a physical address of a page table for managing pages is further set. Then, the initialization process of the page directory for the process A ends.

By this processing, the MEM-P0 area 22
Each page directory entry of the page directory for 1 remains inaccessible from the process, but each page directory entry of the page directory for the MEM-P area 222 can be accessed from the process. .

Next, the generated process A uses M for directly accessing the data required for the process A.
The EM-P0 area 221 is secured by a system call. FIG. 10 is a flowchart for explaining the map processing to the MEM-P0 area. In FIG. 10, for example, the process A uses the system call
When the acquisition of the M-P0 area information is instructed, the system call processing unit 240 activates the MEM-P0 area information acquisition unit 241. The MEM-P0 area information acquisition unit 241 acquires the start address of the page table (step S41),
In addition, the size of the page table is acquired (step S
42).

Subsequently, it is determined whether or not a page directory entry (PDE) for the size has been set (step S43). If the settings for the size have been completed, ME
The processing in the M-P0 area information acquisition unit 241 ends. On the other hand, if the setting for the size has not been completed, it is further determined whether or not the page table is allocated (step S44). If there is an allocation, the process proceeds to step S46. On the other hand, if there is no allocation, the page table is allocated (step S45).

In step S46, the MEM-P0 memory map unit 243 sets a page table entry (PTE) indicating that the user is accessible (step S4).
6), secure the page (step S47). In the page table entry, a base physical address indicating the top of the page, user accessible, read / write enabled, existing, etc. are set. By this processing, the mapping of a partial area in the MEM-P0 area 221 by the program A into the MEM-P0 area 13 of the physical memory 10 is completed.

Further, as a result of the above processing, the program B is transferred from the MEM-P0 area 221 to the MEM- of the physical memory 10.
By mapping to the P0 area 13, access by the program B becomes possible. At the time of memory mapping by the program B, the same area as the area mapped by the program A (MEM-P0 area 1 of the same physical memory 10)
Program A by mapping the area above 3)
Also, the program B can access the area, and the area can be shared.

FIG. 11 is a diagram showing the relationship between virtual addresses and tables in the direct map area. In FIG. 11A, the relationship between the MEM-P virtual address and the table is shown. The MEM-P virtual address 41 is composed of a page directory (PD) offset and a page offset.

In the page directory 42 used for MEM-P, a page size of a predetermined length (for example, 4
A page directory entry (PDE) indicating each page base physical address and the like is managed in M bytes.
The position of the page directory entry is determined by adding the PD offset of the MEM-P virtual address 41 to a predetermined base physical address of the page directory 42.

Further, in the page 43 pointed to by the page directory entry, reference data actually referenced by the process is stored in predetermined page units (for example,
4 Mbytes). The reference data is determined by adding the page offset of the MEM-P virtual address 41 to the base physical address set in the page directory entry.

The MEM-P0 virtual address 51 is composed of a page directory (PD) offset, a page table (PT) offset, and a page offset. Page directory 5 used for MEM-P0
2, the page directory entry (PDE) indicating the base physical address and the like of each page table 53 is managed with a page size of a predetermined length (for example, 4 Mbytes). The position of the page directory entry is MEM at a predetermined base physical address of the page directory 52.
-It is determined by adding the PD offset of the virtual address 51 for P0.

In the page table (PT) 53 pointed to by the page directory entry, the base physical address of each page 54 in which the reference data actually referred to by the process is stored with a predetermined page size (for example, 4 Mbytes). A page table entry (PTE) indicating the like is managed. The position of the page table entry is determined by adding the PT offset of the MEM-P0 virtual address 51 to a predetermined base physical address of the page table 53.

In the page 54 pointed to by the page table entry, reference data actually referred to by the process is stored in a predetermined page unit (for example, 4 Kbytes). Each page size of the reference data page 54 in the MEM-P0 area is smaller than each page size of the page 43 in the MEM-P area. The reference data is determined by adding the page offset of the MEM-P0 virtual address 51 to the base physical address set in the page table entry.

Next, the page directory entry and page table entry will be described with reference to FIG. 12
From (A), page directory entry (PDE)
Has a size of 32 bits, and has a base physical address of the page table, a page size, user availability, read / write availability, and a flag indicating presence / absence. The flag indicating the user availability is set to the user availability when the page directory entry for the MEM-P area is set in step S33 of FIG.

Therefore, it is possible to directly access the area on the physical memory indicated by the base physical address of the page table of the page directory entry from the processor. In this case, the page table is actually a page in which data is stored. On the other hand, when setting the page directory entry for the MEM-P0 area, FIG.
In step S34, the user disabling is set.

As shown in FIG. 12B, the page table entry (PTE) has a base physical address of the page, user availability, read / write availability, and a flag indicating presence / absence. The page table entry is made by the system call according to the flowchart of FIG.
It is set for the M-P0 area, and is set to be usable by the user in step S46.

The paging method as described above uses Int
based on EL80x86 (registered trademark), but C
The MEM-P area 14 that can be directly accessed by the PU 1304 and the process can make a system call via the IMH 1229 so that the process can map to the MEM-P0 area 13 that can be directly mapped. However, it has a feature.

An example of data sharing between processes realized by the above address space and processing is shown in FIG.
3 and FIG. FIG. 13 and FIG. 14 are diagrams showing an example up to the sharing of data between processes.

FIG. 13A is a diagram showing the relationship between the virtual memory area of process A and the physical memory when the process is started. From FIG. 13A, when the process A is started, the ME
Access to the MP region 222 is possible (step S31 in FIG. 9), but access to the MEM-P0 region 221 is not possible (step S32 in FIG. 9).

Next, the process A makes a system call, and the MEM-P0 memory map unit 243 makes M
When a part of the EM-P0 area is mapped, for example, FIG.
As shown in (B), the area 221a can be accessed by the process A.

When the process B is activated during the operation of the process A, the MEM-P area 22 is activated in the same manner as when the process A is activated.
Access to 2 will be possible. Further, when a system call is made, the MEM-P0 memory map unit 243
When a part of the MEM-P0 area 221 is mapped, the area 221b can be accessed by the process B, for example, as shown in FIG.

In this case, the process A and the process B are
Another area in the MEM-P0 area 221 is mapped and used. Therefore, the process A cannot access the area 221b mapped by the process B, and the process B cannot access the area 221a mapped by the process A.

Furthermore, the process B maps the same area 221a mapped by the process A by a system call (FIG. 14B). As a result, the process A and the process B can access the same area of the physical memory. Therefore, process A and process B
The area can be shared by and.

In the above example, the memory sharing between two processes is illustrated, but the same area may be shared by two or more processes. Therefore, it is possible to reduce the waste of the area due to mapping the same data to different virtual memory areas for each process, and it is not necessary to repeatedly transfer the same data.

In this embodiment, the processing of the compound machine 1200 has been mainly described, but the information processing apparatus 2 shown in FIGS.
000 can be easily applied. Information processing device 200
0, the application 2210-1 to 2210-n and other programs replace the IMH 1299 of FIG.
0 will be instructed.

[0133]

As described above, according to the present invention described in claims 1 to 5, the process is directly mapped from the virtual memory area of the process to the memory by the system call without using the operating system. can do. Further, a plurality of processes can share the same area by mapping the same area.

Further, according to the present invention as set forth in claims 6 to 12, direct access to the memory by the processor can be made from the page directory entry without going through the operating system, and the process can be performed by making a system call. It is possible to perform mapping on the memory without using the operating system, and to access the memory from the page table entry.

Further, according to the present invention as set forth in claims 13 to 16, it is possible to provide the memory mapping method in the image forming apparatus as described above.

[0136]

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of an information processing device according to the present invention.

FIG. 2 is a hardware configuration diagram of an embodiment of an information processing device according to the present invention.

FIG. 3 is a diagram showing an example in which a conventional process directly maps to a virtual memory area.

FIG. 4 is a block diagram showing a functional configuration of a compound machine that combines various image forming functions according to an embodiment of the present invention.

5 is a block diagram showing a hardware configuration of the compound machine shown in FIG.

FIG. 6 is a diagram showing a correspondence between a physical memory and a virtual storage space.

FIG. 7 is a functional configuration diagram for realizing memory sharing between processes.

FIG. 8 is a flowchart diagram illustrating a process in a direct map direct map area acquisition unit.

FIG. 9 is a flowchart diagram illustrating a process in a direct map virtual memory area process initialization unit.

FIG. 10 is a flow chart diagram for explaining the map processing to the MEM-P0 area.

FIG. 11 is a diagram showing a relationship between a virtual address and a table in a direct map area.

FIG. 12 is a diagram for explaining a page directory entry and a page table entry.

FIG. 13 is a diagram illustrating an example of sharing data between processes.

FIG. 14 is a diagram illustrating an example of sharing data between processes.

[Explanation of symbols]

130 Direct Map Area Acquisition Unit, 240 System Call Processing Unit, 243 MEM-P0 Memory Map Unit, 1200 Fusion Machine, 1210 Software Group, 1230 Application, 1220 Platform, 1221 OS, 1222 SC
S, 1223 SRM, 1224 EC
S, 1225 MCS, 1226 OC
S, 1227 FCS, 1228 NC
S, 1229 IMH, 1231 FC
UH, 1240 Multifunction machine starting part, 1300 controller, 1301 AS
IC, 1302 MEM-C, 1303 HD
D, 1304 CPU, 1305 N
B, 1306 MEM-P, 1307 S
B, 1308 AGP, 1309 network I / F controller, 1310 operation panel, 1320 fax control unit, 1330 USB device, 1340 IEEE 1394 device, 1350 engine part, 2000 information processing device, 2110, 2540 memory device, 2120, 251
0 input device, 2130, 2520 display device, 2230 operating system (OS), 2240 BIOS, 2250 device driver, 2530 auxiliary storage device, 2550 arithmetic processing device

Claims (16)

[Claims] 1. An information processing apparatus that maps a memory to a process of an application that performs information processing, and an area acquisition unit that acquires a direct map area that can be directly mapped by the process on the memory, and is designated by the process. An information processing apparatus, comprising: a direct map means for directly mapping from a virtual memory area of the process to the predetermined area by a physical address indicating a predetermined area in the direct map area. 2. The information processing apparatus according to claim 1, wherein the direct map means maps the virtual memory area of the operating system to the predetermined area in the direct map area by a system call. An information processing apparatus characterized by directly activating means. 3. The information processing apparatus according to claim 2, wherein the system call is performed by calling a sysarch function. 4. The information processing apparatus according to claim 1, wherein two or more processes specify the same physical address so that the same predetermined area is shared between the processes. An information processing device characterized by: 5. The information processing apparatus according to claim 1, wherein the process specifies the physical address by an offset value indicating the predetermined area in the direct map area. An information processing device characterized by: 6. An information processing apparatus for mapping a memory to a process of an application for performing information processing, wherein the virtual memory area of the process can be directly mapped onto the memory, and direct access by a processor is possible. First map area acquisition means for acquiring one direct map area on the memory, and a physical address indicating a predetermined first area of the first direct map area acquired by the first map area acquisition means is set in the page directory entry. By so doing, there is provided a first map means for directly mapping from the virtual memory area of the process to the predetermined first area, the information processing apparatus. 7. The information processing apparatus according to claim 6, wherein the process acquires a second map area on the memory that enables direct mapping from the virtual memory area of the process onto the memory. By setting the physical address indicating the predetermined second area of the second direct map area acquired by the second map area acquiring means by the second map area acquiring means and the system call by the above process in the page table entry, An information processing apparatus comprising: a second map means for directly mapping from a virtual memory area of a process to the predetermined second area. 8. The information processing device according to claim 7, wherein the second map means is a predetermined second area of the second direct map area from a virtual memory area of the process included in an operating system by a system call. An information processing apparatus characterized by directly activating map processing means for mapping to. 9. The information processing apparatus according to claim 6, wherein the first map means sets the first map area to a unit of a first predetermined page length for the process. Then, the second map means maps the second map area to the process in units of a second predetermined page length from the virtual memory area of the process. An information processing device characterized by: 10. The information processing apparatus according to claim 9, wherein the first predetermined page length unit is larger than the second predetermined page length unit. 11. The information processing apparatus according to claim 9, further comprising page unit determination means for determining whether or not the first predetermined page length unit is supported when the operating system is activated, the page unit Based on the determination result by the determination means, the first map area acquisition means, the first map means,
An information processing device which enables the second map area acquisition means and the second map means. 12. The information processing apparatus according to claim 6, wherein the memory is used for drawing. 13. A memory mapping method for mapping a memory to a process of an application for performing information processing, the method being capable of directly mapping from a virtual memory area of the process onto the memory and enabling direct access by a processor. A first map area acquisition procedure for acquiring one direct map area on the memory, and a physical address indicating a predetermined first area of the first direct map area acquired by the first map area acquisition means is set in the page directory entry. And a first mapping procedure for directly mapping from the virtual memory area of the process to the predetermined first area. 14. The memory mapping method according to claim 13, wherein the first mapping step sets a flag indicating that the page directory entry can be used by a user. 15. The memory mapping method according to claim 13, wherein the process acquires a second map area on the memory, which enables direct mapping from the virtual memory area of the process onto the memory. By setting the physical address indicating the predetermined second area of the second direct map area acquired by the second map area acquisition procedure by the second map area acquisition procedure and the system call by the above process in the page table entry, A second mapping procedure for directly mapping from the virtual memory area of the process to the predetermined second area. 16. The memory mapping method according to claim 15, wherein in the second mapping step, a flag indicating that the user can use the page table entry is set.