JP2003051664A - Mounting structure of chip component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a mounting structure of a chip component, capable of increasing a mounting density by using a small-sized chip component. SOLUTION: A conductive pattern 2 having a wide width part 2a is provided on a printed substrate 1, a peripheral edge of the part 2a is covered with a solder resist layer 4 so as to form a land 3 specified by an opening 4a in the part 2a, and both electrodes 5a of the chip component 5 are soldered onto such a land 3 by using a cream solder 6. Here, the relation W1>=W2>W3 is set, where W1 is the width size of the component 5, W2 is a width size of the part 2a, and W3 is the width size of the land 3. Thus, a pitch P between the components of the adjacent components 5 is narrowed markedly, and hence the small-sized components 5 are mounted at high density, in a limited space on the substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip part mounting structure suitable for use in various electronic devices such as portable high-frequency devices.

[0002]

2. Description of the Related Art Conventionally, in electronic devices such as portable high frequency devices, a mounting structure has been widely adopted in which chip parts such as resistors and capacitors are soldered onto lands of a printed circuit board. FIG. 5 is a plan view of such a chip component mounting structure, and FIG. 6 is a sectional view thereof.

As shown in these figures, the printed circuit board 2
0 is provided with a conductive pattern 21 made of copper foil or the like, and a solder resist layer 23 is formed except for the land 22 at the end of the conductive pattern 21. Direction electrode portions 24a
Are soldered onto the land portion 22 using cream solder 25. A wide portion 21a is formed at the end of the conductive pattern 21, and the solder resist layer 23 has an opening 23a that is slightly larger than the wide portion 21a. That is, the solder resist layer 23 is formed by printing on the wide portion 21a and a portion except the periphery thereof, and the wide portion 21a of the conductive pattern 21 exposed from the opening 23a of the solder resist layer 23 serves as the land portion 22. A positioning mark (not shown) is also formed at the corner of the printed circuit board 20 when the conductive pattern 21 is formed.
Each chip component 24 is positioned on a predetermined land portion 22 with this positioning mark as a reference.

In the mounting structure of the chip component constructed as described above, first, each land portion 2 of the printed circuit board 20.
After the cream solder 25 is formed on the electrode 2 by printing or the like, the electrode parts 2 at both ends of each chip part 24 are formed by using an automatic mounter device.
4a is placed on the corresponding land portion 22. At this time, if the positioning marks formed on the printed circuit board 20 are image-recognized by the automatic mounter device, each chip component 24 can be positioned at a predetermined position based on the positioning marks as described above. Then, when the printed circuit board 20 is transferred to a reflow oven and the cream solder 25 is melted, the electrode parts 24a of the chip parts 24 are soldered to the land parts 22, respectively.
Can be mounted at a predetermined position on the printed circuit board 20.

[0005]

In recent years, there has been a demand for downsizing in electronic equipment such as portable high-frequency equipment. In order to meet such a demand, in the above-mentioned prior art, the chip component 24 is Although the pitch between the components was narrowed and chip components smaller than the current one were used, as further miniaturization is promoted, all the circuit components including each chip component 24 are limited on the printed circuit board 20. It cannot be mounted in a space. That is, since the width dimension of the land portion 22 is set to be larger than the width dimension of the chip component 24 and the opening 23a of the solder resist layer 23 is set to be larger than the land portion 22, for example, the outer dimension (long dimension) Even if a very small chip component having a size (width × width) of about 0.6 × 0.3 mm is used, the pitch P between the adjacent chip components 24 cannot be reduced to 0.1 mm or less.

Further, in the above-mentioned conventional technique, the opening 23a of the solder resist layer 23 has the wide portion 21 of the conductive pattern 21.
Since it is set larger than a, the solder resist layer 2
When the printing mask used for forming 3 is displaced with respect to the conductive pattern 21, for example, as shown in FIG. The area S1 of the conductive pattern 21 exposed in the opening 23a is larger than the area S2 of the conductive pattern 21 exposed in the lower opening 23a.
The substantial area of one land 22 becomes non-uniform. As a result, when the cream solder 25 formed on such a land portion 22 is melted, the chip component 24 is pulled to the side of the land portion 22 having a substantially large area, and in particular, to a small chip component 24. Correspondingly wide part 21
When the area of a becomes small, the change in the areas S1 and S2 described above significantly affects the substantial area of the land portion 22, so that the chip component 24 is pulled toward one of the land portions 22 and stands up. There was a risk of mounting failure.

The present invention has been made in view of the circumstances of the prior art as described above, and an object thereof is to provide a mounting structure for chip parts which can increase the mounting density by using small chip parts. It is in.

[0008]

In order to achieve the above object, in a mounting structure for a chip component according to the present invention, a printed circuit board having a conductive pattern and a land portion, and a chip component soldered to the land portion are provided. And the land portion is formed of a solder resist layer that covers the periphery of the wide portion of the conductive pattern, the width dimension of the chip component is W1, the width dimension of the wide portion is W2, and the width dimension of the land portion. Let W3 be W3 ≧ W2>
The relationship was set to W3.

According to the chip component mounting structure thus configured, the land portion is formed inside the wide portion of the conductive pattern, and the land portion and the wide portion are set to be equal to or smaller than the width dimension of the chip component. Therefore, the pitch between adjacent chip components can be significantly narrowed, and the area of each land does not change even if the solder resist layer is slightly displaced from the conductive pattern. It is possible to prevent a defect of being pulled up and standing up.

In the above structure, it is preferable that the width dimension W1 of the chip component and the width dimension W2 of the wide portion are set to the same dimension in order to sufficiently secure the peel strength of the wide portion with respect to the printed circuit board.

Further, in the above structure, if the positioning mark of the chip component provided on the printed circuit board is formed by a part of the solder resist layer, the solder resist layer may be slightly displaced with respect to the wide portion of the conductive pattern. However, since no relative displacement occurs between the land portion and the positioning mark, each chip component can be accurately positioned on the predetermined land portion with the positioning mark as a reference.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a plan view showing a mounting structure of a chip part according to the embodiment, FIG. 2 is a sectional view thereof, and FIG. 3 is a print. FIG. 4 is an explanatory diagram of the substrate, and FIG. 4 is an explanatory diagram showing a positional deviation state between the land portion and the positioning mark.

As shown in FIGS. 1 and 2, a printed circuit board 1
A conductive pattern 2 made of copper foil or the like is provided on the top of the conductive pattern 2, and a solder resist layer 4 is formed on the conductive pattern 2 except for the land portions 3 at the end portions thereof. The electrode portions 5a at both ends are soldered onto the land portions 3 using cream solder 6, respectively. The conductive pattern 2 has a wide portion 2a at the end,
The solder resist layer 4 is formed by printing or the like so as to cover the peripheral portion of the wide portion 2a except the central portion. That is, the solder resist layer 4 has an opening 4a smaller than the wide portion 2a, and the opening 4a defines the land portion 3 inside the wide portion 2a.

Here, the width dimension of the chip component 5 to be soldered on the land portion 3 is W1, and the width dimension of the wide portion 2a is W.
2. If the width dimension of the land portion 3 is W3, the relationship W1 ≧ W2> W3 (1) is established. In the case of the present embodiment example, W1 = 0.3 mm, W2 =, because the very small chip component 5 having an outer dimension of 0.6 × 0.3 mm is used.
By setting 0.3 mm and W3 = 0.24 mm, the above formula (1) is satisfied. In addition, the pitch P between adjacent chip components 5 is set to 0.08 mm, and
Since 1 = W2, the arrangement pitch of the adjacent wide portions 2a is also set to 0.08 mm.

As shown in FIG. 3, positioning marks 7 are formed on the corners of the printed circuit board 1, and each chip component 5 is positioned on a predetermined land portion 3 with reference to the positioning marks 7. It is supposed to be done. The positioning mark 7 is composed of a part of the solder resist layer 4. Specifically, after the conductive pattern 2 is formed on the printed board 1, a printing mask (not shown) is formed on the printed board 1. By printing the solder resist layer 4 on top of each other, the positioning marks 7 are formed on the solder resist layer 4
It is formed at the same time. At this time, the printing mask is slightly displaced from the printed circuit board 1 (conductive pattern 2),
As shown in FIG. 4, even if the opening 4a of the solder resist layer 4 is displaced to the position shown by the chain double-dashed line inside the wide portion 2a,
Since the size of the land portion 3 defined by the opening 4a does not change, the two land portions 3 forming a pair are maintained in the same area. Further, since the positioning mark 7 is formed at the same time as the solder resist layer 4, the positioning mark 7 is also displaced to the position shown by the chain double-dashed line in FIG. There is no relative displacement between the position and 7.

In the chip component mounting structure thus constructed, first, cream solder 6 is formed on each land portion 3 of the printed board 1 by printing or the like, and then each chip component 5 is formed by using an automatic mounter device. The electrode portions 5a at both ends of are placed on the corresponding land portions 3. At that time, if the positioning mark 7 is image-recognized by the automatic mounter and each chip component 5 is mounted at a predetermined position with the positioning mark 7 as a reference, the land portion 3 and the positioning mark 7 are relatively positioned. Since there is no physical displacement, each chip component 5 can be positioned on the corresponding land portion 3 with high accuracy. Then, when the printed circuit board 1 is transferred to a reflow oven and the cream solder 6 is melted, both electrode parts 5a of each chip part 5 are soldered to the land part 3, so that each chip part 5 is placed on the printed circuit board 1. It can be securely mounted at a predetermined position.

According to the above embodiment, the land portion 3 is formed inside the wide portion 2a of the conductive pattern 2, and the width dimension W2 of the wide portion 2a and the width dimension W3 of the land portion 3 are the same as those of the chip component 5. Since the width dimension is set to W1 or less, the pitch P between the adjacent chip components 5 can be significantly narrowed, and the area of each land 3 does not change even if the solder resist layer 4 is slightly displaced. Therefore, it is possible to reliably prevent the defect that the chip component 5 is pulled up to the one land portion 3 side and stands up. In addition, since the positioning mark 7 of the chip component 5 is formed by a part of the solder resist layer 4, the solder resist layer 4 has the wide portion 2 of the conductive pattern 2.
Even if the position is slightly displaced with respect to a, no relative displacement occurs between each land portion 3 and the positioning mark 7, and each chip component 5 is fixed to the predetermined land portion based on the positioning mark 7. 3 can be positioned with high precision.

[0018]

The present invention is carried out in the form as described above, and has the following effects.

Since the land portion is formed inside the wide portion of the conductive pattern, and the land portion and the wide portion are set to be equal to or smaller than the width dimension of the chip component, the pitch between adjacent chip components can be significantly narrowed. Moreover, even if the solder resist layer is slightly displaced from the conductive pattern, the area of each land portion does not change, so that it is possible to prevent a defect that the chip component is pulled up to one land portion side and stands up. Therefore, small chip components can be mounted at high density in a limited space on the printed board.

[Brief description of drawings]

FIG. 1 is a plan view showing a mounting structure for a chip component according to an embodiment.

FIG. 2 is a sectional view of a mounting structure for the chip component.

FIG. 3 is an explanatory diagram of a printed circuit board.

FIG. 4 is an explanatory diagram showing a positional deviation state between a land portion and a positioning mark.

FIG. 5 is a plan view showing a mounting structure of a chip part according to a conventional example.

FIG. 6 is a cross-sectional view of a mounting structure for the chip component.

FIG. 7 is an explanatory diagram showing a problem caused by a positional deviation of a solder resist layer.

[Explanation of symbols]

1 printed circuit board 2 Conductive pattern 2a wide part 3 land section 4 Solder resist layer 4a opening 5 chip parts 5a electrode part 6 cream solder 7 Positioning mark

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Kanako Yokoyama             1-7 Aki, Otsuka-cho, Yukiya, Ota-ku, Tokyo             Su Electric Co., Ltd. F-term (reference) 5E319 AA03 AA06 AB05 AC01 AC11                       BB05 CC33 GG01                 5E338 BB75 CD33 DD16 DD32 EE23                       EE43

Claims (3)

[Claims] 1. A printed circuit board having a conductive pattern and a land portion, and a chip component soldered to the land portion, the land portion being formed by a solder resist layer covering a peripheral edge of a wide portion of the conductive pattern. Together
When the width dimension of the chip part is W1, the width dimension of the wide portion is W2, and the width dimension of the land portion is W3, these dimensions are set to satisfy a relation of W1 ≧ W2> W3. Mounting structure for chip parts to be used. 2. The chip component mounting structure according to claim 1, wherein the width dimension W1 of the chip component and the width dimension W2 of the wide portion are set to the same dimension. 3. The positioning mark of the chip component is provided on the printed circuit board according to claim 1, and the positioning mark is formed by a part of the solder resist layer. Mounting structure for chip parts.