JP2002311857A - Light emission device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emission device capable of simultaneously satisfying the suppressing of the change of a gate voltage due to leakage or the like and the suppressing of the lowering of an opening ratio. SOLUTION: In this device, a storage capacitor is formed by the gate electrode of a TFT(thin film transistor) which is had by a pixel, a wiring (connection wiring) which is formed on an activated layer and is connected to the activated layer, an insulation film which is formed on the connection wiring and a wiring (capacitance wiring) which is formed of the insulation film. Since the TFT and the storage capacitor can be formed by being overlapped with this constitution, the capacitance value of the storage capacitor can be made large while suppressing the lowering of the opening ratio. As a result, since the change of the gate voltage due to the leakage or the like can be suppressed, the change of luminance of OLEDs(organic light emitting diodes) is suppressed and flickering of a screen can be suppressed in analog drive.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an OLED formed on a substrate, wherein the OLED is sealed between the substrate and a sealing material.
It relates to an LED panel. Also, the OLED panel has an IC
The present invention relates to an OLED module on which is mounted. In this specification, the OLED panel and the OLED module are collectively referred to as a light emitting device. The invention further relates to an electronic device using the light emitting device.

[0002]

2. Description of the Related Art An OLED emits light by itself and has high visibility, and does not require a backlight necessary for a liquid crystal display device (LCD). Therefore, the OLED is suitable for thinning and has no restriction on a viewing angle. Therefore, in recent years, OLED (Organic Light Emitting
Light-emitting devices using Diodes have attracted attention as display devices replacing CRTs and LCDs.

[0003] An OLED has a layer containing an organic compound capable of obtaining luminescence (Electro Luminescence) generated by applying an electric field (hereinafter, referred to as an organic light emitting layer), an anode layer, and a cathode layer. The luminescence of an organic compound includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission (phosphorescence) when returning from a triplet excited state to a ground state. In the light emitting device of the present invention, ,
Fluorescence and / or phosphorescence can be used.

[0004] In this specification, all layers provided between the anode and cathode of an OLED are defined as organic light-emitting layers.
The organic light emitting layer specifically includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, an OLED has a structure in which an anode / light-emitting layer / cathode is laminated in this order. In addition to this structure, an anode / hole injection layer /
It may have a structure in which a light emitting layer / cathode or an anode / hole injection layer / light emitting layer / electron transport layer / cathode are stacked in this order.

As a driving method of a light emitting device having an OLED, there is a driving method called an analog driving using an analog video signal (hereinafter, referred to as an analog video signal).

In analog driving, an analog video signal (analog video signal) is input to a gate electrode of a TFT (driving TFT) for controlling a current flowing through the OLED. The driving T is determined by the potential of the analog video signal.
When the magnitude of the drain current of the FT is controlled and the drain current flows to the OLED, the OLED emits light at a luminance corresponding to the magnitude of the current, and a gradation is displayed.

In the above-described analog drive, the OLED
The manner in which the amount of current supplied to the TFT is controlled by the gate voltage of the driving TFT will be described in detail with reference to FIG.

FIG. 19 is a graph showing the transistor characteristics of the driving TFT, and shows the I _DS -V _GS characteristics (or I _DS -V _GS characteristics).
Curve). Here, I _DS is a drain current, and V _GS is a voltage (gate voltage) between the gate electrode and the source region. V _TH is a threshold voltage, and V∞ is V _GS
Is infinite. From this graph, the amount of current flowing for an arbitrary gate voltage can be known.

The drain current is determined one-to-one with respect to the gate voltage according to the I _DS -V _GS characteristics shown in FIG. That is, the drain current is determined in accordance with the potential of the analog video signal input to the gate electrode of the driving TFT, and the drain current flows to the OLED, and the OLED emits light with a luminance corresponding to the amount of the current.

[0010]

Assuming that the voltage between the source region and the drain region is V _DS , the driving T shown in FIG.
The transistor characteristics of the FT are determined by the values of V _GS and V _DS.
Divided into two areas. The region where | V _GS −V _TH | <| V _DS | is the saturation region, and the region where | V _GS −V _TH |> | V _DS | is the linear region.

The following equation 1 is satisfied in the saturation region. Here, β = μC ₀ W / L, μ is the mobility, C ₀ is the gate capacitance per unit area, and W / L is the ratio of the channel width W to the channel length L of the channel formation region.

[0012]

[Equation 1] _{I DS = β (V GS -V} TH) 2/2

[0013] As can be seen from equation 1, the current value in the saturation region is hardly changed by V _DS, the current value is determined only by the V _GS. Therefore, grayscale control based on the potential of an analog signal is relatively easy. In general, in analog driving, a driving TFT is operated mainly in a saturation region.

However, in the saturation region, as apparent from FIG. 19, the drain current changes exponentially with respect to the change in the gate voltage. Therefore, in the analog driving, a situation may occur in which the drain current greatly changes if the gate voltage slightly changes due to leakage or the like between the input of the analog video signal and the input of the next analog video signal. . If the change in the drain current is large, the luminance of the OLED also changes greatly with the change, so that a problem that the screen appears to flicker may occur depending on the frame frequency.

In order to avoid the above problem, it is important to hold the gate voltage securely. As a means for more reliably holding the gate voltage, a method of increasing the capacitance value of the storage capacitor can be considered. However, when the storage capacitance is increased, the aperture ratio is reduced, and the area where light emission is actually obtained (effective emission area) in the pixel is reduced. Note that the effective light-emitting area refers to an area of a pixel electrode included in the OLED which is not blocked by light which does not transmit light such as a TFT and a wiring formed on a substrate, of the OLED.

In particular, in recent years, there has been an increasing demand for higher definition of images, and it has been an issue how to suppress a decrease in aperture ratio due to higher definition of pixels. Therefore, it is not preferable to increase the area occupied by the storage capacitor in the pixel.

The present invention has been made in view of the above problems, and has as its object to provide a light emitting device that satisfies both suppression of a change in gate voltage due to leakage and the like and suppression of a decrease in aperture ratio.

[0018]

According to the present invention, in order to solve the above-mentioned problems, a wiring (connection wiring) formed on a gate electrode and an active layer of a TFT included in a pixel and connected to the active layer is provided. A storage capacitor was formed by the insulating film formed on the connection wiring and the wiring (capacitance wiring) formed on the insulating film. Note that the capacitor wiring may be formed on the same interlayer insulating film together with the pixel electrode. in this case,
The capacitor wiring and the pixel electrode may be formed from the same conductive film. Further, a power supply line may be used as a capacitor wiring.

With the above structure, the TFT and the storage capacitor can be formed so as to overlap with each other, so that the capacitance value of the storage capacitor can be increased while suppressing a decrease in the aperture ratio.
Therefore, a change in gate voltage due to a leak or the like can be suppressed, so that a change in the luminance of the OLED in analog driving can be suppressed, and flickering of the screen can be suppressed.

Suppressing a decrease in the aperture ratio leads to a reduction in the effective light emitting area of the pixel. The larger the effective light-emitting area, the higher the brightness of the screen. Therefore, power consumption can be reduced by the structure of the present invention.

The configuration of the present invention can be used even in the case of digital driving.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of the present invention will be described below.

In the light-emitting device of the present invention, a plurality of pixels are provided in a pixel portion in a matrix. A connection configuration of a TFT included in a pixel of the present invention will be described with reference to FIG.

A region having one of the source lines (S), one of the gate lines (G), and one of the power supply lines (V) is a pixel 1
Equivalent to 00. Each pixel is a switching TFT 101
, A driving TFT 102, an OLED 103, and a storage capacitor 104.

The gate electrode of the switching TFT 101 is connected to a gate line (G). One of a source region and a drain region of the switching TFT 101 is connected to the source line (S), and the other is connected to the gate electrode of the driving TFT 102.

One of the source region and the drain region of the driving TFT is connected to the power supply line (V), and the other is connected to the OLED 103.
Pixel electrodes. When the anode of the OLED 103 is used as a pixel electrode, the cathode is called a counter electrode. Conversely, when the cathode of the OLED 103 is used as a pixel electrode, the anode is called a counter electrode.

The switching TFT 101 may be either a p-channel TFT or an n-channel TFT. The driving TFT 102 is also a p-channel type TF
Either T or n-channel TFT may be used. However, when the anode is used as the pixel electrode, the driving TFT is preferably a p-channel TFT. Conversely, when the cathode is used as a pixel electrode, the driving TFT is preferably an n-channel TFT.

One of the two electrodes of the storage capacitor is electrically connected to the gate electrode of the driving TFT 102, and the other is electrically connected to the power supply line (V).

Next, a specific configuration of the storage capacitor in the light emitting device of the present invention will be described with reference to FIG. 10
1 is a switching TFT and 102 is a driving TFT, each of which is formed on an insulating surface.

Active layer 13 of switching TFT 101
0 has impurity regions 110 and 111 functioning as a source region or a drain region. Further, the gate electrode 1 is formed on the active layer 130 with the gate insulating film 116 interposed therebetween.
14 are formed.

The active layer 131 of the driving TFT 102 has impurity regions 112 and 113 functioning as a source region or a drain region. The gate insulating film 116
The gate electrode 115 is formed on the active layer 131 with a space therebetween.

Switching TFT 101 and driving TF
Active layers 130 and 131 of T102 and gate electrode 11
A first interlayer insulating film 133 and a second interlayer insulating film 117 are formed so as to cover the gate insulating films 116 and 115 and the gate insulating film 116. In FIG. 2, a two-layer interlayer insulating film of the first interlayer insulating film 133 and the second interlayer insulating film 117 is formed, but the number of interlayer insulating films may be one. On the second interlayer insulating film 117, a source line (S), connection wirings 118 and 119, and a power supply line (V) are formed.

The source line (S) has a first interlayer insulating film 133,
It is connected to impurity region 110 via contact holes formed in second interlayer insulating film 117 and gate insulating film 116. The connection wiring 118 is formed of the first interlayer insulating film 1.
33, the second interlayer insulating film 117 and the gate insulating film 116
Impurity region 11 through a contact hole formed in
1 is connected.

The connection wiring 119 is formed of the first interlayer insulating film 13
Third, it is connected to the impurity region 112 via a contact hole formed in the second interlayer insulating film 117. Also,
The power supply line (V) is connected to the impurity region 113 via contact holes formed in the first interlayer insulating film 133 and the second interlayer insulating film 117.

The connection wiring 118 is provided between the second interlayer insulating film 11
7. The active layer 130 overlaps the first interlayer insulating film 133 and the gate insulating film 116.

The source line (S) and the connection lines 118 and 11
9 and a second interlayer insulating film 11 so as to cover the power supply line (V).
A third interlayer insulating film 120 is formed on 7. Then, the capacitor wiring 121 and the pixel electrode 1 are formed on the third interlayer insulating film 120.
22 are formed.

The pixel electrode 122 is connected to the connection wiring 119 via a contact hole formed in the third interlayer insulating film 120.

In the present invention, the connection wiring 118 and the capacitance wiring 1
The storage capacitor 104 is formed in a portion where the third interlayer insulating film 120 is formed between the storage capacitor 104 and the storage capacitor 104. Since the capacitor wiring 121 can be formed using the same conductive film as the pixel electrode 122, a storage capacitor can be formed without increasing the number of steps. Switching TFT
Since the storage capacitor 104 is formed so as to overlap with the active layer 130 of 101, a decrease in the aperture ratio can be suppressed even when the storage capacitor is formed.

The fourth interlayer insulating film 1 is formed on the third interlayer insulating film 120 so as to cover the capacitor wiring 121 and the pixel electrode 122.
25 are formed. The fourth interlayer insulating film 125 is partially etched, so that the pixel electrode 122 is exposed.

The pixel electrode 122 and the fourth interlayer insulating film 1
The organic light emitting layer 123 and the counter electrode 124 are sequentially laminated so as to cover the pixel electrode 122 and the organic light emitting layer 12.
3 and the opposing electrode 124 are overlapped with OLE.
This corresponds to D103.

In the present invention, the TFT is not limited to the structure shown in FIG. In the present invention, the connection wiring 1
18 and the storage capacitor 10 formed using the capacitor wiring 121.
In addition to 4, the storage capacitor having another configuration may be provided.

In the pixel structure disclosed in the present invention, since the connection wiring 118 is formed so as to overlap with the active layer of the switching TFT 101, light emitted from the OLED and light incident from the outside of the light emitting device are not emitted. Active layer 130
, It is possible to prevent the off current from flowing through the switching TFT 101.

In FIG. 2, the switching TFT 10
1 shows the case where the TFT is an n-channel TFT and the driving TFT 102 is a p-channel TFT, but the present invention is not limited to this. Switching TFT 101 and driving TF
T102 is p-channel TFT or n-channel TFT
But either is fine. However, in FIG.
It is preferable that the driving TFT is a p-channel TFT since the anode is used as the TFT.

In this embodiment, two TFs are used for each pixel.
Although an example in which T is provided has been described, the present invention is not limited to this configuration. Regardless of how many TFTs a pixel has, a storage capacitor having the structure of the present invention can be formed. In the present invention, a wiring (connection wiring) formed on a gate electrode and an active layer of a TFT included in a pixel and connected to the active layer; an insulating film formed on the connection wiring; The storage capacitor may be formed with the formed wiring (capacitance wiring).

According to the present invention, with the above structure, the TFT and the storage capacitor can be formed so as to overlap each other, so that the capacitance value of the storage capacitor can be increased while suppressing the aperture ratio. Therefore, a change in gate voltage due to a leak or the like can be suppressed, so that a change in the luminance of the OLED in analog driving can be suppressed, and flickering of the screen can be suppressed.

Suppressing a decrease in the aperture ratio leads to a reduction in the effective light emitting area of the pixel. The larger the effective light-emitting area, the higher the brightness of the screen. Therefore, power consumption can be reduced by the structure of the present invention.

[0047]

Embodiments of the present invention will be described below.

Example 1 An example of a method for manufacturing a light emitting device of the present invention will be described with reference to FIGS. Here, a method for manufacturing the TFT of the pixel shown in FIG. 1 is described in detail according to steps.

First, in this embodiment, Corning # 70
A substrate 200 made of glass such as barium borosilicate glass typified by 59 glass or # 1737 glass or aluminoborosilicate glass is used. Note that the substrate 200 may be a substrate having a light-transmitting property, and a quartz substrate may be used. Further, a plastic substrate having heat resistance enough to withstand the processing temperature of this embodiment may be used.

Next, as shown in FIG.
A base film 201 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on the substrate. Although a two-layer structure is used as the base film 201 in this embodiment, a single-layer film of the insulating film or a structure in which two or more layers are stacked may be used. The first layer of the base film 201 is formed by plasma CVD.
The silicon oxynitride film 201a formed by using SiH ₄ , NH ₃ , and N ₂ O as a reaction gas is
m (preferably 50 to 100 nm). In this embodiment, a 50 nm-thick silicon oxynitride film 201a (composition ratio: Si = 32%, O = 27%, N = 24%, H = 17%)
Was formed. Next, as the second layer of the base film 201,
Using a plasma CVD method, a silicon oxynitride film 201b formed by using SiH ₄ and N ₂ O as a reaction gas is 50 to 2
The layer is formed to a thickness of 00 nm (preferably 100 to 150 nm). In this embodiment, a 100-nm-thick silicon oxynitride film 201b (composition ratio Si = 32%, O = 59%, N
= 7%, H = 2%).

Next, the semiconductor layer 202 is formed on the base film 201.
To 204 are formed. The semiconductor layers 202 to 204 are formed by forming a semiconductor film having an amorphous structure by a known means (sputtering method, L
After forming a film by a PCVD method or a plasma CVD method, a known crystallization treatment (a laser crystallization method, a thermal crystallization method, or a thermal crystallization method using a catalyst such as nickel).
Is performed and the crystalline semiconductor film obtained is patterned into a desired shape. The semiconductor layers 202 to 204 are formed to have a thickness of 25 to 80 nm (preferably 30 to 60 nm). Although there is no limitation on the material of the crystalline semiconductor film,
Preferably silicon (silicon) or silicon germanium _{(Si X Ge 1-X (} X = 0.0001~0.02)) may be formed such as an alloy. In this embodiment, the plasma CV
After a 55-nm amorphous silicon film was formed by method D, a solution containing nickel was held on the amorphous silicon film. After dehydrogenation (500 ° C., 1 hour) of this amorphous silicon film, thermal crystallization (550 ° C., 4 hours) is performed, and further, a laser annealing process for improving crystallization is performed. Thus, a crystalline silicon film was formed. Then, the crystalline silicon film is patterned by a photolithography method,
Semiconductor layers 202 to 204 were formed.

After the formation of the semiconductor layers 202 to 204, the semiconductor layer 20 is controlled to control the threshold value of the TFT.
A small amount of an impurity element (boron or phosphorus) may be doped to 2 to 204.

When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser can be used. In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and irradiated on a semiconductor film. The crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is set to 300 Hz, and the laser energy density is set to 100 to 4.
00 mJ / cm ² (typically 200 to 300 mJ / cm
² ). When a YAG laser is used, its second harmonic is used and a pulse oscillation frequency of 30 to 300 kHz is used.
And a laser energy density of 300 to 600 mJ /
cm ² (typically 350 to 500 mJ / cm ² ). And a width of 100 to 1000 μm, for example 400 μ
The laser light condensed linearly at m may be irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear laser light at this time may be set to 50 to 98%.

Next, a gate insulating film 205 covering the semiconductor layers 202 to 204 is formed. The gate insulating film 205 has a thickness of 40 to 40
The insulating film containing silicon is formed to have a thickness of 150 nm. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N =
7%, H = 2%). Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

When a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) is used by a plasma CVD method.
e) and O ₂ were mixed, the reaction pressure was 40 Pa, and the substrate temperature was 30.
It can be formed by discharging at a high-frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ² at 0 to 400 ° C. The silicon oxide film thus manufactured can obtain favorable characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 ° C. Through the steps so far, the cross-sectional view illustrated in FIG. 3A is completed.

Next, a mask 206 made of a resist is formed, and an n-type impurity element (phosphorus in this embodiment) is added to form impurity regions 207 to 209 containing phosphorus at a high concentration. Phosphorus is contained in this area from 1 × 10 ^{20 to} 5 × 10
²¹ atoms / cm ³ , typically 2 × 10 ²⁰ to 1 × 10 ²² atoms
/ cm ³ concentration should be included. (FIG. 3 (B))

Then, a heat-resistant conductive layer for forming a gate electrode is formed on the gate insulating film 205 (FIG. 3).
(C)). The heat-resistant conductive layer 210 may be formed as a single layer, or may have a stacked structure including a plurality of layers such as two layers or three layers as needed. In this embodiment, a stacked film including the conductive film (A) 210a and the conductive film (B) 210b is formed. For the heat-resistant conductive layer, an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), chromium (Cr), and silicon (Si), or a conductive material containing the aforementioned element as a main component. Film (typically, a tantalum nitride film, a tungsten nitride film, a titanium nitride film, or the like), or an alloy film combining the above elements (typically, a Mo-W alloy film, a Mo-Ta alloy film, a tungsten silicide film, or the like) ) Can be used. In this embodiment, a TaN film is used as the conductive film (A) 210a, and a W film is used as the conductive film (B) 210b. These heat-resistant conductive layers are formed by a sputtering method or a CVD method,
It is preferable to reduce the concentration of impurities contained in order to reduce the resistance. In particular, the oxygen concentration is preferably set to 30 ppm or less. The W film may be formed by sputtering using W as a target, or may be made of tungsten hexafluoride (W
It can also be formed by a thermal CVD method using F ₆ ). In any case, in order to use it as a gate electrode, it is necessary to reduce the resistance, and it is desirable that the resistivity of the W film be 20 μΩcm or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, the crystallization is inhibited and the resistance is increased. From this, when the sputtering method is used, the purity is 99.
By using a W target of 99% or 99.9999% purity and forming a W film with sufficient care so as not to mix impurities from the gas phase at the time of film formation, the resistivity is 9%.
２０20 μΩcm can be realized.

On the other hand, when a Ta film is used for the heat-resistant conductive layer 210, it can be similarly formed by a sputtering method. The Ta film uses Ar as a sputtering gas. Also, if an appropriate amount of Xe or Kr is added to the gas during sputtering,
The internal stress of the film to be formed can be relaxed to prevent the film from peeling. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used for the gate electrode.
The resistivity of the a-film was about 180 μΩcm, and was not suitable for use as a gate electrode. Since the TaN film has a crystal structure close to the α phase, if the TaN film is formed under the Ta film,
A phase Ta film is easily obtained. Although not shown, it is effective to form a silicon film doped with phosphorus (P) with a thickness of about 2 to 20 nm under the heat-resistant conductive layer 210. Thereby, the adhesion of the conductive film formed thereon is improved and oxidation is prevented, and at the same time, the heat-resistant conductive layer 21 is formed.
It is possible to prevent the alkali metal element containing a small amount of 0 from diffusing into the gate insulating film 205 of the first shape. In any case, the heat-resistant conductive layer 210 has a resistivity of 10 to 5
It is preferable to set it in the range of 0 μΩcm.

Thereafter, the conductive film (A) 210a and the conductive film (B) 210b are patterned into desired shapes to form gate electrodes 211 and 212 and a capacitor electrode 213 (FIG. 3D). Note that although not shown in FIG. 3D, the capacitor electrode 213 is connected to the gate electrode 212.

FIG. 4 is a top view of the pixel at the time when the step of FIG. 3D is completed. (FIG. 3D) is FIG.
Corresponds to a cross-sectional view taken along line AA ′ of the pixel shown in FIG. Note that the gate insulating film 205 is omitted for easy understanding of the drawing. Reference numeral 250 corresponds to a gate line, which is connected to the gate electrode 211.

Then, using the gate electrode 211 as a mask, an impurity element imparting n-type (hereinafter referred to as an n-type impurity element) is used as a semiconductor layer 20 to be an active layer of a TFT.
2, 203. As the n-type impurity element, an element belonging to Group 15 of the periodic table, typically, phosphorus or arsenic can be used. By this step, the first impurity regions 215 to 217, 220, 221 and the second impurity region 21
8. Channel formation regions 219 and 222 are formed. One of the first impurity regions 215 and 217 functions as a source region, and the other functions as a drain region. The second impurity region 218 is a low-concentration impurity region for functioning as an LDD region, and has an n-type impurity element of 1 × 10 ^{16 to} 5 ×.
10 ¹⁸ atoms / cm ³ (typically 1 × 10 ^{17 to} 5 × 10
¹⁸ atoms / cm ³ ) (FIG. 5A).

Next, a region to be a later n-channel TFT is covered with a mask 223, and boron is added as a p-type impurity element to the semiconductor layer 203 to be an active layer of a later p-channel TFT in a concentration of 3 × 10 ²⁰ to 3 × 10 ^{20. 21} atoms / cm ³ , typically 5
It is added so as to have a concentration of × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ (FIG. 5B). Through this step, the third impurity regions 224 and 225 are formed in the semiconductor layer 203.

Next, a first interlayer insulating film 226 is formed on the gate electrodes 211 and 212, the capacitor electrode 213, and the gate insulating film 205. The first interlayer insulating film 226 may be formed using a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a stacked film combining these. In any case, the first interlayer insulating film 226 is formed from an inorganic insulating material. The thickness of the first interlayer insulating film 226 is 100 to 200 n
m. When a silicon oxide film is used as the first interlayer insulating film 226, TEOS and O ₂
And a reaction pressure of 40 Pa and a substrate temperature of 300 to 40
0 ° C, high frequency (13.56 MHz) power density 0.5 ~
It can be formed by discharging at 0.8 W / cm ² . When a silicon oxynitride film is used as the first interlayer insulating film 226, SiH ₄ , N ₂ O,
Silicon oxynitride film made from NH ₃ or Si
H _4, N ₂ O may be formed by a silicon oxynitride film made from. The production conditions in this case are a reaction pressure of 20 to 200.
Pa, substrate temperature 300 to 400 ° C, high frequency (60 MHz
z) It can be formed at a power density of 0.1 to 1.0 W / cm ² . Further, as the first interlayer insulating film 226, SiH ₄ , N
_A silicon oxynitride hydride film formed from ₂ O and H ₂ may be used. Similarly for silicon nitride film, plasma CVD
It can be produced from SiH ₄ and NH _{3 by the} method.

Then, a step of activating the impurity elements imparting n-type or p-type added at the respective concentrations is performed (FIG. 5C). Note that the conductive film used as the gate electrode in this embodiment is very easily oxidized, and there is a problem that the oxidation increases the resistivity. Therefore, in the heat treatment for activation in this embodiment, it is preferable to reduce the oxygen concentration in the atmosphere by performing exhaust by a rotary pump and a mechanical booster pump, and to perform the heat treatment in a reduced-pressure atmosphere.

Next, heat treatment is performed at 410 ° C. for one hour in a hydrogen atmosphere for hydrogenation for terminating dangling bonds in the active layer with thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation using hydrogen excited by plasma may be performed.

Next, the second interlayer insulating film 227 is
It is formed to a thickness of 0 to 1000 nm (800 nm in this embodiment). As the second interlayer insulating film 227, an organic insulating film such as acrylic, polyimide, polyamide, or BCB (benzocyclobutene), or an inorganic insulating film such as a silicon oxynitride film or a silicon nitride oxide film may be used.

Thereafter, a resist mask having a predetermined pattern is formed, and contact holes reaching the first impurity regions 215 and 217, the third impurity regions 224 and 225, and the impurity regions 209 are formed. Note that a contact hole reaching the impurity region 209 is omitted in FIG.
The contact hole is formed by a dry etching method. In this case, the second interlayer insulating film 227 made of an organic resin material is first etched by using a mixed gas of CF ₄ , O ₂ , and He as an etching gas.
_4. The first interlayer insulating film 226 is etched as O ₂ .
Further, in order to increase the selectivity with respect to the semiconductor layer, a contact hole can be formed by switching the etching gas to CHF ₃ and etching the gate insulating film 205.

Then, a conductive metal film is formed by a sputtering method or a vacuum evaporation method, patterned by a mask, and then etched to form the source line 228 and the connection wiring 22.
9, 230 and a power supply line 231 are formed. Source line 228
Is the first impurity region 215, the connection wiring 229 is the first impurity region 217, and the connection wiring 230 is the third impurity region 22.
4, the power supply line 231 is connected to the third impurity region 225. Although not shown in FIG. 5D, the connection wiring 229 is connected to the gate electrode 212.
Although not shown in FIG. 5D, the power supply line 23
1 is connected to the impurity region 209.

Although not shown, in this embodiment, this wiring is formed of a laminated film of a 50 nm-thick Ti film and a 500 nm-thick alloy film (an alloy film of Al and Ti) (FIG. 5).
(D)).

FIG. 6 is a top view of the pixel at the time when the step of FIG. 5D is completed. (FIG. 5D) is FIG.
Corresponds to a cross-sectional view taken along line AA ′ of the pixel shown in FIG. Note that the gate insulating film 205 and the first and second interlayer insulating films 226 and 227 are omitted for easy understanding of the drawing. Reference numeral 250 denotes a gate line.

FIG. 20A shows a state in which the connection wiring 229 and the gate electrode 212 are connected. FIG.
6A is a cross-sectional view taken along line BB ′ of the pixel shown in FIG. The connection wiring 229 is connected to the gate electrode 212 via contact holes formed in the second interlayer insulating film 227 and the first interlayer insulating film 226.

FIG. 20B shows how the power supply line 231 and the impurity region 209 are connected. FIG.
6B corresponds to a cross-sectional view taken along line CC ′ of the pixel illustrated in FIG. The power line 231 is connected to the impurity region 209 via contact holes formed in the second interlayer insulating film 227 and the first interlayer insulating film 226.

Next, a third interlayer insulating film 233 is formed. Since the third interlayer insulating film 233 needs to be planarized, it is formed to a thickness of 1.5 μm using an organic insulating film such as polyimide or acrylic. Then, the third interlayer insulating film 2
33, a contact hole reaching the connection wiring 230 is formed, and then a transparent conductive film is formed on the third interlayer insulating film 233.
The pixel electrode 234 and the capacitor wiring 235 are formed by forming a pattern with a thickness of 0 to 120 nm and patterning (FIG. 7A). In this embodiment, an indium tin oxide (ITO) film or a transparent conductive film obtained by mixing 2 to 20% of zinc oxide (ZnO) with indium oxide is used as the transparent conductive film.

The capacitance wiring 235 is formed of the third interlayer insulating film 233
Overlaps with the connection wiring 229 with a space therebetween. In the present invention, the storage capacitor 236 is formed by the capacitor wiring 235, the third interlayer insulating film 233, and the connection wiring 229.

FIG. 8 is a top view of the pixel at the time when the step of FIG. 7A is completed. FIG. 7A is a cross-sectional view taken along line AA ′ of the pixel shown in FIG. Note that the third interlayer insulating film 233 is omitted for easy understanding of the drawing.

Although not shown in FIG. 7A,
The capacitor wiring 235 forming the storage capacitor 236 is connected between adjacent pixels. FIG. 9 shows a state where a plurality of pixels shown in FIG. 8 are arranged.

Reference numeral 228 is a source line, and 231 is a power supply line. As shown in FIG. 9, the capacitor wiring 235 is connected or shared between adjacent pixels, and a constant potential is applied to all the connection wirings 229. In addition,
Reference numeral 250 corresponds to a gate line, which is connected to the gate electrode 211.

Next, as shown in FIG. 7B, a fourth interlayer insulating film 237 having an opening at a position corresponding to the pixel electrode 234 is formed. The fourth interlayer insulating film 237 has an insulating property, functions as a bank, and has a role of separating an organic light emitting layer of an adjacent pixel. In this embodiment, the fourth interlayer insulating film 237 is formed using a resist.

Next, an organic light emitting layer 238 is formed by an evaporation method, and a cathode (MgAg electrode) 239 and a protection electrode 240 are formed by an evaporation method. At this time, the organic light emitting layer 2
38 and the pixel electrode 23 before forming the cathode 239.
It is desirable to perform a heat treatment on 4 to completely remove moisture. In this embodiment, the MgAg electrode is used as the cathode of the OLED, but another known material may be used.

As the organic light emitting layer 238, a known material can be used. In this embodiment, a hole transporting layer (Hole transporting layer) and a light emitting layer (Emitting layer) are used.
yer) is used as the organic light emitting layer, but it may be provided with any one of a hole injection layer, an electron injection layer and an electron transport layer. Various examples of such combinations have already been reported, and any of these configurations may be used.

In this embodiment, polyphenylene vinylene is formed as a hole transport layer by a vapor deposition method. The light emitting layer is formed by vapor deposition of a 30% to 40% molecular dispersion of PBD of a 1,3,4-oxadiazole derivative in polyvinyl carbazole, and about 1% of coumarin 6 is used as a green light emitting center. Has been added.

The protective electrode 240 also serves as the organic light emitting layer 23.
Although it is possible to protect 8 from moisture and oxygen, it is more preferable to provide a protective film 241. In this embodiment, a 300-nm-thick silicon nitride film is provided as the protective film 241. This protective film may also be formed continuously without opening to the atmosphere after the protective electrode 240.

The protection electrode 240 is provided to prevent the cathode 239 from deteriorating, and is typically a metal film containing aluminum as a main component. Of course, other materials may be used. Also,
Since the organic light emitting layer 238 and the cathode 239 are very weak to moisture, it is desirable to form the protection electrode 240 up to the protection electrode 240 continuously without opening to the atmosphere to protect the organic light emitting layer and the cathode from the outside air.

The thickness of the organic light emitting layer 238 is 10 to 4
00 [nm] (typically 60 to 150 [nm]), cathode 2
39 has a thickness of 80 to 200 [nm] (typically 100 to 200 nm).
150 [nm]).

Thus, a light emitting device having a structure as shown in FIG. 7B is completed. Note that an overlapping portion 242 of the pixel electrode 234, the organic light emitting layer 238, and the cathode 239 is OLE.
D.

In this embodiment, the storage capacitor 24 is formed by the impurity region 209, the gate insulating film 205, and the capacitor electrode 213.
3 is formed. Further, a storage capacitor 244 is formed by the capacitor electrode 213, the second interlayer insulating film 227, and the power supply line 231. Since the impurity region 209 and the capacitor electrode 213 overlap with the power supply line 231, the storage capacitors 243 and 244 can be formed without reducing the aperture ratio.

Note that reference numeral 245 denotes a switching TFT, and reference numeral 246 denotes a driving TFT.

Actually, when completed up to FIG. 7B, a protective film (laminate film, ultraviolet curable resin film, etc.) with high airtightness and low degassing so as not to be further exposed to the outside air, It is preferable to package (enclose) with a sealing material. At this time, if the inside of the sealing material is made an inert atmosphere or a hygroscopic material (for example, barium oxide) is placed inside, the OLED
Reliability is improved.

The method for manufacturing the light emitting device of the present invention is not limited to the method described in this embodiment. The light emitting device of the present invention can be manufactured using a known method.

(Embodiment 2) In this embodiment, a storage capacitor of the present invention having a structure different from that of FIG. 7A will be described.

FIG. 10 is a sectional view of a pixel according to this embodiment.
301 is a switching TFT, 302 is a driving TFT
In this embodiment, n-channel TFT and p
Although a channel type TFT is used, this embodiment is not limited to this configuration. Switching TFT and driving TFT
May be either an n-channel TFT or a p-channel TFT.

After forming the second interlayer insulating film 303, the second
A contact hole is formed in the interlayer insulating film 303, the gate insulating film 307, and the first interlayer insulating film 306. Next, conductive layers to be the connection wirings 305 and 320, the source line 304, and the power supply line 321 are formed. In this embodiment, as the conductive layer,
A conductive film containing titanium (Ti) as a main component has a thickness of 50 to 10
After a film was formed to a thickness of 0 nm, a conductive film containing aluminum (Al) as a main component was formed to a thickness of 300 to 500 nm. Note that as a conductive film for forming the connection wiring, any of a film mainly containing tantalum (Ta), a conductive film mainly containing aluminum (Al), and a film mainly containing titanium (Ti) is used. May be formed by stacking.

Then, an insulating film 310 serving as a dielectric having a thickness of 20 to 100 nm (preferably 30 to 50 nm) is formed on the surface of the conductive layer by anodization or plasma oxidation (in this embodiment, anodization). To form In this embodiment, a film containing titanium as a main component and a film containing aluminum as a main component are stacked and used as the connection wiring 305, and the film containing aluminum as a main component is anodized to form an anodic oxide film. An aluminum oxide film (alumina film) is formed. In the present embodiment, this anodic oxide film corresponds to the insulating film 310 and is used as a dielectric of the storage capacitor. Note that an oxide insulating film obtained by anodizing tantalum (Ta) or titanium (Ti) also has a high dielectric constant, and thus can be suitably used as a dielectric of a storage capacitor.

In this anodizing treatment, an ethylene glycol tartrate solution having a sufficiently low alkali ion concentration is first prepared. This is a solution obtained by mixing a 15% aqueous solution of ammonium tartrate and ethylene glycol at a ratio of 2: 8, and ammonia water is added thereto to adjust the pH to 7 ± 0.5. Then, a platinum electrode serving as a cathode is provided in the solution, the substrate on which the conductive layer is formed is immersed in the solution, and a constant (several mA to several tens mA) DC current is passed using the conductive layer as the anode. In this embodiment, 200 mA is applied to one substrate.
Was passed.

The voltage between the cathode and the anode in the solution changes with time according to the growth of the anodic oxide.
When the temperature reaches, the anodizing treatment is terminated. Thus, the insulating film 305 having a thickness of about 50 nm can be formed on the surface of the connection wiring 305. It is to be noted that the numerical values relating to the anodic oxidation method shown here are merely examples, and the optimum values can naturally vary depending on the size of the element to be manufactured.

Under the conditions of the anodic oxidation method in this embodiment,
When an anodized film is formed on a aluminum film, the film thickness is 51.4 nm.
Al_XO_YA film was formed. This Al_XO_Y1 mm on the membrane
Φ ITO film is formed and Al film-Al_XO_YFilm-ITO film
When a voltage of 5 V was applied between the two, 1 × 10^-11(A)
A small leak current was measured. Thereby, Al_XO _Y
The film can be used as a dielectric for the storage capacitor of the light emitting device.
I knew it would work.

Although the insulating film 310 is formed using the anodic oxidation method here, the insulating film is formed by plasma CV.
It may be formed by a gas phase method such as a D method, a thermal CVD method, or a sputtering method. In addition, silicon oxide film, silicon nitride film, silicon nitride oxide film, DLC (Diamond Like Car
bon) film, tantalum oxide film or organic insulating film may be used. Further, a stacked film combining these may be used.

After the formation of the insulating film 310, the conductive film and the insulating film 310 are patterned into a desired shape, and the connection wiring 3 is formed.
05, source line 304, connection wiring 320 and power supply line 32
Form one. The source wiring 304 is formed of the second interlayer insulating film 3
03, a switching TFT through contact holes formed in the first interlayer insulating film 306 and the gate insulating film 307.
It is connected to the impurity region 308 of the active layer of the FT 301. Similarly, the connection wiring 305 also includes a second interlayer insulating film 303, a first interlayer insulating film 306, and a gate insulating film 307.
Is connected to the impurity region 309 of the active layer of the switching TFT 301 through a contact hole formed in the switching TFT 301.

Thereafter, a third interlayer insulating film 311 is formed. Then, the third interlayer insulating film 31 is etched.
1 is removed to expose the insulating film 310 in contact with the connection wiring 305. Apart from this step, a contact hole reaching the connection wiring 320 is also formed. At this time, the insulating film 31 formed in contact with the connection wiring 320
0 is removed to expose the connection wiring 320.

After that, a transparent conductive film is formed and etched to form a capacitor wiring 322 and a pixel electrode 323. The pixel electrode is connected to the connection wiring 320 via a contact hole formed in the third interlayer insulating film 311.

In this embodiment, the connection wiring 305, the insulating film 310 in contact with the connection wiring 305, and the capacitor wiring 322
Thus, the storage capacitor 324 is formed.

In the storage capacitor having the configuration of the present embodiment, the range of selection of the thickness and the dielectric constant of the dielectric is wider than that of the first embodiment.

(Embodiment 3) In this embodiment, an example in which a gate line is formed in the same layer as a connection wiring will be described.

FIG. 11 is a sectional view of a pixel according to this embodiment.
301 is a switching TFT, 302 is a driving TFT
It is. 303 corresponds to a source line, and 304 corresponds to a power supply line.

The source line 303 and the power supply line 304 are formed on the gate insulating film 307 simultaneously with the gate electrode 305 of the switching TFT 301 and the gate electrode 306 of the driving TFT 302. The capacitor electrode 304 overlaps with the impurity region 308 with the gate insulating film 307 interposed therebetween. Then, the capacitor electrode 304 and the gate insulating film 307
And the impurity region 308 form a storage capacitor 309.

The connection wiring 3 is formed on the second interlayer insulating film 310.
11 to 314 and a gate line 330 are formed. Then, the source line 303 is formed through contact holes formed in the second interlayer insulating film 310 and the first interlayer insulating film 320.
And the connection wiring 311 are connected to each other.
04 and the connection wiring 314 are connected.

Further, the impurity region 321 of the switching TFT 301 and the connection wiring 311 are connected via contact holes formed in the second interlayer insulating film 310, the first interlayer insulating film 320, and the gate insulating film 307. The impurity region 322 of the switching TFT 301 and the connection wiring 312 are connected. Similarly, the second interlayer insulating film 31
0, driving TFT 302 through contact holes formed in first interlayer insulating film 320 and gate insulating film 307.
Is connected to the connection wiring 313, and the impurity region 324 of the driving TFT 302 is connected to the connection wiring 314.

The connection wiring 312 is a switching TFT
And the first and second interlayer insulating films 320 and 310 are interposed therebetween. Although not shown, the gate line 330 is connected to the gate electrode 305 of the switching TFT via contact holes formed in the second interlayer insulating film 310 and the first interlayer insulating film 320.

The connection lines 311 to 314 and the gate line 33
0, a third interlayer insulating film 340 is formed on the second interlayer insulating film 310. And the third interlayer insulating film 3
A capacitor wiring 341 and a pixel electrode 342 made of the same conductive film are formed on 40. The pixel electrode 342 is connected to the connection wiring 313 via a contact hole formed in the third interlayer insulating film 340.

The storage capacitor 343, which is a feature of the present invention, includes the connection wiring 312, the third interlayer insulating film 340, and the capacitor wiring 3
41.

By forming the gate line in the same layer as the connection wiring as in this embodiment, the number of steps can be reduced even if the gate electrode and the gate line are formed of different materials. Therefore, it is possible to form a gate electrode using a material that is easy to perform precision processing and to form a gate line using a material with low resistance.

This embodiment can be implemented by freely combining with Embodiment 2.

(Embodiment 4) In this embodiment, a pixel structure using an inversely staggered TFT will be described.

FIG. 12 is a sectional view of a pixel according to this embodiment.
401 is a switching TFT, 402 is a driving TFT
It is.

Source line 405, connection lines 406, 40
7. The power supply line 408 is formed on the first interlayer insulating film 409. The source line 405 is connected to the switching TF through a contact hole formed in the first interlayer insulating film 409.
It is connected to the impurity region 410 of T401. Also,
The connection wiring 406 is also connected to the switching TFT 401 via the contact hole formed in the first interlayer insulating film 409.
Is connected to the impurity region 411.

The connection wiring 407 is formed on the first interlayer insulating film 4.
09 through the contact hole formed in the driving T
It is connected to impurity region 412 of FT 402. The power supply line 408 is connected to the impurity region 4 of the driving TFT 402 through a contact hole formed in the first interlayer insulating film 409.
13 is connected.

Source line 405, connection lines 406, 40
7. A second interlayer insulating film 415 is formed on the first interlayer insulating film 409 so as to cover the power supply line 408. Then, on the second interlayer insulating film 415, the capacitor wiring 4 made of the same conductive film is formed.
16 and a pixel electrode 417 are formed. Note that the pixel electrode 417 is connected to the connection wiring 407 via a contact hole formed in the second interlayer insulating film 415.

This embodiment can be implemented by freely combining with the configuration of the second embodiment.

(Embodiment 5) In this embodiment, an example in which a gate line is formed between an active layer of a switching TFT and a substrate will be described.

FIG. 13 is a sectional view of a pixel according to this embodiment.
Reference numeral 501 denotes a switching TFT, and reference numeral 502 denotes a driving TFT. Active layer 5 of switching TFT 501
A light-shielding film 505 functioning as a gate line is formed between the substrate 03 and the substrate 504.

[0121] As the film forming the light shielding film 505, a polysilicon film, WSi _{x (x} = 2.0~2.8) film, Al,
One or more of films made of a conductive material such as Ta, W, Cr, and Mo may be formed. In this embodiment, the polysilicon film thickness 50 nm, formed by stacking the WSi _x film with a thickness of 100 nm, and the light shielding film 505.

A base insulating film 506 is formed between the light shielding film 505 and the active layer 503. Base insulating film 5
Reference numeral 06 forms an insulating film containing silicon (eg, a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or the like) by a plasma CVD method, a sputtering method, or the like.

In a later step, before forming the gate electrode 507 of the switching TFT 501, a contact hole reaching the light-shielding film 505 is formed in the base insulating film 506.
And a conductive film to be the gate electrode 507 is formed.
Then, the conductive film is patterned to form a gate electrode 507 connected to the light-shielding film 505.

In the above configuration, since the gate line and the switching TFT 501 overlap, the aperture ratio can be increased.

This embodiment can be implemented by freely combining with Embodiment 2.

(Embodiment 6) In this embodiment, a method for driving a light emitting device of the present invention will be described.

FIG. 14 is a circuit diagram of a pixel portion of the light emitting device of the present invention. 601 is a switching TFT, 602 is a driving TFT, 603 is an OLED, and 604 is a storage capacitor. The detailed connection configuration of the pixel is the same as that of the pixel shown in FIG.

In the pixel portion, source lines S1 to Sx, power supply line V
1 to Vx and gate lines G1 to Gy are formed. Each pixel has one of source lines S1 to Sx and a power supply line V1.
To Vx and one of the gate lines G1 to Gy.

FIG. 15 is a timing chart when the light emitting device shown in FIG. 14 is driven by analog driving. A period from when one gate line is selected to when another gate line is selected next is defined as one line period (L). Note that in this specification, selecting a gate line means that all TFTs whose gate electrodes are connected to the gate line are turned on.

The period from the display of one image to the display of the next image corresponds to one frame period (F). In the case of the light emitting device shown in FIG. 14, since there are y gate lines, y line periods (L1 to L1) in one frame period
Ly) is provided.

First, the potential of the power supply lines (V1 to Vx) (power supply potential) is kept constant. The potential of the counter electrode is also kept constant. The electric potential of the counter electrode is OL
There is a potential difference between the power supply potential and the OLED so that the OLED emits light when applied to the pixel electrode of the ED.

In the first line period (L1), the gate line G1 is selected by the selection signal, and all the switching TFTs 601 connected to the gate line G1 are turned on. Then, analog video signals are sequentially input to the source lines (S1 to Sx). Source line (S1-Sx)
The analog video signal input to the
The signal is input to the gate electrode of the driving TFT 602 via the FT 601.

The amount of current flowing through the channel forming region of the driving TFT 602 is controlled by the gate voltage V _GS which is the potential difference between the gate electrode and the source region of the driving TFT 602. Therefore, the potential applied to the pixel electrode of the OLED 603 is determined by the level of the potential of the analog video signal input to the gate electrode of the driving TFT 602. Therefore, the OLED 603 emits light with the luminance controlled by the potential of the analog video signal.

When the above operation is repeated and the input of the analog video signal to all the source lines (S1 to Sx) ends, the first line period (L1) ends. Note that the period until the input of the analog video signal to the source lines (S1 to Sx) ends and the horizontal retrace period may be combined into one line period. Then, the second line period (L2) starts, the gate line G2 is selected by the selection signal, and analog video signals are sequentially input to the source lines (S1 to Sx) in the same manner as in the first line period (L1). Is done.

When all the gate lines (G1 to Gy) are selected, all the line periods (L1 to Ly) end. When all the line periods (L1 to Ly) end, 1
The frame period ends. All the pixels display during one frame period, and one image is formed. Note that all the line periods (L1 to Ly) and the vertical flyback period may be combined into one frame period.

As described above, in the analog driving, the luminance of the OLED is controlled by the potential of the analog video signal, and the gradation is displayed by controlling the luminance.

In the analog drive, it is desirable that the capacitance value of the storage capacitor is larger than that in the case of the digital drive. Therefore, as in the light emitting device of the present invention, a configuration having a storage capacitor with a large capacitance value while suppressing a decrease in aperture ratio. Is suitable for analog driving. However, the present invention is not limited to this driving method, and it is sufficiently possible to apply the present invention to a digitally driven light emitting device.

This embodiment can be implemented by freely combining with Embodiments 1 to 5.

(Embodiment 7) In this embodiment, a driving method of the light emitting device having the structure shown in FIG. 14 which is different from that in Embodiment 6 will be described.

The light emitting device of this embodiment displays an image using a digital video signal having image information (hereinafter, referred to as a digital video signal). FIG. 16 shows timings at which a writing period and a light emitting period appear in digital driving. The horizontal axis represents time, and the vertical axis represents the position of a pixel in each line.

First, the power supply potential of the power supply lines (V1 to Vx) is kept the same as the potential of the opposing electrode of the OLED 603. Then, the gate line G1 is selected by the selection signal, and the switching TFTs 601 of all the pixels (pixels on the first line) connected to the gate line G1 are turned on.

Then, the first bit digital video signal is input to the source lines (S1 to Sx). The digital video signal is supplied to the driving TFT 601 via the switching TFT 601.
Input to the gate electrode of FT602.

Next, the selection of the gate line G1 is completed, the gate line G2 is selected, and the switching TFTs 601 of all the pixels connected to the gate line G2 are turned on. Then, a digital video signal of the first bit is input to the pixels of the second line from the source lines (S1 to Sx).

Then, all the gate lines (G1 to G
y) is selected. All gate lines (G1 to Gy)
Is selected, and the period until the digital video signal of the first bit is input to the pixels of all lines is a writing period T
a1.

When the writing period Ta1 ends, the display period Tr1 starts. In the display period Tr1, the power supply potential of the power supply line has a potential difference with the counter electrode to such an extent that the OLED emits light when the power supply potential is applied to the pixel electrode of the OLED.

Then, in the display period Tr1, whether the OLED 603 emits light or not is selected according to the digital video signal written to the pixel in the writing period Ta1. When the digital video signal has information of “0”, the driving TFT 602 is turned off. Therefore, no power supply potential is applied to the pixel electrode of the OLED 603. As a result, the OLED 603 included in the pixel to which the digital video signal having the information “0” is input does not emit light. Conversely, if the information has “1”, the driving T
FT 602 is turned on. Therefore, OLED 603
Are supplied with a power supply potential. as a result,
The OLED 603 included in the pixel to which the digital video signal having the information “1” is input emits light.

As described above, in the display period Tr1, the OLED
603 is in a light emitting or non-light emitting state, and all the pixels perform display.

When the display period Tr1 ends, the writing period Ta2 starts, and the power supply potential of the power supply line becomes the same as the potential of the counter electrode of the OLED. Then, as in the case of the writing period Ta1, all the gate lines are sequentially selected, and the second bit digital video signal is input to all the pixels. A period until the digital video signal of the second bit is completely input to the pixels of all lines is referred to as a writing period Ta2.

When the writing period Ta2 ends, the display period Tr2 starts, and the power supply potential of the power supply line is OLE.
OLED 603 when applied to the pixel electrode of D603
To the extent that light is emitted, the potential has a potential difference with the counter electrode. Then, all the pixels perform display.

The above operation is repeated until the n-th bit digital video signal is input to the pixel, and the writing period Ta and the display period Tr appear repeatedly. When all the display periods (Tr1 to Trn) end, one image can be displayed. In the driving method of the present embodiment, the period for displaying one image is set to one frame period (F).
Call. When one frame period ends, the next frame period starts. Then, the writing period Ta1 appears again, and the above operation is repeated.

In a normal light emitting device, it is preferable to provide 60 or more frame periods per second. When the number of images displayed in one second is less than 60, flickering of the images may start to be noticeable.

In this embodiment, the sum of the lengths of all the writing periods is shorter than one frame period, and the length ratio of the display periods is Tr1: Tr2: Tr3: ...: Tr (n-
1): Trn = 2 ⁰ : 2 ¹ : 2 ² : ...: 2 ^(n-2) : 2 ^(n-1)
It is necessary that A desired gradation display out of 2 ⁿ gradations can be performed by the combination of the display periods.

By calculating the sum of the lengths of the display periods during which the OLED emits light during one frame period, the displayed gradation of the pixel in the frame period is determined. For example, if n = 8 and the luminance when the pixel emits light in all display periods is 100%, when the pixel emits light in Tr1 and Tr2, 1% luminance can be expressed.
When Tr5 and Tr8 are selected, 60% luminance can be expressed.

The display periods Tr1 to Trn may appear in any order. For example, during one frame period, the display periods can appear in the order of Tr1, Tr5, Tr2,... Next to Tr1.

In the present embodiment, the height of the power supply potential of the power supply line is changed between the writing period and the display period, but the present invention is not limited to this. The power supply potential and the potential of the counter electrode may always have a potential difference such that the OLED emits light when the power supply potential is applied to the pixel electrode of the OLED. In that case, even during the writing period, OLE
D can emit light. Therefore, the gray scale displayed by the pixel in the frame period is determined by the sum of the length of the writing period and the length of the display period in which the OLED emits light in one frame period. In this case, the ratio of the sum of the lengths of the writing period and the display period corresponding to the digital video signal of each bit is (Ta1 + Tr1) :( Ta2 + Tr).
2): (Ta3 + Tr3): ...: (Ta (n-1) + T
r (n-1)): (Tan + Trn) = 2 ⁰ : 2 ¹ :
2 ² :..: 2 ^(n-2) : 2 ^(n-1) .

This embodiment can be implemented by freely combining with Embodiments 1 to 5.

Embodiment 8 In this embodiment, an example in which a light emitting device is manufactured using the present invention will be described with reference to FIGS.

FIG. 17A is a top view of a light emitting device formed by sealing a substrate on which an OLED is formed with a sealing material, and FIG.
FIG. 17C is a sectional view taken along line AA ′ of FIG.
It is sectional drawing in BB 'of 7 (A).

The pixel portion 400 provided on the substrate 4001
2, a sealing material 4009 is provided so as to surround the source line driving circuit 4003 and the first and second gate line driving circuits 4004a and 4004b. The pixel portion 4002
Sealing material 40 on the source line driving circuit 4003 and the first and second gate line driving circuits 4004a and 4004b.
08 is provided. Therefore, the pixel portion 4002, the source line driver circuit 4003, and the first and second gate line driver circuits 4004a and 4004b
09 and the sealing material 4008, the filler 421
0 sealed.

The pixel portion 4 provided on the substrate 4001
002, the source line driving circuit 4003, and the first and second
Gate line drive circuits 4004a and 4004b are a plurality of TFTs
have. The source line driver circuit 4003 is a circuit for inputting a video signal to a source line, and the first and second gate line driver circuits 4004a and 4004b are circuits for selecting a gate line by a selection signal.

In FIG. 17B, typically, a base film 401 is formed.
0, a driving circuit TFT included in the source line driving circuit 4003 (here, n-channel TF
A TFT 4201 (T and p channel type TFTs are shown) and a driving TFT (TFT controlling current to the OLED) 4202 included in the pixel portion 4002 are shown.

In this embodiment, the driving circuit TFT 4201 is used.
A p-channel TFT or an n-channel TFT manufactured by a known method is used for the driving TFT 4202.
A p-channel TFT manufactured by a known method is used. Further, a driving TFT 420 is provided in the pixel portion 4002.
A storage capacitor (not shown) connected to the second gate is provided.

Driving Circuit TFT 4201 and Driving TF
An interlayer insulating film (flattening film) 4301 is formed over T4202, and a pixel electrode (anode) 4203 electrically connected to the drain of the driving TFT 4202 is formed thereon. As the pixel electrode 4203, a transparent conductive film having a large work function is used. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide, or indium oxide can be used. Further, a material obtained by adding gallium to the transparent conductive film may be used.

An insulating film 4302 is formed on the pixel electrode 4203, and the insulating film 4302 is
An opening is formed on 3. In this opening, an organic light emitting layer 4204 is formed on the pixel electrode 4203. For the organic light emitting layer 4204, a known organic light emitting material or inorganic light emitting material can be used. Further, the organic light emitting material includes a low molecular type (monomer type) material and a high molecular type (polymer type) material, and either may be used.

As a method for forming the organic light emitting layer 4204, a known vapor deposition technique or coating technique may be used. The structure of the organic light emitting layer may be a stacked structure or a single layer structure by freely combining a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or an electron injection layer.

On the organic light emitting layer 4204, a cathode 4205 made of a light-shielding conductive film (typically, a conductive film containing aluminum, copper, or silver as a main component or a laminated film of these and another conductive film). Is formed. The cathode 4
It is desirable that moisture and oxygen existing at the interface between 205 and the organic light emitting layer 4204 be eliminated as much as possible. Therefore, it is necessary to devise a method in which the organic light emitting layer 4204 is formed in a nitrogen or rare gas atmosphere, and the cathode 4205 is formed without being exposed to oxygen or moisture. In this embodiment, the above-described film formation is made possible by using a multi-chamber type (cluster tool type) film formation apparatus. And the cathode 4205
Is given a predetermined voltage.

As described above, the pixel electrode (anode) 42
03, O composed of an organic light emitting layer 4204 and a cathode 4205
An LED 4303 is formed. And OLED4303
A protective film 4209 is formed over the insulating film 4302 so as to cover. The protective film 4209 is effective for preventing oxygen, moisture, and the like from entering the OLED 4303.

A wiring 4005a is connected to the power supply line, and is electrically connected to the source region of the driving TFT 4202. The lead wiring 4005a passes between the sealing material 4009 and the substrate 4001, passes through the anisotropic conductive film 4300, and has an FPC 4006
The wiring is electrically connected to the PC wiring 4301.

As the sealing material 4008, a glass material, a metal material (typically, a stainless steel material), a ceramic material, and a plastic material (including a plastic film) can be used. FRP as plastic material
(Fiberglass-Reinforced Pl
aics) plate, PVF (polyvinyl fluoride)
A film, a mylar film, a polyester film, or an acrylic resin film can be used. Further, a sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can also be used.

However, when the light emission direction from the OLED is directed toward the sealing material, the sealing material must be transparent. In that case, a transparent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.

As the filler 4210, besides an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used. Resin, PVB (polyvinyl butyral) or E
VA (ethylene vinyl acetate) can be used. In this embodiment, nitrogen was used as the filler.

In order to expose the filler 4210 to a hygroscopic substance (preferably barium oxide) or a substance capable of adsorbing oxygen, the substrate 400
A concave portion 4007 is provided on the one surface, and a hygroscopic substance or a substance 4207 capable of adsorbing oxygen is arranged. Then, the hygroscopic substance or the substance 4207 capable of adsorbing oxygen is held in the concave part 4007 by the concave part cover material 4208 so that the hygroscopic substance or the substance 4207 capable of adsorbing oxygen is not scattered. Note that the concave portion cover member 4208 has a fine mesh shape, and has a configuration in which air and moisture are allowed to pass, and a hygroscopic substance or a substance 4207 capable of adsorbing oxygen is not allowed to pass. By providing the hygroscopic substance or the substance 4207 which can adsorb oxygen, deterioration of the OLED 4303 can be suppressed.

As shown in FIG. 17C, the pixel electrode 42
Simultaneously with the formation of 03, a conductive film 4203a is formed so as to be in contact with the lead wiring 4005a.

The anisotropic conductive film 4300 has a conductive filler 4300a. Substrate 4001 and F
By thermocompression bonding with the PC 4006, the conductive film 4203a on the substrate 4001 and the FPC wiring 4301 on the FPC 4006 are electrically connected by the conductive filler 4300a.

This embodiment can be implemented by freely combining with Embodiments 1 to 7.

(Embodiment 9) In the present invention, by using an organic light emitting material capable of utilizing phosphorescence from triplet excitons for light emission, external light emission quantum efficiency can be remarkably improved. Thereby, low power consumption, long life, and light weight of the OLED can be achieved.

Here, a report is shown in which the triplet exciton is used to improve the external light emission quantum efficiency. (T.Tsutsui, C.Adac
hi, S. Saito, Photochemical Processes in Organized
Molecular Systems, ed.K. Honda, (Elsevier Sci. Pub.,
Tokyo, 1991) p.437.)

The molecular formula of the organic luminescent material (coumarin dye) reported in the above-mentioned article is shown below.

[0179]

Embedded image

(MABaldo, DFO'Brien, Y. You, A. Shou
stikov, S. Sibley, METhompson, SRForrest, Nature
395 (1998) p.151.)

The molecular formula of the organic light emitting material (Pt complex) reported in the above paper is shown below.

[0182]

Embedded image

(MABaldo, S. Lamansky, PEBurrrows,
METhompson, SRForrest, Appl.Phys.Lett., 75 (199
9) p.4.) (T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamu
ra, T.Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Ma
yaguchi, Jpn.Appl.Phys., 38 (12B) (1999) L1502.)

The molecular formula of the organic luminescent material (Ir complex) reported in the above-mentioned article is shown below.

[0185]

Embedded image

As described above, if the phosphorescence emission from the triplet exciton can be used, it is possible in principle to realize an external emission quantum efficiency three to four times higher than the case where the fluorescence emission from the singlet exciton is used. .

The configuration of this embodiment can be implemented by freely combining with any of the configurations of Embodiments 1 to 8.

(Embodiment 10) In this embodiment, a storage capacitor of the present invention having a configuration different from that of FIG. 2 will be described.

FIG. 21 is a sectional view of a pixel according to this embodiment.
Note that the same reference numerals are given to those already shown in FIG.

A source line (S), connection wirings 118 and 119, and a power supply line (V) are formed on the second interlayer insulating film 117. The source line (S) is formed on the second interlayer insulating film 117.
17 is connected to impurity region 110 through a contact hole. Also, the connection wiring 118 is
It is connected to impurity region 111 via a contact hole formed in interlayer insulating film 117. Connection wiring 119
Are connected to the impurity regions 112 via contact holes formed in the second interlayer insulating film 117. Also,
The power supply line (V) is connected to the impurity region 113 via a contact hole formed in the second interlayer insulating film 117. Then, the connection wiring 118 is interposed between the second interlayer insulating films 117.
, And overlaps with the active layer 130.

Then, the source line (S) and the connection wiring 11
8 and 119, and a capacitor insulating film 170 is formed on the second interlayer insulating film 117 so as to cover the power supply line (V). As the material of the capacitor insulating film 170, any of an inorganic material and an organic material can be used as long as the material has an insulating property.
However, it is important that the selectivity of etching differs from that of the third interlayer insulating film 120 to be formed later.

Next, a third interlayer insulating film 120 is formed on the capacitor insulating film 170. Part of the third interlayer insulating film overlapping with the connection wiring 118 is removed by etching, so that the capacitive insulating film 170 is exposed.
With the above structure, the capacitor wiring 121 to be formed later, the capacitor insulating film 170, and the connection wiring 118 are sequentially formed in contact with each other.

On the third interlayer insulating film 120, a capacitor wiring 121 and a pixel electrode 122 are formed.

The pixel electrode 122 is formed on the connection wiring 119 via a contact hole formed in the third interlayer insulating film 120.

In this embodiment, the storage capacitor 104 is formed in a portion where the capacitor insulating film 170 is formed between the connection wiring 118 and the capacitor wiring 121. In addition,
In the present embodiment, the capacitor insulating film 170 is formed as the third interlayer insulating film 12.
Although described as a layer different from 0, the capacitance insulating film 17
0 can be regarded as a part of the third interlayer insulating film 120 including a plurality of insulating film layers.

The structure of this embodiment can be implemented by freely combining with any of the structures of Embodiment 1, Embodiment 3 to Embodiment 9.

(Embodiment 11) Since the light-emitting device is of a self-luminous type, it has better visibility in a bright place and a wider viewing angle than a liquid crystal display. Therefore, it can be used for display portions of various electronic devices.

Examples of electronic equipment using the light emitting device of the present invention include a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproducing device (car audio, audio component, etc.), a notebook personal computer, Game devices, portable information terminals (mobile computers, mobile phones, portable game machines, electronic books, etc.), and image reproducing devices provided with recording media (specifically, DVD: Digital Versat)
device that reproduces a recording medium such as an ile Disc and displays the image of the recording medium). In particular,
It is desirable to use a light-emitting device for a portable information terminal that frequently views a screen from an oblique direction, since a wide viewing angle is regarded as important. FIG. 18 shows specific examples of these electronic devices.

FIG. 18A shows an OLED display device.
A housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like are included.
The light emitting device of the present invention can be used for the display portion 2003. Since the light-emitting device is a self-luminous type, it does not require a backlight and can be a display portion thinner than a liquid crystal display. The OLED display device is for personal computers, TVs
All display devices for displaying information, such as for broadcast reception and advertisement display, are included.

FIG. 18B shows a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103,
An operation key 2104, an external connection port 2105, a shutter 2106, and the like are included. The light emitting device of the present invention has a display unit 210.
2 can be used.

FIG. 18C shows a notebook personal computer, which includes a main body 2201, a housing 2202, and a display portion 2.
203, keyboard 2204, external connection port 220
5, including a pointing mouse 2206 and the like. The light emitting device of the present invention can be used for the display portion 2203.

FIG. 18D shows a mobile computer, which includes a main body 2301, a display portion 2302, and a switch 230.
3, an operation key 2304, an infrared port 2305, and the like. The light emitting device of the present invention can be used for the display portion 2302.

FIG. 18E shows a portable image reproducing apparatus (specifically, a DVD reproducing apparatus) provided with a recording medium, and includes a main body 2401, a housing 2402, a display portion A 2403, a display portion B 2404, and a recording medium ( DVD, etc.) reading unit 240
5, operation keys 2406, a speaker unit 2407, and the like. The display portion A 2403 mainly displays image information, and the display portion B 2404 mainly displays character information. In the light emitting device of the present invention, the display portions A, B 2403 and 2404 are used.
Can be used. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 18F shows a goggle type display (head mounted display),
1, including a display unit 2502 and an arm unit 2503. The light emitting device of the present invention can be used for the display portion 2502.

FIG. 18G shows a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, and an image receiving portion 260.
6, a battery 2607, a voice input unit 2608, operation keys 2609, and the like. The light emitting device of the present invention has a display section 260.
2 can be used.

FIG. 18H shows a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, a voice input portion 2704, a voice output portion 2705, operation keys 2706,
An external connection port 2707, an antenna 2708, and the like are included.
The light emitting device of the present invention can be used for the display portion 2703. Note that the display portion 2703 displays white characters on a black background, so that power consumption of the mobile phone can be suppressed.

If the light emission luminance of the organic light emitting material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used for a front type or rear type projector.

[0208] The electronic device may be the Internet or C.
Information distributed through an electronic communication line such as an ATV (cable television) is frequently displayed, and in particular, opportunities to display moving image information are increasing. Since the response speed of the organic light emitting material is very high, the light emitting device is preferable for displaying moving images.

[0209] Since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is reduced as much as possible. Therefore, when a light emitting device is used for a portable information terminal, particularly a display portion mainly for character information such as a mobile phone or a sound reproducing device, the light emitting portion is driven to form character information with a non-light emitting portion as a background. It is desirable to do.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be used for electronic devices in various fields. Further, the electronic apparatus of this embodiment may use the light emitting device having any of the structures shown in Embodiments 1 to 9.

[0211]

According to the present invention, since the TFT and the storage capacitor can be formed so as to overlap with each other, the capacitance of the storage capacitor can be increased while suppressing a decrease in the aperture ratio. Therefore, a change in gate voltage due to leakage or the like can be suppressed.
It is possible to suppress a change in the brightness of the ED and to suppress flickering of the screen.

In addition, suppressing a decrease in the aperture ratio leads to suppressing a reduction in the effective light emitting area of the pixel. The larger the effective light-emitting area, the higher the brightness of the screen. Therefore, power consumption can be reduced by the structure of the present invention.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a pixel of a light emitting device of the present invention.

FIG. 2 is a cross-sectional view of a pixel of the light emitting device of the present invention.

FIG. 3 illustrates a manufacturing process of a light-emitting device of the present invention.

FIG. 4 is a top view of a light emitting device of the present invention.

FIG. 5 illustrates a manufacturing process of a light-emitting device of the present invention.

FIG. 6 is a top view of a light emitting device of the present invention.

FIG. 7 illustrates a manufacturing process of a light-emitting device of the present invention.

FIG. 8 is a top view of the light emitting device of the present invention.

FIG. 9 is a top view of a light emitting device of the present invention.

FIG. 10 is a cross-sectional view of a pixel of a light-emitting device of the present invention.

FIG. 11 is a cross-sectional view of a pixel of a light emitting device of the present invention.

FIG. 12 is a cross-sectional view of a pixel of a light emitting device of the present invention.

FIG. 13 is a cross-sectional view of a pixel of a light-emitting device of the present invention.

FIG. 14 is a circuit diagram of a pixel portion of a light emitting device of the present invention.

FIG. 15 is a timing chart in analog driving.

FIG. 16 is a timing chart in digital driving.

17A and 17B are a top view and a cross-sectional view of a light-emitting device of the present invention.

FIG. 18 is a diagram of an electronic device using the light-emitting device of the present invention.

FIG. 19 is a graph showing transistor characteristics of a driving TFT.

FIG. 20 is a cross-sectional view of a pixel of a light-emitting device of the present invention.

FIG. 21 is a cross-sectional view of a pixel of a light-emitting device of the present invention.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Munehiro Asami 398 Hase, Atsugi-shi, Kanagawa F-term in Semi-Conductor Energy Laboratory Co., Ltd. 3K007 AB02 AB17 AB18 BA06 BB07 CB01 DB03 FA01 GA04 5C094 AA07 AA10 AA15 AA43 AA48 BA03 BA27 CA19 DA13 DB01 DB04 FA01 FA02 FB01 FB12 FB14 FB15 FB20 5F110 AA06 BB02 BB04 CC02 CC08 DD01 DD02 DD03 DD13 DD14 DD15 DD17 EE01 EE04 EE05 EE06 EE08 EE14 EE15 EE28 EE37 EE44 GG 01 GG FF GG FF GG FF GG FF GG FF GG FF GG FF GG FF GG FF GG HJ04 HJ23 HL03 HL04 HL06 HL11 HL22 HL23 HM15 HM18 NN03 NN04 NN22 NN23 NN24 NN27 NN34 NN35 NN37 NN38 NN42 NN44 NN45 NN46 NN47 NN48 NN73 PP01 PP03 PP05 PP06 Q10 Q29 QQ19

Claims (26)

[Claims] 1. A light emitting device having a TFT and a storage capacitor, wherein the storage capacitor includes a connection wiring formed on an interlayer insulating film covering a gate electrode of the TFT, a capacitance wiring, A light-emitting device, comprising: a connection wiring; and an insulating film formed between the capacitor wiring, wherein the connection wiring is connected to a source region or a drain region of the TFT. 2. A light emitting device having a TFT and a storage capacitor, wherein the storage capacitor includes a connection wiring formed on an interlayer insulating film covering a gate electrode of the TFT, a capacitance wiring, An insulating film formed between the connection wiring and the capacitor wiring, wherein the connection wiring is connected to a source region or a drain region of the TFT, and the connection wiring is an active layer of the TFT. A light emitting device, wherein the light emitting device overlaps with the light emitting device. 3. A light emitting device having a TFT, a storage capacitor, and an OLED, wherein the storage capacitor includes a connection wiring formed on an interlayer insulating film covering a gate electrode of the TFT, and the OLED. And a capacitor line formed on the same interlayer insulating film together with the pixel electrode of the TFT, and an insulating film formed between the connection line and the capacitor line, wherein the connection line is a source of the TFT. A light-emitting device which is connected to a region or a drain region. 4. A light-emitting device having a TFT, a storage capacitor, and an OLED, wherein the storage capacitor includes a connection wiring formed on an interlayer insulating film covering a gate electrode of the TFT, and the OLED. And a capacitor line formed on the same interlayer insulating film together with the pixel electrode of the TFT, and an insulating film formed between the connection line and the capacitor line, wherein the connection line is a source of the TFT. A light emitting device connected to a region or a drain region, wherein the connection wiring overlaps with an active layer of the TFT. 5. A light emitting device having a TFT, a storage capacitor, and an OLED, wherein the storage capacitor includes a connection wiring formed on an interlayer insulating film covering a gate electrode of the TFT, and the OLED. And a capacitor line formed on the same interlayer insulating film together with the pixel electrode of the TFT, and an insulating film formed between the connection line and the capacitor line, wherein the connection line is a source of the TFT. A light emitting device connected to the region or the drain region, wherein the luminance of the OLED is controlled by an analog video signal. 6. A light emitting device having a TFT, a storage capacitor, and an OLED, wherein the storage capacitor includes a connection wiring formed on an interlayer insulating film covering a gate electrode of the TFT, and the OLED. And a capacitor line formed on the same interlayer insulating film together with the pixel electrode of the TFT, and an insulating film formed between the connection line and the capacitor line, wherein the connection line is a source of the TFT. A light emitting device which is connected to a region or a drain region, wherein the connection wiring overlaps an active layer of the TFT, and the luminance of the OLED is controlled by an analog video signal. 7. A source line, a power supply line, and a switching T
A light emitting device including an FT, a driving TFT, a storage capacitor, and an OLED, wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a connection line. One of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is connected to a pixel electrode of the OLED. The storage capacitor is formed on an interlayer insulating film covering a gate electrode of the switching TFT; and the storage capacitor is formed of the connection wiring, the capacitance wiring, and an insulation formed between the connection wiring and the capacitance wiring. A light-emitting device comprising: a light-emitting device; 8. A source line, a power supply line, and a switching T
A light emitting device including an FT, a driving TFT, a storage capacitor, and an OLED, wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a connection line. One of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is connected to a pixel electrode of the OLED. The storage capacitor is formed on an interlayer insulating film covering a gate electrode of the switching TFT, and the storage capacitor is formed between the capacitor electrode, the power supply line, and the capacitor electrode and the power supply line. A light-emitting device having an insulating film. 9. A source line, a power supply line, and a switching T
A light emitting device including an FT, a driving TFT, a storage capacitor, and an OLED, wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a connection line. One of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is connected to a pixel electrode of the OLED. The storage capacitor is formed on an interlayer insulating film covering a gate electrode of the switching TFT; and the storage capacitor is formed of the connection wiring, the capacitance wiring, and an insulation formed between the connection wiring and the capacitance wiring. A light-emitting device, wherein the connection wiring overlaps an active layer of the switching TFT. 10. A light-emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a storage capacitor, and an OLED, wherein the switching TFT has one of a source region and a drain region. Is connected to the source line, the other is connected to the gate electrode of the driving TFT via a connection wiring, one of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is Is connected to a pixel electrode included in the OLED, the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT, and the storage capacitor is formed of the capacitor electrode and the power supply line. And an insulating film formed between the capacitor electrode and the power supply line. The connection wiring overlaps with the active layer of the switching TFT. The light emitting device according to claim Rukoto. 11. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a storage capacitor, and an OLED, wherein the switching TFT has one of a source region and a drain region. Is connected to the source line, the other is connected to the gate electrode of the driving TFT via a connection wiring, one of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is Is connected to a pixel electrode included in the OLED, the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT, and the storage capacitor is formed of the connection wiring, the capacitance wiring, And an insulating film formed between the connection wiring and the capacitance wiring, and the drive is performed by an analog video signal input to the source line. The drain current of the use TFT is controlled, the light emitting device in which the drain current is equal to or flowing through the OLED. 12. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a storage capacitor, and an OLED, wherein one of a source region and a drain region of the switching TFT is one of Is connected to the source line, the other is connected to the gate electrode of the driving TFT via a connection wiring, one of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is Is connected to a pixel electrode included in the OLED, the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT, and the storage capacitor is formed of the capacitor electrode and the power supply line. And an insulating film formed between the capacitance electrode and the power supply line, and the drive is performed by an analog video signal input to the source line. The drain current of the use TFT is controlled, the light emitting device in which the drain current is equal to or flowing through the OLED. 13. A light-emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a storage capacitor, and an OLED, wherein the switching TFT has one of a source region and a drain region. Is connected to the source line, the other is connected to the gate electrode of the driving TFT via a connection wiring, one of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is Is connected to a pixel electrode included in the OLED, the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT, and the storage capacitor is formed of the connection wiring, the capacitance wiring, An insulating film formed between the connection wiring and the capacitor wiring, wherein the connection wiring overlaps with an active layer of the switching TFT. Ri, the drain current of the driving TFT by an analog video signal inputted to the source line is controlled, the light emitting device in which the drain current is equal to or flowing through the OLED. 14. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a storage capacitor, and an OLED, wherein one of a source region and a drain region of the switching TFT is one of a source region and a drain region. Is connected to the source line, the other is connected to the gate electrode of the driving TFT via a connection wiring, one of a source region and a drain region of the driving TFT is connected to the power supply line, and the other is Is connected to a pixel electrode included in the OLED, the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT, and the storage capacitor is formed of the capacitor electrode and the power supply line. And an insulating film formed between the capacitor electrode and the power supply line. The connection wiring overlaps with the active layer of the switching TFT. Ri, the drain current of the driving TFT by an analog video signal inputted to the source line is controlled, the light emitting device in which the drain current is equal to or flowing through the OLED. 15. The light emitting device according to claim 1, wherein the insulating film is formed by using an anodic oxidation method. 16. A light emitting device comprising a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, and an OLED, wherein One of a source region and a drain region of the TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring. Is connected to the power supply line, the other is connected to a pixel electrode included in the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Of the connection wiring, the capacitance wiring,
A first insulating film formed between the connection wiring and the capacitor wiring, wherein the second storage capacitor has a capacitance electrode made of the same conductive film as a gate electrode of the driving TFT; A semiconductor layer formed simultaneously with the active layer of the switching TFT and the driving TFT, and a second insulating film formed between the capacitor electrode and the semiconductor layer. Light emitting device. 17. A light emitting device comprising a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, and an OLED, wherein One of a source region and a drain region of the TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring. Is connected to the power supply line, the other is connected to a pixel electrode included in the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Of the connection wiring, the capacitance wiring,
A first insulating film formed between the connection wiring and the capacitor wiring, wherein the second storage capacitor has a capacitance electrode made of the same conductive film as a gate electrode of the driving TFT; A light emitting device comprising: the power supply line; and the interlayer insulating film formed between the capacitor electrode and the power supply line. 18. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, and an OLED, wherein One of a source region and a drain region of the TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring. Is connected to the power supply line, the other is connected to a pixel electrode included in the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Of the connection wiring, the capacitance wiring,
A first insulating film formed between the connection wiring and the capacitor wiring, wherein the second storage capacitor has a capacitance electrode made of the same conductive film as a gate electrode of the driving TFT; A semiconductor layer formed simultaneously with the active layer of the switching TFT and the driving TFT; and a second insulating film formed between the capacitor electrode and the semiconductor layer. Wherein the light emitting device overlaps an active layer of the switching TFT. 19. A light emitting device comprising a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, and an OLED, wherein One of a source region and a drain region of the TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring. Is connected to the power supply line, the other is connected to a pixel electrode included in the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Has a connection wiring, the power supply line, and a first insulating film formed between the connection wiring and the power supply line. A capacitor electrode made of the same conductive film as a gate electrode of the driving TFT; the power supply line; and the interlayer insulating film formed between the capacitor electrode and the power supply line. Wherein the light emitting device overlaps an active layer of the switching TFT. 20. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, a third storage capacitor, and an OLED. Wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring; One of the region and the drain region is connected to the power supply line, the other is connected to a pixel electrode of the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Wherein the first storage capacitor includes: the connection wiring; a capacitance wiring;
A first insulating film formed between the connection wiring and the capacitor wiring, wherein the second storage capacitor has a capacitance electrode made of the same conductive film as a gate electrode of the driving TFT; A semiconductor layer formed simultaneously with the active layer of the switching TFT and the driving TFT; and a second insulating film formed between the capacitor electrode and the semiconductor layer. Wherein the storage capacitor includes the capacitor electrode, the power supply line, and the interlayer insulating film provided between the capacitor electrode and the power supply line. 21. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, a third storage capacitor, and an OLED. Wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring; One of the region and the drain region is connected to the power supply line, the other is connected to a pixel electrode of the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Wherein the first storage capacitor has the connection wiring, the power supply line, and a first insulating film formed between the connection wiring and the power supply line; The storage capacitor of No. 2 includes a capacitor electrode formed of the same conductive film as a gate electrode of the driving TFT, a semiconductor layer formed simultaneously with an active layer of the switching TFT and the driving TFT, and A second insulating film formed between semiconductor layers, wherein the third storage capacitor is provided between the capacitor electrode, the power line, and the capacitor electrode and the power line. A light-emitting device comprising the above-mentioned interlayer insulating film. 22. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, a third storage capacitor, and an OLED. Wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring; One of the region and the drain region is connected to the power supply line, the other is connected to a pixel electrode of the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Wherein the first storage capacitor includes: the connection wiring; a capacitance wiring;
A first insulating film formed between the connection wiring and the capacitor wiring, wherein the second storage capacitor has a capacitance electrode made of the same conductive film as a gate electrode of the driving TFT; A semiconductor layer formed simultaneously with the active layer of the switching TFT and the driving TFT; and a second insulating film formed between the capacitor electrode and the semiconductor layer. Has a capacitance electrode, the power supply line, and the interlayer insulating film provided between the capacitance electrode and the power supply line, and the connection wiring is configured to activate the switching TFT. A light-emitting device, which overlaps with a layer. 23. A light emitting device having a source line, a power supply line, a switching TFT, a driving TFT, a first storage capacitor, a second storage capacitor, a third storage capacitor, and an OLED. Wherein one of a source region and a drain region of the switching TFT is connected to the source line, and the other is connected to a gate electrode of the driving TFT via a connection wiring; One of the region and the drain region is connected to the power supply line, the other is connected to a pixel electrode of the OLED, and the connection wiring is formed on an interlayer insulating film covering a gate electrode of the switching TFT. Wherein the first storage capacitor has the connection wiring, the power supply line, and a first insulating film formed between the connection wiring and the power supply line; The storage capacitor of No. 2 includes a capacitor electrode formed of the same conductive film as a gate electrode of the driving TFT, a semiconductor layer formed simultaneously with an active layer of the switching TFT and the driving TFT, and A second insulating film formed between semiconductor layers, wherein the third storage capacitor is provided between the capacitor electrode, the power line, and the capacitor electrode and the power line. A light-emitting device, wherein the connection wiring overlaps an active layer of the switching TFT. 24. A light emitting device according to claim 16, wherein said insulating film is formed by using an anodic oxidation method. 25. The light emitting device according to claim 1, wherein the connection wiring and the pixel electrode are formed of the same conductive film. 26. A light emitting device provided with a plurality of pixels each having a TFT and a storage capacitor, wherein all the storage capacitors of the plurality of pixels share one capacitor wiring, The storage capacity of each of the plurality of pixels is the same as that of the TFT
A connection line formed on an interlayer insulation film covering the gate electrode of the first and second lines, and an insulation film formed between the connection line and the one capacitance line. Wherein the one capacitor wiring and the connection wiring overlap an active layer of the TFT included in each of the plurality of pixels.