JP2002289801A - Ferroelectric memory device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a ferroelectric memory device where the deterioration of polarization characteristic is prevented, and a square hysteresis shape can be obtained, and to provide its manufacturing method, a matrix type ferroelectric substance memory device and its manufacturing method. SOLUTION: A ferroelectric substance capacitor 400 has a three-layer structure of a ferroelectric substance film 600, a lower electrode part 500 and an upper electrode part 700. The ferroelectric substance film 600 is formed into the same pattern as the lower electrode part 500. An insulation film 800 is positioned covering the ferroelectric substance film 600 and side surfaces of the lower electrode part 500, and the insulation film 800 and the ferroelectric film 600 form the same plane. The ferroelectric substance film 600 can be formed on a surface which is always flat, and as a result, the ferroelectric substance capacitor 400 can obtain superior polarization characteristic whose hysteresis shape is square. Capacitors of a second layer, a third layer, etc., have the same structure by planarizing, and superior polarization characteristic, whose hysteresis shape is square can be obtained, even if lamination of ferroelectric substance capacitors is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device having a capacitor including a ferroelectric film, and a method of manufacturing the same.
A method for manufacturing a ferroelectric memory device.

[0002]

2. Description of the Related Art A ferroelectric film has spontaneous polarization.
It has features such as high dielectric constant. In the field of semiconductor devices, research on ferroelectric memory devices and large-capacitance capacitors utilizing these characteristics of ferroelectric films has been advanced. In the case of 2T2C or 1T1C, which is a normal ferroelectric memory device, a first electrode portion forming a lower electrode of a capacitor in order to avoid difficulties in processing electrodes and a ferroelectric film and to electrically short-circuit upper and lower electrodes of the capacitor. And the ferroelectric film has the same pattern, and the second electrode portion, which forms the capacitor upper electrode, uses a structure smaller than the pattern of the first electrode portion and the ferroelectric film, or A structure has been used in which a ferroelectric film is positioned so as to cover the electrode portion, and the first electrode portion and the second electrode portion do not contact each other.

[0003]

If the second electrode portion, which is the former structure, is made smaller than the first electrode portion and the ferroelectric film, the second electrode portion cannot serve as the wiring. However, a separate wiring layer is required. In the case of the latter structure, in which the ferroelectric film is positioned so as to cover the first electrode portion, the ferroelectric film is formed on the step formed by the first electrode portion. Therefore, the thickness of the ferroelectric film is not uniform,
Alternatively, the crystallinity is reduced, the polarization characteristics of the ferroelectric capacitor are reduced, and there is a problem that a rectangular voltage-polarizability hysteresis curve cannot be obtained.

In particular, in the case of a matrix type ferroelectric memory device, the first electrode portion and the second electrode portion generally have a wiring-like structure in which they cross each other. In that case, an insulating film is required between the first electrode portion and the second electrode portion to prevent an electrical short. The insulating film is usually formed of a ferroelectric. As a result, the above problem occurs.

[0005] The matrix type memory is disclosed in Japanese Patent Laid-Open
As described in 154388, the memory cell portion does not have a transistor, has an electrode portion composed of a plurality of lines perpendicular to each other, and has a ferroelectric capacitor in a region where the upper and lower electrode portions intersect. , A ferroelectric memory device, and an example of its operation is as follows. Read operation: Read voltage V0 is applied to the capacitor of the selected cell. This also serves as the write operation of `0`. At this time, the current flowing through the selected bit line or the potential when the bit line is set to high impedance is read by the sense amplifier. Further, at this time, a predetermined voltage is applied to the capacitors of the non-selected cells in order to prevent crosstalk during reading.

Writing operation: In the case of writing `1`,
A voltage of -V0 is applied to the capacitor of the selected cell. In the case of writing `0`, a voltage that does not reverse the polarization of the selected cell is applied to the capacitor of the selected cell, and the` 0` state written during the read operation is maintained. At this time, a predetermined voltage is applied to the capacitors of the non-selected cells in order to prevent crosstalk during writing.

[0007] Unlike a normal 2T2C or 1T1C ferroelectric memory device, a matrix type memory is formed of only ferroelectric capacitors without transistors and can be highly integrated. Further, the ferroelectric capacitors can be stacked. For this reason, a ferroelectric capacitor having a square hysteresis-shaped polarization characteristic is required from the 2T2C or 1T1C ferroelectric memory device, which has been studied for a long time. Further, for stacking ferroelectric capacitors, it is necessary to flatten the ferroelectric capacitor portion.

[0008] It is an object of the present invention to prevent deterioration of polarization characteristics,
An object of the present invention is to provide a ferroelectric memory device having a rectangular hysteresis-shaped polarization characteristic and a method of manufacturing the same, and a matrix-type ferroelectric memory device and a method of manufacturing the same.

[0009]

According to the present invention, there is provided a ferroelectric device comprising a first electrode portion, a second electrode portion, and a ferroelectric film between the first electrode portion and the second electrode portion. In the formation of the body memory device, a step of processing the first electrode portion, a step of forming a ferroelectric film, a step of forming an insulating film, and planarizing the insulating film, Exposing the surface of the ferroelectric film by removing the insulating film on the ferroelectric film, leaving only the side surface of the ferroelectric film, forming a second electrode portion, and processing the second electrode portion Characterized by a step of performing In order to form the ferroelectric film before processing the first electrode portion, the surface of the memory element has a flat shape at the time of film formation. Therefore, the ferroelectric film has good crystallinity, and as a result, the ferroelectric capacitor formed by the ferroelectric film has a hysteresis-shaped polarization characteristic with good squareness. Further, the second electrode portion,
Since the ferroelectric film or the insulating film is located between the first electrode portion and the first electrode portion, no electric short circuit occurs.

In the present invention, the crystallization of the ferroelectric film may be performed after the insulating film is planarized. In the flattening step, the exposed ferroelectric film surface is damaged and its crystallinity is impaired. By performing crystallization after flattening, crystallization and recovery from damage can be performed simultaneously, and the number of steps can be reduced. Further, the crystallization of the ferroelectric film causes unevenness of crystal grains. Before crystallization, the ferroelectric film, in order to process the first electrode portion, during processing, since the ferroelectric film has a smooth shape,
Processing becomes easy.

In the present invention, the crystallization of the ferroelectric film may be performed after the formation of the second electrode portion. According to this method, as in the above method, by performing crystallization after flattening, crystallization and recovery from damage can be performed simultaneously, and the number of steps can be reduced. Further, the crystallization of the ferroelectric film causes unevenness of crystal grains. Before crystallization, the ferroelectric film and the first electrode portion, in order to process, during processing, since the ferroelectric film has a smooth shape,
Processing becomes easy.

The present invention can take the following aspects. The insulating film is formed at least by a coating method or a CVD method by a reaction between TEOS (tetraethoxysilane) and ozone,
A manufacturing method characterized in that the film is formed by any one of the methods. Either of the above film forming methods, or a stacked film of both may be used, and any one of the above film forming methods and other methods,
It may be a laminated film with an insulating film. By using these methods, an insulating film which can be easily planarized can be formed. Therefore, the insulating film and the ferroelectric film can form the same plane. Further, an insulating film formed by these methods has a property of having a low dielectric constant. Therefore, the wiring capacitance generated in the first electrode portion or the second electrode portion can be reduced, and the operation speed of the ferroelectric memory device can be improved.

The present invention can take the following aspects. The method according to claim 1, wherein the insulating film comprises at least one of aluminum oxide, tantalum oxide, zirconium oxide, and aluminum oxide and a silicon oxide film. The metal oxide film does not transmit hydrogen. The metal oxide film is located to cover a side surface of the ferroelectric film. Therefore, in the manufacturing process after the formation of the ferroelectric capacitor, hydrogen is prevented from reducing the ferroelectric film, so that the crystallinity of the ferroelectric film is not impaired. Further, the metal oxide film does not interact with the ferroelectric film. The silicon oxide film interacts with the ferroelectric film, and the crystallinity of the ferroelectric film is impaired. The metal oxide film is positioned so as to cover the side surface of the ferroelectric film, and no interaction occurs because the silicon oxide film is not in direct contact with the ferroelectric film. As a result, the ferroelectric capacitor can obtain polarization characteristics having a hysteresis shape with good squareness.

The present invention can take the following aspects. The planarization of the insulating film is performed by CMP (Chemical Mechanical Polishing) or
A manufacturing method characterized in that etching is performed by etching back the entire surface. The planarization can be easily performed by CMP or etch back.

The present invention can take the following aspects. A method of manufacturing a ferroelectric memory device, wherein a material of the first electrode portion or the second electrode portion is made of any one of platinum, iridium, and ruthenium. Platinum, iridium and ruthenium do not interact with the ferroelectric film. Therefore, the crystallinity of the ferroelectric film is not impaired, and the ferroelectric capacitor can obtain polarization characteristics having a hysteresis shape with good squareness. Further, diffusion of elements such as oxygen forming the ferroelectric film is prevented, and as a result, the MOS transistor does not deteriorate.

The present invention can take the following aspects. The material of the first electrode portion, or the material of the second electrode portion is composed of any one of platinum, iridium, ruthenium and two or more oxide films thereof, and a surface in contact with the ferroelectric is a metal film. Of manufacturing a ferroelectric memory device. Platinum, iridium and ruthenium oxide films have conductivity and do not transmit hydrogen. By using these oxide films as electrodes, the crystallinity of the ferroelectric film is prevented from being damaged by hydrogen. The oxide film,
The film thickness that does not allow passage of hydrogen is usually 10 nm or more, and more preferably 25 to 75 nm. Further, when the electrode surface in contact with the ferroelectric film is a metal surface, the crystal orientation of the ferroelectric film is improved. As a result, the ferroelectric capacitor can obtain polarization characteristics having a hysteresis shape with good squareness.

The present invention can take the following aspects. A method of manufacturing a ferroelectric memory device, wherein the ferroelectric film is formed by coating. According to the present invention, the element surface before forming the second electrode portion has a flat shape. for that reason,
An electrode with good crystallinity can be easily formed even by a low-cost and simple coating method.

The present invention can take the following aspects. A method of manufacturing a ferroelectric memory device, wherein the ferroelectric film is formed by an LSMCD. According to the LSMCD, crystallization of the ferroelectric film can be performed by heat treatment at a lower temperature than the above coating method. Therefore, during crystallization, there is little influence on a transistor which is another element. Also, LSMCD
According to the method, the ferroelectric film can be easily controlled by the coating method, and a polarization characteristic of a ferroelectric capacitor having a square hysteresis shape can be obtained.

The present invention can take the following aspects. A method of manufacturing a ferroelectric memory device, wherein the ferroelectric film is formed by a gas phase reaction of an organic compound. According to this method, the crystallization temperature of the ferroelectric film can be lower than that of the LSMCD, and a ferroelectric film having better crystal orientation can be obtained. Therefore, it is possible to obtain a ferroelectric capacitor polarization characteristic having a square hysteresis shape without affecting other transistors.

The present invention can take the following aspects. A method of manufacturing a ferroelectric memory device, comprising forming the ferroelectric film by a sputtering method. The sputtering method is as described above,
A film can be formed using a material that is less expensive than a material used in a coating method, an LSMCD, or a gas phase reaction. In addition, coating method, LSM
Higher film forming speed and higher wafer processing capacity than CD and gas phase reactions. Therefore, a ferroelectric memory device can be manufactured at low cost.

The present invention can take the following aspects. A method for manufacturing a ferroelectric memory device, comprising forming the ferroelectric film by an immersion method. Since the immersion method does not use gas or vacuum, film formation can be performed with a simple apparatus. for that reason,
Equipment used in the immersion method is less expensive than other equipment. As a result, a ferroelectric memory device can be manufactured at low cost.

According to the present invention, there is provided a ferroelectric memory device provided with a capacitor including a lower electrode portion, an upper electrode portion, and a ferroelectric material between the lower electrode portion and the upper electrode portion. The lower electrode and the ferroelectric film structure
Repeated, a ferroelectric memory device having two or more layers of capacitors, wherein the upper electrode of the first layer capacitor also serves as the lower electrode of the capacitor of the upper layer, the lower electrode portion, The ferroelectric film and the ferroelectric film form the same pattern, the insulating film is positioned so as to cover the side surfaces of the lower electrode portion and the ferroelectric film, and the insulating film and the ferroelectric film Are flattened to form the same plane.

The lower electrode surface, which is the lower layer of the ferroelectric film, forms a flat surface. Therefore, the ferroelectric film has a good crystal, and the ferroelectric capacitor has a square hysteresis polarization characteristic.

The lower layer of the lower electrode portion forming the second and subsequent capacitors is flattened, and is composed of an insulating film and a ferroelectric film forming the same plane. The structure is the same for the third layer. Therefore, the laminated ferroelectric capacitors have the same structure in all the layers, and the characteristics of each of the capacitors are uniform. As a result, the ferroelectric capacitor can be easily performed.

The present invention can take the following aspects. In the above structure, the insulating film includes any one of a metal oxide film of aluminum oxide, tantalum oxide, zirconium oxide, hafnium oxide, and titanium oxide, and the insulating film covers a side surface of the ferroelectric film. And the metal oxide film is in contact with the ferroelectric side surface, and the insulating film,
The ferroelectric film is flattened to form the same plane.

Aluminum oxide, tantalum oxide, zirconium oxide, hafnium oxide, and titanium oxide have the property of preventing the permeation of hydrogen. Usually, such a film thickness is 10 nm or more, more preferably 20 nm to 50 nm. The metal oxide film has an effect of preventing hydrogen from reaching the ferroelectric film by directly covering the side surface of the ferroelectric film. Therefore, the ferroelectric film is not reduced by hydrogen. By being formed on a flat surface, the crystallinity of the ferroelectric film is improved, and in addition, due to the synergistic effect of not being reduced, the ferroelectric capacitor is
It has good square-shaped hysteresis-shaped polarization characteristics.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be described below with reference to the drawings by dividing them into a structure and a manufacturing method.

[Manufacturing Method of Embodiment 1 of the Present Invention] FIGS.
FIG. 8 is a process chart for explaining the manufacturing method according to the first embodiment of the present invention.

First, an insulating film 101 is formed on a silicon substrate 100 as shown in FIG. The present invention is applied to a matrix type ferroelectric memory device. A transistor forming a peripheral circuit of the memory is formed before the insulating film 101 is formed, and a general method can be used for the process.

Next, as shown in FIG. 2, the first electrode portion 102 is formed. This method is generally performed by a sputtering method, and may be performed by a CVD method. The material is made of any one of platinum, iridium and ruthenium, or a laminated film made of a combination of the above-mentioned metal and an oxide film. The thickness of the electrode is usually 100 to 300 nm, more preferably 150 to 250
nm. When a stacked film is used, the oxide film has a thickness that does not allow passage of hydrogen, and is usually 10 nm or more, more preferably 25 to 75 nm.

Next, as shown in FIG.
Is formed. The thickness of the ferroelectric film is a thickness having polarization characteristics, and is usually 50 to 200 nm, and more preferably 50 to 150 nm. The material of the ferroelectric film is
For example, there are PZT (lead zirconate titanate) and SBT (strontium bismuth tantalate). These materials have a hysteresis shape with good squareness. In particular, a material having good squareness is preferably 40:60 or 20:80 in the composition of PZT. Further, it may be an organic material.

Next, as shown in FIG.
2 and the ferroelectric film 103 are processed. Both membranes are
Photolithography is performed with the same pattern, and etching is performed simultaneously.

Next, an insulating film 104 is formed as shown in FIG. The insulating film 104 may be formed by any of a coating method and a CVD method, and may be a stacked film obtained by combining a plurality of methods. Preferably, the reaction gas is a silicon oxide film composed of TEOS and ozone. Since this silicon oxide film has porosity, the dielectric constant is low, and the first electrode 10
2. The wiring capacitance generated in the second electrode 105 can be reduced. The film thickness of the insulating film is a film thickness necessary for flattening in the next step, and is a film thickness necessary for filling a space between the first electrode portion and the ferroelectric film. Usually, such a film thickness is at least half of the space width.

Next, as shown in FIG. 6, the insulating film 104 is flattened, and the surface of the ferroelectric film 103 is exposed. The planarization method may be any one of etch back and CMP, or a combination thereof. After flattening, ferroelectric film 10
Crystallization of 3 may be performed. The crystallization is usually performed by heat treatment at 450 to 800 ° C. in an oxygen atmosphere, plasma treatment in an oxygen atmosphere, or heat treatment at 400 to 650 ° C. in an ozone atmosphere.
Done by either. By performing crystallization after flattening, the damage of the ferroelectric film 103 caused by the flattening can be recovered.

Next, as shown in FIG. 7, a second electrode portion 105 is formed. This method is generally performed by a sputtering method, and may be performed by a CVD method. The material is made of any one of platinum, iridium and ruthenium, or a laminated film made of a combination of the above-mentioned metal and an oxide film. The thickness of the electrode is usually 100 to 300 nm, more preferably 150 to 250
nm. When a stacked film is used, the oxide film has a thickness that does not allow passage of hydrogen, and is usually 10 nm or more, and more preferably 25 to 75 nm. The crystallization of the ferroelectric film may be performed after the formation of the second electrode portion instead of after the flattening described above. By performing crystallization after forming the second electrode portion 105, crystallization of the second electrode portion can be performed at the same time.

Next, as shown in FIG. 8, the second electrode portion 105 is processed. FIG. 8 is a diagram obtained by rotating FIG. 7 by 90 °.

According to the present embodiment, as shown in FIG.
A ferroelectric capacitor having a flat surface of the second electrode 105 was obtained.

[Manufacturing method according to Embodiment 2 of the present invention] FIGS. 9 to 1
FIG. 3 is a process chart for explaining the manufacturing method according to the second embodiment of the present invention.

First, the steps up to the step of processing the first electrode portion 102 and the ferroelectric film 103 shown in FIG.

Next, an oxide film 201 is formed as shown in FIG. The oxide film 201 is made of any one of aluminum oxide, tantalum oxide, zirconium oxide, hafnium oxide, and titanium oxide. A general method can be used as a film forming method. The thickness of oxide film 201 is sufficient to prevent hydrogen permeation. Usually, such a film thickness is 10 nm or more.

Next, an insulating film 202 is formed as shown in FIG. The insulating film 202 may be formed by any of a coating method and a CVD method, or may be a stacked film obtained by combining a plurality of methods. Preferably, the reaction gas is a silicon oxide film composed of TEOS and ozone. Since this silicon oxide film has porosity, the dielectric constant is low, and the first electrode 10
2. The wiring capacitance generated in the second electrode 105 can be reduced. The film thickness of the insulating film is a film thickness necessary for flattening in the next step, and is a film thickness necessary for filling a space between the first electrode portion and the ferroelectric film. Usually, such a film thickness is at least half of the space width.

Next, as shown in FIG. 11, the oxide film 201 and the insulating film 202 are flattened to expose the surface of the ferroelectric film 103. For planarization, either etch back or CMP, or a combination thereof may be used. After the planarization, the ferroelectric film 103 may be crystallized. The crystallization is usually performed by heat treatment at 450 to 800 ° C. in an oxygen atmosphere, plasma treatment in an oxygen atmosphere, and 40 ° C. in an ozone atmosphere.
It is performed by any one of a heat treatment at 0 to 650 ° C. By performing crystallization after flattening, the damage of the ferroelectric film 103 caused by the flattening can be recovered.

Next, as shown in FIG.
Is formed. This method is generally performed by a sputtering method, and may be performed by a CVD method. The material is platinum,
It is composed of a laminated film made of one of iridium and ruthenium, or a combination of an oxide film with the above metal. The thickness of the electrode is usually 100 to 300 nm, more preferably 150 to 2 nm.
50 nm. When a stacked film is used, the oxide film has a thickness that does not allow passage of hydrogen, and is usually 10 nm or more, more preferably 25 to 75 nm. The crystallization of the ferroelectric film may be performed after the formation of the second electrode portion instead of after the flattening described above. By performing crystallization after forming the second electrode portion 105, crystallization of the second electrode portion can be performed at the same time.

Next, the second electrode portion 105 is processed as shown in FIG. FIG. 13 is a diagram obtained by rotating FIG. 12 by 90 °.

According to the present embodiment, as shown in FIG.
A ferroelectric capacitor having a flat surface of the second electrode portion 105 was obtained. Further, since the side surface of the ferroelectric film 103 is covered with the oxide film 201 having a property of impervious to hydrogen, the ferroelectric film 103 was not reduced by hydrogen, and the polarization characteristics did not deteriorate. .

[Production Method of Embodiment 3 of the Present Invention] FIGS.
0 is a process drawing for explaining the manufacturing method of Example 3 of the present invention.

First, as shown in FIG.
Are formed in the same steps as in the first embodiment up to the step of forming a film.

Next, as shown in FIG. 15, the second ferroelectric film
301 is formed. The second ferroelectric film 301 includes the ferroelectric film 10
It is made of the same material and the same thickness as that of 3.

Next, as shown in FIG.
5 and the second ferroelectric film are simultaneously processed. Figure 1
FIG. 6 is a view obtained by rotating FIG. 15 by 90 °.

Next, as shown in FIG. 17, a second insulating film 302 is formed.
Is formed. The second insulating film 302 is made of the same material as the insulating film 104.

Next, as shown in FIG. 18, the second insulating film 302 is formed.
To expose the surface of the second ferroelectric film 301. For planarization, either etch back or CMP, or a combination thereof may be used. After the planarization, the ferroelectric film 301 may be crystallized. The crystallization is usually performed by heat treatment at 450 to 800 ° C. in an oxygen atmosphere, plasma treatment in an oxygen atmosphere, and 40 ° C. in an ozone atmosphere.
It is performed by any one of a heat treatment at 0 to 650 ° C. By performing crystallization after flattening, the damage of the ferroelectric film 301 caused by the flattening can be recovered.

Next, as shown in FIG. 19, a third electrode portion 303 is formed. This method is generally performed by a sputtering method, and may be performed by a CVD method. The material is made of any one of platinum, iridium and ruthenium, or a laminated film made of a combination of the above-mentioned metal and an oxide film. The thickness of the electrode is usually 100 to 300 nm, more preferably 150 to 250
nm. When a stacked film is used, the oxide film has a thickness that does not allow passage of hydrogen, and is usually 10 nm or more, more preferably 25 to 75 nm. The crystallization of the ferroelectric film may be performed after the formation of the third electrode portion instead of after the flattening described above. By performing crystallization after forming the third electrode portion 303, crystallization of the third electrode portion can be performed at the same time.

Next, as shown in FIG. 20, the third electrode portion 303 is processed. FIG. 20 is a view obtained by rotating FIG. 19 by 90 °.

According to the embodiment of the present invention, the second electrode portion 10
(5) The second ferroelectric film 301
Has good crystallinity. As a result, the second-layer ferroelectric capacitor composed of the second ferroelectric film 301 has polarization characteristics having square hysteresis, like the first-layer ferroelectric capacitor.

After the step of FIG. 19, the steps after the formation of the ferroelectric film may be repeated to form a ferroelectric capacitor of three or more layers. According to an embodiment of the present invention,
After electrode formation, the ferroelectric film is always flat, so that a ferroelectric film having good crystallinity can be obtained, and the ferroelectric capacitor can be easily laminated.

[Structure of one embodiment of the present invention] FIG. 21 is a cross-sectional view for explaining the structure of one embodiment of the present invention. FIG. 22 is a cross-sectional view obtained by rotating FIG. 21 by 90 °. The present invention is applied to a matrix type ferroelectric memory device.

The memory cell of this embodiment contains a ferroelectric material
This is a matrix type ferroelectric memory device including two or more layers of capacitors 400, 401,..., 40n.

The ferroelectric capacitor 400 is a silicon substrate 1
00 is formed. Insulating film 101 on silicon substrate 100
Are formed. As the insulating film 101, any insulating film used for a semiconductor device can be used. For example, there are a silicon oxide film formed by thermal oxidation, a CVD silicon oxide film, and a silicon nitride film.

The capacitor 400 is located on the insulating film 101. The ferroelectric capacitor 40n has a structure in which a lower electrode portion 50n, a ferroelectric film 60n, and an upper electrode portion 70n are stacked in order from the bottom. The upper electrode portion 70n also serves as the lower electrode 50 (n + 1) of the upper capacitor.

The material of the lower electrode portion 50n, the ferroelectric film 60n, and the upper electrode portion 70n may be any material that can be used as a capacitor of the ferroelectric memory device.
That is, the material of the ferroelectric film 60n is, for example, SBT, PZ
T and BLT are desirable. These materials have good squareness and polarization characteristics. In particular, a material having good squareness is PZT having a composition ratio of 40:60 or 20:80. Its thickness is 50-200 nm, more preferably 50-150 nm.
Further, the ferroelectric film material may be an organic material.

The material of the lower electrode portion 50n includes platinum, iridium, ruthenium, and a laminated film of these oxide films. Its film thickness is 50 to 300 nm, more preferably 150 to 300 nm.
200 nm. The material of the upper electrode portion 70n includes platinum, iridium, ruthenium, and a laminated film of these oxide films. Its film thickness is 50 to 300 nm, more preferably 150 to 300 nm.
200 nm.

When a laminated film with an oxide film is used for the electrode portion, the electrode portion in contact with the ferroelectric film is always made of metal. Since the contact surface of the electrode part is always made of a metal film,
In the ferroelectric film, good crystallinity is obtained, and a ferroelectric capacitor having rectangular hysteresis and polarization characteristics is obtained.

The ferroelectric film 60n has the same pattern as the lower electrode portion 50n.

The side surfaces of the ferroelectric film 60n and the lower electrode 50n are covered with an insulating film 80n, and the insulating film 80n and the ferroelectric film 60n form the same plane. Any material can be used for the insulating film 80n as long as it is an insulating film used for a semiconductor device. For example, there are a silicon oxide film formed by thermal oxidation, a CVD silicon oxide film, and a silicon nitride film. Preferably, the reaction gas is a silicon oxide film composed of TEOS and ozone. Since this silicon oxide film has porosity, the dielectric constant is low, and the wiring capacitance generated in the lower electrode 50n and the upper electrode 60n can be reduced.

[Structure of the Second Embodiment of the Present Invention] FIG.
FIG. 4 is a cross-sectional view illustrating a structure according to a second embodiment of the present invention. FIG. 24 is a cross-sectional view obtained by rotating FIG. 23 by 90 degrees. The present invention is applied to a matrix type ferroelectric memory device.

The memory cell of this embodiment contains a ferroelectric
This is a matrix type ferroelectric memory device including two or more layers of capacitors 400, 401,..., 40n.

The ferroelectric capacitor 400 is connected to the silicon substrate 1
00 is formed. Insulating film 101 on silicon substrate 100
Are formed. As the insulating film 101, any insulating film used for a semiconductor device can be used. For example, there are a silicon oxide film formed by thermal oxidation, a CVD silicon oxide film, and a silicon nitride film.

The capacitor 400 is located on the insulating film 101. The ferroelectric capacitor 40n has a structure in which a lower electrode portion 50n, a ferroelectric film 60n, and an upper electrode portion 70n are stacked in order from the bottom. The upper electrode portion 70n also serves as the lower electrode 50 (n + 1) of the upper capacitor.

The material of the lower electrode portion 50n, the ferroelectric film 60n, and the upper electrode portion 70n may be any material that can be used as a capacitor of the ferroelectric memory device.
That is, the material of the ferroelectric film 60n is, for example, SBT, PZ
T and BLT are desirable. These materials have good squareness and polarization characteristics. In particular, a material having good squareness is PZT having a composition ratio of 40:60 or 20:80. Its thickness is 50-200 nm, more preferably 50-150 nm.
Further, the ferroelectric film material may be an organic material.

The material of the lower electrode portion 50n includes platinum, iridium, ruthenium, and a laminated film of these oxide films. Its film thickness is 50 to 300 nm, more preferably 150 to 300 nm.
200 nm. The material of the upper electrode portion 70n includes platinum, iridium, ruthenium, and a laminated film of these oxide films. Its film thickness is 50 to 300 nm, more preferably 150 to 300 nm.
200 nm.

When a laminated film with an oxide film is used for the electrode portion, the electrode portion in contact with the ferroelectric film is always made of metal. Since the contact surface of the electrode part is always made of a metal film,
In the ferroelectric film, good crystallinity is obtained, and a ferroelectric capacitor having rectangular hysteresis and polarization characteristics is obtained.

The ferroelectric film 60n has the same pattern as the lower electrode portion 50n.

The side surfaces of the ferroelectric film 60n and the lower electrode 50n are covered with a metal oxide film 90n. The metal oxide film 90
n has the property of not allowing hydrogen to permeate. Such materials include at least one of aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, and titanium oxide. Therefore, there is an effect of preventing the ferroelectric film from being diffused by hydrogen. 90n of such metal oxide film
Is usually 10 nm or more.

The side surface of the metal oxide film 90n is covered with an insulating film 80n, and the insulating film 80n, the metal oxide film 90n, and the ferroelectric film 60n form the same plane. Any material can be used for the insulating film 80n as long as it is an insulating film used for a semiconductor device. For example, silicon oxide film by thermal oxidation, CVD
There are a silicon oxide film and a silicon nitride film. Preferably, the reaction gas is a silicon oxide film composed of TEOS and ozone. Since this silicon oxide film has porosity, the dielectric constant is low, and the wiring capacitance generated in the lower electrode 50n and the upper electrode 60n can be reduced.

[0075]

According to the present embodiment, even if the ferroelectric capacitors are laminated, a flat surface is always formed after the lower electrode is formed, and the ferroelectric film is formed before the lower electrode portion is processed. At the time of film formation, the surface of the memory element has a flat shape. Therefore, the ferroelectric film has good crystallinity, and as a result, the ferroelectric capacitor formed by the ferroelectric film has a hysteresis-shaped polarization characteristic with good squareness. Further, since the ferroelectric film or the insulating film is located between the upper electrode portion and the lower electrode portion, no electrical short circuit occurs.

[Brief description of the drawings]

FIG. 1 is a first process chart for explaining a manufacturing method according to a first embodiment of the present invention.

FIG. 2 is a second process chart for explaining the manufacturing method according to the first embodiment of the present invention.

FIG. 3 is a third process chart for explaining the manufacturing method according to the first embodiment of the present invention.

FIG. 4 is a fourth process chart for describing the manufacturing method according to the first embodiment of the present invention.

FIG. 5 is a fifth process chart for describing the manufacturing method according to the first embodiment of the present invention.

FIG. 6 is a sixth process chart for describing the manufacturing method according to the first embodiment of the present invention.

FIG. 7 is a seventh process chart for describing the manufacturing method according to the first embodiment of the present invention.

FIG. 8 is an eighth step diagram for describing the manufacturing method according to the first embodiment of the present invention.

FIG. 9 is a first process chart for explaining the manufacturing method according to the second embodiment of the present invention.

FIG. 10 is a second process chart for describing the manufacturing method according to the second embodiment of the present invention.

FIG. 11 is a third process chart for describing the manufacturing method according to the second embodiment of the present invention.

FIG. 12 is a fourth process chart for describing the manufacturing method according to the second embodiment of the present invention.

FIG. 13 is a fifth process chart for describing the manufacturing method according to the second embodiment of the present invention.

FIG. 14 is a first process chart for describing the manufacturing method according to the third embodiment of the present invention.

FIG. 15 is a second process chart for describing the manufacturing method according to the third embodiment of the present invention.

FIG. 16 is a third process chart for describing the manufacturing method according to the third embodiment of the present invention.

FIG. 17 is a fourth process chart for describing the manufacturing method according to the third embodiment of the present invention.

FIG. 18 is a fifth process chart for describing the manufacturing method according to the third embodiment of the present invention.

FIG. 19 is a sixth process chart for describing the manufacturing method of the third embodiment of the present invention.

FIG. 20 is a seventh process chart for describing the manufacturing method according to the third embodiment of the present invention.

FIG. 21 is a cross-sectional view of one embodiment of the present invention.

FIG. 22 is a cross-sectional view obtained by rotating FIG. 21 by 90 °.

FIG. 23 is a sectional view of a second embodiment of the present invention.

24 is a cross-sectional view obtained by rotating FIG. 23 by 90 degrees.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 silicon substrate 101 insulating film 102 first electrode portion 103 ferroelectric film 104 insulating film 105 second electrode portion 201 metal oxide film 301 second ferroelectric film 302 second insulating film 303 third electrode portion 400 1 layer First ferroelectric capacitor 401 Second layer ferroelectric capacitor 40n Nth layer ferroelectric capacitor 500 First layer lower electrode 501 Second layer lower electrode 50n Nth layer lower electrode 600 First layer ferroelectric Film 601 Second-layer ferroelectric film 60n Nth-layer ferroelectric film 700 First-layer upper electrode 701 Second-layer upper electrode 70n Nth-layer upper electrode 800 First-layer insulating film 801 Two-layer First insulating film 80n N-th insulating film 900 First-layer metal oxide film 901 Second-layer metal oxide film 90n N-th metal oxide film

Continued on the front page F term (reference) 5F058 BC20 BD01 BD04 BD05 BF25 BF29 BF46 BH03 BH08 BH16 5F083 FR01 GA25 JA03 JA12 JA14 JA15 JA38 JA43 LA02 PR21 PR33 PR39 PR40

Claims (18)

[Claims] 1. A method of manufacturing a memory device comprising a first electrode portion, a second electrode portion, and a ferroelectric film between the first electrode portion and the second electrode portion, wherein at least the first A step of forming an electrode portion, a step of forming a ferroelectric film,
Simultaneously processing the first electrode portion and the ferroelectric film, forming an insulating film, planarizing the insulating film,
A method for manufacturing a ferroelectric memory device, comprising: a step of removing an insulating film on the ferroelectric; and a step of forming a second electrode portion. 2. The method of manufacturing a ferroelectric memory device according to claim 1, wherein the crystallization of the ferroelectric film is performed after the insulating film is planarized. Production method. 3. The ferroelectric memory device according to claim 1, wherein the crystallization of the ferroelectric film is performed after the formation of the second electrode portion. Device manufacturing method. 4. The method of manufacturing a ferroelectric memory device according to claim 1, wherein said insulating film is formed by a coating method or a CVD method using a reaction between TEOS (tetraethoxysilane) and ozone. A method of manufacturing a ferroelectric memory device, wherein the method is performed by a method. 5. The method of manufacturing a ferroelectric memory device according to claim 1, wherein said insulating film comprises at least one of aluminum oxide, tantalum oxide, zirconium oxide, aluminum oxide, and silicon oxide. A method for manufacturing a ferroelectric memory device, comprising a laminated film of films. 6. The method for manufacturing a ferroelectric memory device according to claim 1, wherein said insulating film is planarized.
A method for manufacturing a ferroelectric memory device, wherein the ferroelectric memory device is performed by CMP (chemical mechanical polishing) or etching back, in which etching is performed entirely. 7. The method for manufacturing a ferroelectric memory device according to claim 1, wherein the material of said first electrode portion or said second electrode portion is selected from the group consisting of platinum, iridium, and ruthenium. A method of manufacturing a ferroelectric memory device. 8. The method of manufacturing a ferroelectric memory device according to claim 1, wherein the material of the first electrode portion or the second electrode portion is any of platinum, iridium, and ruthenium. Consisting of two or more layers of these oxide films,
A method for manufacturing a ferroelectric memory device, wherein a surface in contact with the ferroelectric is a metal film. 9. The method of manufacturing a ferroelectric memory device according to claim 1, wherein said ferroelectric film is formed by coating. Method. 10. A method for manufacturing a ferroelectric memory device according to claim 1, wherein a liquid of an organic compound is atomized and introduced onto a substrate to cause a reaction (hereinafter referred to as LSMC).
A method for manufacturing a ferroelectric memory device, comprising: forming the ferroelectric film according to D). 11. A method of manufacturing a ferroelectric memory device according to claim 1, wherein said ferroelectric film is formed by a gas phase reaction of an organic compound. Manufacturing method of body memory device. 12. A method of manufacturing a ferroelectric memory device according to claim 1, wherein said ferroelectric film is formed by a sputtering method. Method. 13. The method of manufacturing a ferroelectric memory device according to claim 1, wherein said ferroelectric film is formed by an immersion method. Method. 14. The method of manufacturing a ferroelectric memory device according to claim 1, wherein a second ferroelectric film is formed at least after the step of forming the second electrode portion. Forming a film, simultaneously processing the second electrode portion and the second ferroelectric film, forming a second insulating film, flattening the second insulating film, A method of manufacturing a ferroelectric memory device including a step of exposing a surface of a second ferroelectric film and a step of forming a third electrode portion, wherein a ferroelectric capacitor having two or more layers is formed. 15. A method for manufacturing a matrix type ferroelectric memory device, comprising the method for manufacturing a ferroelectric memory device according to claim 1. 16. A ferroelectric device having at least a capacitor including a first electrode portion, a second electrode portion, and a ferroelectric film between the first electrode portion and the second electrode portion. The memory device, wherein the ferroelectric memory device has a laminated structure of the above structure and includes two or more layers of capacitors, wherein the first electrode portion and the ferroelectric film form the same pattern. A ferroelectric memory device wherein an insulating film is positioned to cover the side surface of the ferroelectric, and the insulating film and the ferroelectric film are flattened to form the same plane. 17. A capacitor according to claim 16, comprising at least a first electrode portion, a second electrode portion, and a ferroelectric film between said first electrode portion and said second electrode portion. A ferroelectric memory device comprising: aluminum oxide, tantalum oxide, zirconium oxide, hafnium oxide, any one of metal oxide films of titanium oxide is located so as to cover the side surface of the ferroelectric film, The ferroelectric film is
A ferroelectric memory device that is an element constituting a capacitor, the ferroelectric memory device having a stacked structure of the above structure, comprising a capacitor of two or more layers, wherein the first electrode portion and the The ferroelectric film forms the same pattern,
A ferroelectric memory device, wherein an insulating film is positioned so as to cover the side surface of the ferroelectric, and the insulating film and the ferroelectric film are flattened to form the same plane. 18. A matrix type ferroelectric memory device including the ferroelectric memory device according to claim 16.