JP2002033442A - Semiconductor device, circuit board and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, a circuit board and an electronic apparatus which is not limited in the outside shape of a semiconductor chip and can be electrically connected. SOLUTION: The semiconductor device has a plurality of laminated semiconductor chips 10, 20, 30, 40 having formed electrodes 12, 22, 32, 42. The chips 10-40 comprise a first semiconductor chip 20 and a second semiconductor chip 20 mounted on the first chip 10 such that the second chip 20 is partly extruded out of the first chip 10 and the electrode 22 is formed at the side extruded from the chip 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, a circuit board, and an electronic device.

[0002]

BACKGROUND OF THE INVENTION As one form of a semiconductor device which realizes high-density mounting, a semiconductor device having a stack structure in which a plurality of semiconductor chips are stacked is known. For example, in a plurality of stacked semiconductor chips, electrodes formed on a peripheral end of each semiconductor chip are electrically connected to a wiring board by wires.

However, in consideration of electrical connection by wires, it is necessary to stack semiconductor chips avoiding the electrodes, and the outer shape of the semiconductor chip must be smaller on one side than on the other side. Did not. That is, the size of the semiconductor chip mounted on the upper side is limited.

In this case, the wires of the upper and lower semiconductor chips need to be formed high and long because the wires overlap in a plane in each of the semiconductor chips stacked vertically. This may have a negative effect on miniaturization and high density of the semiconductor device.

An object of the present invention is to provide a semiconductor device, a circuit board, and an electronic device which are not limited to the outer shape of a semiconductor chip and can make an appropriate electrical connection. It is in.

[0006]

(1) A semiconductor device according to the present invention has a plurality of semiconductor chips on which electrodes are formed and which are stacked, and the plurality of semiconductor chips is a first semiconductor chip.
A semiconductor chip and a second semiconductor chip mounted on the first semiconductor chip, wherein the second semiconductor chip is mounted partially outside the first semiconductor chip, The electrode is formed on a side protruding from the first semiconductor chip.

According to the present invention, the second semiconductor chip comprises:
Since the electrode is formed on the side protruding from the first semiconductor chip, for example, when a wire is connected to the electrode, the wire may be planarly overlapped in two semiconductor chips stacked directly on top and bottom. Absent. Thus, the respective wires can be connected to the electrodes without being in contact with each other. Furthermore, when the electrode of the second semiconductor chip is formed in a portion protruding from the first semiconductor chip, for example, when the electrode and the wiring pattern of the substrate are connected by a wire, the wire is connected with the shortest distance in a plane. Can be formed.

Further, since the second semiconductor chip is mounted outside the first semiconductor chip, the second semiconductor chip can be mounted without being limited by the outer size of the first semiconductor chip.
Thus, for example, a semiconductor device in which a plurality of semiconductor chips of the same size are stacked can be provided.

In the present invention, the number of the plurality of semiconductor chips is not limited to two, but may be more.
And the second semiconductor chip refers to any two of the plurality of semiconductor chips.

(2) In this semiconductor device, the first
The electrode of the semiconductor chip is formed at an end portion, the second semiconductor chip is mounted on the surface of the first semiconductor chip where the electrode is formed, avoiding the electrode,
The first semiconductor chip may protrude outside the first semiconductor chip in a direction away from the electrodes.

According to this, the size of the second semiconductor chip is not limited by the size of the outer shape of the first semiconductor chip, and
The electrodes of the first semiconductor chip can be exposed.

(3) In this semiconductor device, the first
The outer shape of the semiconductor chip is rectangular, the electrodes of the first semiconductor chip are formed along one side of the first semiconductor chip, and the second semiconductor chip is
The semiconductor chip may protrude outward beyond a side opposite to the one side.

According to this, the second semiconductor chip is stacked in a stable state by widening a portion overlapping the first semiconductor chip in a plane.

(4) In this semiconductor device, the first
The outer shape of the semiconductor chip is rectangular, the electrodes of the first semiconductor chip are formed side by side on two adjacent sides of the first semiconductor chip, and the second semiconductor chip is
The first semiconductor chip may protrude outward beyond the other two sides facing the two sides.

According to this, even if the number of electrodes of each semiconductor chip is large, the second semiconductor chip protrudes from the first semiconductor chip by avoiding two adjacent sides of the first semiconductor chip. Can be installed.

(5) In this semiconductor device, the first
Alternatively, a lead may be provided on a side of the second semiconductor chip on which the electrodes are arranged, and the electrodes and the leads may be electrically connected.

(6) The electrode and the lead may be electrically connected directly or by a conductive material.

(7) The semiconductor device described above is mounted on a circuit board according to the present invention.

(8) An electronic apparatus according to the present invention includes the above semiconductor device.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. However, the present invention
The present invention is not limited to the following embodiment.

(First Embodiment) FIGS. 1 and 2 are views for explaining a semiconductor device according to the present embodiment. The semiconductor device has a plurality of semiconductor chips stacked. The plurality of semiconductor chips include first and second semiconductor chips 10 and 20. Here, the number of the plurality of semiconductor chips is not limited to two, and may be more than two. The first and second semiconductor chips are any two of the plurality of semiconductor chips stacked vertically. Show one.

Each semiconductor chip is, for example, a flash memory, SRAM, DRAM, ASIC or MPU. As a combination of a plurality of semiconductor chips, for example, ASIC, flash memory, SRAM, SRAM
DRAM, DRAM, or flash memory and SR
AM and the like. The function of each semiconductor chip and the combination of a plurality of semiconductor chips are not limited to the above.

As shown in FIG. 1, the second semiconductor chip 2
0 is mounted on the first semiconductor chip 10. First
In many cases, the semiconductor chip 10 has a rectangular shape (including a rectangular shape or a square shape), but is not limited thereto. Further, the first semiconductor chip 10 may be formed by thinly grinding the surface opposite to the surface on which the integrated circuit is formed.

The first semiconductor chip 10 has one or more electrodes 12 on one surface (the surface on which an integrated circuit is formed). The electrode 12 is thinly and flatly formed on the first semiconductor chip 10 with, for example, aluminum or copper. The planar shape of the electrode 12 may be rectangular or circular, and the shape is not limited. The electrode 12 is formed at the center or the end of the first semiconductor chip 10. As illustrated, the electrodes 12 may be formed in a line on one side of the first semiconductor chip 10. Alternatively, the first semiconductor chip 10 may be formed in two or more rows at the end or the center thereof, or may be formed in a staggered manner.

A protective film (not shown) may be formed on the surface of the first semiconductor chip 10 on which the electrode 12 is formed. The protective film is formed on the surface of each electrode 12 so as to expose the center and cover the end. The protective film is an electrical insulating film. The protective film may be a general passivation film. The protective film can be formed of SiO ₂ , SiN, a polyimide resin, or the like.

As shown, the second semiconductor chip 20
May have the same form (for example, shape and arrangement of electrodes) as the first semiconductor chip 10. According to the present embodiment, a plurality of semiconductor chips having the same form can be stacked. Alternatively, the second semiconductor chip 20
It may have a different form from the first semiconductor chip 10.
For example, the second semiconductor chip 20 may be larger or smaller than the outer shape of the first semiconductor chip 10.

The second semiconductor chip 20 is mounted outside the first semiconductor chip 10 so as to partially protrude. For example, the second semiconductor chip 20 is the first semiconductor chip 1
The plane may be mounted at a position parallel to any direction in a plane from the center on the zero plane.

In the example shown, the second semiconductor chip 20
Protrudes outside the first semiconductor chip 10 beyond a side opposite to one side of the first semiconductor chip 10 where the electrodes 12 are arranged. That is, the second semiconductor chip 2
Numeral 0 denotes a surface of the first semiconductor chip 10, which is mounted at a position shifted in parallel from a center thereof in a direction away from the electrode 12 of the first semiconductor chip 10. For example, when the first and second semiconductor chips 10 and 20 have the same size, the second semiconductor chip 20 has the first semiconductor chip 10 in an amount corresponding to the area of the surface of the first semiconductor chip 10 that is planarly exposed. Project outside the semiconductor chip 10. In other words, the first and second
The semiconductor chips 10 and 20 are connected to the electrode 12 or the electrode 1
Step 2 is formed on the side facing 2.

According to this, the second semiconductor chip 20
Protrudes from the first semiconductor chip 10, and thus is mounted without being limited by the size of the outer shape of the first semiconductor chip 10. That is, the outer shape of the second semiconductor chip 20 does not need to be smaller than that of the first semiconductor chip. According to this, there is an advantage that the form of combination of semiconductor chips stacked one on top of the other is widened.

The second semiconductor chip 20 may be mounted on the surface of the first semiconductor chip 10 on which the electrodes 12 are formed. In this case, the second semiconductor chip 20 is mounted so as to avoid the electrodes 12 in the first semiconductor chip 10. By avoiding the electrode 12 of the first semiconductor chip 10, for example, a wire can be connected to the electrode 12.

As in the example shown, the electrode 12 of the first semiconductor chip 10 is preferably formed at an end (for example, a region along one side). According to this, since the second semiconductor chip 20 has only to avoid the electrode 12 formed at the end of the first semiconductor chip 10, the portion overlapping the first semiconductor chip 10 in a plane is widened. be able to. That is, the second semiconductor chip 20 can be fixed on the first semiconductor chip 10 in a stable state. Thus, for example, it is possible to reliably apply pressure (ultrasonic vibration or the like) to the electrode 22 of the second semiconductor chip 20 to perform wire bonding.

As shown, the second semiconductor chip 20
May be mounted with the surface opposite to the surface on which the electrodes 22 are formed facing the first semiconductor chip 10. Alternatively, the second semiconductor chip 20 may be mounted on the first semiconductor chip 10 with the surfaces on which the electrodes 22 are formed facing each other. In the latter case, the second semiconductor chip 20
The electrode 22 may be arranged on a surface exposed from the first semiconductor chip 10.

The second semiconductor chip 20 has electrodes 22 at least on the side protruding from the first semiconductor chip 10. When the first semiconductor chip 10 has the electrode 12 on one side, the second semiconductor chip 20 has the electrode 22 on one of the other three sides of the first semiconductor chip 10. Is also good. For example, in the second semiconductor chip 20, the electrode 22 may be formed on the side protruding to the opposite side by avoiding the electrode 12 of the first semiconductor chip 10. Note that the second semiconductor chip 20
It may be formed only at a portion protruding from the first semiconductor chip 10, or may be formed at a portion overlapping with the first semiconductor chip 10 in addition thereto.

According to this, when wires are connected to the electrodes 12 and 22, the wires do not overlap in a plane in the first and second semiconductor chips 10 and 20 which are stacked vertically. . That is, two wires extending from the surfaces of the first and second semiconductor chips 10 and 20 having different heights can be in non-contact with each other in the height direction. Thus, for example, it is not necessary to form a wire connected to the electrode 22 of the second semiconductor chip 20 with a high loop shape, and it is not necessary to increase the wire length. Therefore, it is possible to provide a semiconductor device which is small and realizes a high-speed signal.

Further, the electrode 2 of the second semiconductor chip 20
When the electrode 2 is formed at a portion protruding from the first semiconductor chip 10, for example, when the electrode 22 is connected to the wiring pattern of the substrate by a wire, the electrode 22 is brought close to the wiring pattern in a planar manner and the shortest distance Can form a wire.

Another semiconductor chip may be stacked on the second semiconductor chip 20 (see FIG. 2). Other semiconductor chips to be further stacked may be mounted on the second semiconductor chip 20 so that the second semiconductor chip 20 is stacked on the first semiconductor chip 10. In this case, the above-described embodiment can be applied to any two of the semiconductor chips including the other semiconductor chip as the first and second semiconductor chips 10 and 20.

FIG. 2 is a diagram showing an example of the semiconductor device according to the present embodiment. Specifically, FIG. 2 is a cross-sectional view of the semiconductor device. The semiconductor device 1 includes a plurality of semiconductor chips 10, 20, 30, 40. Any two of the plurality of semiconductor chips 10 to 40 stacked vertically can be the above-described first and second semiconductor chips.

The semiconductor device 1 further includes a plurality of leads 50 and a resin 52 for sealing the semiconductor chips 10 to 40. As an example of the semiconductor device according to the present embodiment,
There is a form applied to a package using a lead frame such as a QFP (Quad Flat Package).

The plurality of semiconductor chips 10 to 40 are stacked so that two stacked vertically are partially overlapped in plan. Each semiconductor chip 10-40,
It may be bonded by an adhesive 54. As shown in the figure, the adhesive 54 is provided on the back surface of the mounting semiconductor chip (for example, on the surface opposite to the side on which the electrodes are formed), and protrudes from the mounting semiconductor chip. Is also good. The adhesive 54 may be an insulating material. The adhesive 54 may be in the form of a paste,
Alternatively, it may be in the form of a film. The nature and form of the adhesive 54 are not particularly limited.

The third semiconductor chip 30 from the bottom is
One may be skipped and overlap the lowermost semiconductor chip 10 in a planar manner. That is, the semiconductor chip 30 may be mounted so as to partially protrude from the semiconductor chip 20 directly below, and may be mounted so as to overlap the semiconductor chip 10 which is skipped one by one. According to this, three or more semiconductor chips can be stacked with the same planar area as a semiconductor device formed by stacking two semiconductor chips. Therefore, a small semiconductor device can be provided. The fourth (uppermost) semiconductor chip 40 from the bottom
Is the second semiconductor chip 2 from the bottom, skipping one
0 may be overlapped in a plane, and similarly, another semiconductor chip may be stacked on the semiconductor chip 40.

The leads 50 are connected to the respective semiconductor chips 1
It is electrically connected to the 0 to 40 electrodes 12, 22, 32, 42. The lead 50 is connected to the wires 14, 24, 34,
44 may be electrically connected to the electrodes 12 to 42. More specifically, the lead 50 has a connecting portion 56 to which the wires 14 to 44 are connected. Wire 14 ~
44 is often formed of a material containing gold. Also,
The lead 50 may be formed of, for example, a material containing copper. The lead 50 may be plated particularly at the connection portion 56. The lead 50 may be a part of a lead frame, for example. In this case, the connection portion 56 may be referred to as an inner lead.

In the plurality of semiconductor chips 10 to 40, electrodes are formed on the protruding sides of two vertically stacked semiconductor chips. More specifically, each of the semiconductor chips 20 to 40 has an electrode formed on the side protruding from the underlying semiconductor chip. In particular, when the electrodes are arranged on one side of each of the semiconductor chips 10 to 40, the electrodes 12 to 42 of each of the semiconductor chips 10 to 40
It may be formed alternately on the side of the side and the side facing the side. According to this, in a semiconductor chip (for example, semiconductor chips 10 and 20) directly stacked on top and bottom,
Since the wires (for example, the wires 14 and 24) do not overlap in a plane, contact of the wires in the height direction can be prevented. Further, since the planar distance between the electrodes 12 to 42 and the connection portion 56 of the lead 50 can be reduced, the wire length can be reduced.

Electrodes 12 to 42 of semiconductor chips 10 to 40
May be electrically connected to any of the plurality of leads 50 in an overlapping manner. For example, any of the plurality of electrodes 12 of the semiconductor chip 10 and any of the plurality of electrodes 32 of the semiconductor chip 30 may be electrically connected to the same lead 50. In particular, a plurality of semiconductor chips 10
When the semiconductor chips 40 have the same circuit structure, the same leads 50 can be electrically connected to the respective semiconductor chips 10 to 40. For example, when the plurality of semiconductor chips 10 to 40 are memories, the same lead 5
With 0, it becomes easy to share the address terminal and the data terminal. Specifically, information can be read or written from the same lead 50 to the memory cell of the same address of each of the semiconductor chips 10 to 40.

Further, according to the present embodiment, semiconductor chips of the same size can be stacked. Therefore, for example, a semiconductor device having a large-capacity memory can be provided without being limited by restrictions at the time of design.

The plurality of semiconductor chips 10 to 40 are made of resin 5
2 sealed. The resin 52 can be molded using, for example, a mold. When a resin is used as the resin 52, the resin 52 may be referred to as a mold resin.

The lead 50 protrudes from the region sealed with the resin 52. The portion of the lead 50 protruding from the resin 52 may protrude from two opposing sides or from four sides in plan view of a region sealed with the resin 52. A portion of the lead 50 protruding from the resin 52 is formed into a predetermined shape. The portion of the lead 50 protruding from the resin 52 may be referred to as an outer lead.

According to the semiconductor device of this embodiment,
In the second semiconductor chip (for example, the semiconductor chip 20), the electrode 22 is formed on the side protruding from the first semiconductor chip (for example, the semiconductor chip 10).
When the wires 14 and 24 are connected to the wires 2 and 22, the wires 14 and 24 do not overlap in a plane in the two semiconductor chips 10 and 20 that are directly stacked vertically. Thus, the wires 14 and 24 can be connected to the electrodes 12 and 22 without being in contact with each other.

Also, since the second semiconductor chip 20 is mounted so as to protrude outside the first semiconductor chip 10,
The first semiconductor chip 10 can be mounted without being limited by the size of the outer shape. Thereby, for example, a semiconductor device in which a plurality of semiconductor chips 10 to 40 of the same size are stacked can be provided.

(Second Embodiment) FIGS. 3 and 4 are views for explaining a semiconductor device according to the present embodiment. In the following embodiments, the contents described in the first embodiment can be applied as much as possible. In the present embodiment, the form of the first and second semiconductor chips 60 and 70 stacked vertically is different from that described above.

The first semiconductor chip 60 has a rectangular shape.
The electrodes 62 in the first semiconductor chip 60 are formed side by side on two adjacent sides. The electrodes 62 may be arranged in one row as shown, or in two or more rows. Alternatively, the electrodes 62 may be formed in a staggered manner. The arrangement of the electrodes 62 may be regular,
Alternatively, it may be irregular.

The second semiconductor chip 70 protrudes outside the first semiconductor chip 60 beyond the other two sides of the first semiconductor chip 60 where the electrodes 62 are formed. Since the area to be avoided from the first semiconductor chip 60 is an area of two sides adjacent to the first semiconductor chip 60 having a rectangular shape, the second semiconductor chip 70
All of 2 can be avoided. This is effective when the number of electrodes 62 of the first semiconductor chip 60 is large. Therefore, a high-density semiconductor device can be provided.

The configuration of the second semiconductor chip 70 may be the same as that of the first semiconductor chip 60. That is, the electrodes 72 of the second semiconductor chip 70 may be formed side by side on two adjacent sides of the rectangular second semiconductor chip 70. In this case, the electrode 72 of the second semiconductor chip 70
Are formed on two sides different from the two sides on which the electrodes 62 of the first semiconductor chip 60 are arranged.

According to the present embodiment, even if the number of electrodes 62 and 72 is large, the second semiconductor chip 70
Since a part of the first semiconductor chip 60 can be mounted outside the semiconductor chip 60, a high-density semiconductor device can be provided.

FIG. 4 is a diagram showing an example of the semiconductor device according to the present embodiment. Specifically, FIG. 4 is a cross-sectional view of the semiconductor device. The semiconductor device 2 includes a plurality of semiconductor chips 60, 70, 80, 90. The plurality of semiconductor chips 60 to 90 can be any two of the above-described first and second semiconductor chips stacked vertically.

The semiconductor device 2 includes a substrate 100 and a resin 52 for sealing a plurality of semiconductor chips. In this embodiment, a mounting mode (package mode) is different from the above-described embodiment. As an example of the semiconductor device according to the present embodiment, a BGA (Ball Grid Array) or a CSP (Chip Scal
e / Size Package) and the like, which are applied to a package using a substrate (interposer).

The plurality of semiconductor chips 60 to 90 are stacked so that two stacked vertically are partially overlapped in plan. Any one of the semiconductor chips 60 to 90 may be stacked one on top of the other and stacked on another semiconductor chip.

One of the semiconductor chips (for example, the semiconductor chip 70) has an electrode (for example, the electrode 72) on the side protruding from the underlying semiconductor chip (for example, the semiconductor chip 60).
Are formed. When the plurality of semiconductor chips 60 to 90 have the electrodes 62, 72, 82, and 92 on two adjacent sides, the electrodes 62 to 9 of the respective semiconductor chips 60 to 90
2 may be alternately formed on two sides adjacent to each other and a side opposite to the two sides. According to this, in the height direction in which the semiconductor chips are stacked, the wires 64, 74, 84, 9
4 can be prevented.

The stacking mode of the semiconductor chips described so far is a mode in which semiconductor chips having the same structure are stacked.
Alternatively, a plurality of semiconductor chips having different structures may be stacked. For example, a semiconductor chip (for example, the second semiconductor chip 70) having electrodes arranged on two adjacent sides is stacked on a semiconductor chip (for example, the first semiconductor chip 10) having electrodes arranged on one side. Is also good. Alternatively, a semiconductor chip having electrodes arranged on one side (for example, the second semiconductor chip 20) is laminated on a semiconductor chip having electrodes arranged on two adjacent sides (for example, the first semiconductor chip 60). Is also good. Further, the plurality of stacked semiconductor chips may have at least one (one or all) combinations of upper and lower semiconductor chips in which electrodes are arranged on the side protruding from the lower semiconductor chip. .

The substrate 100 is often formed of an organic type, an inorganic type, or a combination thereof. An example of the substrate 100 may be a flexible substrate made of, for example, a polyimide resin, or a substrate made of ceramic, glass, or glass epoxy. Note that, as the substrate 100, a multilayer substrate or a build-up type substrate may be used.

The substrate 100 has leads formed thereon.
In this case, the lead may be the wiring pattern 102. The wiring pattern 102 includes wires 64, 74, 84,
94 electrically connects the electrodes 62 to 92 of the respective semiconductor chips 60 to 90. Specifically, the wires 64 to 94 are connected to the connection portions 104 of the wiring pattern 102. The connection portion 104 may be a so-called land portion having a larger area than a wiring connected thereto.

The semiconductor device 2 may have the external terminal 106. In the example shown in FIG. 4, a ball-shaped bump is formed as the external terminal 106. The external terminal 106 may be, for example, a solder ball. By forming wiring patterns 102 electrically connected to a plurality of semiconductor chips in a predetermined arrangement, the external terminals 106
0 can be provided in a two-dimensionally expanded region. That is, the pitch of the external terminals 106 of the semiconductor device can be changed, and the semiconductor device can be easily mounted on, for example, a circuit board (motherboard).

As another form of the external terminal 106, a part of the wiring pattern 102 of the substrate 100 may be extended and an external connection may be made therefrom. Wiring pattern 10
2 may be used as a connector lead, or the connector may be mounted on the substrate 100. Further, the external terminal 106 may not be formed positively, and the external terminal may be formed as a result by the surface tension at the time of melting using a solder cream applied to the circuit board at the time of mounting on the circuit board. The semiconductor device is a so-called land grid array type semiconductor device. In this embodiment, the same effects as described above can be obtained.

In the examples described above, the electrodes and the leads are connected via wires (conductive materials). However, the electrodes and the leads may be directly electrically connected. For example, the present invention may be applied to a semiconductor device manufactured by TAB technology. In the example shown in FIG. 4, the semiconductor chips 10 and 20 are arranged in the device holes 116 of the substrate 110, and the leads 1 protruding inside the device holes 116.
12 (inner lead 114) and electrodes 12, 22
Are directly connected. The semiconductor chips 10 and 20
In many cases, the surface having the electrodes 12 and 22 faces the same direction as the surface of the substrate 110 having the leads 112. As shown, the lead 112 may be bent at the distal end in accordance with the height of the surface of the stacked semiconductor chips 10 and 20.

A bump (not shown) may be interposed between the electrodes 12, 22 and the inner lead 114. Further, at least the inner lead 114 of the lead 112 may be plated. For example, a gold bump formed on the electrodes 12 and 22 (a bump having at least a surface made of gold)
And the tin plating of the inner lead 114 may be eutectic bonded. Alternatively, the two may be joined by thermocompression bonding using gold bumps on the electrodes 12 and 22 and gold plating of the inner leads 114.

FIG. 6 shows a circuit board 200 on which the semiconductor device 2 according to the above embodiment is mounted. Generally, an organic substrate such as a glass epoxy substrate is used for the circuit board 200. Wiring patterns made of, for example, copper or the like are formed on the circuit board 200 so as to form a desired circuit. These wiring patterns and the external terminals 106 of the semiconductor device 2 are electrically connected to each other by mechanical connection. Conduct continuity.

Note that a plurality of semiconductor chips may be directly mounted on the circuit board 200 in the above-described manner. The present invention can be applied to so-called bare chip mounting,
The same effect as described above can be obtained.

FIG. 7 shows a notebook personal computer 210 and FIG. 8 shows a portable telephone 220 as an electronic apparatus having a semiconductor device to which the present invention is applied.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a semiconductor device according to a first embodiment to which the present invention is applied;

FIG. 2 is a diagram illustrating an example of a semiconductor device according to a first embodiment to which the present invention is applied;

FIG. 3 is a diagram for explaining a semiconductor device according to a second embodiment to which the present invention is applied;

FIG. 4 is a diagram illustrating an example of a semiconductor device according to a second embodiment to which the present invention is applied;

FIG. 5 is a diagram illustrating an example of a semiconductor device according to an embodiment to which the present invention is applied;

FIG. 6 is a diagram illustrating a circuit board on which a semiconductor device according to an embodiment to which the present invention is applied is mounted;

FIG. 7 is a diagram illustrating an electronic apparatus including a semiconductor device according to an embodiment to which the present invention is applied;

FIG. 8 is a diagram illustrating an electronic apparatus including a semiconductor device according to an embodiment to which the present invention is applied;

[Explanation of symbols]

 Reference Signs List 10 semiconductor chip (first semiconductor chip) 12 electrode 20 semiconductor chip (second semiconductor chip) 22 electrode 30 semiconductor chip 32 electrode 40 semiconductor chip 42 electrode 50 lead 60 semiconductor chip (first semiconductor chip) 62 electrode 70 semiconductor Chip (second semiconductor chip) 72 electrode 80 semiconductor chip 82 electrode 90 semiconductor chip 92 electrode 112 lead

Claims (8)

[Claims] 1. A semiconductor device comprising: a plurality of semiconductor chips on which electrodes are formed and stacked;
A first semiconductor chip; and a second semiconductor chip mounted on the first semiconductor chip, wherein the second semiconductor chip is partially mounted outside the first semiconductor chip and mounted. A semiconductor device having the electrode formed on a side protruding from the first semiconductor chip. 2. The semiconductor device according to claim 1, wherein the electrode of the first semiconductor chip is formed at an end, and the second semiconductor chip is formed with the electrode of the first semiconductor chip. A semiconductor device which is mounted on the surface avoiding the electrodes and protrudes outside the first semiconductor chip in a direction away from the electrodes of the first semiconductor chip. 3. The semiconductor device according to claim 2, wherein the outer shape of the first semiconductor chip is rectangular, and the electrodes of the first semiconductor chip are arranged along one side of the first semiconductor chip. The semiconductor device, wherein the second semiconductor chip is formed and protrudes outward beyond a side opposite to the one side of the first semiconductor chip. 4. The semiconductor device according to claim 2, wherein the outer shape of the first semiconductor chip is rectangular, and the electrodes of the first semiconductor chip are located on two adjacent sides of the first semiconductor chip. A semiconductor device formed side by side, wherein the second semiconductor chip protrudes outside beyond the other two sides facing the two sides of the first semiconductor chip. 5. The semiconductor device according to claim 1, further comprising a lead disposed on a side of said first or second semiconductor chip on which said electrode is arranged, wherein said electrode and said lead are arranged. And a semiconductor device that is electrically connected. 6. The semiconductor device according to claim 5, wherein the electrode and the lead are electrically connected directly or electrically by a conductive material. 7. A circuit board on which the semiconductor device according to claim 1 is mounted. 8. An electronic apparatus comprising the semiconductor device according to claim 1.