JP2001333050A - Device and method for estimating ber - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a BER estimating device reduced in hardware scale and enhanced in accuracy of a BER estimation. SOLUTION: A signal received by an antenna 30 is demodulated by a receiver 31 and decoded by a decoder 34. The decoded signal is inputted to a comparing part 35. Meanwhile, a demodulation signal from the receiver 31 is inputted to a bit selecting part 33 through a delay part 32. The part 33 extracts a system bit and inputs the system bit to the part 35. The part 35 detects an error of the bit selected by the part 33 by using the demodulation signal as reference, and a counter 36 counts the number of bit errors included in a decoded unit. Counts are inputted to a BER operating part 37 and a BER is calculated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a BER estimating apparatus for a wireless communication system using an error correction code.

[0002]

2. Description of the Related Art In recent years, due to an increase in demand for multimedia communication, turbo codes having higher coding gains have attracted attention, and IMT-2000 (International Mobile Telecommunications)
tions-2000). For wireless links, certain permissible link quality (BER, FER, SIR)
By performing communication while maintaining the above, the line is effectively used, and the power consumption of the device is reduced and the economic efficiency is improved. However, the state of the wireless transmission path changes greatly, and it is necessary to quickly measure and feed back line information to maintain a constant line quality.

As a method of estimating a BER (Bit Error Rate), which is one of the important parameters of the line quality, Japanese Patent Application Laid-Open No. 61-135234 discloses a method in which decoded information is re-encoded into a received signal. It is disclosed that the BER is estimated by comparing the received signal with a true value.

FIG. 6 is a diagram showing a configuration of a conventional BER estimating apparatus. The signal received by the antenna 10 is demodulated in the receiver 11 and input to the decoder 13.
The decoder 13 decodes the signal, generates a decoded signal, sends the decoded signal for data reception to a subsequent circuit, and inputs the decoded signal to the encoder 14 having the same configuration as the transmission side for BER estimation. . The encoder 14 performs exactly the same processing as the encoding processing performed on the transmission side, reproduces an encoded signal, and outputs the encoded signal. The coded signal obtained in this way is input to the comparison unit 15. On the other hand, the demodulated signal demodulated by the receiver 11 is input to the delay unit 12, delayed by the processing delay of the decoder 13 and the encoder 14, and input to the comparison unit 15. The comparison unit 15 compares the demodulated signal (not decoded) from the delay unit 12 with the encoded signal from the encoder 14, and based on the encoded signal from the encoder 14, , A bit error contained in the demodulated signal is detected.

[0005] The counter 16 is obtained by the comparator 15
The number of bit errors is counted and input to the BER calculation unit 17. The BER calculation unit 17 calculates the ratio of the number of bit errors to the total number of bits, and calculates a bit error rate (BER).
Is calculated.

[0006]

However, especially when a turbo code is applied to the encoding method, it is necessary to provide an interleave circuit in the encoder 14 when performing the same encoding as that on the transmitting side. In the case of a high data rate such as multimedia communication, the interleave circuit increases the data length of one coding unit, thereby increasing the scale of hardware on the receiving side.

[0007] When performing re-encoding and comparison,
The comparison of the data length × the coding rate length results in an increase in hardware scale and a delay. Further, in the case where a systematic code such as a turbo code is used, when the re-encoded data is used, when the decoding effect is low, the characteristic may be degraded.
This is because, in the case of a systematic code, if there is an error, it propagates in coding units.

An object of the present invention is to provide a BER estimating apparatus which can reduce a hardware scale and has a high accuracy of a BER estimation value.

[0009]

In view of the above problems,
According to the present invention, the BER is estimated by regarding the decoded data as the true value of the systematic bit before decoding of the received signal and comparing it with the systematic bit before decoding, thereby reducing the hardware scale.

A BER estimating apparatus according to the present invention is a bit error rate (BER) estimating apparatus in an apparatus for performing communication by performing coding using a systematic code, and decodes a received signal to obtain a decoded signal. A decoding means for generating a system bit, and a bit selection means for extracting a systematic bit from the received signal,
A comparison unit for comparing the decoded signal with the extracted systematic bits, and a BER calculation unit for calculating a BER estimation value based on a comparison result of the comparison unit are provided.

The BER estimation method according to the present invention is a bit error rate (BER) estimation method in a device that performs communication by performing coding using a systematic code, wherein (a) decoding a received signal Generating a decoded signal;
(B) extracting a systematic bit from the received signal; (c) comparing the decoded signal with the extracted systematic bit; and (d) based on the comparison result of the comparing means. Calculating an estimated value.

According to the present invention, it is not necessary to provide the same coding circuit on the receiving side as on the transmitting side, and only the systematic bits are extracted and compared with the decoded data with a simple configuration. The amount of wear can be significantly reduced.

[0013] In addition, when a signal is re-encoded and compared with a received signal as in the prior art, the effect of the error bit extends to bits other than the systematic bit. Therefore, when the reception level is low, the BER estimation value deteriorates. On the other hand, in the present invention, since the systematic bits are directly extracted and compared with the decoded signal,
An accurate BER estimation value can be obtained regardless of the level of the reception level.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS On the receiving side, since the data actually transmitted on the transmitting side cannot be known, the BER cannot be measured directly. Therefore, in the embodiment of the present invention, the BE using the decoded data and the systematic bit before decoding is used.
Perform R estimation.

FIG. 1 is a diagram showing an example of an embodiment of a turbo coding device on the transmission side. This example will be used hereinafter in the description of the present embodiment. In the example of FIG. 1, the input bit (data
(X)) is transmitted as the systematic bit as it is, the input bit X is branched, encoded by the encoder 20 to generate and output the bit Y, and further the input bit X is interleaved by the interleaver 22. Encoding is performed by the encoder 21 to generate a bit Z. Therefore,
Bits Y and Z are added to input bits X (systematic bits) and transmitted. That is, the input bits X1, X2,
X3,..., Output bits X1, Y1, Z1,.
X2, Y2, Z2, X3, Y3, Z3,...

FIG. 2 is a diagram showing a first embodiment of the present invention. The signal received by the antenna 30 is transmitted to the receiver 31
Demodulated at Further, the output of the receiver 31 is DEC
(Decoder) 34 performs error correction decoding to generate a decoded signal. Further, the decoded signal is supplied to the comparing unit 35.

The demodulated signal from the receiver 31 is transmitted to the delay unit 3
2 is input. The delay unit 32 is used for timing adjustment in the comparison unit 35. The bit selection unit 33 includes the delay unit 32
Only the systematic bits are selected from the demodulated signals output from the. The comparing unit 35 compares the signal decoded by the decoder 34 with the bit selected by the bit selecting unit 33.

As described with reference to FIG. 1, in the case of a code signal (systematic code) having systematic bits such as a turbo code, transmission data bits X before being encoded in a regular order are always arranged. Therefore, when the head of the transmission signal is detected, the bit selection unit 33 extracts only the systematic bits from the encoded bit sequence and uses the systematic bits for comparison with the decoded signal decoded by the decoder 34. . However, the present invention is not limited to the turbo code, and is applicable to an encoding method in which raw data bits to be transmitted among coded bits are included in regular positions as systematic bits. .

The data strings in (1), (2) and (3) in FIG. 2 are as follows. (1) Received signal sequence: X'1, Y'1, Z'1, X'2,
Y'2, Z'2, X'3, Y'3, Z'3, ... (2) After bit selection: X'1, X'2, X'3, ... (3) Decoded signal Column: rX1, rX2, rX3,... Here, the bits “X”, “Y”, and “Z” with “′” are signals received from the transmission side and may contain bit errors. , Do not completely match the transmission bits on the transmission side. “R” in the decoded signal sequence indicates that the signal is a decoded signal.

The comparing unit 35 compares the data strings (2) and (3). The counter 36 counts the number of bits compared with the number of errors detected by the comparing unit 35. B
The ER operation unit 37 calculates the BER by dividing the number of errors counted by the counter by the total number of bits.

FIG. 3 is a diagram showing an example of the configuration of the bit selection section. Although FIG. 3 shows that the bit selection unit is configured by hardware, the DSP (Division
gital Signal Processor) and can be realized by software.

The input signal to the bit selection section is input to flip-flop 40. In the case of the turbo code of FIG.
Of the three bits, one bit is a systematic bit at first, so a counter 41 is prepared which operates at one-third clock of the timing at which the bit of the input signal is input. The system is configured to extract systematic bits from input signal bits.

It is assumed that the timing at which the first bit of the input signal is input and that the input bit is obtained by another device (not shown) provided in a terminal including the BER estimating device of the present embodiment. Therefore, in the case of the turbo code of FIG.
Since the first bit is a systematic bit, an enable signal is input from the counter 41 to the flip-flop 40 so as to select the first bit, and thereafter, bits are extracted from the input signal at a ratio of one bit to three bits. .

As described above, in the demodulated signal encoded by the encoding method including the systematic bits, since the systematic bits are regularly arranged, the bits used for estimating the BER can be very simply configured. Can be extracted.

In the case of the embodiment shown in FIG. 2, unlike the conventional technique, no encoder is required on the receiving side, and only a bit selector having a simple configuration need be provided. Can be done significantly.

FIG. 4 is a diagram showing a second embodiment of the present invention. The signal received by the antenna 50 is transmitted to the receiver 51
And demodulated. The demodulated signal is input to a DEC (decoder) 54 and subjected to error correction decoding to generate a decoded signal. The decoded signal is also supplied to the comparing section 55 and the error detecting section 58. The delay unit 52 is used for timing adjustment in the comparison unit 55. The bit selection unit 53 selects a corresponding bit to be compared by the comparison unit 55. That is, the bit selection unit 53 is the same as that described in the first embodiment, and the description is omitted here.

The data strings in (1), (2) and (3) in FIG. 4 are as follows. (1) Received signal sequence: X'1, Y'1, Z'1, X'2,
Y'2, Z'2, X'3, Y'3, Z'3, ... (2) After bit selection: X'1, X'2, X'3, ... (3) Decoded signal Column: rX1, rX2, rX3,... Here, “′” corresponds to the transmission data because there is a possibility that a bit error may be included in the transmission data on the transmission side, but is exactly the same. Indicates that there is no limit. Also, “r” in (3) indicates that the signal is a signal after decoding.

The comparing section 55 compares (2) and (3). Generally, the decoded signal includes a CRC (Cyclic Redu
ndancy check) bit. With this code, the error detection unit 55 detects an error and controls the counter 56. In the decoder 54, the demodulated signal from the receiver 51 is decoded including error correction, and further, the CRC bit is used to determine whether there is a bit error that could not be corrected. It is.

The counter 56 counts the number of errors detected by the comparator 55 and the number of bits compared. But,
In the decoding unit in which the error is detected by the error detection unit 58, the counter 5 is set so that neither the number of errors nor the number of bits are counted.
6 is controlled.

That is, in the decoding unit determined to have an error by the error detection unit 58, a bit error occurs during transmission in the transmission signal on the transmission side, and the true value of a bit serving as a reference for BER calculation is used. Not suitable for That is, ideally, in BER estimation, it is preferable to measure how much a signal received on the receiving side contains a bit error with respect to a signal transmitted on the transmitting side. But,
The transmitting side does not know what signal has been transmitted unless the signal is decoded on the receiving side. However, since the received signal contains a bit error, it does not completely match the transmission data on the transmission side. Therefore, the BER is estimated using a decoding unit having no bit error (successfully correcting the bit error by error correction decoding), which is considered to match transmission data on the transmitting side as much as possible. By doing so, more accurate BER estimation can be performed because no error bit is included in the decoded signal serving as the reference for BER estimation.

The BER calculator 57 calculates the BER by dividing the number of errors counted by the counter 56 by the number of bits counted. As an example, the number of count blocks (decoding units) is 5, and the number of bits included in one block is 1.
When detecting BER in the case of 00 bits, the following case is assumed.

Error Number 10 15 20 15 20 Error Detection Correct Correct Correct Correct Correct Error Previously, the calculation was (10 + 15 + 20 + 15 + 20) / (5 × 100), but in the present invention, it is calculated as (10 + 15 + 15) / (3 × 100) calculate.

By performing the above calculation, the error bits are counted only when the decoded data is correct, so that accurate estimation can be performed. FIG. 5 is a diagram showing BER estimation results with respect to the reception level when the conventional method is used and when the present invention is used.

As is apparent from FIG. 5, a graph showing an almost true value is obtained in the embodiment of the present invention with respect to the true value of BER. On the other hand, when the BER is estimated by applying the conventional method, the reception level becomes −
When it becomes 1 dB or less, the BER estimation value sharply increases, and a BER estimation result considerably deviated from the true value is obtained.

When the conventional method is applied to, for example, a turbo code, the reason why the BER estimation value deteriorates when the reception level is low will be described below. As an example, consider a turbo code 40 bits all0 (40 bits are all 0) conforming to 3gpp. The output of the encoder at that time is X, Y, Z
all0. However, at that time, the error is 1 in the systematic bit.
When a bit is inserted, X: 0000100000000000000000000000000000000000 Y: 0000111100101110010111001011100101110010 Z: 0000000000000011110010111001011100101110

In the case of the turbo code, the systematic bit (signal X) affects the parity bit (signal Y, Z) by the signal length. Therefore, when the parity bits are compared by re-encoding as in the related art, the bit errors of the systematic bits are more, and the parity bits are affected, and many bit errors are generated in the parity bits. When the comparison unit compares the parity bits together with the re-encoded systematic bits, the characteristics of the BER estimation value deteriorate.

Although the description of the embodiment of the present invention has been made on the premise that a turbo code is used, the present invention is not limited to a turbo code, and is transmitted as systematic bits in encoded data. The present invention can be applied to all systematic codes in which power data bits (bits that are not redundant bits) are regularly arranged. Here, the fact that the systematic bits are regularly arranged in the coded data does not refer to a signal after modulation or a signal before demodulation, but a demodulated signal obtained after demodulation on the receiving side. Is described. <Supplementary notes> What is claimed is: 1. A bit error rate (BER) estimating apparatus for an apparatus for performing communication by performing coding using a systematic code, comprising: decoding means for decoding a received signal to generate a decoded signal; Bit selection means for extracting a systematic bit from the data, comparison means for comparing the decoded signal with the extracted systematic bit, BER calculation means for calculating a BER estimation value based on a comparison result of the comparison means, A BER estimating device comprising: (1) 2. Bit error detection means for determining whether or not the decoding unit of the decoding means contains a bit error after decoding,
2. The BER estimating apparatus according to claim 1, further comprising: a means for causing the BER calculating means to calculate a BER calculated value only for the decoding unit that does not include a bit error after decoding. (2) 3. 3. The BE according to claim 2, wherein the bit error detecting unit determines whether or not the decoding unit after decoding includes a bit error using a CRC bit.
R estimation device. 4. The BE according to claim 1, wherein the encoding method using the systematic code is encoding using a turbo code.
R estimation device. 5. A method for estimating a bit error rate (BER) in a device that performs communication by performing encoding using a systematic code, comprising: (a) decoding a received signal to generate a decoded signal; Extracting the systematic bits from the received signal; (c) comparing the decoded signal with the extracted systematic bits; and (d) estimating the BER based on the comparison result of the comparing means. BER calculation step.
(3) 6. (E) determining whether or not the decoding unit of step (a) contains a bit error after decoding; and (f) determining in step (d) that no bit error is contained after decoding. BER only for decoding unit
The BER estimation method according to claim 5, further comprising: calculating a calculated value. (4) 7. 7. The BE according to claim 6, wherein in the step (e), it is determined whether or not a bit error is included in the decoded unit after decoding using a CRC bit.
R estimation method. 8. The BE according to claim 5, wherein the encoding method using the systematic code is encoding using a turbo code.
R estimation method.

[0038]

According to the present invention, in a communication system to which an error correction code is applied, BER estimation can be performed by adding a simple circuit, and the hardware scale can be reduced. .

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an example of an embodiment of a turbo encoding device on a transmission side.

FIG. 2 is a diagram showing a first embodiment of the present invention.

FIG. 3 is a diagram illustrating an example of a configuration of a bit selection unit.

FIG. 4 is a diagram showing a second embodiment of the present invention.

FIG. 5 is a diagram illustrating a BER estimation result with respect to a reception level when a conventional method is used and when the present invention is used.

FIG. 6 is a diagram illustrating a configuration of a conventional BER estimating apparatus.

[Explanation of symbols]

 20, 21 Encoder (encoder) 22 Interleaver 30, 50 Antenna 31, 51 Receiver 32, 52 Delay unit 33, 53 Bit selection unit 34, 54 Decoder (DEC: decoder) 35, 55 Comparison unit 36, 56 Counter 37, 57 BER operation unit 40 Flip-flop 41 Counter 58 Error detection unit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kazuo Obuchi 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Tetsuya Yano 4-chome, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa No. 1 No. 1 Fujitsu Limited F term (reference) 5B001 AA10 AB01 AC05 AD06 AE02 5J065 AA01 AB01 AC02 AD10 AE01 AF03 AG06 AH09 AH15 5K014 AA01 BA10 EA08 FA16 GA02

Claims (4)

[Claims] 1. A bit error rate (BER) estimating device in a device that performs communication by performing encoding using a systematic code, comprising: decoding means for decoding a received signal to generate a decoded signal; A bit selecting unit for extracting a systematic bit from the received signal; a comparing unit for comparing the decoded signal with the extracted systematic bit; and calculating a BER estimation value based on a comparison result of the comparing unit. A BER estimating device comprising: a BER calculating unit. 2. A bit error detecting means for judging whether or not a decoding unit of the decoding means contains a bit error after decoding, and the decoding means wherein the BER calculating means does not contain a bit error after decoding. 2. The BER estimating apparatus according to claim 1, further comprising: means for calculating a BER calculation value only for a unit. 3. A method for estimating a bit error rate (BER) in an apparatus for performing communication by performing coding using a systematic code, comprising the steps of: (a) decoding a received signal to generate a decoded signal; (B) extracting a systematic bit from the received signal; (c) comparing the decoded signal with the extracted systematic bit; and (d) based on a comparison result of the comparing means. Calculating a BER estimation value.
R estimation method. (E) In the decoding unit of the step (a),
Determining whether a bit error is included after decoding; and (f) calculating a BER calculation value only in the decoding unit in which no bit error is included after decoding in the step (d); The BER estimation method according to claim 3, further comprising: