JP2000106442A - Insulated-gate semiconductor device and use thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an insulated-gate semiconductor device, which is easily manufactured, and a method of using the device. SOLUTION: An insulated-gate semiconductor device is provided with a first conductivity type semiconductor region 2, which has a prescribed impurity concentration and is provided on the surface of a substrate 1, a first conductivity type source region 3 provided on the surface of the region 2, a first conductivity type drain region 4 provided on the surface of the region 2 separately from the region 3, a second conductivity type gate electrode 9, which gas a gate insulating film 8 between the surface of an intermediate region 7 between the regions 3 and 4 in the region 2 and the electrode 9 and is provided in a state that the electrode 9 is insulated from the region 7, and an insulating film 10 provided in a prescribed depth from the surface of the substrate 1, the region 7 is formed until the arrival of a depletion layer 11 to the film 10 by a difference between the work function of the region 3 and the electrode 9 at the time when a potential in the region 3 and a potential in the electrode 9 are equipotential, whereby a channel region to put the state between the regions 3 and 4 in an off-state is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate type semiconductor device used for a semiconductor relay or the like.

[0002]

2. Description of the Related Art Conventionally, there is an insulated gate type semiconductor device of this type shown in FIG. This has a semiconductor region B of the first conductivity type (P type) provided on the surface of the substrate A with a predetermined impurity concentration, and a second conductivity type (P type) provided on the surface of the semiconductor region B 1. N-type) source region C,
A source electrode D connected to the source region C and a semiconductor region D
A second conductivity type (N-type) drain region E provided on the surface of B at a distance from the source region C, a drain electrode F connected to the drain region E, and a source region C in the semiconductor region B; The surface of the intermediate region G between the drain region E and the gate electrode J provided in an insulated state with the gate insulating film H interposed therebetween, and the insulating film provided immediately below the intermediate region G
And K.

In the vicinity of the surface of the intermediate region F, the formation state of the depletion layer is controlled by changing the potential of the gate electrode H with respect to the source region C, and the conduction state between the source region C and the drain region E is changed. Is a changing channel region.

[0004]

In the above-mentioned conventional insulated gate type semiconductor device, since the insulating film J is provided immediately below the intermediate region G, the PN junction area is reduced, and the source region is formed. The conduction state between C and the drain region E changes quickly.

[0005] Although the PN junction of this device has a small area, it is difficult to manufacture because it is formed through a complicated semiconductor manufacturing process.

The present invention has been made in view of the above points, and an object of the present invention is to provide an insulated gate semiconductor device which is easy to manufacture and a method of using the same.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor device of the first conductivity type provided on a surface of a substrate with a predetermined impurity concentration. A first conductivity type source region provided on the surface of the semiconductor region, a first conductivity type drain region provided on the surface of the semiconductor region at a distance from the source region, and a source region in the semiconductor region. A second conductive type gate electrode provided with a gate insulating film between the drain region and the surface of the intermediate region and insulated from the intermediate region and a predetermined depth from the surface of the substrate; And an insulating film provided at
The intermediate region is formed until a depletion layer reaches the insulating layer by a work function difference between the gate electrode and the gate electrode at the same potential when the source region and the gate electrode are at the same potential, so that the source region and the drain are formed. A channel region for turning off the region is provided.

According to a second aspect of the invention, there is provided a semiconductor device having a first conductivity type provided on a surface of a substrate with a predetermined impurity concentration and a first conductivity type provided on a surface of the semiconductor region.
A source region of the first conductivity type, a drain region of the first conductivity type provided on the surface of the semiconductor region apart from the source region, and a surface of an intermediate region between the source region and the drain region in the semiconductor region. A second conductive type gate electrode provided in a state insulated from the intermediate region with a gate insulating film therebetween, and an insulating film provided at a predetermined depth from the surface of the substrate. The intermediate region is formed until the depletion layer reaches the insulating layer due to a work function difference between the gate electrode and the gate electrode at the same potential when the source region and the gate electrode are at the same potential. A method of using an insulated gate semiconductor device using an insulated gate semiconductor device provided with a channel region for turning off a drain region, wherein the intermediate region is irradiated with light at the same potential. Unishi are.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Insulated gate type semiconductor device of the present invention
One embodiment of the present invention will be described below with reference to FIGS.

Reference numeral 1 denotes a silicon N-type semiconductor substrate having a first conductivity type (N) having a predetermined impurity concentration on the surface thereof.
A semiconductor region 2 of a first conductivity type (N type) having a higher impurity concentration than the semiconductor region 2 is provided on the surface of the semiconductor region 2; A first conductivity type (N-type) drain region 4 having a higher impurity concentration than the semiconductor region 2 is provided apart from the source region 3. And the semiconductor area
2, a source electrode 5 is connected to the source region 3 and a drain electrode 6 is connected to the drain region 4.

The substrate 1 has a gate insulating film 8 between the surface of the intermediate region 7 between the source region 3 and the drain region 4 in the semiconductor region 2, and has a second conductivity type (P A gate electrode 9 made of (mold) material is provided in an insulated state with respect to the intermediate region 7, and an insulating film 10 is provided at a predetermined depth from the surface of the semiconductor region 1.

For this purpose, the intermediate region 7 of the first conductivity type (N type) and the second conductivity type (P type) are formed when the source region 3 and the gate region 5 have the same potential. Due to the work function difference φMS between the gate electrode 9 and the gate electrode 9, the depletion layer 11 is formed immediately below the gate insulating film 8 until the depletion layer 11 reaches the insulating layer 10.
The channel region 12 for turning off between the
Will be provided.

Next, the work function difference φMS will be described. The work function difference φMS is expressed by the equation (1), where φM is the work function of the gate electrode material, χ is the electron affinity of the semiconductor, and Eg is the band gap of the semiconductor. , Φb indicate the potential difference between the Fermi level of the semiconductor immediately below the gate insulating film and the intrinsic Fermi level, respectively.

ΦMS = φM− (χ + (Eg / 2) −φb) (1) The above-mentioned voltage of φMS is applied to the intermediate region 7 of the first conductivity type (N-type) with respect to the second conductivity type (N-type). It has a polarity that applies a negative voltage to the gate electrode 9 made of (P-type) material.

As described above, the depletion layer 11 is formed by the work function difference φMS until the depletion layer 11 reaches the insulating layer 10, so that the channel region 12 in which the source region 3 and the drain region 4 are turned off has the source region 3. By applying a positive voltage to the gate electrode 9 with respect to the region 3, the applied positive voltage causes the depletion layer 11 formed in the intermediate region 7 to disappear through the gate insulating film 10, so that Source area 3
And the drain region 4 is turned on.

The channel region 12 in which the source region 3 and the drain region 4 are turned off is irradiated with light to the intermediate region 7, and the channel region 12 is formed between the source region 3 and the drain region 4. Can be turned on. Specifically, when light is irradiated on the intermediate region 7, minority carriers are generated. As a result, the depletion layer 11 formed immediately below the gate insulating film 8 recedes due to the work function difference φMS, and the source region 3 and the drain The region 4 is turned on.

In the insulated gate semiconductor device 20, the depletion layer 11 is formed by the work function difference φMS between the source region 3 and the gate electrode 9 when the source region 3 and the gate electrode 9 are at the same potential. Since the intermediate region 7 provided with the channel region 12 for turning off the source region 3 and the drain region 4 has the same conductivity type as the source region 3 and the drain region 4, the intermediate region 7 is complicated. Since a PN junction that requires a semiconductor manufacturing process is not formed, it is easy to manufacture.

When the source region 3 and the gate electrode 9 are at the same potential, ie, at the same potential, the depletion layer 11 is formed due to the work function difference φMS between the intermediate region 7 and the gate electrode 9. As shown in FIG. 2, the intermediate region 7 is irradiated with light as indicated by an arrow to form a semiconductor region.
2 causes the depletion layer 11 to recede, so that a positive voltage is not applied to the source region 3 but the gate electrode 9 is applied to turn on the source region 3 and the drain region 4. State. Therefore,
For example, as shown in FIG. 3, a light emitting element that emits an optical signal
When used for the semiconductor relay 30 provided with 30a, an element such as a photodiode for converting an optical signal into an electric signal is not required, so that the size can be reduced.

In this embodiment, the first conductivity type is N
The second conductivity type is P-type, but the first conductivity type is P-type.
The same effect can be obtained even if the second conductivity type is N-type.

In the present embodiment, the semiconductor substrate 1 is
It is made of silicon, but it may be made of silicon carbide,
In the case of silicon carbide, P
Since a high temperature is required to form an N-junction, such a high temperature is not required, and the effect of facilitating manufacture can be remarkably exhibited.

In FIGS. 1 and 3 showing the present embodiment, the insulating layer 10 is provided in contact with the source region 3 and the drain region 4, but the intermediate region 7 and the gate electrode are provided.
As long as the depletion layer 11 formed by the work function difference φMS between the source region 3 and the source region 3 reaches the source region 3 and the drain region 4, it does not need to be provided.

[0022]

According to the first aspect of the present invention, a depletion layer is formed due to a work function difference between the gate electrode and the source region when the source region and the gate electrode are at the same potential. Since the intermediate region provided with the channel region for turning off between the regions has the same conductivity type as the source region and the drain region, a PN junction requiring a complicated semiconductor manufacturing process is formed. No, it is easy to make.

According to the method of using the invention described in claim 2,
At the same potential when the source region and the gate electrode are at the same potential,
The depletion layer is formed due to the work function difference between the intermediate region and the gate electrode, so that the channel region, which has been turned off between the source region and the drain region, is irradiated with light to the semiconductor region. Since the generated minority carriers cause the depletion layer to recede, the source region and the drain region can be turned on without applying a positive voltage to the source region to the gate electrode. it can. Therefore, for example, when used in a semiconductor relay, an element such as a photodiode for converting an optical signal into an electric signal is not required, and the size can be reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of one embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a state in which a conductive state between a source region and a drain region is changed by irradiating light to an intermediate region of the above.

FIG. 3 is a circuit diagram of a semiconductor relay using the same as above.

FIG. 4 is a sectional view of a conventional example.

[Explanation of symbols]

 1 semiconductor substrate 2 semiconductor region 3 source region 4 drain region 7 intermediate region 8 gate insulating film 9 gate electrode 10 insulating layer 11 depletion layer 12 channel region φMS work function difference

Claims (2)

[Claims] A first conductivity type semiconductor region provided on the surface of the substrate with a predetermined impurity concentration; a first conductivity type source region provided on the surface of the semiconductor region; and a semiconductor region. A gate insulating film is interposed between a drain region of the first conductivity type provided on the surface of the semiconductor device and separated from the source region, and a surface of an intermediate region between the source region and the drain region in the semiconductor region. The intermediate region includes a gate electrode of the second conductivity type provided in an insulated state, and an insulating film provided at a predetermined depth from the surface of the substrate.
At the same potential where the source region and the gate electrode are at the same potential, a depletion layer is formed until the depletion layer reaches the insulating layer due to a work function difference between the gate electrode and the source region and the drain region. An insulated gate semiconductor device provided with a channel region to be turned off. 2. A semiconductor region of a first conductivity type provided on a surface of a substrate with a predetermined impurity concentration, a source region of a first conductivity type provided on a surface of the semiconductor region, and a semiconductor region. A gate insulating film is interposed between a drain region of the first conductivity type provided on the surface of the semiconductor device and separated from the source region, and a surface of an intermediate region between the source region and the drain region in the semiconductor region. The intermediate region includes a gate electrode of the second conductivity type provided in an insulated state, and an insulating film provided at a predetermined depth from the surface of the substrate.
At the same potential where the source region and the gate electrode are at the same potential, a depletion layer is formed until the depletion layer reaches the insulating layer due to a work function difference between the gate electrode and the source region and the drain region. A method for using an insulated gate semiconductor device using an insulated gate semiconductor device provided with a channel region to be turned off, wherein the intermediate region is irradiated with light at the same potential. How to use a semiconductor device.