JP2000155408A - Pattern data certification method and pattern data correction method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily execute data certification of automatic light proximity effect software. SOLUTION: The data to be processed is inputted to a hierarchical structure processing section 11 where the hierarchical structure of the inputted data is subjected to an analysis and development processing. The processed data is then subjected to correction processing in a data correction processing section 12. At this time, the correction is executed by setting a correction quantity at zero. The data is transferred to an output data constitution section 13 where data output is executed. The output data outputted from this output data constitution section 13 and the input data are compared in a data comparison section 14. The comparison is made possible by the exclusive-OR processing of a pool function. The result of the exclusive-OR of the input data and the output data which is zero evidences that there are no problems in the data processing. The result which is 1 evidences that there is a problem in the data processing. If such certification method is used, the software is able to easily and rapidly execute the data certification when the hierarchical structure of the input data is subjected to the analysis and development processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method for verifying data of a corrected exposure pattern in an exposure technique used for manufacturing a semiconductor device or a liquid crystal panel.

[0002]

2. Description of the Related Art At present, advances in miniaturization technology of semiconductor devices are rapid. For example, 64 Mbits of DRAM are mass-produced, and samples of 256 Mbits are shipped. A lithography process is a key process for manufacturing such ultrafine and highly integrated semiconductor devices. Currently, i-line (wavelength 365 nm) and KrF excimer laser (wavelength 2
A projection exposure apparatus such as a stepper using a light source of 48 nm) is mainly used. However, when the minimum size of the device becomes smaller and smaller than the exposure wavelength, the following problems become more prominent. That is, dimensional fluctuation and shape deterioration of the resist pattern after exposure due to the optical proximity effect. This is a phenomenon that, for example, a pattern designed as 0.18 μm does not have dimensions as designed due to the surrounding pattern arrangement, or a long side of an elongated rectangular pattern retreats extremely. FIG. 5 shows an example of a dimensional change due to the optical proximity effect. Even after a pattern having the same size (0.18 μm), the size after transfer differs depending on the pattern pitch.

There is an optical proximity correction technique as a method for preventing such a pattern deformation and dimensional variation due to the optical proximity effect and obtaining a desired pattern shape. This is a technique in which a pattern is previously deformed on a photomask so that a resist pattern after exposure approaches a desired shape. Currently, software for automatically performing optical proximity correction has been developed and is commercially available. For example, PROTEUS (TM) manufactured by Avanti, Inc. and OPR manufactured by TVT, Inc.
X (TM).

[0004]

However, there is a major problem in using the current automatic correction software in a mass production site for semiconductor devices and the like. It is a matter of verifying the automatically corrected pattern. Currently, automatic correction software generally has the following three stages. (1) Examine the hierarchical structure of the input design data and transform it into data for correction (2) Generate a correction pattern by simulation or a rule prescribed in advance (3) Data that can be processed by a mask drawing machine Hereinafter, the contents of (1) to (3) will be described in detail. FIG. 6A shows an example of the hierarchical structure of the input data. Normally, in the design of a device, not all circuit patterns are created as one flat file, but as an aggregate of several files. In FIG. 6, 3 is assigned to the top layer file (hereinafter referred to as a cell), that is, TOPCELL.
Cells A, B, and C are incorporated. In addition, A
A1, A2, A3, and C include cells C1, C2, and C3. TO
PCELL indicates a function (or its layout) of a certain functional block or the entire integrated circuit, and lower-level functions (or its layout) combined to exhibit the function are A, B, and C, and furthermore, Subordinate functions (or their layout) are A1, A2, A3, C1, C2,
C3. When represented by such data, the proximity information of an actual pattern (for example, a transistor pattern) at the boundary between them is not known.

In order to perform the optical proximity effect correction, it is necessary to know the arrangement information of a pattern around a certain pattern of interest. Therefore, generally, the hierarchical structure of input data is analyzed and expanded. In this expansion processing, the correlation between the patterns can be investigated after making the data flat. This step is the analysis of the hierarchical structure of (1) and the modification to the data for correction. FIG. 6B shows a state in which the hierarchical structure of FIG. 6A is being analyzed. After the development processing, the data becomes pattern data indicating an actual arrangement of elements such as individual transistors, for example. Thereby, proximity information around a certain actual pattern (for example, a transistor pattern) can be obtained.

Next, the correction of (2) is performed. The case where simulation is used is taken as an example. As shown in FIG. 7, first, an edge having a pattern of interest (FIG. 7A) is cut into line segments (FIG. 7B). Then, a simulation is performed for each of the cut line segments (FIG. 7C).
This simulation is generally based on a light intensity simulation and generally takes into account the effects of a resist process and etching. Next, the deviation between the simulation result and the original design pattern is measured. If the deviation exceeds the specified value, the position of the target line segment is moved (FIG. 7D). In FIG. 7D, an amount (for example, +10 nm) indicating in which direction and how much the edge (line segment) of the pattern is moved is a correction amount, which is an amount determined by a correction amount table or a simulation. is there. After that, the simulation is performed again. This is repeated until the difference between the simulation result and the original design pattern becomes equal to or smaller than a specified value. That is,
The correction processing of (2) predicts a resist pattern that will be realized after exposure from the pattern data of the photomask developed in (1) based on a predetermined method (simulation or a predetermined rule). And
The developed data is corrected so that the predicted pattern has a deviation amount equal to or less than a specified value from the original design pattern (desired resist pattern).

[0007] The finally corrected result is output in a format that can be handled by, for example, an electron beam lithography apparatus for producing a photomask ((3) above). What is generally called a GDS format is used.

At each of these stages, it is necessary to verify whether the data is correctly processed, especially in (1) and (2). For example, in the development of the hierarchical structure, whether there is no cell missing or whether an abnormal pattern is added during the correction process. Until now, verification methods such as processing a large number of design data and manually checking the output data (FIG. 8) and evaluating the yield by applying the device to the actual device have been taken. However, these methods are time consuming and expensive, and have made the introduction of automatic correction software difficult. FIG. 8 is a flowchart showing an example of a conventional pattern data verification method, in which a hierarchical structure processing section 21, a correction processing section 22,
The output data configuration unit 23 shows the steps (1), (2), and (3) in the software described above in hardware, and the output data configuration unit 23 manually compares the output data with the input data to perform verification. The steps to be performed will be described.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for easily performing data verification using automatic optical proximity correction software, and to provide highly reliable mask data.

[0010]

According to a first aspect of the present invention, there is provided a pattern data verifying method, comprising: inputting pattern data;
A step of analyzing and expanding the hierarchical structure of the input pattern data, a step of correcting the data subjected to the expanding processing of the hierarchical structure, a step of outputting the corrected data, and a step of correcting in the correction processing Comparing the output data corrected with the amount to 0 and the input pattern data to determine whether the hierarchical structure development processing is correct or not.

According to this pattern data verification method, the correctness of the hierarchical structure development processing is determined by comparing the data output after being corrected with the correction amount being 0 in the correction processing and the input pattern data. Therefore, it is possible to easily and quickly verify the pattern data when analyzing and expanding the hierarchical structure of the input pattern data.

According to a second aspect of the present invention, there is provided a pattern data correction method comprising: a step of inputting pattern data; a step of analyzing and expanding a hierarchical structure of the input pattern data; A pattern data correction method including a step of performing a correction process and a step of outputting data subjected to the correction process, wherein the data corrected and output with the correction amount set to 0 in the correction process and the input pattern data are combined. The method is characterized in that a step of judging the correctness of the development process of the hierarchical structure by comparing is provided.

This pattern data correction method includes a step of judging the correctness of the hierarchical structure development processing by comparing the data output after being corrected by setting the correction amount to 0 in the correction processing and the input pattern data. As a result, the data verification at the time of analyzing and expanding the hierarchical structure of the input pattern data can be easily performed in a short time. As described above, since the pattern data correction method includes the data verification method, the user of the software that realizes the pattern data correction method can use the software with confidence. As a result, it is possible to reduce the occurrence of defects due to data processing defects, and to significantly shorten the product development period.

According to a third aspect of the present invention, there is provided a pattern data verifying method, comprising the steps of: inputting pattern data; analyzing and expanding a hierarchical structure of the input pattern data; A first and a second pattern data correction step including a step of performing a correction processing and a step of outputting data subjected to the correction processing are provided, and the same pattern data is subjected to the first pattern data correction step and the second pattern data correction step. Input to the pattern data correction step and the first
The first pattern data correction step or the second pattern data correction step is performed by comparing each pattern data corrected by the second pattern data correction step and the second pattern data correction step.
It is characterized by determining whether the processing in the pattern data correction step is correct or not.

According to this pattern data verification method, the first and second pattern data correction steps are provided, and the same pattern data is combined with the first and second pattern data correction steps.
By comparing the respective pattern data corrected by the first pattern data correction step and the second pattern data correction step.
By determining the correctness of the processing in the first pattern data correction step or the second pattern data correction step, verification of the corrected pattern data can be easily performed in a short time.

According to a fourth aspect of the present invention, there is provided the pattern data verifying method as set forth in the third aspect.
The correction in the first and second pattern data correction steps is optical proximity effect correction.

[0017]

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a pattern data correction method according to the first embodiment of the present invention. This pattern data correction method includes a pattern data verification method and is realized by software.

According to the present embodiment, it is possible to verify data when software analyzes a hierarchical structure of input data and performs expansion processing, and the output data from the output data forming unit 13 is actually used by a mask drawing machine. In such a case, the hierarchical structure processing unit 11, the correction processing unit 12, and the output data forming unit 13
Performs the same processing as the conventional hierarchical structure processing section 21, correction processing section 22, and output data configuration section 23 shown in FIG. Further, when the data is verified, the following processing is performed.

First, data to be processed is input to the hierarchical structure processing unit 11 to analyze the hierarchical structure. FIG. 2A shows an example of the hierarchical structure of the input data. Normally, in the design of a device, not all circuit patterns are created as one flat file, but as an aggregate of several files. In FIG. 2, 3 is assigned to the top layer file (hereinafter referred to as a cell), ie, TOPCELL.
Cells A, B, and C are incorporated. In addition, A
A1, A2, A3, and C include cells C1, C2, and C3. Now, in order to perform the optical proximity effect correction, it is necessary to know the arrangement information of the pattern around a certain pattern of interest. Therefore, the hierarchical structure of the input data is analyzed and expanded.
In this expansion process, the input data is deformed so that the correlation between the patterns can be examined after making the data flat.
FIG. 2B shows a state during the analysis of the hierarchical structure of FIG. 2A. After the development processing, the data becomes pattern data indicating an actual arrangement of elements such as individual transistors, for example. Thereby, proximity information around a certain actual pattern (for example, a transistor pattern) can be obtained.

The data processed by the hierarchical structure processing unit 11 is input to the correction processing unit 12. This may be performed automatically or manually (the hierarchical structure processing unit 11).
If the software is different from the correction processing unit 12, it is necessary to perform the data movement and input processing manually, that is, the operator. Thereafter, a correction process is performed by the correction processing unit 12, and at this time, the correction is performed by setting the correction amount to 0. This correction amount has been described with reference to FIG. 7D, and here, for example, all values in the correction amount table are set to 0. As described above, the correction is performed with the correction amount set to 0, the data is transferred to the output data forming unit 13, and the data is output from the output data forming unit 13. The data output here is the same data format as the hierarchically structured input data (for example, GDS2)
And Note that the output data of the output data configuration unit 13 is
Data that can be processed by a mask drawing machine, for example, may be output in a format that can be handled by an electron beam drawing apparatus for creating a photomask. In this case, input data having a hierarchical structure input to the data comparison unit 14 is output. It is necessary to convert to the same format as the output data format of the data configuration unit 13 (other software is also possible).

The output data output from the output data forming unit 13 and the input data are compared by the data comparing unit 1
Then, the comparison result is checked by the mismatch pattern extraction unit 15 to determine whether there is a mismatch between the input data and the output data. The comparison in the data comparing unit 14 can be generally performed by an exclusive OR processing of a Boolean function. If the comparison result of the data comparison unit 14, that is, the result of the exclusive OR of the input data and the output data is 0, the mismatch pattern extraction unit 15 determines that there is no mismatch between the input data and the output data. Has no problem, and the verification ends (17). Also,
If the comparison result of the data comparison unit 14 is 1, it is determined that the input data does not match the output data, and in that case, the software is corrected (16).

The correction amount is set to 0 by the correction processing unit 12.
Therefore, the fact that there is no mismatch by the mismatch pattern extraction unit 15 indicates that the correct expansion processing has been performed in the hierarchical structure processing unit 11, and the mismatch pattern extraction unit 15 determines that there is no match. This indicates that the erroneous expansion processing has been performed in the hierarchical structure processing unit 11.

By using the pattern data verification method described above, data verification when the software analyzes the hierarchical structure of the input data and performs expansion processing can be easily performed in a short time.
By this verification, highly reliable mask data can be provided.

Further, since the software (pattern data correction method) in the present embodiment has a pattern data verification method, highly reliable mask data can be obtained, and the software user can use the software with confidence. be able to. As a result, it is possible to reduce the occurrence of defects due to data processing defects, and to significantly reduce the product development period.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a diagram showing the flow of the pattern data verification method of the present embodiment. This embodiment relates to verification of data after software performs a correction process. First, two or more types of software for optical proximity effect correction are prepared.
In this case, the software uses simulation (simulation base), and it is desirable that the simulation algorithm be different. Both may be rule-based. In the present embodiment, two types of cases will be described as examples. In FIG. 3, the two types of software are
1a, correction processing unit 12a, and output data configuration unit 13a
And a software β for performing a second pattern data correction process including a hierarchical structure processing unit 11b, a correction processing unit 12b, and an output data configuration unit 13b.

The data to be corrected is input to two pieces of simulation-based software α and β, and the hierarchical structure processing units 11a and 11b perform analysis and expansion processing of the hierarchical structure. This step is the same as that of the hierarchical structure processing unit 11 of the first embodiment.

Next, correction is performed by the correction processing units 12a and 12b. The case where simulation is used is taken as an example. As shown in FIG. 4, first, an edge having a pattern of interest (FIG. 4A) is cut into line segments (FIG. 4B). Then, a simulation is performed for each of the cut line segments (FIG. 4C). This simulation is generally based on a light intensity simulation and generally takes into account the effects of a resist process and etching. Next, the deviation between the simulation result and the original design pattern is measured. If the deviation exceeds the specified value, the position of the target line segment is moved (FIG. 4D), and the simulation is performed again. This is repeated until the difference between the simulation result and the original design pattern becomes equal to or smaller than a specified value.

The finally corrected result is output from the output data forming units 13a and 13b in a format that can be handled by, for example, an electron beam lithography system for creating a photomask. What is generally called a GDS format is used.

Next, the output data of both the output data forming units 13a and 13b are compared by the data comparing unit 14, and based on the result of the comparison, the mismatching pattern extracting unit 15 checks whether or not there is output mismatch. The comparison in the data comparing unit 14 can be generally performed by an exclusive OR processing of a Boolean function. Unmatched pattern extraction unit 1
In 5, when the comparison result of the data comparison unit 14, that is, the result of the exclusive OR of the output data of both of the output data forming units 13a and 13b is 0, it is determined that both output data match (not mismatch). Judging, it is considered that there was no processing problem in both the software α and β. Because
This is because the software α and β are processed by different algorithms, so that the probability of occurrence of the same processing error can be regarded as almost zero. If there is no inconsistency, the verification is terminated (17).

If the comparison result of the data comparing section 14 is 1, the mismatching pattern extracting section 15 determines that the output data of the two do not match. Normally, as a result of comparing the output data of both, a mismatch is detected. By investigating this mismatch, an abnormality in the correction processing can be easily detected (1).
8) You can modify the software (1
8a) and data correction (18b) after the correction processing can be easily performed. Then, by repeating this verification process, it is possible to improve the accuracy and reliability of the software.

As described above, according to the present embodiment, by comparing the output results of the software α and β, it is possible to determine the correctness of the processing by the software α and β, and to verify the corrected pattern data. Can be easily performed in a short time.

[0032]

As described above, according to the pattern data verifying method of the present invention, the data output after being corrected by setting the correction amount to 0 in the correction processing is compared with the input pattern data, thereby achieving a hierarchical structure. Since the correctness of the expansion processing is determined, an excellent pattern data verification method that can easily and quickly verify the pattern data when analyzing and analyzing the hierarchical structure of the input pattern data is developed. It can be realized.

Further, according to the pattern data correction method of the present invention, by comparing the output data corrected with the correction amount to 0 in the correction processing and the input pattern data, the correctness of the hierarchical structure development processing is corrected. Is provided, the data verification at the time of analyzing and expanding the hierarchical structure of the input pattern data can be easily performed in a short time. As described above, since the pattern data correction method includes the data verification method, the user of the software that realizes the pattern data correction method can use the software with confidence. This allows
It is possible to reduce the occurrence of defects due to data processing defects and to significantly shorten the product development period.

Further, according to the pattern data verifying method of the present invention, the first and second pattern data correction steps are provided, and the same pattern data is subjected to the first and second pattern data correction steps. Enter the first
The first pattern data correction step or the second pattern data correction step is performed by comparing each pattern data corrected by the second pattern data correction step and the second pattern data correction step.
By judging whether the processing in the pattern data correction step is correct or not, it is possible to realize an excellent pattern data verification method that can easily and easily verify the corrected pattern data in a short time.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a pattern data correction method according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a hierarchical structure of input data and a state during analysis according to the first embodiment of the present invention.

FIG. 3 is a flowchart illustrating a pattern data verification method according to a second embodiment of the present invention.

FIG. 4 is a diagram showing a pattern data correction method according to a second embodiment of the present invention.

FIG. 5 is a diagram showing a change in pattern dimension due to the optical proximity effect.

FIG. 6 is a diagram showing a hierarchical structure of input data and a state during analysis in a conventional example.

FIG. 7 is a diagram showing a pattern data correction method in a conventional example.

FIG. 8 is a flowchart showing a conventional pattern data verification method.

[Explanation of symbols]

 11, 11a, 11b Hierarchical structure processing unit 12, 12a, 12b Correction processing unit 13, 13a, 13b Output data configuration unit 14 Data comparison unit 15 Unmatched pattern extraction unit

Claims (4)

[Claims] A step of inputting pattern data; a step of analyzing and expanding a hierarchical structure of the input pattern data; a step of correcting data on which the expanding processing of the hierarchical structure is performed; Outputting the corrected data, and comparing the data corrected and output with the correction amount being 0 in the correction processing with the input pattern data to determine whether the hierarchical structure development processing is correct or not. Determining a pattern data. 2. A step of inputting pattern data, a step of analyzing and expanding a hierarchical structure of the input pattern data, a step of correcting data on which the expanding processing of the hierarchical structure has been performed, Outputting the data that has been subjected to the correction processing, by comparing the output data corrected and output with the correction amount being 0 in the correction processing and the input pattern data. A pattern data correction method, further comprising a step of determining whether the hierarchical structure development processing is correct or not. A step of inputting pattern data; a step of analyzing and expanding a hierarchical structure of the input pattern data; a step of correcting data on which the expanding processing of the hierarchical structure is performed; Providing first and second pattern data correction steps each including a step of outputting data subjected to correction processing, wherein the same pattern data is subjected to the first pattern data correction step and the second pattern data correction step. And enter
By comparing each of the pattern data corrected by the first pattern data correction step and the second pattern data correction step, the first pattern data correction step or the second pattern data correction step is performed. A pattern data verification method characterized by determining whether the processing is correct. 4. The pattern data verification method according to claim 3, wherein the correction in the first and second pattern data correction steps is an optical proximity effect correction.