JP2000148442A - Distribution medium and data processing device and method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain the fast conversion of data with no error by means of an LUT of small capacity by preparing a conversion table in which the difference values are arranged in a where the bits of the same digit are put together in a binary display mode. SOLUTION: An extraction part 13 extracts the representative conversion result data which are set in an entry from the 1st or the 2nd difference bit string that is arranged in the entry received from an entry reading part 12. A bit detection part 14 detects the number of '1' of the 1st or the 2nd partial bit string received from the part 13. A count table storage part 15 stores a count table storing the corresponding relation to the number of '1' when they are shown in binary number. An arithmetic part 16 calculates the conversion result data corresponding to the input of the data converted, based on the number of '1' of the 1st and 2nd partial bit strings received from the part 14 and the representative conversion result data received from the part 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a providing medium, a data processing apparatus and a data processing method, and more particularly, to a providing medium, a data processing apparatus and a data processing method that enable high-speed data conversion. About.

[0002]

2. Description of the Related Art Conventionally, as a method of performing data conversion at high speed, a look-up table (hereinafter referred to as an LUT
(Referred to as “Look Up Table”).

[0003] Data conversion using an LUT is widely used, for example, for conversion of image brightness, contrast, hue, and the like. In this case, the pixel value of the original image is input as an index (address) to the LUT. Then, the stored value corresponding to the index is output as a pixel value after conversion.

The time required for data conversion by such an LUT is only the access time to the memory in which the LUT is stored, so that data conversion can be performed at high speed.

However, since a large amount of data is generally registered in the LUT, a large-capacity memory is required as a memory for storing the data. For example, if the data width of the data to be converted and the data width of the conversion result data after the conversion of the data to be converted are all 16 bits, the data conversion for such data is performed. The capacity of the LUT used is 2 ¹⁶ × 16
= 2 ²⁰ bits, or 128 kilobytes.

[0006] Therefore, the conventional L
Various methods for performing data conversion using a UT are known. As a first method, for example, there is a method in which an LUT and interpolation calculation are combined.

That is, in the first method, when (the data width of) the data to be converted is N bits, the range of the data to be converted in which the upper NK bits are constant is defined as a section of 1 and the LUT (N and K are natural numbers, N> K). Then, in each entry, conversion result data (hereinafter, referred to as representative conversion result data as appropriate) corresponding to the representative value of the data to be converted in the corresponding section is stored. As the representative value of a certain section, for example, a value in which the upper NK bits are represented by the upper NK bits of the N-bit conversion data belonging to the section and the lower K bits are represented by 0 is used. Can be Here, K is hereinafter referred to as an offset as appropriate.

In this case, at the time of data conversion, the conversion result data corresponding to the representative value of the section of the data to be converted, that is, the representative conversion result data, is used by using the upper NK bits of the input data to be converted. , LUT.
Then, based on the lower K bits of the data to be converted, the LUT
By performing the interpolation calculation using the representative conversion result data read from the conversion result data, the conversion result data corresponding to the data to be converted is obtained.

As the interpolation method used in the first method, linear interpolation is generally used. In the linear interpolation, an error occurs in the true conversion result data corresponding to the data to be converted. In order to reduce the error, there is a method of performing second-order or higher interpolation. However, calculation for such interpolation requires time, and the high-speed operation, which is an advantage of using an LUT, is impaired. Will be.

A second method of data conversion using an LUT with a reduced data amount is a two-stage LUT in order to obtain highly accurate conversion result data only in a part of the data to be converted. Some use. Further, as a third method, special hardware is used, and a part of the data to be converted given as an address includes an LUT.
In some cases, the decoder of the memory in which is stored is reduced to reduce the number of required memory elements. Here, the second method is described in, for example, JP-A-10-78861, and the third method is described in, for example, JP-A-8-501.
No. 648 describes the details of each.

However, it is difficult to obtain highly accurate conversion result data for the entire range of the data to be converted by any of the second and third methods.

As a fourth method, for example, Japanese Patent Application Laid-Open No. 9-231051 discloses that data to be converted is divided into sections of a certain continuous value, There is disclosed one that converts data to be converted having continuous values into the same conversion result data. However, the fourth method is, for example,
It is not suitable for obtaining different conversion result data for adjacent converted data.

Therefore, as a fifth method similar to the first method in which the LUT and the interpolation calculation are combined, 1
Is associated with one section, and each entry corresponds to the conversion result data (representative conversion result data) corresponding to the representative value of the converted data in the corresponding section, and the converted data belonging to that section. The conversion result data is stored with the difference value between adjacent ones of the conversion result data, and the necessary conversion value is added to the representative conversion result data, and the input converted data is converted into the corresponding conversion result data. There is something to do.

According to the fifth method, when the function expressing the conversion result data corresponding to the data to be converted is relatively gentle, the difference between the adjacent conversion result data is reduced to a relatively small value. Therefore, the difference value can be expressed by a small number of bits, and as a result, the LUT
Capacity can be reduced.

That is, FIG. 10 shows a configuration example of an entry of an LUT used in the fifth method.

For example, the data to be converted and the conversion result data are both represented by 16 bits (2 bytes), and 8 (= 2 ³ ) consecutive pieces of data to be converted are defined as one section in one entry. It shall correspond. That is, it is assumed that N or K is 16 or 3, respectively.

In this case, the representative value of the section is a number divisible by 8 (a multiple of 8), but such a number (a number that can be expressed by 16 bits) is, for example, 16000. Consider a section in which is a representative value. As described above, since the upper NK bits, that is, the converted data in which the upper 13 bits (= 16-3 bits) are constant, belong to this section, 16000, 1600
1,16002,16003,16004,1600
Eight data to be converted, 5,16006, 16007 belong.

Now, the eight converted data 1
For example, as shown in FIG. 10A, conversion result data corresponding to 6000 to 16007 can be represented by 16 bits 23451, 23454, 23456, and 23456, respectively.
23458, 23459, 23460, 23460, 2
Assume that it is 3461.

In this case, when the difference values between adjacent conversion result data are arranged in the corresponding order of the data to be converted in the section, as shown in FIG.
1,1,0,1 so the difference value here is
Each can be represented by 2 bits.

The converted data 160
As shown in FIG. 10C, the entry (table entry) corresponding to the section from 00 to 16007 includes the representative conversion result data 23451 and the difference values
2, 1, 1, 0, and 1 are arranged, and such entries are also configured for other sections, so that the LUT used in the fifth method is configured.

Here, in FIG. 10C, the entry is
It is composed of 32 bits (4 bytes), and the representative conversion result data 23451 is arranged in the lower 16 bits, followed by the difference value 3, 2, 2, 1, in the upper bit direction.
1, 0, 1 are arranged in such an order, that is, in a corresponding order of the data to be converted in the section. Here, the upper two bits of the entry are empty areas.

As shown in FIG. 10A, when eight conversion result data are stored as they are, a capacity of 16 bytes (= 2 bytes (16 bits) × 8) is required. On the other hand, when the entry is configured as shown in FIG. 10C, the capacity is only 4 bytes as described above, and therefore, the capacity required to store equivalent data is 1 byte. / 4 (= 4 bytes / 16 bytes).

An LU composed of the entries shown in FIG.
When data conversion is performed using T, the number of difference values corresponding to the amount of change in the input converted data with respect to the representative value of the section is added to the representative conversion result data. Conversion result data corresponding to the data to be converted is obtained.

That is, as shown in the flowchart of FIG. 11, first, in step S71, the input converted data vin is shifted right by 3 (= K) bits and substituted into the variable index. As a result, the variable index contains the upper 13 bits (= N-
K bits).

Assuming that the LUT composed of the entries described with reference to FIG. 10 is stored in the array variable LUT [], in step S72, LUT [i
ndex] is set. Here, it is assumed that the LUT [index] stores an entry corresponding to the section of the converted data in which the upper 13 bits are represented by the variable index. Therefore, a 32-bit entry as shown in FIG. 10C is set in the variable t.

Thereafter, the flow advances to step S73 to enter the entry
t and a 16-bit immediate value 65535 (= 1111111)
A logical product (AND) with 111111111B (B represents a binary number) is calculated, and the calculation result is stored in a variable basev
Is set to Thus, the lower 16 bits of the entry t, that is, the representative conversion result data, are stored in the variable basev.

Further, in step S74, the entry t is shifted rightward by 16 bits and set to the variable bitstr. As a result, the entry t is stored in the variable bitstr.
, That is, the sequence of the difference values is set.

In step S75, the logical product of the converted data vin and the 3-bit immediate value 7 (= 111B) is calculated, and the calculation result is set in a variable offset. As a result, the variable offset contains the converted data vin
Are set in the lower three bits.

Thereafter, in step S76, the variable v in which the conversion result data corresponding to the conversion target data vin is stored.
By setting the representative conversion result data basev in out, the initialization is performed, and the process proceeds to step S77 to determine whether the variable offset is equal to 0.

In step S77, the variable offset is set to 0
If it is determined that the difference value is not equal to, the process proceeds to step S78, where the difference value arrangement bitstr and the 2-bit immediate value 3 (= 11
AND with B), and the result of the operation is the variable delt
Set to a. As a result, in the variable delta, a difference value corresponding to the lower two bits of the sequence of the difference values set in the variable bitstr is set.

Then, the process proceeds to a step S79, wherein the variable vout
And the difference value delta are added and set to a variable vout. Further, in step S80, the variable bitstr is set to 2
It is shifted right by bits and set in the variable bitstr. As a result, the difference value (set in the variable delta) added in the previous step S79 is discarded, and the lower two bits of the variable bitstr include the difference value in the next row of the discarded difference value. Set.

Thereafter, in step S81, the variable of
fset is decremented by 1, and the process returns to step S77, and thereafter, the same processing is repeated.

Then, in a step S77, the variable of
When it is determined that fset is equal to 0, that is, for the variable vout in which the representative conversion result data is set, the difference value of the number of the input converted data corresponding to the change from the representative value of the section is obtained. Is added to the variable vout.
If the conversion result data corresponding to the input data to be converted has been set, the process ends.

According to the fifth method described above, for example, when 16004 is input as the data to be converted, the processing according to the flowchart of FIG. 11 is performed on the entry shown in FIG. 10C. Is performed, four difference values, which are the numbers corresponding to the changes of the converted data 16004 with respect to the representative value 16000, from the head of the difference value sequence 3, 2, 2, 1, 1, 0, 1 3,2,2,1
And the representative conversion result data 23451 are added, and as conversion result data, 23459 (= 23451 + 3 + 2)
+ 2 + 1) is obtained.

[0035]

As is clear from the flowchart of FIG. 11, in the case of the fifth method, the loop processing using the variable offset (steps S77 to S8)
1) and conditional branch processing (step S77) must be performed. Then, in the loop processing and the conditional branch processing,
It takes more time than logical operation processing, arithmetic operation processing, data loading and storage processing, and the like, which hinders speeding up data conversion.

In order to increase the processing speed, a processor using pipeline control is often used. However, loop processing and conditional branch processing may cause disturbance in the flow of pipeline processing in such a processor. This causes a decrease in the performance of the processor. As a result, speeding up of the processing is further hindered.

The present invention has been made in view of such a situation, and is intended to perform error-free data conversion at a high speed by using an LUT having a small capacity.

[0038]

According to a first aspect of the present invention, there is provided a providing medium, comprising: a second data corresponding to a representative value of a first data in a predetermined range; and a first data in a predetermined range. , An entry is formed from a difference value between adjacent ones of the second data corresponding to the second data, and the difference value is arranged in a state where bits of the same digit when the binary value is displayed are put together. A conversion table is provided.

According to a fourth aspect of the present invention, in the data processing apparatus, the second data corresponding to the representative value of the first data in the predetermined range and the second data corresponding to the first data in the predetermined range, respectively. Conversion table storage means for storing a conversion table for converting the first data into the second data, the entry being constituted by a difference value between adjacent data of the first data and the first data Is input, an entry in which the second data corresponding to the representative value of the first data is arranged is read from the conversion table, and a difference arranged in the entry read from the conversion table is read. Extracting means for extracting a partial bit string that is a bit string of a part corresponding to the input first data, detecting means for detecting the number of 1s in the partial bit string; 1 and the number in the column, based on the second data placed in the entry read from the conversion table, the corresponding to the first data input 2
And a calculating means for calculating the data.

According to a twelfth aspect of the present invention, in the data processing method, the second data corresponding to the representative value of the first data in the predetermined range is set.
To convert the first data into the second data, the entry of which is composed of the data of the first data and the difference value between adjacent ones of the second data corresponding to the first data in the predetermined range. From the conversion table of
Reading an entry in which the second data corresponding to the representative value of the data is arranged, and corresponding to the input first data among the difference values arranged in the entry read from the conversion table An extraction step of extracting a partial bit string which is a bit string of a part to be converted, a detection step of detecting the number of 1s in the partial bit string, a number of 1s in the partial bit string, and a second number assigned to the entry read from the conversion table. And a calculating step of calculating second data corresponding to the input first data based on the data of the above.

According to a thirteenth aspect of the present invention, there is provided the providing medium, wherein the second data corresponding to the representative value of the first data in the predetermined range and the second data corresponding to the first data in the predetermined range, respectively. The conversion table for converting the first data into the second data, in which the entry is composed of the difference value between the adjacent data, is the one corresponding to the representative value of the input first data. A reading step of reading an entry in which the data of No. 2 is arranged, and a partial bit string that is a bit string of a part corresponding to the input first data among the difference values arranged in the entry read from the conversion table. An extracting step for extracting, a detecting step for detecting the number of 1s in the partial bit string, a number of 1s in the partial bit string, and It was based on the second data, and providing a first computer program and a calculation step of calculating the second data corresponding to the data input.

[0042] The data processing apparatus according to claim 14, wherein the difference means finds a difference value between adjacent ones of the second data corresponding to the first data in the predetermined range,
Arranging means for arranging the difference value in a state where bits of the same digit when the difference value is represented in a binary form are grouped; second data corresponding to a representative value of first data in a predetermined range;
A configuration unit configured to configure an entry of the conversion table from the difference value.

In a data processing method according to a seventeenth aspect of the present invention, a difference step for finding a difference value between adjacent ones of second data corresponding to respective first data in a predetermined range, An arranging step of arranging the bits of the same digit in a binary display in a grouped state, a conversion from a second data corresponding to a representative value of the first data in a predetermined range, and a difference value And a configuration step of configuring an entry of the table.

According to the present invention, there is provided a providing medium, comprising: a difference step for obtaining a difference value between adjacent ones of second data corresponding to respective first data in a predetermined range; An arrangement step of arranging the bits of the same digit in hexadecimal notation, a second data corresponding to a representative value of the first data in a predetermined range, and a difference value, And a configuration step of configuring the above-mentioned entry.

[0045] In the provision medium according to the first aspect, the second data corresponding to the representative value of the first data in the predetermined range.
, And a difference value between adjacent ones of the second data corresponding to the first data in the predetermined range, respectively, and the difference value is the same when the binary value is displayed. Is provided to provide a conversion table in which bits of the digit are arranged.

In the data processing apparatus according to the fourth aspect, the conversion table storage means stores the second data corresponding to the representative value of the first data in the predetermined range and the first data in the predetermined range. It stores a conversion table for converting the first data into the second data, the entry being constituted by the difference value between adjacent ones of the second data corresponding to the respective data. When the first data is input, the reading means reads from the conversion table an entry in which the second data corresponding to the representative value of the first data is located, and the extracting means reads the entry from the conversion table. A partial bit string which is a bit string of a part corresponding to the input first data among the difference values arranged in the output entry is extracted. The detecting means detects the number of ones in the partial bit string, and the calculating means inputs the number based on the number of ones in the partial bit string and the second data arranged in the entry read from the conversion table. The second data corresponding to the first data is calculated.

In the data processing method according to the twelfth aspect, the second data corresponding to the representative value of the first data in the predetermined range and the second data corresponding to the first data in the predetermined range, respectively. The conversion table for converting the first data into the second data has an entry composed of a difference value between adjacent data of the second data, and corresponds to a representative value of the input first data. An entry in which the second data to be assigned is read out, and a partial bit string that is a bit string of a portion corresponding to the input first data among the difference values arranged in the entry read from the conversion table is extracted. Then, the number of 1s in the partial bit string is detected, and based on the number of 1s in the partial bit string and the second data arranged in the entry read from the conversion table, the input is performed. Second corresponding to the first data
Is calculated.

In the provision medium according to the thirteenth aspect,
An entry is formed from the second data corresponding to the representative value of the first data in the predetermined range and the difference value between adjacent data of the second data corresponding to each of the first data in the predetermined range. From the configured conversion table for converting the first data to the second data, an entry in which the second data corresponding to the representative value of the input first data is arranged is read, and the conversion table is read. Out of the difference values arranged in the entry read from the
, A partial bit string that is a bit string of a part corresponding to the data of the partial bit string is extracted, the number of 1s in the partial bit string is detected, and the number of 1s in the partial bit string and the second Based on the data, a computer program for causing a computer to perform a process of calculating second data corresponding to the input first data is provided.

In the data processing apparatus according to the present invention, the difference means obtains a difference value between adjacent pieces of second data corresponding to each of the first data in the predetermined range, The difference value is arranged in a state where bits of the same digit when the difference value is binary-displayed are put together. The configuration unit is configured to configure an entry of the conversion table from the second data corresponding to the representative value of the first data in the predetermined range and the difference value.

In the data processing method according to the seventeenth aspect, a difference value between adjacent data of the second data corresponding to each of the first data in the predetermined range is obtained, and the difference value is converted into a binary value. The bits of the same digit when displayed are arranged in a grouped state, and an entry in the conversion table is formed from the second data corresponding to the representative value of the first data in the predetermined range and the difference value. It has been made to be.

In the providing medium according to the eighteenth aspect,
A difference value between adjacent ones of the second data corresponding to each of the first data in the predetermined range is obtained, and the difference value is calculated by:
The bits of the same digit when it is displayed in a binary form are arranged in a state where they are put together, and the conversion table is converted from the second data corresponding to the representative value of the first data in the predetermined range and the difference value. Is provided so as to cause a computer to perform a process of configuring the above-mentioned entry.

[0052]

FIG. 1 shows a configuration example of an embodiment of a data processing apparatus to which the present invention is applied. The data processing device functions as both a data conversion device that performs data conversion using an LUT and a table generation device that generates the LUT.

That is, the ROM (Read Only Memory) 1
For example, it stores a program for IPL (Initial Program Loading). CPU (Centoral Proce
The ssing unit 2 reads and executes an OS (Operating System) program stored in the external storage device 7, for example, and under the control of the OS, also as an application program stored in the external storage device 7. By executing the table generation processing program and the conversion processing program, the table generation processing and the conversion processing described below are performed, whereby the data processing device is made to function as a table generation device and a data conversion device. I have. RAM (Random Access Memory) 3 is a CPU
2 for temporarily storing a program to be executed and data necessary for processing by the CPU 2.

The input device 4 includes, for example, a keyboard and a mouse, and is operated to input necessary commands and data to the CPU 2. The output device 5 is composed of, for example, a CRT (Cathode Ray Tube) or a liquid crystal display, and displays necessary information under the control of the CPU 2. External I / F (Inte
rface) 6 is, for example, a modem or TA (Terminal Adap).
ter) and a network adapter to control communication with the outside.

The external storage device 7 is, for example, an HD (Hard D)
isk), a CD (Compact Disc), or the like, and stores the OS program, the table generation processing program, the conversion processing program, and the LUT generated by the table generation processing program as described above. Source data (a set of conversion result data) used for
It stores a count table, which will be described later, used in the conversion processing program, and data to be converted, which is a target of data conversion by the conversion processing program. The external storage device 7 also stores an LUT generated by a table generation processing program, conversion result data obtained by converting data to be converted by a conversion processing program, and the like.

The blocks constituting the above data processing device are connected to each other via a bus.

In the data processing device configured as described above, when the power of the device is turned on, the CPU 2
The IPL program stored in the ROM 1 is executed,
Thus, the OS program stored in the external storage device 7 is read, expanded on the RAM 3 and executed. Then, for example, in response to the operation of the input device 4, the CP
U2 reads the table generation processing program and the conversion processing program stored in the external storage device 7 under the control of the OS, develops and executes them on the RAM 3, and thereby performs the table generation processing and the conversion processing.

That is, in the table generation processing, the original data stored in the external storage device 7 is read out and stored in the RAM 3. Then, various calculations and the like are performed using the original data stored in the RAM 3 to generate an LUT as described later. This LUT is RAM
3 or is supplied to and stored in the external storage device 7 (for example, when the conversion process is performed immediately after the table generation process, the LUT is stored in the RAM 3 and If not, the external storage device 7
Is stored in the memory). The LUT is an external I
By transmitting the data via the Internet or another transmission medium (not shown) using / F6, the data can be provided to another device or the like.

In the conversion process, when the LUT obtained by the table generation process is stored in the external storage device 7, the LUT is read from the external storage device 7 and supplied to the RAM 3. It is memorized. Further, the count table and the converted data stored in the external storage device 7 are read, supplied to the RAM 3, and stored. Then, using the count table and the LUT,
The data to be converted is converted into conversion result data by performing various operations and the like. This conversion result data is
For example, the data is transferred from the RAM 3 to the external storage device 7 and stored therein, or supplied to the external I / F 6 and transmitted to, for example, the Internet or another transmission medium to be provided to another device or the like.

Next, FIG. 2 shows a configuration example of an LUT generated by performing a table generation process.

LU generated by table generation processing
T indicates that one entry corresponds to one section, each entry has conversion result data (representative conversion result data) corresponding to a representative value of the converted data in the corresponding section, and the conversion target data belonging to the section. The difference between each of the conversion result data corresponding to each data and each difference between adjacent ones is common to the LUT used in the above-described fifth method. However, each difference is represented by a binary number. The LUT used in the fifth method in which the difference values themselves are simply arranged in that the bits of the same digit at the time are arranged in a state where
Is different.

That is, as shown in FIG. 2, each entry of the LUT generated by the table generation processing includes a representative conversion result data storage unit, a first difference bit string storage unit, and a The two-difference bit string storage unit is configured by being sequentially arranged.

Here, for example, as in the case of FIG.
It is assumed that the number of bits of the conversion result data is also 16 bits and the offset K is 3. Accordingly, eight (= 2 ³ ) consecutive data to be converted are regarded as one section,
Shall correspond to the entry of Further, each difference value between adjacent conversion result data corresponding to each piece of converted data belonging to a certain section can be represented by, for example, 2 bits.

Therefore, in this case, the section is 8192 (=
Since there are only 2 ^16-3 ), the LUT is composed of 8192 entries.

Each entry has a capacity of 32 bits (4 bytes) and, as described above, comprises a representative conversion result data storage, a first difference bit string storage, and a second difference bit string storage. The representative conversion result data storage section has a capacity of 16 bits (2 bytes), in which 16-bit conversion result data corresponding to the converted data, which is a representative value of the section corresponding to the entry, That is,
Representative conversion result data is stored. Each of the first difference bit string storage section and the second difference bit string storage section has a capacity of 8 bits, and stores a first difference bit string or a second difference bit string of 8 bits, respectively.

That is, as described above, each difference value between adjacent conversion result data corresponding to each piece of converted data belonging to a certain section is expressed by two bits as described above. A bit sequence in which the least significant bits (hereinafter, appropriately referred to as a first bit) of each difference value is a first difference bit sequence, and a second bit from the least significant bit (hereinafter, appropriately, referred to as a second bit). Is a second difference bit string, and such a first difference bit string or a second difference bit string is stored in the first difference bit string storage unit or the second difference bit string storage unit, respectively.

Here, the number of conversion result data corresponding to each piece of converted data belonging to a certain section is eight.
Since (= 2 ³ ), there are only 7 (8-1) difference values between adjacent ones. Therefore,
The first difference bit string and the second difference bit string are originally
Each of them is 7 bits, but here, 1 bit is added in consideration of convenience in performing an operation or the like, and each of the first differential bit sequence and the second differential bit sequence is 8 bits (1 byte). It is data.

For example, as shown in FIG. 3A similar to FIG. 10A described above, for a section having eight continuous values 16000 to 16007 as converted data, the converted data Conversion result data corresponding to 16007 is 23451 and 2313, respectively.
454,23456,23458,23459,234
2 LU in the case of 60, 23460, 23461
The structure of the entry of T is as follows.

That is, in this case, as shown in FIG. 3B similar to FIG. 10B, the difference value between adjacent conversion result data is 3 in the order corresponding to the data to be converted in the section. , 2,2,1,1,0,1. When the sequence of the difference values is expressed by a binary number, as shown in FIG.
11B, 10B, 10B, 01B, 01B, 00B, 0
1B.

Accordingly, the first difference bit string is 1001101B, which is a bit string in which the first bit (least significant bit) of the difference value represented by the binary number is represented, and the second difference bit string is the difference represented by the binary number. This is 110000B, which is a bit string in which the second bit of the value (the second bit from the least significant bit) is put together.

As a result, the converted data 16000 to 16000 to 1
As shown in FIG. 3D, the entry (table entry) corresponding to the section 6007 stores the representative conversion result in the representative conversion result data storage, the first difference bit string storage, and the second difference bit string storage, respectively. Data 23451,
The first difference bit string 1001101B and the second difference bit string 110000B are stored. Here, each bit of the first differential bit string 1001101B is arranged in the order of the converted data of the section in the direction from the lower bit to the upper bit of the first differential bit string storage unit (1, 0, 0, 1, 1, 1). 0, 1). The same applies to the second difference bit string 110000B. Therefore, when the leftmost or rightmost bit of the entry in FIG. 3D is taken as the most significant bit or the least significant bit, and based on this, the first differential bit string or the second differential bit string is 1011001B in which the above bit arrangement is rearranged in reverse order, or 0
000111B.

The LUT of FIG. 2 is, as described above,
Since there are only 8,192 4-byte entries, the capacity is 32 kilobytes (= 4 bytes × 8192).

Next, FIG. 4 shows an example of a functional configuration of the data processing device of FIG. 1 when the LUT of FIG. 2 functions as a data conversion device for performing a conversion process for converting data. . It should be noted that the configuration of FIG.
, Is realized by executing a conversion processing program.

The LUT storage unit 11 (conversion table storage means) stores the LUT described with reference to FIGS.

Data to be converted is input to the entry reading unit 12, and the entry reading unit 12 (reading means) converts the conversion result data (corresponding to the representative value of the input data to be converted). The entry (table entry) in which the representative conversion result data is located,
The LUT is read from the LUT stored in the LUT storage unit 11. The entry read by the entry reading unit 12 is supplied to the extraction unit 13 together with the input converted data.

The extracting unit 13 (extracting means) extracts a bit string corresponding to the data to be converted from the entry reading unit 12 from the first differential bit sequence or the second differential bit sequence arranged in the entry from the entry reading unit 12. The first partial bit sequence or the second partial bit sequence is extracted and supplied to the bit detection unit 14. Further, the extraction unit 13 includes the entry reading unit 1
The representative conversion result data arranged in the entry from No. 2 is extracted and supplied to the calculation unit 16.

The bit detection section 14 (detection means) refers to the count table storage section 15 for the number of 1s (the number of bits) in each of the first partial bit string or the second partial bit string from the extraction section 13. And supplies it to the arithmetic unit 16. The count table storage unit 15 (number table storage unit) stores the correspondence between the numerical value represented by the number of bits of the first partial bit sequence (second partial bit sequence) and the number of 1 when the numerical value is represented by a binary number. Is stored in the count table.

The calculating section 16 (calculating means) receives the number of 1s in each of the first partial bit string or the second partial bit string from the bit detecting section 14 and the representative conversion result data from the extracting section 13, The conversion result data corresponding to the conversion data is calculated and output.

Next, FIG. 5 shows an example of the configuration of the count table stored in the count table storage unit 15 of FIG.

In the present embodiment, the first difference bit string (the same applies to the second difference bit string) has its original value represented by 7 bits as described above. The first partial bit string extracted from the bit string has a maximum of 7 bits, and therefore, the count table has a numerical value 0 to 1 that can be represented by 7 bits.
When 27 (= 2 ⁷ -1) is given as an index (address), the table is configured to obtain the number of 1s in a 7-bit bit string in which the numerical value is represented by a binary number. That is, in the count table of FIG. 5, when, for example, 7 is given as an index, 3 which is the number of 1 in the bit string 0000111B in which 7 is represented by a binary number is obtained.

It should be noted that the maximum number of 1s in a 7-bit bit string is 7, and therefore, the number of entries in the count table should be 3 bits that can represent 7; Considering the nature, for example, 1
It is composed of bytes (8 bits). Therefore, the capacity of the count table in FIG. 5 is 128 bytes (= 1 byte × 2 ⁷ ).

Next, referring to the flowchart of FIG.
The count table creation processing for creating the count table of FIG. 5 will be described.

In the count table creation process, first, in step S1, a variable i representing a numerical value that can be represented by 7 bits is initialized to 0, and the process proceeds to step S2.
The variable b representing the number of bits is initialized to 0, and step S3
Proceed to. In step S3, a variable c for counting the number 1 of the numerical value represented by 7 bits is initialized to 0, and the process proceeds to step S4, where the variable i is substituted for the variable t.

Then, the process proceeds to a step S5, wherein a variable t,
The logical product of 1-bit immediate value 1 is calculated and whether the result of the calculation is equal to 1 or not, that is, the first bit of the variable t is 1
Is determined. In step S5,
When it is determined that the first bit of the variable t is equal to 1, the process proceeds to step S6, the variable c is incremented by 1, and the process proceeds to step S7.

If it is determined in step S5 that the first bit of the variable t is not equal to 1, that is, if the first bit of the variable t is 0, step S6 is skipped and step S7 is executed. The variable t is divided by 2, that is, the variable t is shifted right by one bit, and
Proceed to 8.

In step S8, the variable b is incremented by one, and the flow advances to step S9 to determine whether the variable b is smaller than 7. If it is determined in step S9 that the variable b is smaller than 7, the process returns to step S5, and thereafter, the processes in steps S5 to S9 are repeated until it is determined in step S9 that the variable b is not smaller than 7.

In step S9, the variable b is set to 7
When it is determined that it is not smaller, that is, when the variable b becomes 7, the process proceeds to step S10, and the variable c is set in the variable CTBL [i] representing the entry corresponding to the index i (address) in the count table. Set, step S1
Proceed to 1. In step S11, the variable i is incremented by 1, and the process proceeds to step S12, where the variable i is set to 128.
(= 2 ⁷ ) is determined.

In step S12, the variable i is 128
If it is determined that the variable i is smaller than 128, the process returns to step S2, and thereafter, the processing of steps S2 to S12 is repeated until it is determined in step S12 that the variable i is not smaller than 128. On the other hand, in step S12, the variable i is 1
If it is determined that the value is not smaller than 28, that is, if the variable i is equal to 128 and each of the numerical values 0 to 127 is represented by a binary number and set to the array variable CTBL [], To end.

The above count table creation processing needs to be performed before performing the conversion processing described below. However, the count table creation process needs to be performed only once. Further, the count table creation processing can be performed by the data processing device of FIG. 1 or can be performed by another device.

Next, referring to the flowchart of FIG.
The conversion process performed by the data processing device as the data conversion device in FIG. 4 will be described.

The variable vin into which the data to be converted is substituted is input to the entry reading unit 12. Then, in step S21, the entry reading unit 12 shifts the converted data vin to the right by 3 (= K) bits, and
Substitute for ndex. Thus, the variable index contains the upper 13 bits (= N−K bits) of the input data to be converted.
Is stored.

Now, the array variable LUT [index] contains L
The entry of the LUT stored in the UT storage unit 11 (FIG. 3)
In (D)), if the one corresponding to the section of the converted data in which the upper 13 bits are represented by index is stored, in step S22 the entry reading unit 12
Reads the entry LUT [index] from the LUT stored in the LUT storage unit 11 and sets it in a variable t. The variable t is supplied from the entry reading unit 12 to the extracting unit 13 together with the data to be converted vin.

In step S23, the extraction unit 13 sets the entry t and the 16-bit immediate value 65535 (= 1
The logical product of the logical product of the data and 111111111111111B) is calculated, and the calculation result is set in a variable basev. Thus, the lower 16 bits of the entry t, that is, the representative conversion result data, are stored in the variable basev. The representative conversion result data basev is supplied from the extraction unit 13 to the calculation unit 16.

Further, in the extraction unit 13, step S24
In, the entry t is shifted right by 16 bits and set to the variable b1. As a result, the 17th to 24th bits of the entry t (the least significant bit is the first bit as described above), that is, the first difference bit string is set in the lower 8 bits of the variable b1. Then, the process proceeds to step S25, where the extraction unit 13 determines that the entry t
Is shifted right by 24 bits and set to a variable b2.
As a result, the 25th to 32nd bits of the entry t, that is, the second difference bit string is set in the lower 8 bits of the variable b2.

In step S26, the extraction unit 13 converts the data to be converted vin and the 3-bit immediate value 7 (= 11
1B) and the result of the operation is the variable of
Set to fset. Thus, the lower three bits of the converted data vin are set in the variable offset.

After that, in step S27, the extraction unit 13 shifts 1B to the left by the number of bits corresponding to the variable offset, and substitutes it for a variable mask that holds a mask value.
Further, the extraction unit 13 subtracts 1 from the variable mask to obtain the lower 3 bits (= offset) of the converted data vin.
Generates a mask value in which one of the number of bits corresponding to the value of is continuous, and sets it in a variable mask.

Further, the extracting unit 13 outputs the first differential bit string
b1 or the second difference bit string b2 and a mask value mask
The first partial bit sequence or the second partial bit sequence is extracted by calculating the logical product of That is, the extraction unit 13 determines in step S28 that the first difference bit string
The logical product of b1 and the mask value mask is calculated, and the calculation result is set in a variable b1. In step S29, the extraction unit 13 sets the second difference bit string b2 and the mask value mask
And the result of the operation is set in a variable b2. As a result, the first partial bit string or the second partial bit string is set in the variable b1 or b2.
The first partial bit string b1 and the second partial bit string b2 are
The data is supplied from the extraction unit 13 to the bit detection unit 14.

And now, the count table storage unit 1
The entry (FIG. 5) corresponding to the index (address) b of the count table stored in No. 5 is an array variable CTBL.
Assuming that the bit string is represented by [b], the bit detection unit 14 gives the first partial bit string b1 from the extraction unit 13 as an index to the count table storage unit 15 in step S30, and stores the entry CTBL [b1]. By reading, the number of 1s in the first partial bit string b1 is detected. This number is set in the variable c1 and supplied from the bit detection unit 14 to the calculation unit 16. Further, in step S31, the bit detecting unit 14 gives the second partial bit string b2 from the extracting unit 13 as an index to the count table storage unit 15 and reads out the entry CTBL [b2], thereby obtaining the second partial bit string. The number of 1s in b2 is detected.
This number is set in a variable c2 and supplied from the bit detection unit 14 to the calculation unit 16.

The operation unit 16 determines in step S32
By shifting the number c2 of 1s in the second partial bit string to the left by one bit, the value is doubled and set to the variable c2. That is, the number of 1s in the second partial bit string is determined by zero or more 2 bits added to the representative conversion result data when obtaining the conversion result data for a certain converted data in the fifth method. Represents the number of ¹ 's in the 2 ¹ digit (the second bit) of the represented difference value,
Therefore, by multiplying the number by 2 ¹ , 0 or more 2
2 ¹ digit of the difference value represented by bits, so to speak restored.

The number of 1s in the first partial bit string is equal to 0 or more that is added to the representative conversion result data when obtaining the conversion result data for a certain data to be converted in the fifth method. of the difference values represented by 2 bits, and represents a number of 1 to 2 ⁰ the digit (the first bit).
Therefore, by multiplying the number 2 ^0, zero or more 2
The 2 ⁰ digits of the difference value represented by bits are restored, but 2 ⁰
Is 1, so the number of 1s in the first partial bit sequence is
It can be used as it is.

Thereafter, in step S33, the arithmetic unit 16 sets the representative conversion result data basev,
The variables c1 and c2 are added, whereby the conversion result data corresponding to the data to be converted vin is obtained. This conversion result data is set in the variable vout and output, and the process ends.

According to the above conversion processing, when 16004 is input as the data to be converted, for example, the conversion result data is obtained as follows. However, between the data to be converted and the conversion result data, FIG.
Assume that there is a correspondence relationship as shown in FIG.

That is, the representative value of the section of the converted data 16004 is 16000, and the conversion result data (representative conversion result data) corresponding to the representative value 16000 is 23451.
(Since it is FIG. 3A, when 16004 is input as the data to be converted to the entry reading unit 12, the entry reading unit 12 reads from the LUT storage unit 11 as shown in FIG. Read entry and extractor 1
3 (steps S21, S22).

The extraction unit 13 extracts the representative conversion result data 23451 from the entry of FIG.
6 (step S23). Further, the extraction unit 13
Is the first difference bit string 10 from the entry of FIG.
11001B and a second differential bit string 0000111B are extracted (steps S24 and S25), and the number of bits represented by the lower three bits of the data to be converted 16004, that is, 4 bits, is extracted from the first partial bit string. And a second partial bit string (steps S26 to S29). Therefore, here, 1001B is extracted as the first partial bit string, and 0111B is extracted as the second partial bit string. This first partial bit sequence 100
1B and the second partial bit string 0111B are supplied to the bit detection unit 14.

The bit detecting section 14 refers to the count table, and outputs the first partial bit string 1 from the extracting section 13.
The number 2 or 3 of each 1 is detected from 001B or the second partial bit string 0111B, and supplied to the arithmetic unit 16 (steps S30 and S31).

[0106] calculation unit 16, the first number 3 in the second partial bit string 0111B from the bit detector 14, 2 ¹
Is multiplied by 2 which is the weight of the digit of (2) to 6 (= 3 × 2) (step S32). Then, the calculation unit 16 calculates
The number 2 of 1s in the first partial bit string 1001B from the bit detection unit 14 and the representative conversion result data 23451 from the extraction unit 13 are added (step S33), whereby the conversion result data corresponding to the data to be converted 16004 is obtained. 23459 is required.

According to the fifth method, when 16004 is input as the data to be converted, the representative conversion result data 23451 and the difference values 3, 2, 2, 1, that is, 1
By adding 1B, 10B, 10B and 01B,
Conversion result data 23459 is obtained. On the other hand, when data conversion is performed by the conversion processing of FIG. 7 using the LUT described in FIGS. 2 and 3, the addition 11B + 10B + 10B + 01B of the difference values 11B, 10B, 10B, and 01B in the fifth method is performed. Is performed for each digit, and the addition result is added to the representative conversion result data 23.
By adding 451, the conversion result data 23449
Is required.

That is, the difference values 11B, 10B, 10B, 0
An adder 1B + 0B + 0B + 1B = 2 digit of 2 ⁰ of 1B,
Part and 2 ^units digit of the addition 1B + 1B + 1B + 0B = 3 is performed, the 2 is ^one digit of the addition result 3, its is the weight of the digit 2 ¹ are multiplied, considering it is a 2 ¹ digit 6 which is the addition result is obtained. Then, a 2 is the sum of the digits of ⁰ 2, by a 6 is an addition result of considering that the 2 ¹ digit is added, finally, the difference value 11B, 10B, 10B, 01B 8 which is the addition result of
Is calculated, and this is added to the representative conversion result data 23451 to obtain the conversion result data 23459.

As a result, as shown in the flowchart of FIG. 7, data conversion can be performed without performing loop processing or conditional branch processing. Furthermore, the LU to be used
Since the capacity of T is 32 kilobytes as described above, as shown in FIG. 3A, it is simply 1/4 of the LUT in which conversion result data is arranged (128 kilobytes as described above). Of capacity. Therefore, error-free data conversion can be performed at high speed by using an LUT having a small capacity.

Here, the capacity of the count table used in the present embodiment is 128 bytes as described above, and the processor (CPU or DSP (Digital Signal Pro
cessor), etc.), which is smaller than the capacity of the cache memory generally provided in the memory. Therefore, the count table can be made resident in the cache memory. In this case, the time for reading data from the count table can be reduced, and the time for the entire process can also be reduced.

Further, in this embodiment, since the LUT entry is 4 bytes, it can be handled as one word (word) in a general-purpose processor.

Each processing step in the flowchart shown in FIG. 7 corresponds to a machine language instruction almost one-to-one. Each processing step can be realized by a machine language instruction generally provided in a processor, such as a load instruction, a store instruction, an addition instruction, a shift instruction, an AND instruction, and the like.

The area for storing the variables used in the description of the flowchart of FIG. 7 can be secured on the RAM 3, but a register (not shown) of the CPU 2 can also be allocated.

Next, FIG. 8 shows an example of a functional configuration of the data processing device of FIG. 1 when functioning as a table generating device for performing the table generating process for generating the LUT described with reference to FIGS. I have. Note that the configuration of FIG. 8 is realized by executing a table generation processing program in the CPU 2 of FIG.

The difference calculation circuit 21 receives, for example, a sequence of conversion result data as shown in FIG. 3A as original data for generating an LUT. Then, the difference calculation circuit 21 (difference means) obtains a difference value between adjacent ones of the input conversion result data for each section, and stores the resulting difference value array of each section in the storage unit. 23. Further, the difference calculation circuit 21 selects conversion result data to be representative conversion result data corresponding to the representative value of each section, and supplies the selected conversion result data to the storage unit 22.
Here, since the first conversion result data of each section is the representative conversion result data, the difference calculation circuit 21 selects the first conversion result data of each section as the representative conversion result data, and To be supplied.

The storage unit 22 temporarily stores the representative conversion result data from the difference calculation circuit 21 and supplies the representative conversion result data to the entry configuration unit 25. The storage unit 23 temporarily stores the arrangement of the difference values from the difference operation circuit 21 and supplies the arrangement to the difference bit string generation unit 24.

The difference bit string generator 24 (arrangement means)
The arrangement of the difference values from the storage unit 23 is arranged in such a manner that the bits of the same digit when the difference values are displayed in a binary form are arranged and supplied to the entry configuration unit 25. That is,
For example, the sequence of the conversion result data shown in FIG.
When one section is input to the difference calculation circuit 21, the sequence of the difference values 3, 2, 2, 1, 1, 0, 1 shown in FIG. The data is supplied to the difference bit string generation unit 24 via the storage unit 23. When the difference values 3,2,2,1,1,0,1 are displayed in binary, 11
B, 10B, 10B, 01B, 01B, 00B, 01B
Although, in this case, the difference bit string generation unit 24 first bits 1,0,0,1,1,0,1 the 2 ⁰ digit
Are extracted, and these are put together in reverse order, and the binary number 10110
01B. Further, the difference bit string generation unit 24
Extract bits 1,1,1,0,0,0,0 of ¹ digit,
These are grouped in reverse order to form a binary number 0000111B. Then, the difference bit string generation unit 24 supplies these binary numbers to the entry configuration unit 25.

The entry configuration unit 25 (configuration means) arranges the binary conversion bits from the difference bit string generation unit 24 and the representative conversion data from the storage unit 22 to arrange them as shown in FIG.
An entry as shown in (D) is configured and supplied to the LUT storage unit 26. That is, the entry component 25, for example, as described above, the bit string from the difference bit string generation unit 24, the 2 ⁰ digits 10110
Bit streams of 01B or ¹ digit 000011
When 1B is received, the first difference bit string or the second difference bit string is set as the first difference bit string, the second difference bit string is placed at the top, the first difference bit string is arranged after that, and the representative conversion result from the storage unit 22 is further followed. The data (in this embodiment, 23451 is supplied as representative conversion result data from the storage unit 22 to the entry configuration unit 25) is arranged to configure the entry shown in FIG. 3D.

The LUT storage unit 26 has an entry configuration unit 25
Are sequentially stored.

Next, referring to the flowchart of FIG.
A table generation process performed by the data processing device as the table generation device in FIG. 8 will be described. Here,
It is assumed that the conversion result data as the original data is input (read) in an order corresponding to the order in which the converted data is arranged in ascending order. Further, one section is composed of, for example, eight pieces of data to be converted (accordingly, K = 3), and a difference between adjacent conversion result data in each section is represented by, for example, two bits. I do. The data to be converted and the conversion result data are both represented by 16 bits.

First, in step S41, the difference calculation circuit 21 reads the original data to be processed, supplies it to the storage unit 22, stores it as representative conversion result data, and proceeds to step S42. In step S42, the difference calculation circuit 21 substitutes the representative conversion result data supplied to the storage unit 22 in step S41 for a variable t1, and proceeds to step S43. In step S43, a variable i for counting the number of difference values between adjacent conversion result data in the section is initialized to 0, and the process proceeds to step S44, where the difference calculation circuit 21 determines the original data to be processed next. Read and assign to variable t2.

Then, the difference calculation circuit 21 determines in step S
At 45, the difference value between the adjacent conversion result data is calculated by subtracting t1 from the variable t2, and is set to S [i], which is an array variable, and the flow proceeds to step S46. In step S46, the difference value calculation circuit 21 sets the variable t1
Is assigned to the variable t2, the process proceeds to step S47, and the variable i
Is determined to be equal to the number of difference values between the conversion result data constituting the section, that is, 6 which is a value obtained by subtracting 1 from 7 in this case. In step S47,
If it is determined that the variable i is not equal to 6, step S
Proceeding to 48, the variable i is incremented by one, proceeding to step S44, and thereafter the same processing is repeated.

When it is determined in step S47 that the variable i is equal to 6, that is, the variable i
If the sequence of all the difference values between the conversion result data adjacent to the section to be processed is set, the difference operation circuit 21 sets the sequence of the difference values S [] (S [0]
To S [6]) are supplied to the storage unit 23 and stored therein. Then, the process proceeds to step S49, a variable m for counting the number of bits of the difference value is initialized to 0, and the process proceeds to step S50.

In step S50, a variable B [m] for storing a difference bit string (in the arrangement of difference values, a set of bits of the same digit (the above-described first difference bit string and second difference bit string)) is stored. Initialized to 0, step S5
Proceeds to 1 and the variable i for counting the number of difference values is 0
Is initialized to

Then, the process proceeds to step S52, where the difference bit string generation unit 24 extracts the m-th bit of the difference value S [i] stored in the storage unit 23, and proceeds to step S53. It is added to the most significant bit of the bit string B [m], and the process proceeds to step S54. Step S5
In step 4, as in step S47, the variable i
Is determined to be equal to 6, which is a value obtained by subtracting 1 from the number of difference values between the conversion result data constituting the section. If it is determined in step S54 that the variable i is not equal to 6, the process proceeds to step S55, where the variable i is incremented by one. Then, step S52
And the same processing is repeated thereafter.

When it is determined in step S54 that the variable i is equal to 6, that is, when the difference bit string for the 2 ^m digit of the difference value is set in the variable B [m], the process proceeds to step S56. Proceeds to the difference bit string generation unit 24
Supplies the difference bit string B [m] to a memory (not shown) incorporated in the entry configuration unit 25 and stores the same.

Then, the process proceeds to a step S57, wherein the variable m
Is determined to be equal to the number of bits (M) expressing the difference value, that is, 1 which is a value obtained by subtracting 1 from 2 in this case. If it is determined in step S57 that the variable m is not equal to 1, the process proceeds to step S58, where the variable m
Is incremented by one. Then, step S5
After returning to 0, the same processing is repeated.

When it is determined in step S57 that the variable m is equal to 1, that is, the difference bit string is
If all the digits of the difference value have been obtained, step S
Proceeding to 59, the entry configuration unit 25 uses the difference bit string from the difference bit string generation unit 24 and the representative conversion result data stored in the storage unit 22 as described above to
An entry as shown in (D) is formed and supplied to the LUT storage unit 26 for storage. Then, the process proceeds to step S60, and it is determined whether or not processing has been performed on all the original data. If it is determined that the processing has not been performed on all the original data, the process returns to step S41.
The original data to be processed next is read, and the same processing is repeated thereafter.

If it is determined in step S60 that the processing has been performed for all the original data, the table generation processing ends.

By the above-described table generation processing, the LUT described with reference to FIGS. 2 and 3 is stored in the LUT storage unit 26, and the LUT is stored in the LUT storage unit 11 shown in FIG.

In this embodiment, the section corresponding to the entry is composed of eight pieces of data to be converted, but the number of pieces of data to be converted (offset K
Is not particularly limited as long as the number is smaller than the number of bits N of the data to be converted. Further, in the present embodiment, the number of bits expressing the difference value is set to 2 bits which is the number of bits for expressing the maximum value of the difference values between adjacent conversion result data in the section.
The number of bits is not particularly limited. However,
When the number of bits expressing the difference value is increased, the effect of reducing the size of the LUT decreases.

That is, the offset K and the number of bits representing the difference value can be basically set freely, but in general, the curve shape of the function represented by the LUT (change of the conversion result data) is used. It is desirable to set an appropriate value according to (method). Assuming that the number of bits representing the difference value is M, the arithmetic unit 16 in FIG. 4 extracts the bits from the difference bit string for the m-th bit (m = 1, 2,..., M) of the difference value. 2 in the number of 1s in the partial bit string
^After multiplying by ^m-1 , it is necessary to add to the representative conversion result data.

Further, in the present embodiment, the size of the entry is 4 bytes, which is a power of 2, but the size of the entry is not particularly limited. However, it is more convenient to set the size of the entry to a power of 2 from the viewpoint of calculating the subscript (index) of the array variable.

Furthermore, in the present embodiment, for simplicity of description, conversion result data in which the change is non-decreasing (increased or unchanged change result data) is used as an example in the section. (FIG. 3), the present invention can also be applied to conversion result data in which a change is non-increasing in a section, or conversion result data in which an increase or decrease is present. That is, for the conversion result data in which the change is not increasing, the difference value may be subtracted in the arithmetic unit 16, and for the conversion result data that increases or decreases, for example, the difference value is calculated. , Can be dealt with by using a signed complement expression.

Further, in the present embodiment, the bit detector 14 detects the number of 1 from the first and second partial bit strings using the count table. Can be performed without using a count table.

The count table creation processing described in FIG. 7 and the table creation processing described in FIG. 9 include loop processing and conditional branch processing, but the count table creation processing and table generation processing are performed in advance. Since the count table and the LUT need only be created, high processing speed is not required so much, and there is no particular problem even if loop processing or conditional branch processing is included.

Further, in the present embodiment, an application program for performing the conversion process and the table generation process is provided by being stored in the external storage device 7. However, such an application program may be, for example, an Internet program. It is also possible to provide by transmitting via another transmission medium.

Further, in the present embodiment, the conversion process and the table generation process are performed by causing the CPU 2 to execute the computer program. However, the conversion process and the table generation process are performed by dedicated hardware. It is also possible to do.

[0139]

According to the present invention, the second medium corresponding to the representative value of the first data in the predetermined range is provided.
, And a difference value between adjacent ones of the second data corresponding to the first data in the predetermined range, respectively, and the difference value is the same when the binary value is displayed. A conversion table is provided in which bits of the digits are arranged. Therefore, a conversion table having a small capacity can be provided, and further, by using the conversion table, data conversion without errors can be performed at high speed.

According to the data processing device of claim 4, the data processing method of claim 12, and the providing medium of claim 13, the representative value of the first data in the predetermined range is The first data is composed of the second data corresponding to the second data and a difference value between adjacent ones of the second data corresponding to the first data in the predetermined range. An entry in which the second data corresponding to the representative value of the input first data is read from the conversion table for converting
A partial bit string that is a bit string of a part corresponding to the input first data is extracted from the difference values arranged in the entry read from the conversion table. And
The number of 1s in the partial bit string is detected, and based on the number of 1s in the partial bit string and the second data arranged in the entry read from the conversion table,
Second data corresponding to the input first data is calculated. Therefore, it is possible to perform error-free data conversion at high speed.

[0141] The data processing apparatus according to claim 14, the data processing method according to claim 17, and the claim 18
According to the providing medium described in (1), a difference value between adjacent ones of the second data corresponding to each of the first data in the predetermined range is obtained, and the difference value is the same when the binary value is displayed in binary. Are arranged in a state in which the bits of the digit are collected. Further, an entry in the conversion table is configured from the second data corresponding to the representative value of the first data in the predetermined range and the difference value. Therefore, it is possible to obtain a conversion table which has a small capacity and enables high-speed error-free data conversion.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of an embodiment of a data processing device to which the present invention has been applied.

FIG. 2 is a diagram showing a configuration example of an LUT according to the present invention.

FIG. 3 is a diagram for explaining a configuration of an entry of the LUT of FIG. 2;

FIG. 4 is a block diagram showing a functional configuration example of the data processing device of FIG. 1 functioning as a data conversion device.

FIG. 5 is a diagram showing a count table.

FIG. 6 is a flowchart illustrating a count table creation process.

FIG. 7 is a flowchart illustrating a conversion process.

FIG. 8 is a block diagram illustrating a functional configuration example of the data processing device of FIG. 1 functioning as a table generation device.

FIG. 9 is a flowchart illustrating a table generation process.

FIG. 10 is a diagram for explaining a configuration of a conventional LUT.

FIG. 11 is a flowchart for explaining a conventional data conversion method.

[Explanation of symbols]

1 ROM, 2 CPU, 3 RAM, 4 input device, 5 output device, 6 external I / F, 7 external storage device, 11 LUT storage unit (conversion table storage unit), 12 entry read unit (read unit),
13 extraction section (extraction means), 14 bit detection section (detection means), 15 count table storage section (number table storage means), 16 calculation section (calculation means),
Reference Signs List 21 difference operation circuit (difference means), 22, 23 storage section, 24 difference bit string generation section (arrangement means), 25
Entry configuration unit (configuration means), 26 LUT storage unit

Claims (18)

[Claims] 1. A providing medium for providing a conversion table for converting a first data into a second data, wherein the second data corresponding to a representative value of a first data in a predetermined range is provided. And the difference value between adjacent ones of the second data corresponding to the first data in the predetermined range, respectively, and the difference value is represented by a binary number. A providing medium for providing the conversion table arranged in a state where bits of the same digit at the time are put together. 2. The entry, wherein upper NK bits are represented by upper NK bits of the N bits of the first data, and lower K bits are represented by:
The second data corresponding to the representative value represented by 0; and the first data in the predetermined range from the representative value to a value obtained by adding 2 ^K -1 to the representative value. 2 ^K -1 between adjacent ones of the second data
And 2 ^K −1 difference values are arranged in a state where bits of the same digit of a bit string representing each difference value are put together. Item 8. The providing medium according to Item 1. 3. The bit of the same digit of a bit string representing each of the 2 ^K −1 difference values is arranged in a corresponding order of the first data in the predetermined range. The providing medium according to claim 2, wherein 4. A data processing device for converting a first data into a second data, wherein the second data corresponding to a representative value of a first data in a predetermined range; For converting the first data into the second data, wherein the entry is constituted by a difference value between adjacent ones of the second data corresponding to the first data in the range of A conversion table storing means for storing a table, wherein, when the first data is input, the entry in which the second data corresponding to the representative value of the first data is arranged Reading means for reading from a table; and a partial bit string that is a bit string of a part corresponding to the input first data among the difference values arranged in the entry read from the conversion table. Extracting means for extracting; detecting means for detecting the number of 1s in the partial bit string; number of 1s in the partial bit string; and the second number arranged in the entry read from the conversion table.
And a calculating means for calculating the second data corresponding to the input first data based on the data. 5. A number table storing means for storing a number table in which the partial bit string is associated with the number of 1s in the partial bit string, wherein the detecting means uses the number table to store the number table. 5. The data processing apparatus according to claim 4, wherein the number of 1s in the partial bit string is detected. 6. The data processing apparatus according to claim 4, wherein the difference value is arranged in the entry in a state where bits of the same digit when the difference value is displayed in a binary form are put together. . 7. The entry, wherein upper NK bits are represented by upper NK bits of N bits of the first data, and lower K bits are represented by:
The second data corresponding to the representative value represented by 0; and the first data in the predetermined range from the representative value to a value obtained by adding 2 ^K -1 to the representative value. 2 ^K -1 between adjacent ones of the second data
And 2 ^K −1 difference values are arranged in a state where bits of the same digit of a bit string representing each difference value are put together. Item 7. A data processing device according to item 6. 8. The bit of the same digit of the bit string representing each of the 2 ^K −1 difference values is arranged in a corresponding order of the first data in the predetermined range. The data processing apparatus according to claim 7, wherein: 9. The read means, when the N-bit first data is input, sets the upper NK bits to:
The entry in which the second data corresponding to the representative value represented by the upper NK bits and the lower K bits of the N-bit first data and represented by 0 is located, The data processing device according to claim 7, wherein the data is read from the conversion table. 10. Each of the 2 ^K −1 difference values is M
When represented by bits, the 2 ^K −1 difference values are arranged as M bit strings in which bits of the same digit of a bit string representing each difference value are arranged, and the extraction unit includes: From each of the M bit strings as the difference value arranged in the entry read from the conversion table, the number of bits represented by the lower K bits of the input first data is calculated as the partial The data processing device according to claim 7, wherein the data is extracted as a bit string. 11. The method according to claim 1, wherein the extracting unit is configured to input the first
Extracting a partial bit string by generating a mask value having the number 1 represented by the lower K bits of the data, and calculating the logical product of the mask value and each of the M bit strings. The data processing device according to claim 10, wherein: 12. A data processing method for converting a first data into a second data, wherein the second data corresponding to a representative value of a first data in a predetermined range; For converting the first data into the second data, wherein the entry is constituted by a difference value between adjacent ones of the second data corresponding to the first data in the range of A reading step of reading, from the table, the entry in which the second data corresponding to the input representative value of the first data is arranged; and the difference value arranged in the entry read from the conversion table. Extracting a partial bit string that is a bit string of a part corresponding to the input first data, and detecting a number of 1s in the partial bit string. And the number of 1s in the partial bit string, and the second number assigned to the entry read from the conversion table.
And a calculating step of calculating the second data corresponding to the input first data based on the data of the above. 13. A providing medium for providing a computer program for causing a computer to perform a process of converting first data into second data, the medium being a representative of a predetermined range of first data. An entry is configured from the second data corresponding to the value and a difference value between adjacent ones of the second data corresponding to the first data in the predetermined range, respectively. A reading step of reading, from a conversion table for converting data into the second data, the entry in which the second data corresponding to the input representative value of the first data is arranged; Extracting a partial bit string that is a bit string of a part corresponding to the input first data among the difference values arranged in the entry read from Step a, the detection step of detecting a first number of partial bit string, the portion 1 of the number of the bit string, wherein arranged in the entry read from the conversion table the second
A computing step of computing the second data corresponding to the input first data based on the data of the above. 14. A data processing apparatus for generating a conversion table for converting first data into second data, wherein the second data corresponding to each of first data in a predetermined range is provided.
A difference means for calculating a difference value between adjacent data, and a layout means for arranging the difference value in a state where bits of the same digit when the difference value is binary-displayed are grouped; A data processing apparatus comprising: a configuration unit configured to configure an entry of the conversion table from the second data corresponding to a representative value of the first data and the difference value. 15. The representative means, wherein upper NK bits are represented by upper NK bits of the N bits of the first data, and lower K bits are represented by 0. And the second data corresponding to each of the first data in the predetermined range from the representative value to a value obtained by adding 2 ^K -1 to the representative value.
From the 2 ^K -1 pieces of difference values each other adjacent ones of the data, constituting said entry, said positioning means, said 2 ^K -1 pieces of difference values, the same order bit string representing each The data processing apparatus according to claim 14, wherein the bits are arranged in a group. 16. The arrangement means arranges the bits of the same digit of the bit string representing each of the 2 ^K −1 difference values in the corresponding order of the first data in the predetermined range. The data processing device according to claim 15, wherein: 17. A data processing method for generating a conversion table for converting first data into second data, wherein the second data corresponding to each of first data in a predetermined range is provided.
A difference step of obtaining a difference value between adjacent data of the data, an arrangement step of arranging the difference value in a state where bits of the same digit when the difference value is binary-displayed are grouped, A data processing method comprising: configuring an entry of the conversion table from the second data corresponding to a representative value of the first data and the difference value. 18. A providing medium for providing a computer program for causing a computer to perform a process of generating a conversion table for converting first data into second data, the medium comprising: The second data corresponding to each of the first data
A difference step of obtaining a difference value between adjacent data of the data, an arrangement step of arranging the difference value in a state where bits of the same digit when the difference value is binary-displayed are grouped, A computer-readable storage medium providing a computer program comprising: a configuration step of configuring an entry of the conversion table from the second data corresponding to a representative value of the first data and the difference value. .