IT1268123B1 - Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione. - Google Patents
Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione.Info
- Publication number
- IT1268123B1 IT1268123B1 IT94TO000818A ITTO940818A IT1268123B1 IT 1268123 B1 IT1268123 B1 IT 1268123B1 IT 94TO000818 A IT94TO000818 A IT 94TO000818A IT TO940818 A ITTO940818 A IT TO940818A IT 1268123 B1 IT1268123 B1 IT 1268123B1
- Authority
- IT
- Italy
- Prior art keywords
- slice
- procedure
- manufacture
- manufacturing
- semiconductor material
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 2
- 239000000463 material Substances 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT94TO000818A IT1268123B1 (it) | 1994-10-13 | 1994-10-13 | Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione. |
EP94830577A EP0707338A2 (en) | 1994-10-13 | 1994-12-15 | Wafer of semiconductor material for fabricating integrated semiconductor devices, and process for its fabrication |
US08/571,806 US5855693A (en) | 1994-10-13 | 1995-12-13 | Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication |
JP7327021A JP2680801B2 (ja) | 1994-10-13 | 1995-12-15 | 集積装置を製造するための半導体材料のウェハ、およびその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT94TO000818A IT1268123B1 (it) | 1994-10-13 | 1994-10-13 | Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione. |
Publications (3)
Publication Number | Publication Date |
---|---|
ITTO940818A0 ITTO940818A0 (it) | 1994-10-13 |
ITTO940818A1 ITTO940818A1 (it) | 1996-04-13 |
IT1268123B1 true IT1268123B1 (it) | 1997-02-20 |
Family
ID=11412833
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT94TO000818A IT1268123B1 (it) | 1994-10-13 | 1994-10-13 | Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5855693A (it) |
EP (1) | EP0707338A2 (it) |
JP (1) | JP2680801B2 (it) |
IT (1) | IT1268123B1 (it) |
Families Citing this family (44)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0720223B1 (en) * | 1994-12-30 | 2003-03-26 | STMicroelectronics S.r.l. | Process for the production of a semiconductor device having better interface adhesion between dielectric layers |
US6045625A (en) * | 1996-12-06 | 2000-04-04 | Texas Instruments Incorporated | Buried oxide with a thermal expansion matching layer for SOI |
FR2767605B1 (fr) * | 1997-08-25 | 2001-05-11 | Gec Alsthom Transport Sa | Circuit integre de puissance, procede de fabrication d'un tel circuit et convertisseur incluant un tel circuit |
US6194290B1 (en) * | 1998-03-09 | 2001-02-27 | Intersil Corporation | Methods for making semiconductor devices by low temperature direct bonding |
FR2781082B1 (fr) * | 1998-07-10 | 2002-09-20 | Commissariat Energie Atomique | Structure semiconductrice en couche mince comportant une couche de repartition de chaleur |
US20020089016A1 (en) | 1998-07-10 | 2002-07-11 | Jean-Pierre Joly | Thin layer semi-conductor structure comprising a heat distribution layer |
US6320206B1 (en) * | 1999-02-05 | 2001-11-20 | Lumileds Lighting, U.S., Llc | Light emitting devices having wafer bonded aluminum gallium indium nitride structures and mirror stacks |
US6500694B1 (en) * | 2000-03-22 | 2002-12-31 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6166411A (en) * | 1999-10-25 | 2000-12-26 | Advanced Micro Devices, Inc. | Heat removal from SOI devices by using metal substrates |
US6476446B2 (en) | 2000-01-03 | 2002-11-05 | Advanced Micro Devices, Inc. | Heat removal by removal of buried oxide in isolation areas |
US6552395B1 (en) * | 2000-01-03 | 2003-04-22 | Advanced Micro Devices, Inc. | Higher thermal conductivity glass for SOI heat removal |
US6613643B1 (en) | 2000-01-28 | 2003-09-02 | Advanced Micro Devices, Inc. | Structure, and a method of realizing, for efficient heat removal on SOI |
US6635552B1 (en) | 2000-06-12 | 2003-10-21 | Micron Technology, Inc. | Methods of forming semiconductor constructions |
JP2004507084A (ja) * | 2000-08-16 | 2004-03-04 | マサチューセッツ インスティテュート オブ テクノロジー | グレーデッドエピタキシャル成長を用いた半導体品の製造プロセス |
US6429070B1 (en) | 2000-08-30 | 2002-08-06 | Micron Technology, Inc. | DRAM cell constructions, and methods of forming DRAM cells |
US6940089B2 (en) * | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
US6717212B2 (en) * | 2001-06-12 | 2004-04-06 | Advanced Micro Devices, Inc. | Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure |
US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US7074623B2 (en) * | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
US20030227057A1 (en) * | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
US7608927B2 (en) * | 2002-08-29 | 2009-10-27 | Micron Technology, Inc. | Localized biasing for silicon on insulator structures |
US6989314B2 (en) * | 2003-02-12 | 2006-01-24 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Semiconductor structure and method of making same |
FR2851079B1 (fr) * | 2003-02-12 | 2005-08-26 | Soitec Silicon On Insulator | Structure semi-conductrice sur substrat a forte rugosite |
US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
DE10326578B4 (de) * | 2003-06-12 | 2006-01-19 | Siltronic Ag | Verfahren zur Herstellung einer SOI-Scheibe |
DE102004053016A1 (de) * | 2004-11-03 | 2006-05-04 | Atmel Germany Gmbh | Halbleiteranordnung und Verfahren zur Herstellung einer Halbleiteranordnung |
JP2006173349A (ja) * | 2004-12-15 | 2006-06-29 | Sony Corp | 固体撮像素子の製造方法及び固体撮像素子 |
JP2007012897A (ja) * | 2005-06-30 | 2007-01-18 | Nec Electronics Corp | 半導体装置およびその製造方法 |
WO2008078132A1 (en) * | 2006-12-26 | 2008-07-03 | S.O.I.Tec Silicon On Insulator Technologies | Method for producing a semiconductor-on-insulator structure |
US7781256B2 (en) * | 2007-05-31 | 2010-08-24 | Chien-Min Sung | Semiconductor-on-diamond devices and associated methods |
CN102576692B (zh) * | 2009-07-15 | 2014-11-26 | 斯兰纳半导体美国股份有限公司 | 具有背侧体区连接的绝缘体上半导体 |
US9390974B2 (en) | 2012-12-21 | 2016-07-12 | Qualcomm Incorporated | Back-to-back stacked integrated circuit assembly and method of making |
US9466719B2 (en) | 2009-07-15 | 2016-10-11 | Qualcomm Incorporated | Semiconductor-on-insulator with back side strain topology |
GB2483702A (en) * | 2010-09-17 | 2012-03-21 | Ge Aviat Systems Ltd | Method for the manufacture of a Silicon Carbide, Silicon Oxide interface having reduced interfacial carbon gettering |
FR2967812B1 (fr) * | 2010-11-19 | 2016-06-10 | S O I Tec Silicon On Insulator Tech | Dispositif electronique pour applications radiofrequence ou de puissance et procede de fabrication d'un tel dispositif |
CN104094399A (zh) * | 2011-11-04 | 2014-10-08 | 斯兰纳私人集团有限公司 | 绝缘体上硅制品的制造方法 |
JP2015501548A (ja) * | 2011-11-07 | 2015-01-15 | ザ シラナ グループ プロプライエタリー リミテッドThe Silanna Group Pty Ltd | セミコンダクタ・オン・インシュレータ構造およびその製造方法 |
US9425248B2 (en) | 2011-12-22 | 2016-08-23 | Shin-Etsu Chemical Co., Ltd. | Composite substrate |
US8741739B2 (en) | 2012-01-03 | 2014-06-03 | International Business Machines Corporation | High resistivity silicon-on-insulator substrate and method of forming |
US9231063B2 (en) | 2014-02-24 | 2016-01-05 | International Business Machines Corporation | Boron rich nitride cap for total ionizing dose mitigation in SOI devices |
US9773678B2 (en) * | 2014-07-10 | 2017-09-26 | Kabushiki Kaisha Toyota Jidoshokki | Semiconductor substrate and method for manufacturing semiconductor substrate |
KR20170122188A (ko) * | 2015-02-18 | 2017-11-03 | 더 유니버시티 오브 월위크 | 전력 반도체 소자 |
FR3079662B1 (fr) * | 2018-03-30 | 2020-02-28 | Soitec | Substrat pour applications radiofrequences et procede de fabrication associe |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0665210B2 (ja) * | 1985-04-17 | 1994-08-22 | 日本電気株式会社 | 基板の製造方法 |
SE465492B (sv) * | 1990-01-24 | 1991-09-16 | Asea Brown Boveri | Halvledarkomponent innehaallande ett diamantskikt som aer anordnat mellan ett substrat och ett aktivt skikt och foerfarande foer dess framstaellning |
WO1993001617A1 (en) * | 1991-07-08 | 1993-01-21 | Asea Brown Boveri Ab | Method for the manufacture of a semiconductor component |
US5276338A (en) * | 1992-05-15 | 1994-01-04 | International Business Machines Corporation | Bonded wafer structure having a buried insulation layer |
US5413952A (en) * | 1994-02-02 | 1995-05-09 | Motorola, Inc. | Direct wafer bonded structure method of making |
-
1994
- 1994-10-13 IT IT94TO000818A patent/IT1268123B1/it active IP Right Grant
- 1994-12-15 EP EP94830577A patent/EP0707338A2/en not_active Ceased
-
1995
- 1995-12-13 US US08/571,806 patent/US5855693A/en not_active Expired - Lifetime
- 1995-12-15 JP JP7327021A patent/JP2680801B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
ITTO940818A0 (it) | 1994-10-13 |
EP0707338A2 (en) | 1996-04-17 |
US5855693A (en) | 1999-01-05 |
JPH0927604A (ja) | 1997-01-28 |
EP0707338A3 (it) | 1996-05-15 |
ITTO940818A1 (it) | 1996-04-13 |
JP2680801B2 (ja) | 1997-11-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19971030 |