IT1108994B - Processo per la fabbricazione di dispositivi semiconduttori - Google Patents
Processo per la fabbricazione di dispositivi semiconduttoriInfo
- Publication number
- IT1108994B IT1108994B IT26098/78A IT2609878A IT1108994B IT 1108994 B IT1108994 B IT 1108994B IT 26098/78 A IT26098/78 A IT 26098/78A IT 2609878 A IT2609878 A IT 2609878A IT 1108994 B IT1108994 B IT 1108994B
- Authority
- IT
- Italy
- Prior art keywords
- manufacture
- semiconductive devices
- semiconductive
- devices
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3215—Doping the layers
- H01L21/32155—Doping polycristalline - or amorphous silicon layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/820,991 US4128439A (en) | 1977-08-01 | 1977-08-01 | Method for forming self-aligned field effect device by ion implantation and outdiffusion |
Publications (2)
Publication Number | Publication Date |
---|---|
IT7826098A0 IT7826098A0 (it) | 1978-07-26 |
IT1108994B true IT1108994B (it) | 1985-12-16 |
Family
ID=25232219
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT26098/78A IT1108994B (it) | 1977-08-01 | 1978-07-26 | Processo per la fabbricazione di dispositivi semiconduttori |
Country Status (6)
Country | Link |
---|---|
US (1) | US4128439A (it) |
EP (1) | EP0000545B1 (it) |
JP (1) | JPS6046831B2 (it) |
CA (1) | CA1112374A (it) |
DE (1) | DE2860467D1 (it) |
IT (1) | IT1108994B (it) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4218267A (en) * | 1979-04-23 | 1980-08-19 | Rockwell International Corporation | Microelectronic fabrication method minimizing threshold voltage variation |
JPS55151349A (en) * | 1979-05-15 | 1980-11-25 | Matsushita Electronics Corp | Forming method of insulation isolating region |
US4338616A (en) * | 1980-02-19 | 1982-07-06 | Xerox Corporation | Self-aligned Schottky metal semi-conductor field effect transistor with buried source and drain |
US4391651A (en) * | 1981-10-15 | 1983-07-05 | The United States Of America As Represented By The Secretary Of The Navy | Method of forming a hyperabrupt interface in a GaAs substrate |
JPS58170067A (ja) * | 1982-03-31 | 1983-10-06 | Fujitsu Ltd | 薄膜トランジスタの製造方法 |
NL188923C (nl) * | 1983-07-05 | 1992-11-02 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
US4648175A (en) * | 1985-06-12 | 1987-03-10 | Ncr Corporation | Use of selectively deposited tungsten for contact formation and shunting metallization |
US4734752A (en) * | 1985-09-27 | 1988-03-29 | Advanced Micro Devices, Inc. | Electrostatic discharge protection device for CMOS integrated circuit outputs |
EP0248988B1 (de) * | 1986-06-10 | 1990-10-31 | Siemens Aktiengesellschaft | Verfahren zum Herstellen von hochintegrierten komplementären MOS-Feldeffekttransistorschaltungen |
US5602403A (en) * | 1991-03-01 | 1997-02-11 | The United States Of America As Represented By The Secretary Of The Navy | Ion Implantation buried gate insulator field effect transistor |
JPH05283710A (ja) * | 1991-12-06 | 1993-10-29 | Intel Corp | 高電圧mosトランジスタ及びその製造方法 |
KR0166101B1 (ko) * | 1993-10-21 | 1999-01-15 | 김주용 | 정전방전 보호회로의 트랜지스터 및 그 제조방법 |
JPH0955496A (ja) * | 1995-08-17 | 1997-02-25 | Oki Electric Ind Co Ltd | 高耐圧mosトランジスタ及びその製造方法 |
EP1050562A1 (en) * | 1999-05-04 | 2000-11-08 | Fina Research S.A. | Low aromatics composition |
KR100640207B1 (ko) * | 1999-10-29 | 2006-10-31 | 엘지.필립스 엘시디 주식회사 | 박막트랜지스터 및 그 제조방법 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3449643A (en) * | 1966-09-09 | 1969-06-10 | Hitachi Ltd | Semiconductor integrated circuit device |
BE758683A (fr) * | 1969-11-10 | 1971-05-10 | Ibm | Procede de fabrication d'un dispositif monolithique auto-isolant et structure de transistor a socle |
US3734787A (en) * | 1970-01-09 | 1973-05-22 | Ibm | Fabrication of diffused junction capacitor by simultaneous outdiffusion |
JPS4936514B1 (it) * | 1970-05-13 | 1974-10-01 | ||
US4058887A (en) * | 1971-02-19 | 1977-11-22 | Ibm Corporation | Method for forming a transistor comprising layers of silicon dioxide and silicon nitride |
US4032372A (en) * | 1971-04-28 | 1977-06-28 | International Business Machines Corporation | Epitaxial outdiffusion technique for integrated bipolar and field effect transistors |
JPS5636585B2 (it) * | 1973-07-02 | 1981-08-25 | ||
FR2257998B1 (it) * | 1974-01-10 | 1976-11-26 | Commissariat Energie Atomique | |
US3899373A (en) * | 1974-05-20 | 1975-08-12 | Ibm | Method for forming a field effect device |
US4001048A (en) * | 1974-06-26 | 1977-01-04 | Signetics Corporation | Method of making metal oxide semiconductor structures using ion implantation |
US3948694A (en) * | 1975-04-30 | 1976-04-06 | Motorola, Inc. | Self-aligned method for integrated circuit manufacture |
DE2554426C3 (de) * | 1975-12-03 | 1979-06-21 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Erzeugung einer lokal hohen inversen Stromverstärkung bei einem Planartransistor sowie nach diesem Verfahren hergestellter invers betriebener Transistor |
JPS52135685A (en) * | 1976-05-10 | 1977-11-12 | Nec Corp | Semiconductor device |
US4046606A (en) * | 1976-05-10 | 1977-09-06 | Rca Corporation | Simultaneous location of areas having different conductivities |
JPS52156576A (en) * | 1976-06-23 | 1977-12-27 | Hitachi Ltd | Production of mis semiconductor device |
US4029522A (en) * | 1976-06-30 | 1977-06-14 | International Business Machines Corporation | Method to fabricate ion-implanted layers with abrupt edges to reduce the parasitic resistance of Schottky barrier fets and bipolar transistors |
-
1977
- 1977-08-01 US US05/820,991 patent/US4128439A/en not_active Expired - Lifetime
-
1978
- 1978-07-07 JP JP53082175A patent/JPS6046831B2/ja not_active Expired
- 1978-07-10 CA CA307,067A patent/CA1112374A/en not_active Expired
- 1978-07-19 EP EP78100443A patent/EP0000545B1/de not_active Expired
- 1978-07-19 DE DE7878100443T patent/DE2860467D1/de not_active Expired
- 1978-07-26 IT IT26098/78A patent/IT1108994B/it active
Also Published As
Publication number | Publication date |
---|---|
IT7826098A0 (it) | 1978-07-26 |
EP0000545B1 (de) | 1981-02-11 |
EP0000545A1 (de) | 1979-02-07 |
CA1112374A (en) | 1981-11-10 |
DE2860467D1 (en) | 1981-03-26 |
US4128439A (en) | 1978-12-05 |
JPS5427376A (en) | 1979-03-01 |
JPS6046831B2 (ja) | 1985-10-18 |
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