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GB2251141B - Lock security in early/late gate synchronisation PLL - Google Patents

Lock security in early/late gate synchronisation PLL

Info

Publication number
GB2251141B
GB2251141B GB9027634A GB9027634A GB2251141B GB 2251141 B GB2251141 B GB 2251141B GB 9027634 A GB9027634 A GB 9027634A GB 9027634 A GB9027634 A GB 9027634A GB 2251141 B GB2251141 B GB 2251141B
Authority
GB
United Kingdom
Prior art keywords
synchronisation
pll
early
late gate
lock security
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9027634A
Other versions
GB9027634D0 (en
GB2251141A (en
Inventor
Tom Vilhelmsen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Danmark AS
Original Assignee
Motorola AS
Storno AS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola AS, Storno AS filed Critical Motorola AS
Priority to GB9027634A priority Critical patent/GB2251141B/en
Publication of GB9027634D0 publication Critical patent/GB9027634D0/en
Priority to DE19914135531 priority patent/DE4135531A1/en
Publication of GB2251141A publication Critical patent/GB2251141A/en
Application granted granted Critical
Publication of GB2251141B publication Critical patent/GB2251141B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
GB9027634A 1990-12-20 1990-12-20 Lock security in early/late gate synchronisation PLL Expired - Fee Related GB2251141B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB9027634A GB2251141B (en) 1990-12-20 1990-12-20 Lock security in early/late gate synchronisation PLL
DE19914135531 DE4135531A1 (en) 1990-12-20 1991-10-28 LOCKING SECURITY IN EARLY / LATE GATE LOCKED SYNCHRONIZATION PLLS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9027634A GB2251141B (en) 1990-12-20 1990-12-20 Lock security in early/late gate synchronisation PLL

Publications (3)

Publication Number Publication Date
GB9027634D0 GB9027634D0 (en) 1991-02-13
GB2251141A GB2251141A (en) 1992-06-24
GB2251141B true GB2251141B (en) 1994-09-28

Family

ID=10687321

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9027634A Expired - Fee Related GB2251141B (en) 1990-12-20 1990-12-20 Lock security in early/late gate synchronisation PLL

Country Status (2)

Country Link
DE (1) DE4135531A1 (en)
GB (1) GB2251141B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19819541C2 (en) * 1998-04-30 2001-01-11 Siemens Ag Method and arrangement for recovering a clock signal from a data signal

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1399513A (en) * 1971-10-25 1975-07-02 Martin Marietta Corp Method and circuit for timing singal derivation from received data
US4055814A (en) * 1976-06-14 1977-10-25 Pertec Computer Corporation Phase locked loop for synchronizing VCO with digital data pulses

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5567248A (en) * 1978-11-15 1980-05-21 Sanyo Electric Co Ltd Frequency synthesizerrtype channel selection device
US4584537A (en) * 1985-04-17 1986-04-22 Burroughs Corporation Synchronized oscillator lock detector
JPH01196946A (en) * 1988-02-01 1989-08-08 Toshiba Corp Frequency controller
GB8910777D0 (en) * 1989-05-10 1989-06-28 Storno As Radio demodulator circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1399513A (en) * 1971-10-25 1975-07-02 Martin Marietta Corp Method and circuit for timing singal derivation from received data
US4055814A (en) * 1976-06-14 1977-10-25 Pertec Computer Corporation Phase locked loop for synchronizing VCO with digital data pulses

Also Published As

Publication number Publication date
DE4135531A1 (en) 1992-06-25
GB9027634D0 (en) 1991-02-13
GB2251141A (en) 1992-06-24

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20011220