GB2070647A - Selective chemical deposition and/or electrodeposition of metal coatings, especially for the production of printed circuits - Google Patents
Selective chemical deposition and/or electrodeposition of metal coatings, especially for the production of printed circuits Download PDFInfo
- Publication number
- GB2070647A GB2070647A GB8106533A GB8106533A GB2070647A GB 2070647 A GB2070647 A GB 2070647A GB 8106533 A GB8106533 A GB 8106533A GB 8106533 A GB8106533 A GB 8106533A GB 2070647 A GB2070647 A GB 2070647A
- Authority
- GB
- United Kingdom
- Prior art keywords
- chemical
- copper
- cobalt
- nickel
- bath
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1603—Process or apparatus coating on selected surface areas
- C23C18/1605—Process or apparatus coating on selected surface areas by masking
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1633—Process of electroless plating
- C23C18/1646—Characteristics of the product obtained
- C23C18/165—Multilayered product
- C23C18/1651—Two or more layers only obtained by electroless plating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1633—Process of electroless plating
- C23C18/1646—Characteristics of the product obtained
- C23C18/165—Multilayered product
- C23C18/1653—Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0175—Inorganic, non-metallic layer, e.g. resist or dielectric for printed capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Mechanical Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electrochemistry (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electroplating Methods And Accessories (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Printing Plates And Materials Therefor (AREA)
Abstract
In a process for the selective chemical deposition and/or electrodeposition of a metal coating onto an activated non-conducting surface, the part or parts of the surface that are to remain free of metal are anodically passivated. Passivation may be brought about by applying an anodic reverse potential to the surface(s) during chemical deposition. This process is suitable for the production of printed circuits having very fine conductors on a very small area and having optimum electrical characteristics.
Description
SPECIFICATION
Process for the selective chemical deposition and/or electrodeposition of metal coat
ings, especially for the production of
printed circuits
The invention relates to a process for the selective chemical deposition and/or electrodeposition of metal coatings onto activated insulating surfaces, especially for the production of printed circuits.
Processes are already known for the selective deposition of metals from solutions of
electrolytes onto conductive surfaces or surfaces rendered conductive. The known proc
esses are based on two fundamentally differ
ent techniques: according to one, which avo
ids the use of plating tanks, the articles to be
electroplated are brought into contact with the electrolyte only at the desired places, this
being achieved, for example, by using rollers (DE-PS 186654), wheels (DE-PS 2324834) and open hollow bodies (DE-PS 1807481); according to the other, conventional tanks are used, but the supply of metal ions and the distribution of the electric field to the surfaces to be treated are controlled by inserting, for
example, screens (DE-PS 2263642), masking
arrangements (DE-PS 2362489), electrically
insulating belts running on rollers (DE-PS
2009118), cages (DE-PS 2230891) or layers
of lacquer (DE-PS 2253196).
However, these known processes are unsatisfactory insofar as they either make possible what is, in most cases, only an insufficient supply of metal ions, which results in an
inadequate metal coating, or involve great expenditure in terms of costs, materials and time, since each of the masks used must first be applied and then removed and from time to time renewed because of signs of wear.
These processes are therefore not suitable for the production of printed circuits.
The processes usually used for the production of printed circuits are, on the other hand,
affected by certain disadvantages.
One disadvantage of the so-called subtractive technique is tha large amounts of the cladding of the base material must be removed after the conductor pattern has been built up. This involves the simultaneous undercutting of the conductive features with all the known damage that this entails, this dam Bge being the more serious and increasing the
more rapidly in percentage terms, the nar
rower the distance separating the tracks.
These occurrences thus preclude further mini
aturisation when using the subtractive tech
nique.
A disadvantage of the so-called additive technique, on the other hand, is that a base
material coated with a bonding agent must be used. After chemical fusion and activation, the bonding agent forms the base for the selectively applied chemically deposited copper and, in comparison with the epoxy resin or other base material used, has clearly less good electrical characteristics after the wet treatment, which likewise limits the layout of miniaturised circuits.
There is therefore a need for a process that, while avoiding the disadvantage of the known processes, makes possible the selective chemical deposition and/or electrodeposition of metal coatings onto insulating surfaces activated in the usual manner and that is suitable especially for the production of printed circuits having very fine conductors on a very small area and having optimum electrical characteristics.
We have found that good results can be achieved by a process in which those places on the surfaces that are to remain free of metal are anodically passivated.
Accordingly, the present invention provides a process for the selective chemical deposition and/or electrodeposition of a metal coating onto an activated non-conducting surface, for example plastics surface, wherein the part or parts of the surface that are to remain free of metal are anodically passivated.
In one embodiment of this process passivation is brought about by applying an anodic reverse potential to the surface, preferably with a current density of at least 0.8 mA/crn2, and using, as cathode, preferably copper wire.
The process according to the invention is suitable especially for the production of printed circuits using a copper-clad insulating substrate that is driiled, cleaned and activated in the usual manner, optionally reduced, and after-treated in the usual manner, the circuit pattern being applied by means of the screen or photographic printing technique, optionally after the undesired areas have been masked by a resist. Preferably, after the copper-clad surface of the insulating substrate pre-treated as described above has been anodically passi vated and/or during anodic passivation, it is treated with a chemical nickel, cobalt or nickel-cobalt bath, whereupon the metal coating is deposited exclusively in the drill-holes.
Optionally this is carried out after treatment with a chemical and/or electrolytic copper bath. The circuit pattern may then be applied preferably positively by means of a resist; for example, the resist is exposed to light through a film pattern and the exposed resist selectively removed by its developer, leaving the desired resist pattern on the clad laminate.
The exposed copper may then be etched away to ieave the circuit pattern, and the remaining resist removed in a manner known per Se. The circuit pattern may then be masked by a soldering resist lacquer, with the soldering eyes and drill-holes being left free; the uncovered eyes and drill-holes may then be provided with a copper layer using a chemical copper bath. If desired a tin layer is then applied, optionally also chemically, to the copper-plated eyes and drill-holes.
The non-conducting substrate, or base material, is especially a glass fibre-reinforced epoxy resin.
The chemical nickel, cobalt and nickel-cobalt baths may contain, for example, as the main constituents, in the case of the nickel bath: -a nickel salt, a citrate and an alkali metal hypophosphite, or -a nickel salt, an alkali metal diphosphate, an alkali metal hydrogen phosphate, and hydrazine or a derivative thereof, in the case of the cobalt bath: -a cobalt salt, a citrate and an alkali metal hypophosphite, or -a cobalt salt, an alkali metal diphosphate, an alkali metal hydrogen phosphate, and hydrazine or a derivative thereof, in the case of the nickel-cobalt bath: -a nickel salt, a cobalt salt, a citrate and an alkali metal hypophosphite.
Advantageously, the nickel, cobalt or nickelcobalt layer is applied in a thickness of from 0.1 to 1.5 ism, more especially from 0.3 to 0.8,us.
Passivation may be brought about by applying an anodic reverse potential to the surface(s), preferably with a current density of at least 0.8 mA/cm2 at a voltage of approximately 200 mV.
The chemical copper bath is preferably stabilised and preferably contains, as the main constituents, a copper salt, a complex former, formaldehyde, and, as stabilisers, an alkali metal cyanide and, if desired, a selenium compound.
In this process, it is especially surprising that the metal layer is deposited exclusively in the drill-holes and not, however, on the copper-clad surface.
Consequently, there is no need for a special step to remove metal (for example nickel, cobalt or nickel-cobalt) deposited on the cladding. Chemically, this would be removed during the etching attack on the copper but the copper under the electrolessly deposited thin metal layer would be etched only slowly and non-uniformly; with mechanical removal, damage to the transition from drill-hole to cladding could not be avoided. These disadvantages are avoided and the metal that would otherwise be deposited electrolessly (unnecessarily) on the cladding is saved since as a result of anodically passivating the cladding surprisingly the metal layer is deposited exclusively in the drill-holes.
By the process according to the invention it is possible, in a manner previously not achieved, to produce high quality miniaturised circuits. Furthermore, the process has the great advantage that, starting from a copperclad base material, it is possible to produce very find conductive tracks having a width of less than 100 cm and having optimum insulation and surface resistances.
A further major advantage is the saving in copper which is a valuable raw material.
Suitable insulating substrates, or base materials, are, for example, phenolic resin-bonded paper, epoxy resin paper and, especially, glass fibre-reinforced epoxy resin.
The substrate may first be drilled and cleaned in the usual manner, activated by one of the conventional activator systems, and optionally reduced and after-treated. It may then be washed and dried in a manner known per se.
The circuit pattern may be applied negatively or positively using the screen or photographic printing technique.
It is also possible to apply the soldering pattern (soldering eyes and drill-holes) negatively by means of a screen or photographic printing technique using a resist. Metallisation may be carried out chemically with a nickel, cobalt or nickel-cobalt bath to a layer thickness of from 0.1 to 1.5 tom. With the copper surfaces that have remained free being anodically passivated, only the inside surfaces of the drill-holes are coated. Before this operation chemical and/or electrolytical pre-copperplating may be carried out using a conventional bath. After stripping the previously applied resist, which may be removed in a manner known per se by the action of an organic solvent such as, for example, methylene chloride, the copper that has been laid bare can be etched away in the usual manner.
The resist used is advantageously a conventional photosensitive lacquer or film. In many cases the developed circuit pattern is then masked negatively by printing with soldering resist lacquer and the soldering eyes and drillholes remaining free are chemically copperplated.
The copper bath used is preferably a stabilised chemical copper bath that contains, as the main constituents, a copper salt, a complex former, formaldehyde, and, as stabilisers, an alkali metal cyanide and, if desired, a selenium compound.
The alkali metal cyanide stabiliser in the copper baths is especially sodium cyanide in a concentration of from 1 5 to 30 mg/litre.
Suitable selenium compounds are the organic, inorganic and organic-inorganic mono-- and di-selenides, and, of these, especially the alkali metal seleocyanates, such as, for example, potassium selenocyanate, which are usually used in low concentrations, especially from 0.1 to 0.3 mg/litre.
The following Examples illustrate the invention.
EXAMPLE 1
A conventional base-board consisting of glass fibre-reinforced epoxy resin clad with copper on both sides is drilled in the usual manner, and is etched and cleaned using a stabilised sulphuric acid solution of hydrogen peroxide. Then the board is activated by treatment with an aqueous alkaline solution of a palladium complex, such as, for example, palladium sulphate in 2-aminopyridine, which is then reduced by the action of a reducing agent, such as, for example, diethylaminoborane.
While anodically passivating the entire copper surface, the walls of the drill-holes are chemically nickel-plated by the action of a chemical nickel bath having the following composition: 20 g/litre nickel sulphate Nix04.7 H20 20 g/litre sodium hypophosphite
NaHO2.H2O 30 g/litre succinic acid HOOC(CH2)2COOH 20 g/litre sodium borate Na2B407.10 H20 For the purposes of anodic passivation, an anodic reverse potential with a current density of at least 0.8 mA/cm2 is applied to the cladding, resulting in a voltage of 200 mV with respect to the reference electrode. A copper wire spaced at about 5 mm is advantageously used as cathode. The effective angle onto the board is at most 80 , so that with relatively large board dimensions several copper wires may have to be provided.
The so-called batch process may also be used. In this case, the cage receiving the boards is constructed in such a manner that each individual board makes lateral contact wifh the whole cage may be designed as an anode. An insulating hoop which is mounted on the frame of the cage and carries fine copper wires in such a manner that the copper wires lie between the boards at a distance of about from 4 to 8 mm in each case, serves as cathode. The wires must be replaced from time to time according to the extent of their metalsisation.
The treatment is carried out for 5 minutes at a pH of 8.5 and a temperature of 35"C.
The layer thickness obtained on the walls of the drill-holes is 0.2 ism. The copper cladding is not nickel-plated again.
The surface is then positively printed with the circuit pattern, the copper cladding is etched away, the resist removed, the surface is negatively printed with soldering resist lacquer with the soldering eyes and the drillholes being left free, the soldering eyes and drill-holes are then chemically copper-plated and, if desired, a tin-lead layer is applied. By this means, a printed circuit is obtained having optimum electrical characteristics of at least 1 . 1012 S2/cm .
EXAMPLE 2
A conventional base-board consisting of glass fibre-reinforced epoxy resin clad with copper on both sides is drilled in the usual manner, and is etched and cleaned using a stabilised sulphuric acid solution of hydrogen peroxide. Then the board is activated by treatment with an aqueous alkaline solution of a palladium complex, such as, for example, palladium sulphate in 2-aminopyridine which is then reduced by the action of a reducing agent, such as, for example, diethylaminoborane.
Cobalt is chemically deposited on the surface of the board and on the walls of the drillholes by the action of a chemical cobalt bath having the following composition: 20 g/litre cobalt sulphate CoSO4.6 H20 20 g/litre sodium hypophosphite NaH PO2, H2O 30 g/litre succinic acid HOOC(CH2)2COOH 20 g/litre sodium borate Na2B407.10 H20
The treatment is carried out for 5 minutes at a pH of 8.5 and a temperature of 35"C.
The layer thickness obtained is 0.2,um.
The cladding is inhibited, as described in
Example 1, by applying an anodic potential.
Then the surface is positively printed with the circuit pattern, the copper cladding is etched away, the resist removed, the surface is negatively printed with soldering resist lacquer with the soldering eyes and the drillholes being left free, is chemically copperplated and, if desired, a layer of tin is chemically applied. By this means also, a printed circuit is obtained having optimum electrical characteristics of at least 1 . 10 S3/cm.
If desired, there may also be treatment with a copper bath before, during or after anodic passivation.
Claims (23)
1. A process for the selective chemical deposition and/or electrodeposition of a metal coating onto an activated non-conducting surface, wherein the part or parts of the surface that are to remain free of metal are anodically passivated.
2. A process as claimed in claim 1, wherein passivation is brought about by applying an anodic reverse potential to the surface.
3. A process as claimed in claim 2, wherein the current density is at least 0.8 mA/cm2.
4. A process as claimed in any one of claims 1 to 3, wherein copper wire is used as cathode.
5. A process for the production of printed circuits which includes a selective chemical and/or electrodeposition of a metal according to any one of claims 1 to 4.
6. A process as claimed in claim 5, wherein a copper-clad non-conducting substrate is drilled, cleaned, activated, optionally reduced, and after-treated, the copper-clad surface of the treated substrate is anodically passivated and the substrate treated with a chemical nickel, cobalt or nickel-cobalt bath, to deposit metal exclusively in the drill-holes, the circuit pattern is then applied positively by the screen or photographic printing technique using a resist, the unmasked copper is then etched away and the remaining resist is removed, the circuit pattern is then masked by a soldering resist lacquer with the soldering eyes and drill-holes being left free, and the uncovered eyes and drill-hoies are provided with a copper layer using a chemical copper bath, and a tin layer is applied to the copperplated eyes and drill-holes.
7. A process as claimed in claim 6, wherein the substrate is treated with a chemical and/or electrolytic copper bath before the chemical nickel, cobalt or nickel-cobalt bath.
8. A process as claimed in claim 6 or claim 7, wherein passivation is brought about by applying an anodic reverse potential to the surfaces.
9. A process as claimed in claim 8, wherein the current density is at least 0.8 mA/cm2 and the voltage substantially 200 mV.
10. A process as claimed in any one of claims 6 to 9, wherein the non-conducting substrate is a glass fibre-reinforced epoxy resin.
11. A process as claimed in any one of claims 6 to 10 wherein a chemical nickel bath is used containing a nickel salt, a citrate and an alkali metal hypophosphite.
1 2. A process as claimed in any one of claims 6 to 10, wherein a chemical nickel bath is used containing a nickel salt, an alkali metal diphosphate, an alkali metal hydrogen phosphate and hydrazine or a derivative thereof.
1 3. A process as claimed in any one of claims 6 to 10, wherein a chemical cobalt bath is used containing a cobalt salt, a citrate and an alkali metal hyphophosphite.
14. A process as claimed in any one of claims 6 to 10, wherein a chemical cobalt bath is used containing a cobalt salt, an alkali metal diphosphate, an alkali metal hydrogen phosphate and hydrazine or a derivative thereof.
1 5. A process as claimed in any one of claims 6 to 10, wherein a chemical nickelcobalt bath is used containing a nickel salt, a cobalt salt, a citrate and an alkali metal hypophosphite.
1 6. A process as claimed in any one of claims 6 to 1 5, wherein the nickel, cobalt or nickel-cobalt layer is applied in a thickness of from 0.1 to 1.5 ym.
17. A process as claimed in claim 16, wherein the layer is applied in a thickness of from 0.3 to 0.8 m.
18. A process as claimed in any one of claims 6 to 17, wherein the chemical copper bath is stabilised.
19. A process as claimed in claim 18, wherein the chemical copper bath contains a copper salt, a complex former, formaldehyde, and, as stabilisers, an alkali metal cyanide and if desired a selenium compound.
20. A process as claimed in claim 1, carried out substantially as described in Example 1 or Example 2 herein.
21. A process as claimed in claim 6, carried out substantially as described in Example 1 or Example 2 herein.
22. A non-conducting substrate metal coated by a process as claimed in any one of claims 1 to 21.
23. A printed circuit board produced by a process which comprises a process as claimed in any one of claims 6 to 21.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19803008434 DE3008434A1 (en) | 1980-03-03 | 1980-03-03 | METHOD FOR SELECTIVE CHEMICAL AND / OR GALVANIC DEPOSITION OF METAL COATINGS, ESPECIALLY FOR THE PRODUCTION OF PRINTED CIRCUITS |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2070647A true GB2070647A (en) | 1981-09-09 |
GB2070647B GB2070647B (en) | 1984-02-22 |
Family
ID=6096345
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8106533A Expired GB2070647B (en) | 1980-03-03 | 1981-03-02 | Selective chemical deposition and/or electrodeposition of metal coatings especially for the production of printed circuits |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS56135996A (en) |
DE (1) | DE3008434A1 (en) |
FR (1) | FR2477360B1 (en) |
GB (1) | GB2070647B (en) |
IE (1) | IE50821B1 (en) |
IT (1) | IT1135186B (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0374505A2 (en) * | 1988-11-29 | 1990-06-27 | Heraeus Noblelight GmbH | Metallizing process |
US5354583A (en) * | 1992-11-09 | 1994-10-11 | Martin Marietta Energy Systems, Inc. | Apparatus and method for selective area deposition of thin films on electrically biased substrates |
EP0895447A2 (en) * | 1997-07-28 | 1999-02-03 | Hitachi, Ltd. | A circuit board, a method for manufacturing same, and a method of electroless plating |
WO2013025352A1 (en) * | 2011-08-18 | 2013-02-21 | Apple Inc. | Anodization and plating surface treatments |
US9683305B2 (en) | 2011-12-20 | 2017-06-20 | Apple Inc. | Metal surface and process for treating a metal surface |
US10300658B2 (en) * | 2012-05-03 | 2019-05-28 | Apple Inc. | Crack resistant plastic enclosure structures |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59186390A (en) * | 1983-04-07 | 1984-10-23 | 株式会社サト−セン | Method of producing printed circuit board |
EP0150733A3 (en) * | 1984-01-26 | 1987-01-14 | LeaRonal, Inc. | Process for printed circuit board maufacture |
JPS60176293A (en) * | 1984-02-22 | 1985-09-10 | 新神戸電機株式会社 | Method of producing printed circuit board |
DE4008482A1 (en) * | 1990-03-16 | 1991-09-19 | Asea Brown Boveri | GALVANIZATION PROCEDURE |
JPH0555069U (en) * | 1991-12-25 | 1993-07-23 | 松下電器産業株式会社 | Rotational speed detection device |
DE102019220458A1 (en) * | 2019-12-20 | 2021-06-24 | Vitesco Technologies Germany Gmbh | Method of manufacturing a printed circuit board and printed circuit board |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB829263A (en) * | 1957-02-08 | 1960-03-02 | Sperry Rand Corp | Method of making printed circuits |
DE1277642B (en) * | 1964-01-14 | 1968-09-12 | Bayer Ag | Process for the protection of metallic surfaces against metal deposition in chemical metallization baths |
US3485665A (en) * | 1967-08-22 | 1969-12-23 | Western Electric Co | Selective chemical deposition of thin-film interconnections and contacts |
DE2920940A1 (en) * | 1979-05-21 | 1980-12-04 | Schering Ag | METHOD FOR PRODUCING PRINTED CIRCUITS |
-
1980
- 1980-03-03 DE DE19803008434 patent/DE3008434A1/en active Granted
-
1981
- 1981-01-27 IT IT19345/81A patent/IT1135186B/en active
- 1981-03-02 GB GB8106533A patent/GB2070647B/en not_active Expired
- 1981-03-02 FR FR8104102A patent/FR2477360B1/en not_active Expired
- 1981-03-03 IE IE447/81A patent/IE50821B1/en unknown
- 1981-03-03 JP JP2945881A patent/JPS56135996A/en active Granted
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0374505A2 (en) * | 1988-11-29 | 1990-06-27 | Heraeus Noblelight GmbH | Metallizing process |
EP0374505A3 (en) * | 1988-11-29 | 1990-07-04 | Asea Brown Boveri Aktiengesellschaft | Metallizing process |
US5354583A (en) * | 1992-11-09 | 1994-10-11 | Martin Marietta Energy Systems, Inc. | Apparatus and method for selective area deposition of thin films on electrically biased substrates |
EP0895447A2 (en) * | 1997-07-28 | 1999-02-03 | Hitachi, Ltd. | A circuit board, a method for manufacturing same, and a method of electroless plating |
EP0895447A3 (en) * | 1997-07-28 | 2000-07-12 | Hitachi, Ltd. | A circuit board, a method for manufacturing same, and a method of electroless plating |
US6370768B1 (en) | 1997-07-28 | 2002-04-16 | Hitachi, Ltd. | Circuit board, a method for manufacturing same, and a method of electroless plating |
WO2013025352A1 (en) * | 2011-08-18 | 2013-02-21 | Apple Inc. | Anodization and plating surface treatments |
US9663869B2 (en) | 2011-08-18 | 2017-05-30 | Apple Inc. | Anodization and plating surface treatments |
US9683305B2 (en) | 2011-12-20 | 2017-06-20 | Apple Inc. | Metal surface and process for treating a metal surface |
US10300658B2 (en) * | 2012-05-03 | 2019-05-28 | Apple Inc. | Crack resistant plastic enclosure structures |
Also Published As
Publication number | Publication date |
---|---|
FR2477360A1 (en) | 1981-09-04 |
FR2477360B1 (en) | 1985-06-28 |
JPS6257120B2 (en) | 1987-11-30 |
GB2070647B (en) | 1984-02-22 |
IT8119345A0 (en) | 1981-01-27 |
IT1135186B (en) | 1986-08-20 |
DE3008434A1 (en) | 1981-09-17 |
DE3008434C2 (en) | 1988-02-25 |
JPS56135996A (en) | 1981-10-23 |
IE50821B1 (en) | 1986-07-23 |
IE810447L (en) | 1981-09-03 |
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Legal Events
Date | Code | Title | Description |
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PCNP | Patent ceased through non-payment of renewal fee |