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GB1600043A - Video signal processing arrangement - Google Patents

Video signal processing arrangement Download PDF

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Publication number
GB1600043A
GB1600043A GB1252578A GB1252578A GB1600043A GB 1600043 A GB1600043 A GB 1600043A GB 1252578 A GB1252578 A GB 1252578A GB 1252578 A GB1252578 A GB 1252578A GB 1600043 A GB1600043 A GB 1600043A
Authority
GB
United Kingdom
Prior art keywords
video signal
signal
waveform
picture
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1252578A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BAE Systems Electronics Ltd
Original Assignee
Marconi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Co Ltd filed Critical Marconi Co Ltd
Priority to GB1252578A priority Critical patent/GB1600043A/en
Publication of GB1600043A publication Critical patent/GB1600043A/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/20Circuitry for controlling amplitude response
    • H04N5/205Circuitry for controlling amplitude response for correcting amplitude versus frequency characteristic

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)

Description

(54) VIDEO SIGNAL PROCESSING ARRANGEMENT (71) We, THE MARCONI COMPANY LIMITED, a British Company, of Marconi House, New Street, Chelmsford, Essex CMl lPL do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to video signal processing arrangements and is applicable to video systems in which a video signal having a large dynamic amplitude range is to be displayed on an image display device, such as a cathode ray tube, having a much reduced dynamic amplitude range. Examples of such systems are television arrangements or visible light emitting diode displays for direct viewing of thermal (infra-red) image information. The dynamic amplitude range of the video information obtained from the infra-red detector can be of the order of 1000:1 whereas the maximum dynamic range provided by the display monitor may only be 100:1. The effect of presenting an unmodified video signal to a display monitor of this kind is to lose detailed information in areas which are predominantly white or predominantly black. Only detail information in the intervening grey areas is presented without loss of contrast and such an arrangement is generally unsatisfactory, particularly since valuable detail information is often present in parts of the viewed scene which are predominantly very close to peak white levels or peak black levels. The present invention seeks to provide an arrangement for reducing the dynamic range of a video signal without producing a corresponding reduction in the amplitude of the fine detail.
According to this invention, a video signal processing arrangement includes means for increasing the amplitude of high frequency video signal components corresponding to fine picture detail relative to low frequency video signal components corresponding to picture blocks.
Preferably, the arrangement includes means for reducing peak video signal levels whilst retaining or increasing the amplitude of high frequency signals corresponding to picture detail.
Preferably, a signal amplitude limiter is used to reduce the amplitude of relatively low frequency picture blocks to predetermined levels.
The invention is further described, by way of example, with reference to the accompanyiq drawings in which, Figure 1 shows one embodiment of a video signal processing arrangement in accordance with the present invention, Figures 2, 3, 4, 5 and 6 are explanatory diagrams illustrating waveforms at different points in the circuit shown in Figure 1, and Figure 7 relates to an alternative embodiment of the invention.
Referring to Figure 1, an input terminal 1 receives a video signal having a large dynamic amplitude range and this signal is a.c. coupled via a capacitor 2 to a limiting circuit 3 and a summing amplifier 4. The summing amplifier 4 also receives the output from the limiting circuit 3 and produces a combined output signal which is passed through a high pass filter network 5 to a further amplifier 6 which also receives the output from the limiting circuit 3. The limiting circuit 3 is such as to provide an inverted output of unity gain and the clipping levels which set the degree of amplitude limiting are determined by diodes 7 and 8. The input waveform at point A is shown in Figure 2 in which the three major parts of a video waveform are indicated. The waveform 21 represents fine picture detail superimposed on a predominantly black part of a viewed scene, whereas the waveform 22 represents fine detail superimposed on a predominantly white part of the viewed scene, and waveform 23 represents normal picture information which is centred on a medium grey part of the viewed scene. The dynamic range of a display monitor on which the video signal is to be seen has upper and lower limits which correspond to the levels indicated by broken lines 24 and 25 and these lines correspond to the clipping levels provided by the diodes 7 and 8. The output signal from the limiting circuit 3 at point B is shown in Figure 3 from which it will be seen that the detail information in the peak black and white regions has been totally removed and that overall the waveform has been inverted. This signal is combined with the original input signal by the amplifier 4 which is a unity gain summing amplifier and it produces an output signal at point C representative of the difference in the two signals presented to it. The waveform of this signal at point C is shown in Figure 4 from which it will be seen that the grey picture information has been removed as the inverted signal at point B has resulted in cancellation of this portion of the waveform when combined with the original signal. The resulting signal is passed through the high pass filter which, being a.c. coupled, removes the d.c. components producing a waveform at point D as shown in Figure 5 having a low dynamic range. The waveforms shown in Figures 3 and 5 are combined in the amplifier 6 which is an inverting unity gain summing amplifier and which provides a final output waveform of the form shown in Figure 6. This waveform contains the original high frequency signals relating to the fine picture detail, but within a reduced overall dynamic range so that when this waveform is presented to a display monitor the detail superimposed on very dark shades or brilliant highlights will be readily visible.
The signal spikes 51, 52, 53 in Figure 5 correspond to the edge of picture block areas, and they can be retained in the final output waveform to emphasise these edges or instead they can be clipped, as is represented at 61 and 62 of Figure 6. This additional clipping can be provided by a further limiter 30, shown in broken line in Figure 1.
An alternative embodiment of the invention is shown in Figure 7 in which the input video signal is applied via a capacitor 71 to both a low pass filter 72, which passes only the picture block information and attenuates high frequencies and to a high pass filter 73, which passes the detail information whilst attenuating the low frequencies. The signal obtained from the low pass filter 72 is passed through an amplitude limiter 74 and subsequently is combined with the output from the high pass filter 73.
The two signals are combined in a summing circuit 75 by means of which the relative gain of the two frequency bands can be adjusted. As before, the output of this circuit is fed to a monitor for display and it is of the same form as that shown in Figure 6. Whilst this circuit is superficially simpler than that of Figure 1, it does require the provision of a low pass filter, and for this reason the former circuit is to be preferred.
Since both circuits are a.c. coupled by the input capacitors, it is necessary to subsequently insert blanking levels prior to display, but such measures are conventional.
WHAT WE CLAIM IS: 1. A video signal processing arrangement including means for increasing the amplitude of high frequency video signal components corresponding to fine picture detail relative to low frequency video signal components corresponding to picture blocks.
2. A video signal processing arrangement as claimed in Claim 1 and wherein the arrangement includes means for reducing peak video signal levels whilst retaining or increasing the amplitude of high frequency signals corresponding to picture detail.
3. A video signal processing arrangement as claimed in Claim 1 or 2 and wherein a signal amplitude limiter is used to reduce the amplitude of relatively low frequency picture blocks to predetermined levels.
4. A video signal processing arrangement substantially as illustrated in and described with reference to Figures 1 to 7 of the accompanying drawings.
**WARNING** end of DESC field may overlap start of CLMS **.

Claims (4)

**WARNING** start of CLMS field may overlap end of DESC **. has been inverted. This signal is combined with the original input signal by the amplifier 4 which is a unity gain summing amplifier and it produces an output signal at point C representative of the difference in the two signals presented to it. The waveform of this signal at point C is shown in Figure 4 from which it will be seen that the grey picture information has been removed as the inverted signal at point B has resulted in cancellation of this portion of the waveform when combined with the original signal. The resulting signal is passed through the high pass filter which, being a.c. coupled, removes the d.c. components producing a waveform at point D as shown in Figure 5 having a low dynamic range. The waveforms shown in Figures 3 and 5 are combined in the amplifier 6 which is an inverting unity gain summing amplifier and which provides a final output waveform of the form shown in Figure 6. This waveform contains the original high frequency signals relating to the fine picture detail, but within a reduced overall dynamic range so that when this waveform is presented to a display monitor the detail superimposed on very dark shades or brilliant highlights will be readily visible. The signal spikes 51, 52, 53 in Figure 5 correspond to the edge of picture block areas, and they can be retained in the final output waveform to emphasise these edges or instead they can be clipped, as is represented at 61 and 62 of Figure 6. This additional clipping can be provided by a further limiter 30, shown in broken line in Figure 1. An alternative embodiment of the invention is shown in Figure 7 in which the input video signal is applied via a capacitor 71 to both a low pass filter 72, which passes only the picture block information and attenuates high frequencies and to a high pass filter 73, which passes the detail information whilst attenuating the low frequencies. The signal obtained from the low pass filter 72 is passed through an amplitude limiter 74 and subsequently is combined with the output from the high pass filter 73. The two signals are combined in a summing circuit 75 by means of which the relative gain of the two frequency bands can be adjusted. As before, the output of this circuit is fed to a monitor for display and it is of the same form as that shown in Figure 6. Whilst this circuit is superficially simpler than that of Figure 1, it does require the provision of a low pass filter, and for this reason the former circuit is to be preferred. Since both circuits are a.c. coupled by the input capacitors, it is necessary to subsequently insert blanking levels prior to display, but such measures are conventional. WHAT WE CLAIM IS:
1. A video signal processing arrangement including means for increasing the amplitude of high frequency video signal components corresponding to fine picture detail relative to low frequency video signal components corresponding to picture blocks.
2. A video signal processing arrangement as claimed in Claim 1 and wherein the arrangement includes means for reducing peak video signal levels whilst retaining or increasing the amplitude of high frequency signals corresponding to picture detail.
3. A video signal processing arrangement as claimed in Claim 1 or 2 and wherein a signal amplitude limiter is used to reduce the amplitude of relatively low frequency picture blocks to predetermined levels.
4. A video signal processing arrangement substantially as illustrated in and described with reference to Figures 1 to 7 of the accompanying drawings.
GB1252578A 1978-03-30 1978-03-30 Video signal processing arrangement Expired GB1600043A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1252578A GB1600043A (en) 1978-03-30 1978-03-30 Video signal processing arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1252578A GB1600043A (en) 1978-03-30 1978-03-30 Video signal processing arrangement

Publications (1)

Publication Number Publication Date
GB1600043A true GB1600043A (en) 1981-10-14

Family

ID=10006215

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1252578A Expired GB1600043A (en) 1978-03-30 1978-03-30 Video signal processing arrangement

Country Status (1)

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GB (1) GB1600043A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2145604A (en) * 1983-08-26 1985-03-27 Rca Corp Frequency selective video signal compression
EP0196826A1 (en) * 1985-03-25 1986-10-08 Rca Licensing Corporation Filtering system for processing a reduced-resolution video image
EP0512341A2 (en) * 1991-05-06 1992-11-11 Thomson Consumer Electronics, Inc. Television receiver with partially by-passed non-linear luminance signal processor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2145604A (en) * 1983-08-26 1985-03-27 Rca Corp Frequency selective video signal compression
US4573081A (en) * 1983-08-26 1986-02-25 Rca Corporation Frequency selective video signal compression
EP0196826A1 (en) * 1985-03-25 1986-10-08 Rca Licensing Corporation Filtering system for processing a reduced-resolution video image
EP0512341A2 (en) * 1991-05-06 1992-11-11 Thomson Consumer Electronics, Inc. Television receiver with partially by-passed non-linear luminance signal processor
EP0512341A3 (en) * 1991-05-06 1994-01-26 Thomson Consumer Electronics
TR26938A (en) * 1991-05-06 1994-08-24 Thomson Consumer Electronics Television receiver with partially omitted nonlinear luminance signal processor.
CN1048842C (en) * 1991-05-06 2000-01-26 汤姆森消费电子有限公司 Television receiver with partially by-passed non-linear luminance signal processor

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PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee