FR2632746B1 - Dispositif de traitement de donnees - Google Patents
Dispositif de traitement de donneesInfo
- Publication number
- FR2632746B1 FR2632746B1 FR8907536A FR8907536A FR2632746B1 FR 2632746 B1 FR2632746 B1 FR 2632746B1 FR 8907536 A FR8907536 A FR 8907536A FR 8907536 A FR8907536 A FR 8907536A FR 2632746 B1 FR2632746 B1 FR 2632746B1
- Authority
- FR
- France
- Prior art keywords
- data processing
- processing device
- data
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/262—Arrangements for next microinstruction selection
- G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63140779A JPH0682320B2 (ja) | 1988-06-08 | 1988-06-08 | データ処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2632746A1 FR2632746A1 (fr) | 1989-12-15 |
FR2632746B1 true FR2632746B1 (fr) | 1994-10-28 |
Family
ID=15276549
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8907536A Expired - Fee Related FR2632746B1 (fr) | 1988-06-08 | 1989-06-07 | Dispositif de traitement de donnees |
Country Status (3)
Country | Link |
---|---|
US (1) | US5095426A (fr) |
JP (1) | JPH0682320B2 (fr) |
FR (1) | FR2632746B1 (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5134693A (en) * | 1989-01-18 | 1992-07-28 | Intel Corporation | System for handling occurrence of exceptions during execution of microinstructions while running floating point and non-floating point instructions in parallel |
JP2504235B2 (ja) * | 1989-11-16 | 1996-06-05 | 三菱電機株式会社 | デ―タ処理装置 |
JP2581236B2 (ja) * | 1989-11-16 | 1997-02-12 | 三菱電機株式会社 | データ処理装置 |
US5237700A (en) * | 1990-03-21 | 1993-08-17 | Advanced Micro Devices, Inc. | Exception handling processor for handling first and second level exceptions with reduced exception latency |
US5574872A (en) * | 1991-12-10 | 1996-11-12 | Intel Corporation | Method and apparatus for controlling the saving of pipelines in pipelined processors during trap handling |
DE4237417C2 (de) * | 1992-03-25 | 1997-01-30 | Hewlett Packard Co | Datenverarbeitungssystem |
US5386563A (en) * | 1992-10-13 | 1995-01-31 | Advanced Risc Machines Limited | Register substitution during exception processing |
US5761407A (en) * | 1993-03-15 | 1998-06-02 | International Business Machines Corporation | Message based exception handler |
US5758141A (en) * | 1995-02-10 | 1998-05-26 | International Business Machines Corporation | Method and system for selective support of non-architected instructions within a superscaler processor system utilizing a special access bit within a machine state register |
US6052801A (en) * | 1995-05-10 | 2000-04-18 | Intel Corporation | Method and apparatus for providing breakpoints on a selectable address range |
US5659679A (en) * | 1995-05-30 | 1997-08-19 | Intel Corporation | Method and apparatus for providing breakpoints on taken jumps and for providing software profiling in a computer system |
US5740413A (en) * | 1995-06-19 | 1998-04-14 | Intel Corporation | Method and apparatus for providing address breakpoints, branch breakpoints, and single stepping |
US5621886A (en) * | 1995-06-19 | 1997-04-15 | Intel Corporation | Method and apparatus for providing efficient software debugging |
JP3451594B2 (ja) * | 1995-12-21 | 2003-09-29 | 株式会社森精機ハイテック | 数値制御装置における記憶手段アクセス制御方法および数値制御装置 |
FR2757653B1 (fr) * | 1996-12-20 | 1999-03-12 | Sextant Avionique | Controleur d'entrees-sorties autonome et deporte |
US6009515A (en) * | 1997-05-30 | 1999-12-28 | Sun Microsystems, Inc. | Digital data processing system including efficient arrangement to support branching within trap shadows |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3766532A (en) * | 1972-04-28 | 1973-10-16 | Nanodata Corp | Data processing system having two levels of program control |
GB1426749A (en) * | 1973-06-05 | 1976-03-03 | Burroughs Corp | Micro programme data processor having parallel instruction flow streams for plural level of subinstruction sets |
US4370709A (en) * | 1980-08-01 | 1983-01-25 | Tracor, Inc. | Computer emulator with three segment microcode memory and two separate microcontrollers for operand derivation and execution phases |
US4434462A (en) * | 1980-11-24 | 1984-02-28 | Texas Instruments Incorporated | Off-chip access for psuedo-microprogramming in microprocessor |
US4399505A (en) * | 1981-02-06 | 1983-08-16 | Data General Corporaton | External microcode operation in a multi-level microprocessor |
US4928223A (en) * | 1982-10-06 | 1990-05-22 | Fairchild Semiconductor Corporation | Floating point microprocessor with directable two level microinstructions |
US4901235A (en) * | 1983-10-28 | 1990-02-13 | Data General Corporation | Data processing system having unique multilevel microcode architecture |
US4975837A (en) * | 1984-10-01 | 1990-12-04 | Unisys Corporation | Programmable unit having plural levels of subinstruction sets where a portion of the lower level is embedded in the code stream of the upper level of the subinstruction sets |
-
1988
- 1988-06-08 JP JP63140779A patent/JPH0682320B2/ja not_active Expired - Lifetime
-
1989
- 1989-06-06 US US07/361,977 patent/US5095426A/en not_active Expired - Fee Related
- 1989-06-07 FR FR8907536A patent/FR2632746B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH01310441A (ja) | 1989-12-14 |
US5095426A (en) | 1992-03-10 |
JPH0682320B2 (ja) | 1994-10-19 |
FR2632746A1 (fr) | 1989-12-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |