FR2339955A1 - Procede de fabrication d'un circuit integre - Google Patents
Procede de fabrication d'un circuit integreInfo
- Publication number
- FR2339955A1 FR2339955A1 FR7702465A FR7702465A FR2339955A1 FR 2339955 A1 FR2339955 A1 FR 2339955A1 FR 7702465 A FR7702465 A FR 7702465A FR 7702465 A FR7702465 A FR 7702465A FR 2339955 A1 FR2339955 A1 FR 2339955A1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- manufacturing process
- manufacturing
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51009870A JPS598065B2 (ja) | 1976-01-30 | 1976-01-30 | Mos集積回路の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2339955A1 true FR2339955A1 (fr) | 1977-08-26 |
FR2339955B1 FR2339955B1 (fr) | 1982-05-07 |
Family
ID=11732165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7702465A Granted FR2339955A1 (fr) | 1976-01-30 | 1977-01-28 | Procede de fabrication d'un circuit integre |
Country Status (6)
Country | Link |
---|---|
US (1) | US4177096A (fr) |
JP (1) | JPS598065B2 (fr) |
CA (1) | CA1074457A (fr) |
DE (1) | DE2703618C2 (fr) |
FR (1) | FR2339955A1 (fr) |
GB (1) | GB1577017A (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0076147A2 (fr) * | 1981-09-30 | 1983-04-06 | Fujitsu Limited | Procédé pour la fabrication d'un dispositif semiconducteur comportant une région d'isolation |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5538084A (en) * | 1978-09-11 | 1980-03-17 | Nec Corp | Semiconductor integrated circuit device |
DE2902665A1 (de) * | 1979-01-24 | 1980-08-07 | Siemens Ag | Verfahren zum herstellen von integrierten mos-schaltungen in silizium-gate- technologie |
US4285117A (en) * | 1979-09-06 | 1981-08-25 | Teletype Corporation | Method of manufacturing a device in a silicon wafer |
JPS5723243A (en) * | 1980-07-17 | 1982-02-06 | Seiko Epson Corp | Semiconductor integrated circuit |
JPS641285U (fr) * | 1987-06-19 | 1989-01-06 | ||
JPH04242968A (ja) * | 1991-01-08 | 1992-08-31 | Fujitsu Ltd | 半導体集積回路 |
US5426065A (en) * | 1993-11-30 | 1995-06-20 | Sgs-Thomson Microelectronics, Inc. | Method of making transistor devices in an SRAM cell |
JP4834568B2 (ja) * | 2007-02-22 | 2011-12-14 | 株式会社東芝 | 半導体装置及びその製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3533158A (en) * | 1967-10-30 | 1970-10-13 | Hughes Aircraft Co | Method of utilizing an ion beam to form custom circuits |
US3747200A (en) * | 1972-03-31 | 1973-07-24 | Motorola Inc | Integrated circuit fabrication method |
GB1364676A (en) * | 1970-07-10 | 1974-08-29 | Philips Electronic Associated | Semiconductor integrated device |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3921282A (en) * | 1971-02-16 | 1975-11-25 | Texas Instruments Inc | Insulated gate field effect transistor circuits and their method of fabrication |
US3921283A (en) * | 1971-06-08 | 1975-11-25 | Philips Corp | Semiconductor device and method of manufacturing the device |
GB1357515A (en) * | 1972-03-10 | 1974-06-26 | Matsushita Electronics Corp | Method for manufacturing an mos integrated circuit |
US3985591A (en) * | 1972-03-10 | 1976-10-12 | Matsushita Electronics Corporation | Method of manufacturing parallel gate matrix circuits |
US3893152A (en) * | 1973-07-25 | 1975-07-01 | Hung Chang Lin | Metal nitride oxide semiconductor integrated circuit structure |
GB1457139A (en) * | 1973-09-27 | 1976-12-01 | Hitachi Ltd | Method of manufacturing semiconductor device |
JPS5214594B2 (fr) * | 1973-10-17 | 1977-04-22 | ||
JPS5087787A (fr) * | 1973-12-07 | 1975-07-15 | ||
NL180466C (nl) * | 1974-03-15 | 1987-02-16 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam voorzien van een in het halfgeleiderlichaam verzonken patroon van isolerend materiaal. |
JPS50148084A (fr) * | 1974-05-20 | 1975-11-27 | ||
US4021789A (en) * | 1975-09-29 | 1977-05-03 | International Business Machines Corporation | Self-aligned integrated circuits |
-
1976
- 1976-01-30 JP JP51009870A patent/JPS598065B2/ja not_active Expired
-
1977
- 1977-01-25 US US05/762,301 patent/US4177096A/en not_active Expired - Lifetime
- 1977-01-28 CA CA270,612A patent/CA1074457A/fr not_active Expired
- 1977-01-28 GB GB3535/77A patent/GB1577017A/en not_active Expired
- 1977-01-28 DE DE2703618A patent/DE2703618C2/de not_active Expired
- 1977-01-28 FR FR7702465A patent/FR2339955A1/fr active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3533158A (en) * | 1967-10-30 | 1970-10-13 | Hughes Aircraft Co | Method of utilizing an ion beam to form custom circuits |
GB1364676A (en) * | 1970-07-10 | 1974-08-29 | Philips Electronic Associated | Semiconductor integrated device |
US3747200A (en) * | 1972-03-31 | 1973-07-24 | Motorola Inc | Integrated circuit fabrication method |
Non-Patent Citations (1)
Title |
---|
CA1973 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0076147A2 (fr) * | 1981-09-30 | 1983-04-06 | Fujitsu Limited | Procédé pour la fabrication d'un dispositif semiconducteur comportant une région d'isolation |
EP0076147A3 (en) * | 1981-09-30 | 1985-09-25 | Fujitsu Limited | Method of producing a semiconductor device comprising an isolation region |
Also Published As
Publication number | Publication date |
---|---|
CA1074457A (fr) | 1980-03-25 |
JPS598065B2 (ja) | 1984-02-22 |
DE2703618A1 (de) | 1977-08-04 |
GB1577017A (en) | 1980-10-15 |
US4177096A (en) | 1979-12-04 |
FR2339955B1 (fr) | 1982-05-07 |
DE2703618C2 (de) | 1982-09-02 |
JPS5293282A (en) | 1977-08-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
D9 | Licence |
Free format text: CORRECTION |
|
ST | Notification of lapse |