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FR2356277A1 - Composant a semi-conducteurs comportant au moins deux zones possedant des types de conductivite differents et formant une jonction pn, et procede pour sa fabrication - Google Patents

Composant a semi-conducteurs comportant au moins deux zones possedant des types de conductivite differents et formant une jonction pn, et procede pour sa fabrication

Info

Publication number
FR2356277A1
FR2356277A1 FR7718024A FR7718024A FR2356277A1 FR 2356277 A1 FR2356277 A1 FR 2356277A1 FR 7718024 A FR7718024 A FR 7718024A FR 7718024 A FR7718024 A FR 7718024A FR 2356277 A1 FR2356277 A1 FR 2356277A1
Authority
FR
France
Prior art keywords
junction
conductivity
different types
semiconductor component
zones
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7718024A
Other languages
English (en)
Other versions
FR2356277B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of FR2356277A1 publication Critical patent/FR2356277A1/fr
Application granted granted Critical
Publication of FR2356277B1 publication Critical patent/FR2356277B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/50—Physical imperfections
    • H10D62/53—Physical imperfections the imperfections being within the semiconductor body 
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/061—Gettering-armorphous layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/093—Laser beam treatment in general

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Bipolar Transistors (AREA)

Abstract

L'invention concerne un composant à semi-conducteurs comportant au moins deux zones formant une jonction pn et possédant des types de conductivité différents et un procédé pour sa fabrication. Dans ce composant, comportant un substrat semi-conducteur 1 sous la forme d'un transistor planar possédant des zones de collecteur 2 et une zone de base 3 et recouvert par une couche d'oxyde 5 comportant une fenêtre 7, une région 4 possédant une structure de réseau perturbée est ménagée dans une zone 20 réalisée au moyen d'un processus de diffusion. Application notamment aux composants fabriqués suivant la technique planar.
FR7718024A 1976-06-22 1977-06-13 Composant a semi-conducteurs comportant au moins deux zones possedant des types de conductivite differents et formant une jonction pn, et procede pour sa fabrication Granted FR2356277A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762627855 DE2627855A1 (de) 1976-06-22 1976-06-22 Halbleiterbauelement mit wenigstens zwei, einen pn-uebergang bildenden zonen unterschiedlichen leitungstyps sowie verfahren zu dessen herstellung

Publications (2)

Publication Number Publication Date
FR2356277A1 true FR2356277A1 (fr) 1978-01-20
FR2356277B1 FR2356277B1 (fr) 1982-05-14

Family

ID=5981107

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7718024A Granted FR2356277A1 (fr) 1976-06-22 1977-06-13 Composant a semi-conducteurs comportant au moins deux zones possedant des types de conductivite differents et formant une jonction pn, et procede pour sa fabrication

Country Status (6)

Country Link
US (1) US4216030A (fr)
JP (1) JPS531476A (fr)
DE (1) DE2627855A1 (fr)
FR (1) FR2356277A1 (fr)
GB (1) GB1558937A (fr)
IT (1) IT1078689B (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0018520A1 (fr) * 1979-04-30 1980-11-12 International Business Machines Corporation Procédé d'élimination des défauts de réseau causés par l'implantation d'ions de phosphore dans des couches de type N de dispositifs semiconducteurs au silicium et dispositif obtenu
WO1985001391A1 (fr) * 1983-09-12 1985-03-28 Hughes Aircraft Company Transistor a effet de champ cmos de densite elevee a puits retrograde multiple, immun au verrouillage
FR2604562A1 (fr) * 1986-09-25 1988-04-01 Rca Corp Dispositif semi-conducteur silicium-sur-isolant et procede de fabrication

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
US4315782A (en) * 1980-07-21 1982-02-16 Rca Corporation Method of making semiconductor device with passivated rectifying junctions having hydrogenated amorphous regions
US4391651A (en) * 1981-10-15 1983-07-05 The United States Of America As Represented By The Secretary Of The Navy Method of forming a hyperabrupt interface in a GaAs substrate
JPS58132922A (ja) * 1982-02-01 1983-08-08 Toshiba Corp 半導体装置の製造方法
US4456489A (en) * 1982-10-15 1984-06-26 Motorola, Inc. Method of forming a shallow and high conductivity boron doped layer in silicon
JPS59204229A (ja) * 1983-05-04 1984-11-19 Sony Corp 半導体装置の製造方法
US4710477A (en) * 1983-09-12 1987-12-01 Hughes Aircraft Company Method for forming latch-up immune, multiple retrograde well high density CMOS FET
US4606443A (en) * 1983-11-30 1986-08-19 Harada Industry Co., Ltd. Planetary drive with overload clutch release means for an antenna
US4617066A (en) * 1984-11-26 1986-10-14 Hughes Aircraft Company Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
GB2213988B (en) * 1987-12-18 1992-02-05 Matsushita Electric Works Ltd Semiconductor device
JP3313432B2 (ja) * 1991-12-27 2002-08-12 株式会社東芝 半導体装置及びその製造方法
US5286660A (en) * 1992-12-24 1994-02-15 Motorola, Inc. Method for doping a semiconductor wafer having a diffusivity enhancement region
JP3311210B2 (ja) * 1995-07-28 2002-08-05 株式会社東芝 半導体装置およびその製造方法
JP2848439B2 (ja) * 1995-11-10 1999-01-20 日本電気株式会社 半導体装置の製造方法
US5976956A (en) * 1997-04-11 1999-11-02 Advanced Micro Devices, Inc. Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1938365A1 (de) * 1968-08-06 1970-02-12 Ibm Verfahren zum Herstellen integrierter Schaltungen
US3810791A (en) * 1970-08-03 1974-05-14 Texas Instruments Inc Process for the fabrication of semiconductor materials
FR2241144A1 (en) * 1973-08-14 1975-03-14 Radiotechnique Compelec Semi-conductors for transit time and avalanche diodes - having concentration profiles with steep gradients in opposing directions
US3918996A (en) * 1970-11-02 1975-11-11 Texas Instruments Inc Formation of integrated circuits using proton enhanced diffusion

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3900345A (en) * 1973-08-02 1975-08-19 Motorola Inc Thin low temperature epi regions by conversion of an amorphous layer
US3925106A (en) * 1973-12-26 1975-12-09 Ibm Ion bombardment method of producing integrated semiconductor circuit resistors of low temperature coefficient of resistance
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS51123562A (en) * 1975-04-21 1976-10-28 Sony Corp Production method of semiconductor device
US4056408A (en) * 1976-03-17 1977-11-01 Westinghouse Electric Corporation Reducing the switching time of semiconductor devices by nuclear irradiation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1938365A1 (de) * 1968-08-06 1970-02-12 Ibm Verfahren zum Herstellen integrierter Schaltungen
DE1966237A1 (de) * 1968-08-06 1972-01-13 Ibm Verfahren zur Erhoehung des Gradienten von Stoerstellenkonzentrationen
US3810791A (en) * 1970-08-03 1974-05-14 Texas Instruments Inc Process for the fabrication of semiconductor materials
US3918996A (en) * 1970-11-02 1975-11-11 Texas Instruments Inc Formation of integrated circuits using proton enhanced diffusion
FR2241144A1 (en) * 1973-08-14 1975-03-14 Radiotechnique Compelec Semi-conductors for transit time and avalanche diodes - having concentration profiles with steep gradients in opposing directions

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0018520A1 (fr) * 1979-04-30 1980-11-12 International Business Machines Corporation Procédé d'élimination des défauts de réseau causés par l'implantation d'ions de phosphore dans des couches de type N de dispositifs semiconducteurs au silicium et dispositif obtenu
WO1985001391A1 (fr) * 1983-09-12 1985-03-28 Hughes Aircraft Company Transistor a effet de champ cmos de densite elevee a puits retrograde multiple, immun au verrouillage
FR2604562A1 (fr) * 1986-09-25 1988-04-01 Rca Corp Dispositif semi-conducteur silicium-sur-isolant et procede de fabrication

Also Published As

Publication number Publication date
DE2627855A1 (de) 1977-12-29
GB1558937A (en) 1980-01-09
IT1078689B (it) 1985-05-08
US4216030A (en) 1980-08-05
FR2356277B1 (fr) 1982-05-14
JPS531476A (en) 1978-01-09

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