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FR2197273B1 - - Google Patents

Info

Publication number
FR2197273B1
FR2197273B1 FR7330505A FR7330505A FR2197273B1 FR 2197273 B1 FR2197273 B1 FR 2197273B1 FR 7330505 A FR7330505 A FR 7330505A FR 7330505 A FR7330505 A FR 7330505A FR 2197273 B1 FR2197273 B1 FR 2197273B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7330505A
Other versions
FR2197273A1 (fr
Inventor
F Sordello
R Cloke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Information Storage Systems Inc
Original Assignee
Information Storage Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Information Storage Systems Inc filed Critical Information Storage Systems Inc
Publication of FR2197273A1 publication Critical patent/FR2197273A1/fr
Application granted granted Critical
Publication of FR2197273B1 publication Critical patent/FR2197273B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Manipulation Of Pulses (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
FR7330505A 1972-08-23 1973-08-22 Expired FR2197273B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00283106A US3792361A (en) 1972-08-23 1972-08-23 High speed data separator

Publications (2)

Publication Number Publication Date
FR2197273A1 FR2197273A1 (fr) 1974-03-22
FR2197273B1 true FR2197273B1 (fr) 1976-06-18

Family

ID=23084546

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7330505A Expired FR2197273B1 (fr) 1972-08-23 1973-08-22

Country Status (8)

Country Link
US (1) US3792361A (fr)
JP (1) JPS5631780B2 (fr)
CA (1) CA975438A (fr)
DE (1) DE2326658C3 (fr)
FR (1) FR2197273B1 (fr)
GB (1) GB1430212A (fr)
IT (1) IT998404B (fr)
NL (1) NL154847B (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4043438A (en) * 1976-04-27 1977-08-23 Litton Business Systems, Inc. Printing control circuit
US4034348A (en) * 1976-06-28 1977-07-05 Honeywell Information Systems, Inc. Apparatus, including delay means, for sampling and recovering data recorded by the double transition recording technique
US4285345A (en) * 1979-07-02 1981-08-25 Vitatron Medical B.V. Monolithic pacemaker utilizing I2 L circuitry
US4274067A (en) * 1979-09-27 1981-06-16 Communications Satellite Corporation Universal clock recovery network for QPSK modems
KR0168079B1 (ko) * 1992-12-14 1999-03-20 윤종용 클럭발생장치
US6061347A (en) * 1998-03-03 2000-05-09 Rockwell Semiconductor Systems, Inc. ACD with packet data based agent interconnect

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3518554A (en) * 1967-05-22 1970-06-30 Honeywell Inc Detection of double transition recording
GB1126160A (en) * 1967-08-26 1968-09-05 Ibm Gating circuit and magnetic storage device incorporating such a circuit
JPS5040338B1 (fr) * 1968-12-04 1975-12-23
US3609560A (en) * 1970-01-09 1971-09-28 Bedford Associates Inc Data separation circuit for magnetic recorder memories
DE2433328A1 (de) * 1974-07-11 1976-01-29 Philips Patentverwaltung Integrierte schaltungsanordnung

Also Published As

Publication number Publication date
US3792361A (en) 1974-02-12
IT998404B (it) 1976-01-20
DE2326658A1 (de) 1974-03-21
GB1430212A (en) 1976-03-31
NL7311665A (fr) 1974-02-26
DE2326658B2 (de) 1975-01-16
JPS5631780B2 (fr) 1981-07-23
FR2197273A1 (fr) 1974-03-22
NL154847B (nl) 1977-10-17
CA975438A (en) 1975-09-30
DE2326658C3 (de) 1979-12-13
JPS49134206A (fr) 1974-12-24

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Legal Events

Date Code Title Description
TP Transmission of property
TP Transmission of property
ST Notification of lapse